Merge pull request #1 from amlel-el-mahrouss/dev

arm64: fix: a fully arm64 firmware + important fixes and patches.

12 files changed, 157 insertions, 54 deletions

diff --git a/.github/workflows/arm64.yml b/.github/workflows/arm64.yml
index 526e8a0..14a815a 100644
--- a/.github/workflows/arm64.yml
+++ b/.github/workflows/arm64.yml
@@ -1,4 +1,4 @@
-name: FW CI
+name: FW CI (ARM64)
 
 on:
   push:
@@ -14,6 +14,6 @@ jobs:
     steps:
     - uses: actions/checkout@v4
     - name: Install Packages
-      run: sudo apt update && sudo apt install gcc-arm-none-eabi
+      run: sudo apt update && sudo apt install gcc-aarch64-linux-gnu
     - name: Build FW (ARM64)
-      run: cd src && cd arm64 && make all
\ No newline at end of file
+      run: cd src && cd arm64 && make -f ci.make all
\ No newline at end of file
diff --git a/lib/partition-map.h b/lib/partition-map.h
index 3a05ae3..37e9912 100644
--- a/lib/partition-map.h
+++ b/lib/partition-map.h
@@ -35,9 +35,8 @@
 #define EPM_MAGIC "EPMMS" /* mass storage */
 #endif
 
-#define EPM_MAX_BLKS 128 /* 1 on UEFI EPM. */
+#define EPM_MAX_BLKS (128) /* 1 on UEFI EPM. */
 
-#define EPM_BOOT_BLK_SZ sizeof(struct boot_block)
 #define EPM_PART_BLK_SZ sizeof(struct part_block)
 
 /// @brief Start of EPM headers.
diff --git a/src/arm64/arm64-boot.S b/src/arm64/arm64-boot.S
index bcbec0e..4fbd3f8 100644
--- a/src/arm64/arm64-boot.S
+++ b/src/arm64/arm64-boot.S
@@ -1,15 +1,14 @@
 /* -------------------------------------------
 
-    Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+    Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
-.text
-
-.balign 4
+.section .text
 .global cb_reset_vector
-
 cb_reset_vector:
-	ldr sp, =__cb_stack_end
-	/* don't care about page_zero, it's gonna be a raw binary */
-    b cb_start_exec
+    ldr x0, =0x40080000
+    mov sp, x0         
+    b cb_start_exec         
+
+
diff --git a/src/arm64/arm64-start-context.S b/src/arm64/arm64-start-context.S
index 5db92d0..5a2539b 100644
--- a/src/arm64/arm64-start-context.S
+++ b/src/arm64/arm64-start-context.S
@@ -11,7 +11,6 @@
 
 cb_start_context:
     bl cb_start_context
-    ldr pc, [lr]
 
 cb_boot_processor_ready:
-    ldr pc, [lr]
+    bl cb_boot_processor_ready
diff --git a/src/arm64/arm64-uart.c b/src/arm64/arm64-uart.c
index 362fc24..7455626 100644
--- a/src/arm64/arm64-uart.c
+++ b/src/arm64/arm64-uart.c
@@ -21,12 +21,11 @@ static boolean cb_locked_put_char = no;
 /// @brief Retrieve character from cb_uart_ptr
 utf_char_t cb_get_char(void)
 {
-	// check if ready.
 	while ((ARM64_MMIO_REG(0x018) & (1 << 4)))
 	{
 	}
 
-	return (utf_char_t)ARM64_MMIO_REG(0x0);
+	return (utf_char_t)ARM64_MMIO_REG(0x0) & 0xFF;
 }
 
 void cb_put_char(utf_char_t ch)
diff --git a/src/arm64/ci.make b/src/arm64/ci.make
new file mode 100644
index 0000000..169d7f7
--- /dev/null
+++ b/src/arm64/ci.make
@@ -0,0 +1,70 @@
+ #
+ #	========================================================
+ #
+ #	CoreBoot
+ # 	Date Added: 08/11/2023
+ # 	Copyright 2024, ZKA Technologies, all rights reserved.
+ #
+ # 	========================================================
+ #
+
+CC=aarch64-linux-gnu-gcc
+AS=aarch64-linux-gnu-as
+
+COREBOOT=core-boot.elf
+FIRMWARE=boot.rom
+STAGE2=bootstg2.rom
+
+FLAGS=-c -D__COMPILE_ARM64__ -I../../ -Wall -c -nostdlib -ffreestanding -fno-builtin \
+		-D__BSTRICT__ -D__BDEBUG__
+
+C_SRC=$(wildcard *.c) $(wildcard ../*.c) -c
+
+AS_FLAGS= -c -I../../
+
+LD=aarch64-linux-gnu-ld
+OBJ=*.o
+FLAGS_LD= --script=script.lds -o core-boot.elf -nostdlib
+OBJCOPY=aarch64-linux-gnu-objcopy
+
+EMU=qemu-system-aarch64
+EMU_FLAGS=-M virt -cpu cortex-a57 -bios $(FIRMWARE) -m 256M -d int -smp 2
+
+WAIT=sleep 1
+
+.PHONY: all
+all: firmware-link
+	@echo "[CoreBoot] build done."
+
+.PHONY: firmware-link
+firmware-link: firmware-compile
+	$(LD) $(OBJ) $(FLAGS_LD)
+
+.PHONY: rom
+rom:
+	qemu-img create -f qcow2 epm.img 256M
+	qemu-img create -f raw bootstg2.rom 64M
+	$(OBJCOPY) --strip-all -O binary $(COREBOOT) $(FIRMWARE)
+
+# compile firmware
+.PHONY: firmware-compile
+firmware-compile:
+	$(CC) $(FLAGS) $(C_SRC)
+	$(AS) arm64-start-context.S -o arm64-start-context.o
+	$(AS) arm64-boot.S -o arm64-boot.o
+	
+
+# launch qemu rule
+.PHONY: run
+run:
+	$(EMU) $(EMU_FLAGS)
+
+# launch qemu with attached debugger
+.PHONY: run-dbg
+run-dbg:
+	$(EMU) -s -S $(EMU_FLAGS)
+
+# remove object files
+.PHONY: clean
+clean:
+	rm -f $(wildcard *.o) $(wildcard *.elf) $(wildcard *.rom) $(wildcard *.epm)
diff --git a/src/arm64/makefile b/src/arm64/makefile
index 19f88f5..7aa0ae4 100644
--- a/src/arm64/makefile
+++ b/src/arm64/makefile
@@ -8,10 +8,12 @@
  # 	========================================================
  #
 
-CC=arm-none-eabi-gcc
-AS=arm-none-eabi-as
+CC=aarch64-elf-gcc
+AS=aarch64-elf-as
 
+COREBOOT=core-boot.elf
 FIRMWARE=boot.rom
+STAGE2=bootstg2.rom
 
 FLAGS=-c -D__COMPILE_ARM64__ -I../../ -Wall -c -nostdlib -ffreestanding -fno-builtin \
 		-D__BSTRICT__ -D__BDEBUG__
@@ -20,13 +22,13 @@ C_SRC=$(wildcard *.c) $(wildcard ../*.c) -c
 
 AS_FLAGS= -c -I../../
 
-LD=arm-none-eabi-ld
+LD=aarch64-elf-ld
 OBJ=*.o
 FLAGS_LD= --script=script.lds -o core-boot.elf -nostdlib
+OBJCOPY=aarch64-elf-objcopy
 
-EMU=qemu-system-arm
-EMU_FLAGS=-M virt -cpu cortex-a15 -kernel $(FIRMWARE) -s \
-			-drive file=bootstg2.rom,format=raw
+EMU=qemu-system-aarch64
+EMU_FLAGS=-M virt -cpu cortex-a57 -bios $(FIRMWARE) -m 256M -d int -smp 2
 
 WAIT=sleep 1
 
@@ -41,16 +43,15 @@ firmware-link: firmware-compile
 .PHONY: rom
 rom:
 	qemu-img create -f qcow2 epm.img 256M
-	qemu-img create -f raw boot.rom 512K
 	qemu-img create -f raw bootstg2.rom 64M
-	dd if=core-boot.elf of=boot.rom bs=1 seek=0 conv=notrunc
+	$(OBJCOPY) --strip-all -O binary $(COREBOOT) $(FIRMWARE)
 
 # compile firmware
 .PHONY: firmware-compile
 firmware-compile:
 	$(CC) $(FLAGS) $(C_SRC)
-	$(AS) -march=armv7-a -mcpu=cortex-a15 arm64-start-context.S -o arm64-start-context.o
-	$(AS) -march=armv7-a -mcpu=cortex-a15 arm64-boot.S -o arm64-boot.o
+	$(AS) arm64-start-context.S -o arm64-start-context.o
+	$(AS) arm64-boot.S -o arm64-boot.o
 	
 
 # launch qemu rule
@@ -61,7 +62,7 @@ run:
 # launch qemu with attached debugger
 .PHONY: run-dbg
 run-dbg:
-	$(EMU) $(EMU_FLAGS)
+	$(EMU) -s -S $(EMU_FLAGS)
 
 # remove object files
 .PHONY: clean
diff --git a/src/arm64/script.lds b/src/arm64/script.lds
index b8a0d11..6daad64 100644
--- a/src/arm64/script.lds
+++ b/src/arm64/script.lds
@@ -1,14 +1,14 @@
 ENTRY(cb_reset_vector)
+
 SECTIONS
 {
-  . = 0x40100000;
+    . = 0x00000000;
 
-  .text : { *(.text) }
-  .data : { *(.data) }
-  .bss : { *(.bss COMMON) }
-  . = ALIGN(8);
-  . = . + 0x1000; /* 4kB of stack memory */
-  __cb_stack_end = .;
+    .text : {
+        *(.text*)
+    }
 
-  PROVIDE(cb_memory_end = .);
-}
+    .bss : {
+        *(.bss*)
+    }
+}
\ No newline at end of file
diff --git a/src/coreboot-partition-map-parse.c b/src/coreboot-partition-map-parse.c
index 6e828d9..85ccf1b 100644
--- a/src/coreboot-partition-map-parse.c
+++ b/src/coreboot-partition-map-parse.c
@@ -16,7 +16,7 @@ bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t ind
 		(sizeof(part_block_t) * index) > blob_sz)
 		return false;
 
-	part_block_t* block = (part_block_t*)(block + (sizeof(part_block_t) * index));
+	part_block_t* block = (part_block_t*)(blob + (sizeof(part_block_t) * index));
 
 	if (block->version != EPM_REVISION ||
 		block->num_blocks < 1 ||
@@ -42,7 +42,9 @@ part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t
 		(sizeof(part_block_t) * index) > blob_sz)
 		return nil;
 
-	part_block_t* block = (part_block_t*)(block + (sizeof(part_block_t) * index));
+	part_block_t* block = (part_block_t*)(blob + (sizeof(part_block_t) * index));
+
+	cb_put_string(block->magic);
 
 	if (block->version != EPM_REVISION ||
 		block->num_blocks < 1 ||
diff --git a/src/coreboot-print-name.c b/src/coreboot-print-name.c
index 48f7869..e2ad8c4 100644
--- a/src/coreboot-print-name.c
+++ b/src/coreboot-print-name.c
@@ -11,7 +11,7 @@
 void cb_print_name(void)
 {
 #ifdef __COMPILE_POWERPC__
-	cb_put_string(">> CoreBoot for POWER.\r\n");
+	cb_put_string(">> CoreBoot for POWERPC.\r\n");
 #endif // __COMPILE_POWERPC__
 
 #ifdef __COMPILE_ARM64__
diff --git a/src/coreboot-start.c b/src/coreboot-start.c
index 21ee5b0..07606fc 100644
--- a/src/coreboot-start.c
+++ b/src/coreboot-start.c
@@ -22,29 +22,25 @@
 
 /////////////////////////////////////////////////////////////////////////////////////////
 
-extern void cb_append_scsi_tree(void);
-extern void cb_append_video_tree(void);
-
 extern void cb_start_context(uintptr_t);
 extern void cb_start_rom(void);
 
 extern int cb_boot_processor_ready;
 
 /// @brief hardware thread counter.
-uint64_t __cb_hart_counter = 0UL;
 
 /// @brief Start executing the firmware.
 /// @param
 void cb_start_exec(void)
 {
+	static uint64_t __cb_hart_counter = 0UL;
+
 	++__cb_hart_counter;
 
 	uintptr_t hart = __cb_hart_counter;
 
-	cb_sync_synchronize();
-
 	// let the hart 0 init our stuff.
-	if (hart == 1)
+	if (hart == 0)
 	{
 		cb_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
 		cb_put_string(__DATE__);
@@ -87,16 +83,18 @@ void cb_start_exec(void)
 	{
 		if (boot_hdr->h_revision != CB_BOOT_VER)
 		{
-			if (hart == 1)
+			if (hart == 0)
 			{
-				cb_put_string("CB> Can't Boot the Stage2, invalid signature. (CB0003)\r\n");
+				cb_put_string("CB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
 			}
 		}
 		else
 		{
-			if (hart == 1)
+			if (hart == 0)
 			{
-				cb_put_string("CB> Executing Stage2: ");
+				cb_pci_append_tree("@stage2-lx", (cb_pci_num_t)boot_hdr, sizeof(struct cb_boot_header));
+
+				cb_put_string("CB> Executing StageTwo: ");
 				cb_put_string((const char*)boot_hdr->h_name);
 				cb_put_char('\r');
 				cb_put_char('\n');
@@ -110,14 +108,43 @@ void cb_start_exec(void)
 				cb_start_context(boot_hdr->h_start_address);
 			}
 
-			cb_put_string("CB> Stage2 has returned? (CB0002)\r\n");
+			cb_put_string("CB> StageTwo has returned? (CB0002)\r\n");
 		}
 	}
 	else
 	{
+		cb_put_string("CB> Trying EPM partition...\r\n");
+
+		part_block_t* blk = cb_parse_partition_block_at((voidptr_t)CB_FLASH_BASE_ADDR, EPM_PART_BLK_SZ, 0);
+
+		if (blk)
+		{
+			cb_pci_append_tree("@stage2-epm", (cb_pci_num_t)blk, sizeof(part_block_t) * blk->num_blocks);
+
+			size_t indx = 0;
+			size_t end_lba, start_lba, sector_sz;
+
+			while (indx < blk->num_blocks)
+			{
+				if (cb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba, &start_lba, &sector_sz) == no)
+				{
+					++indx;
+					continue;
+				}
+
+				cb_boot_processor_ready = 1;
+				cb_start_context((uintptr_t)(voidptr_t)blk + start_lba);
+
+				if (hart == 1)
+				{
+					cb_put_string("CB> Can't boot to StageTwo. (CB0001)\r\n");
+				}
+			}
+		}
+
 		if (hart == 1)
 		{
-			cb_put_string("CB> Can't boot to Stage2. (CB0001)\r\n");
+			cb_put_string("CB> Can't boot to StageTwo via EPM, no bootable partition blocks found. (CB0001)\r\n");
 		}
 	}
 
@@ -125,7 +152,7 @@ void cb_start_exec(void)
 
 	if (hart > 1)
 	{
-		while (1)
+		while (yes)
 		{
 			if (__cb_hart_counter == 0)
 			{
diff --git a/src/rv64/rv64-uart.c b/src/rv64/rv64-uart.c
index 73964ef..0bc6517 100644
--- a/src/rv64/rv64-uart.c
+++ b/src/rv64/rv64-uart.c
@@ -16,6 +16,7 @@ static uint8_t* cb_uart_ptr = (uint8_t*)CB_UART_BASE;
 utf_char_t cb_get_char(void)
 {
 	uintptr_t ptr = CB_UART_BASE;
+
 	while (!(*(((volatile uint8_t*)ptr) + 0x05) & 0x01))
 		;
 
@@ -27,8 +28,14 @@ static boolean cb_locked_put_char = no;
 
 void cb_put_char(utf_char_t ch)
 {
+	int32_t timeout = 0;
+
 	while (cb_locked_put_char)
 	{
+		++timeout;
+
+		if (timeout > 1000000)
+			break;
 	}
 
 	cb_locked_put_char = yes;