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authorAmlal <amlal.elmahrouss@icloud.com>2025-01-21 20:32:19 +0100
committerAmlal <amlal.elmahrouss@icloud.com>2025-01-21 20:32:19 +0100
commit046d884b50c32cacd3523071541e7e38241083f3 (patch)
tree92ce6fd53e0c031c569270b04aefa8fc0aa1e074
ADD: CoreBoot, also comes with my reimplementation of libfdt, which is just a dumb rewrite.
Signed-off-by: Amlal <amlal.elmahrouss@icloud.com>
-rw-r--r--.clang-format16
-rw-r--r--.gitignore222
-rw-r--r--.gitmodules3
-rw-r--r--Doxyfile2823
-rw-r--r--LICENSE201
-rw-r--r--MailMap1
-rw-r--r--ReadMe.md8
-rw-r--r--compile_flags.txt2
-rw-r--r--docs/.gitkeep0
-rw-r--r--docs/SPECIFICATION.TXT31
-rw-r--r--lib/.gitkeep0
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-rw-r--r--lib/arm64/.gitkeep0
-rw-r--r--lib/boot.h195
-rw-r--r--lib/cxx-abi.h23
-rw-r--r--lib/fd.h32
-rw-r--r--lib/mp-bit.h19
-rw-r--r--lib/netboot.h27
-rw-r--r--lib/partition-map.h103
-rw-r--r--lib/pci-tree.h70
-rw-r--r--lib/ppc64/mmu.h813
-rw-r--r--lib/ppc64/processor.h1424
-rw-r--r--lib/rv64/.gitkeep0
-rw-r--r--lib/string.h23
-rw-r--r--lib/x86s/.gitkeep0
-rw-r--r--lib/xcoff.h41
-rw-r--r--libfdt/README4
-rw-r--r--libfdt/libfdt.h189
-rw-r--r--libfdt/libfdt_address.c134
-rw-r--r--libfdt/libfdt_empty_tree.c49
-rw-r--r--libfdt/libfdt_env.h68
-rw-r--r--libfdt/libfdt_strerror.c75
-rw-r--r--pci-map/.gitkeep0
-rw-r--r--pci-map/standard.json11
-rwxr-xr-xrun_format.sh16
-rw-r--r--src/32x0/32x0_boot.32x42
-rw-r--r--src/64x0/.gitkeep0
-rw-r--r--src/64x0/64x0_boot.64x13
-rw-r--r--src/amd64/amd64-boot.asm40
-rw-r--r--src/amd64/amd64-test.asm19
-rwxr-xr-xsrc/amd64/amd64.sh4
-rw-r--r--src/arm64/arm64-30pin.c13
-rw-r--r--src/arm64/arm64-boot.S15
-rw-r--r--src/arm64/arm64-err.c23
-rw-r--r--src/arm64/arm64-start-context.S17
-rw-r--r--src/arm64/arm64-uart.c54
-rw-r--r--src/arm64/makefile69
-rw-r--r--src/arm64/script.lds14
-rw-r--r--src/compile_flags.txt3
-rw-r--r--src/coreboot-ahci-driver.c108
-rw-r--r--src/coreboot-cpu-api.c22
-rw-r--r--src/coreboot-cxx-abi.cc91
-rw-r--r--src/coreboot-partition-map-parse.c58
-rw-r--r--src/coreboot-partition-map.c37
-rw-r--r--src/coreboot-pci-tree.c106
-rw-r--r--src/coreboot-print-name.c28
-rw-r--r--src/coreboot-start.c136
-rw-r--r--src/coreboot-string.c185
-rw-r--r--src/custom_hw/coreboot-flash.c10
-rw-r--r--src/ppc64/.gdbinit3
-rw-r--r--src/ppc64/.gitkeep0
-rw-r--r--src/ppc64/linkscript.ld15
-rw-r--r--src/ppc64/makefile66
-rw-r--r--src/ppc64/ppc64-boot.S56
-rw-r--r--src/ppc64/ppc64-err.c23
-rw-r--r--src/ppc64/ppc64-hal.c97
-rw-r--r--src/ppc64/ppc64-uart.c48
-rw-r--r--src/rv64/.gdbinit3
-rw-r--r--src/rv64/linkscript.ld46
-rw-r--r--src/rv64/makefile53
-rw-r--r--src/rv64/rv64-api.s16
-rw-r--r--src/rv64/rv64-boot.s114
-rw-r--r--src/rv64/rv64-err.c23
-rw-r--r--src/rv64/rv64-uart.c54
-rw-r--r--src/x86s/.gitkeep0
75 files changed, 8350 insertions, 0 deletions
diff --git a/.clang-format b/.clang-format
new file mode 100644
index 0000000..fb3cacb
--- /dev/null
+++ b/.clang-format
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diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..2459e4a
--- /dev/null
+++ b/.gitignore
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+*.rom
+*.epm
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+.vscode
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+.cmake/
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+*.xpm
+*.app
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+*.com
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+*.o
+*.a
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+# Qt-es
+object_script.*.Release
+object_script.*.Debug
+*_plugin_import.cpp
+/.qmake.cache
+/.qmake.stash
+*.pro.user
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+*.moc
+moc_*.cpp
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+*.qmlc
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+# QtCreator
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+*_qmlcache.qrc
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+CMakeLists.txt.user
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+limine-deploy
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+.DS_Store
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+### Eclipse ###
+.metadata
+bin/
+tmp/
+*.tmp
+*.bak
+*.swp
+*~.nib
+local.properties
+.settings/
+.loadpath
+.recommenders
+
+# External tool builders
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+# Locally stored "Eclipse launch configurations"
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+# PyDev specific (Python IDE for Eclipse)
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+# End of https://www.toptal.com/developers/gitignore/api/eclipse
+
+# Prerequisites
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+
+.vs/
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+*.out
+*.iso
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+*.bin
+*.o
+*.ko
+*.obj
+*.elf
+*.sys
+
+*.fd
+*.EFI
+
+# Launch executable
+*.iso
+*.img
+
+# Linker output
+*.ilk
+*.map
+*.exp
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+# Precompiled Headers
+*.gch
+*.pch
+
+# Libs
+*.lib
+*.a
+*.la
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+# Shared objects (inc. Windows DLLs)
+*.dll
+*.so
+*.so.*
+*.dylib
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+# Executables
+*.exe
+*.out
+*.app
+*.i*86
+*.x86_64
+*.hex
+
+# Debug files
+*.dSYM/
+*.su
+*.idb
+*.pdb
+
+# Dyld Module Compile Results
+*.mod*
+*.cmd
+.tmp_versions/
+modules.order
+Module.symvers
+Mkfile.old
+dkms.conf
+
+.fleet/
+
+.vscode/settings.json
diff --git a/.gitmodules b/.gitmodules
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+# The output of markdown processing is further processed by doxygen, so you can
+# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in
+# case of backward compatibilities issues.
+# The default value is: YES.
+
+MARKDOWN_SUPPORT = YES
+
+# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up
+# to that level are automatically included in the table of contents, even if
+# they do not have an id attribute.
+# Note: This feature currently applies only to Markdown headings.
+# Minimum value: 0, maximum value: 99, default value: 5.
+# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
+
+TOC_INCLUDE_HEADINGS = 5
+
+# The MARKDOWN_ID_STYLE tag can be used to specify the algorithm used to
+# generate identifiers for the Markdown headings. Note: Every identifier is
+# unique.
+# Possible values are: DOXYGEN use a fixed 'autotoc_md' string followed by a
+# sequence number starting at 0 and GITHUB use the lower case version of title
+# with any whitespace replaced by '-' and punctuation characters removed.
+# The default value is: DOXYGEN.
+# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
+
+MARKDOWN_ID_STYLE = DOXYGEN
+
+# When enabled doxygen tries to link words that correspond to documented
+# classes, or namespaces to their corresponding documentation. Such a link can
+# be prevented in individual cases by putting a % sign in front of the word or
+# globally by setting AUTOLINK_SUPPORT to NO.
+# The default value is: YES.
+
+AUTOLINK_SUPPORT = YES
+
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should set this
+# tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string);
+# versus func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
+# The default value is: NO.
+
+BUILTIN_STL_SUPPORT = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+# The default value is: NO.
+
+CPP_CLI_SUPPORT = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip (see:
+# https://www.riverbankcomputing.com/software/sip/intro) sources only. Doxygen
+# will parse them like normal C++ but will assume all classes use public instead
+# of private inheritance when no explicit protection keyword is present.
+# The default value is: NO.
+
+SIP_SUPPORT = NO
+
+# For Microsoft's IDL there are propget and propput attributes to indicate
+# getter and setter methods for a property. Setting this option to YES will make
+# doxygen to replace the get and set methods by a property in the documentation.
+# This will only work if the methods are indeed getting or setting a simple
+# type. If this is not the case, or you want to show the methods anyway, you
+# should set this option to NO.
+# The default value is: YES.
+
+IDL_PROPERTY_SUPPORT = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+# The default value is: NO.
+
+DISTRIBUTE_GROUP_DOC = NO
+
+# If one adds a struct or class to a group and this option is enabled, then also
+# any nested class or struct is added to the same group. By default this option
+# is disabled and one has to add nested compounds explicitly via \ingroup.
+# The default value is: NO.
+
+GROUP_NESTED_COMPOUNDS = NO
+
+# Set the SUBGROUPING tag to YES to allow class member groups of the same type
+# (for instance a group of public functions) to be put as a subgroup of that
+# type (e.g. under the Public Functions section). Set it to NO to prevent
+# subgrouping. Alternatively, this can be done per class using the
+# \nosubgrouping command.
+# The default value is: YES.
+
+SUBGROUPING = YES
+
+# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions
+# are shown inside the group in which they are included (e.g. using \ingroup)
+# instead of on a separate page (for HTML and Man pages) or section (for LaTeX
+# and RTF).
+#
+# Note that this feature does not work in combination with
+# SEPARATE_MEMBER_PAGES.
+# The default value is: NO.
+
+INLINE_GROUPED_CLASSES = NO
+
+# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions
+# with only public data fields or simple typedef fields will be shown inline in
+# the documentation of the scope in which they are defined (i.e. file,
+# namespace, or group documentation), provided this scope is documented. If set
+# to NO, structs, classes, and unions are shown on a separate page (for HTML and
+# Man pages) or section (for LaTeX and RTF).
+# The default value is: NO.
+
+INLINE_SIMPLE_STRUCTS = NO
+
+# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or
+# enum is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically be
+# useful for C code in case the coding convention dictates that all compound
+# types are typedef'ed and only the typedef is referenced, never the tag name.
+# The default value is: NO.
+
+TYPEDEF_HIDES_STRUCT = NO
+
+# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This
+# cache is used to resolve symbols given their name and scope. Since this can be
+# an expensive process and often the same symbol appears multiple times in the
+# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small
+# doxygen will become slower. If the cache is too large, memory is wasted. The
+# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
+# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536
+# symbols. At the end of a run doxygen will report the cache usage and suggest
+# the optimal cache size from a speed point of view.
+# Minimum value: 0, maximum value: 9, default value: 0.
+
+LOOKUP_CACHE_SIZE = 0
+
+# The NUM_PROC_THREADS specifies the number of threads doxygen is allowed to use
+# during processing. When set to 0 doxygen will based this on the number of
+# cores available in the system. You can set it explicitly to a value larger
+# than 0 to get more control over the balance between CPU load and processing
+# speed. At this moment only the input processing can be done using multiple
+# threads. Since this is still an experimental feature the default is set to 1,
+# which effectively disables parallel processing. Please report any issues you
+# encounter. Generating dot graphs in parallel is controlled by the
+# DOT_NUM_THREADS setting.
+# Minimum value: 0, maximum value: 32, default value: 1.
+
+NUM_PROC_THREADS = 1
+
+# If the TIMESTAMP tag is set different from NO then each generated page will
+# contain the date or date and time when the page was generated. Setting this to
+# NO can help when comparing the output of multiple runs.
+# Possible values are: YES, NO, DATETIME and DATE.
+# The default value is: NO.
+
+TIMESTAMP = NO
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in
+# documentation are documented, even if no documentation was available. Private
+# class members and static file members will be hidden unless the
+# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES.
+# Note: This will also disable the warnings about undocumented members that are
+# normally produced when WARNINGS is set to YES.
+# The default value is: NO.
+
+EXTRACT_ALL = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will
+# be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PRIVATE = YES
+
+# If the EXTRACT_PRIV_VIRTUAL tag is set to YES, documented private virtual
+# methods of a class will be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PRIV_VIRTUAL = YES
+
+# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal
+# scope will be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PACKAGE = NO
+
+# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be
+# included in the documentation.
+# The default value is: NO.
+
+EXTRACT_STATIC = NO
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined
+# locally in source files will be included in the documentation. If set to NO,
+# only classes defined in header files are included. Does not have any effect
+# for Java sources.
+# The default value is: YES.
+
+EXTRACT_LOCAL_CLASSES = YES
+
+# This flag is only useful for Objective-C code. If set to YES, local methods,
+# which are defined in the implementation section but not in the interface are
+# included in the documentation. If set to NO, only methods in the interface are
+# included.
+# The default value is: NO.
+
+EXTRACT_LOCAL_METHODS = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base name of
+# the file that contains the anonymous namespace. By default anonymous namespace
+# are hidden.
+# The default value is: NO.
+
+EXTRACT_ANON_NSPACES = NO
+
+# If this flag is set to YES, the name of an unnamed parameter in a declaration
+# will be determined by the corresponding definition. By default unnamed
+# parameters remain unnamed in the output.
+# The default value is: YES.
+
+RESOLVE_UNNAMED_PARAMS = YES
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
+# undocumented members inside documented classes or files. If set to NO these
+# members will be included in the various overviews, but no documentation
+# section is generated. This option has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_MEMBERS = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy. If set
+# to NO, these classes will be included in the various overviews. This option
+# will also hide undocumented C++ concepts if enabled. This option has no effect
+# if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_CLASSES = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
+# declarations. If set to NO, these declarations will be included in the
+# documentation.
+# The default value is: NO.
+
+HIDE_FRIEND_COMPOUNDS = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any
+# documentation blocks found inside the body of a function. If set to NO, these
+# blocks will be appended to the function's detailed documentation block.
+# The default value is: NO.
+
+HIDE_IN_BODY_DOCS = NO
+
+# The INTERNAL_DOCS tag determines if documentation that is typed after a
+# \internal command is included. If the tag is set to NO then the documentation
+# will be excluded. Set it to YES to include the internal documentation.
+# The default value is: NO.
+
+INTERNAL_DOCS = NO
+
+# With the correct setting of option CASE_SENSE_NAMES doxygen will better be
+# able to match the capabilities of the underlying filesystem. In case the
+# filesystem is case sensitive (i.e. it supports files in the same directory
+# whose names only differ in casing), the option must be set to YES to properly
+# deal with such files in case they appear in the input. For filesystems that
+# are not case sensitive the option should be set to NO to properly deal with
+# output files written for symbols that only differ in casing, such as for two
+# classes, one named CLASS and the other named Class, and to also support
+# references to files without having to specify the exact matching casing. On
+# Windows (including Cygwin) and MacOS, users should typically set this option
+# to NO, whereas on Linux or other Unix flavors it should typically be set to
+# YES.
+# Possible values are: SYSTEM, NO and YES.
+# The default value is: SYSTEM.
+
+CASE_SENSE_NAMES = SYSTEM
+
+# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with
+# their full class and namespace scopes in the documentation. If set to YES, the
+# scope will be hidden.
+# The default value is: NO.
+
+HIDE_SCOPE_NAMES = NO
+
+# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will
+# append additional text to a page's title, such as Class Reference. If set to
+# YES the compound reference will be hidden.
+# The default value is: NO.
+
+HIDE_COMPOUND_REFERENCE= NO
+
+# If the SHOW_HEADERFILE tag is set to YES then the documentation for a class
+# will show which file needs to be included to use the class.
+# The default value is: YES.
+
+SHOW_HEADERFILE = YES
+
+# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
+# the files that are included by a file in the documentation of that file.
+# The default value is: YES.
+
+SHOW_INCLUDE_FILES = YES
+
+# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each
+# grouped member an include statement to the documentation, telling the reader
+# which file to include in order to use the member.
+# The default value is: NO.
+
+SHOW_GROUPED_MEMB_INC = NO
+
+# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include
+# files with double quotes in the documentation rather than with sharp brackets.
+# The default value is: NO.
+
+FORCE_LOCAL_INCLUDES = NO
+
+# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the
+# documentation for inline members.
+# The default value is: YES.
+
+INLINE_INFO = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the
+# (detailed) documentation of file and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order.
+# The default value is: YES.
+
+SORT_MEMBER_DOCS = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
+# descriptions of file, namespace and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order. Note that
+# this will also influence the order of the classes in the class list.
+# The default value is: NO.
+
+SORT_BRIEF_DOCS = NO
+
+# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the
+# (brief and detailed) documentation of class members so that constructors and
+# destructors are listed first. If set to NO the constructors will appear in the
+# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS.
+# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief
+# member documentation.
+# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting
+# detailed member documentation.
+# The default value is: NO.
+
+SORT_MEMBERS_CTORS_1ST = NO
+
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy
+# of group names into alphabetical order. If set to NO the group names will
+# appear in their defined order.
+# The default value is: NO.
+
+SORT_GROUP_NAMES = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by
+# fully-qualified names, including namespaces. If set to NO, the class list will
+# be sorted only by class name, not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the alphabetical
+# list.
+# The default value is: NO.
+
+SORT_BY_SCOPE_NAME = NO
+
+# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper
+# type resolution of all parameters of a function it will reject a match between
+# the prototype and the implementation of a member function even if there is
+# only one candidate or it is obvious which candidate to choose by doing a
+# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still
+# accept a match between prototype and implementation in such cases.
+# The default value is: NO.
+
+STRICT_PROTO_MATCHING = NO
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo
+# list. This list is created by putting \todo commands in the documentation.
+# The default value is: YES.
+
+GENERATE_TODOLIST = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test
+# list. This list is created by putting \test commands in the documentation.
+# The default value is: YES.
+
+GENERATE_TESTLIST = YES
+
+# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug
+# list. This list is created by putting \bug commands in the documentation.
+# The default value is: YES.
+
+GENERATE_BUGLIST = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO)
+# the deprecated list. This list is created by putting \deprecated commands in
+# the documentation.
+# The default value is: YES.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional documentation
+# sections, marked by \if <section_label> ... \endif and \cond <section_label>
+# ... \endcond blocks.
+
+ENABLED_SECTIONS =
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
+# initial value of a variable or macro / define can have for it to appear in the
+# documentation. If the initializer consists of more lines than specified here
+# it will be hidden. Use a value of 0 to hide initializers completely. The
+# appearance of the value of individual variables and macros / defines can be
+# controlled using \showinitializer or \hideinitializer command in the
+# documentation regardless of this setting.
+# Minimum value: 0, maximum value: 10000, default value: 30.
+
+MAX_INITIALIZER_LINES = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at
+# the bottom of the documentation of classes and structs. If set to YES, the
+# list will mention the files that were used to generate the documentation.
+# The default value is: YES.
+
+SHOW_USED_FILES = YES
+
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This
+# will remove the Files entry from the Quick Index and from the Folder Tree View
+# (if specified).
+# The default value is: YES.
+
+SHOW_FILES = YES
+
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces
+# page. This will remove the Namespaces entry from the Quick Index and from the
+# Folder Tree View (if specified).
+# The default value is: YES.
+
+SHOW_NAMESPACES = YES
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command command input-file, where command is the value of the
+# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided
+# by doxygen. Whatever the program writes to standard output is used as the file
+# version. For an example see the documentation.
+
+FILE_VERSION_FILTER =
+
+# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
+# by doxygen. The layout file controls the global structure of the generated
+# output files in an output format independent way. To create the layout file
+# that represents doxygen's defaults, run doxygen with the -l option. You can
+# optionally specify a file name after the option, if omitted DoxygenLayout.xml
+# will be used as the name of the layout file. See also section "Changing the
+# layout of pages" for information.
+#
+# Note that if you run doxygen from a directory containing a file called
+# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
+# tag is left empty.
+
+LAYOUT_FILE =
+
+# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
+# the reference definitions. This must be a list of .bib files. The .bib
+# extension is automatically appended if omitted. This requires the bibtex tool
+# to be installed. See also https://en.wikipedia.org/wiki/BibTeX for more info.
+# For LaTeX the style of the bibliography can be controlled using
+# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
+# search path. See also \cite for info how to create references.
+
+CITE_BIB_FILES =
+
+#---------------------------------------------------------------------------
+# Configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated to
+# standard output by doxygen. If QUIET is set to YES this implies that the
+# messages are off.
+# The default value is: NO.
+
+QUIET = NO
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES
+# this implies that the warnings are on.
+#
+# Tip: Turn warnings on while writing the documentation.
+# The default value is: YES.
+
+WARNINGS = YES
+
+# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate
+# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: YES.
+
+WARN_IF_UNDOCUMENTED = YES
+
+# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as documenting some parameters in
+# a documented function twice, or documenting parameters that don't exist or
+# using markup commands wrongly.
+# The default value is: YES.
+
+WARN_IF_DOC_ERROR = YES
+
+# If WARN_IF_INCOMPLETE_DOC is set to YES, doxygen will warn about incomplete
+# function parameter documentation. If set to NO, doxygen will accept that some
+# parameters have no documentation without warning.
+# The default value is: YES.
+
+WARN_IF_INCOMPLETE_DOC = YES
+
+# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
+# are documented, but have no documentation for their parameters or return
+# value. If set to NO, doxygen will only warn about wrong parameter
+# documentation, but not about the absence of documentation. If EXTRACT_ALL is
+# set to YES then this flag will automatically be disabled. See also
+# WARN_IF_INCOMPLETE_DOC
+# The default value is: NO.
+
+WARN_NO_PARAMDOC = NO
+
+# If WARN_IF_UNDOC_ENUM_VAL option is set to YES, doxygen will warn about
+# undocumented enumeration values. If set to NO, doxygen will accept
+# undocumented enumeration values. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: NO.
+
+WARN_IF_UNDOC_ENUM_VAL = NO
+
+# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when
+# a warning is encountered. If the WARN_AS_ERROR tag is set to FAIL_ON_WARNINGS
+# then doxygen will continue running as if WARN_AS_ERROR tag is set to NO, but
+# at the end of the doxygen process doxygen will return with a non-zero status.
+# If the WARN_AS_ERROR tag is set to FAIL_ON_WARNINGS_PRINT then doxygen behaves
+# like FAIL_ON_WARNINGS but in case no WARN_LOGFILE is defined doxygen will not
+# write the warning messages in between other messages but write them at the end
+# of a run, in case a WARN_LOGFILE is defined the warning messages will be
+# besides being in the defined file also be shown at the end of a run, unless
+# the WARN_LOGFILE is defined as - i.e. standard output (stdout) in that case
+# the behavior will remain as with the setting FAIL_ON_WARNINGS.
+# Possible values are: NO, YES, FAIL_ON_WARNINGS and FAIL_ON_WARNINGS_PRINT.
+# The default value is: NO.
+
+WARN_AS_ERROR = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that doxygen
+# can produce. The string should contain the $file, $line, and $text tags, which
+# will be replaced by the file and line number from which the warning originated
+# and the warning text. Optionally the format may contain $version, which will
+# be replaced by the version of the file (if it could be obtained via
+# FILE_VERSION_FILTER)
+# See also: WARN_LINE_FORMAT
+# The default value is: $file:$line: $text.
+
+WARN_FORMAT = "$file:$line: $text"
+
+# In the $text part of the WARN_FORMAT command it is possible that a reference
+# to a more specific place is given. To make it easier to jump to this place
+# (outside of doxygen) the user can define a custom "cut" / "paste" string.
+# Example:
+# WARN_LINE_FORMAT = "'vi $file +$line'"
+# See also: WARN_FORMAT
+# The default value is: at line $line of file $file.
+
+WARN_LINE_FORMAT = "at line $line of file $file"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning and error
+# messages should be written. If left blank the output is written to standard
+# error (stderr). In case the file specified cannot be opened for writing the
+# warning and error messages are written to standard error. When as file - is
+# specified the warning and error messages are written to standard output
+# (stdout).
+
+WARN_LOGFILE =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag is used to specify the files and/or directories that contain
+# documented source files. You may enter file names like myfile.cpp or
+# directories like /usr/src/myproject. Separate the files or directories with
+# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
+# Note: If this tag is empty the current directory is searched.
+
+INPUT = ./lib/ \
+ ./src/ \
+
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
+# libiconv (or the iconv built into libc) for the transcoding. See the libiconv
+# documentation (see:
+# https://www.gnu.org/software/libiconv/) for the list of possible encodings.
+# See also: INPUT_FILE_ENCODING
+# The default value is: UTF-8.
+
+INPUT_ENCODING = UTF-8
+
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses The INPUT_FILE_ENCODING tag can be used to specify
+# character encoding on a per file pattern basis. Doxygen will compare the file
+# name with each pattern and apply the encoding instead of the default
+# INPUT_ENCODING) if there is a match. The character encodings are a list of the
+# form: pattern=encoding (like *.php=ISO-8859-1). See cfg_input_encoding
+# "INPUT_ENCODING" for further information on supported encodings.
+
+INPUT_FILE_ENCODING =
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
+# *.h) to filter out the source-files in the directories.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# read by doxygen.
+#
+# Note the list of default checked file patterns might differ from the list of
+# default file extension mappings.
+#
+# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cxxm,
+# *.cpp, *.cppm, *.c++, *.c++m, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl,
+# *.ddl, *.odl, *.h, *.hh, *.hxx, *.hpp, *.h++, *.ixx, *.l, *.cs, *.d, *.php,
+# *.php4, *.php5, *.phtml, *.inc, *.m, *.markdown, *.md, *.mm, *.dox (to be
+# provided as doxygen C comment), *.py, *.pyw, *.f90, *.f95, *.f03, *.f08,
+# *.f18, *.f, *.for, *.vhd, *.vhdl, *.ucf, *.qsf and *.ice.
+
+FILE_PATTERNS = *.c \
+ *.cc \
+ *.cxx \
+ *.cxxm \
+ *.cpp \
+ *.cppm \
+ *.c++ \
+ *.c++m \
+ *.java \
+ *.ii \
+ *.ixx \
+ *.ipp \
+ *.i++ \
+ *.inl \
+ *.idl \
+ *.ddl \
+ *.odl \
+ *.h \
+ *.hh \
+ *.hxx \
+ *.hpp \
+ *.h++ \
+ *.ixx \
+ *.l \
+ *.cs \
+ *.d \
+ *.php \
+ *.php4 \
+ *.php5 \
+ *.phtml \
+ *.inc \
+ *.m \
+ *.markdown \
+ *.md \
+ *.mm \
+ *.dox \
+ *.py \
+ *.pyw \
+ *.f90 \
+ *.f95 \
+ *.f03 \
+ *.f08 \
+ *.f18 \
+ *.f \
+ *.for \
+ *.vhd \
+ *.vhdl \
+ *.ucf \
+ *.qsf \
+ *.ice
+
+# The RECURSIVE tag can be used to specify whether or not subdirectories should
+# be searched for input files as well.
+# The default value is: NO.
+
+RECURSIVE = YES
+
+# The EXCLUDE tag can be used to specify files and/or directories that should be
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+#
+# Note that relative paths are relative to the directory from which doxygen is
+# run.
+
+EXCLUDE =
+
+# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
+# directories that are symbolic links (a Unix file system feature) are excluded
+# from the input.
+# The default value is: NO.
+
+EXCLUDE_SYMLINKS = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories.
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories for example use the pattern */test/*
+
+EXCLUDE_PATTERNS =
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
+# ANamespace::AClass, ANamespace::*Test
+
+EXCLUDE_SYMBOLS =
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or directories
+# that contain example code fragments that are included (see the \include
+# command).
+
+EXAMPLE_PATH =
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank all
+# files are included.
+
+EXAMPLE_PATTERNS = *
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude commands
+# irrespective of the value of the RECURSIVE tag.
+# The default value is: NO.
+
+EXAMPLE_RECURSIVE = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or directories
+# that contain images that are to be included in the documentation (see the
+# \image command).
+
+IMAGE_PATH =
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command:
+#
+# <filter> <input-file>
+#
+# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the
+# name of an input file. Doxygen will then use the output that the filter
+# program writes to standard output. If FILTER_PATTERNS is specified, this tag
+# will be ignored.
+#
+# Note that the filter must not add or remove lines; it is applied before the
+# code is scanned, but not when the output code is generated. If lines are added
+# or removed, the anchors will not be placed correctly.
+#
+# Note that doxygen will use the data processed and written to standard output
+# for further processing, therefore nothing else, like debug statements or used
+# commands (so in case of a Windows batch file always use @echo OFF), should be
+# written to standard output.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
+
+INPUT_FILTER =
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis. Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match. The filters are a list of the form: pattern=filter
+# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how
+# filters are used. If the FILTER_PATTERNS tag is empty or if none of the
+# patterns match the file name, INPUT_FILTER is applied.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
+
+FILTER_PATTERNS =
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will also be used to filter the input files that are used for
+# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES).
+# The default value is: NO.
+
+FILTER_SOURCE_FILES = NO
+
+# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file
+# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and
+# it is also possible to disable source filtering for a specific pattern using
+# *.ext= (so without naming a filter).
+# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
+
+FILTER_SOURCE_PATTERNS =
+
+# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
+# is part of the input, its contents will be placed on the main page
+# (index.html). This can be useful if you have a project on for instance GitHub
+# and want to reuse the introduction page also for the doxygen output.
+
+USE_MDFILE_AS_MAINPAGE =
+
+# The Fortran standard specifies that for fixed formatted Fortran code all
+# characters from position 72 are to be considered as comment. A common
+# extension is to allow longer lines before the automatic comment starts. The
+# setting FORTRAN_COMMENT_AFTER will also make it possible that longer lines can
+# be processed before the automatic comment starts.
+# Minimum value: 7, maximum value: 10000, default value: 72.
+
+FORTRAN_COMMENT_AFTER = 72
+
+#---------------------------------------------------------------------------
+# Configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will be
+# generated. Documented entities will be cross-referenced with these sources.
+#
+# Note: To get rid of all source code in the generated output, make sure that
+# also VERBATIM_HEADERS is set to NO.
+# The default value is: NO.
+
+SOURCE_BROWSER = NO
+
+# Setting the INLINE_SOURCES tag to YES will include the body of functions,
+# classes and enums directly into the documentation.
+# The default value is: NO.
+
+INLINE_SOURCES = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any
+# special comment blocks from generated source code fragments. Normal C, C++ and
+# Fortran comments will always remain visible.
+# The default value is: YES.
+
+STRIP_CODE_COMMENTS = YES
+
+# If the REFERENCED_BY_RELATION tag is set to YES then for each documented
+# entity all documented functions referencing it will be listed.
+# The default value is: NO.
+
+REFERENCED_BY_RELATION = NO
+
+# If the REFERENCES_RELATION tag is set to YES then for each documented function
+# all documented entities called/used by that function will be listed.
+# The default value is: NO.
+
+REFERENCES_RELATION = NO
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
+# to YES then the hyperlinks from functions in REFERENCES_RELATION and
+# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will
+# link to the documentation.
+# The default value is: YES.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the
+# source code will show a tooltip with additional information such as prototype,
+# brief description and links to the definition and documentation. Since this
+# will make the HTML file larger and loading of large files a bit slower, you
+# can opt to disable this feature.
+# The default value is: YES.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+SOURCE_TOOLTIPS = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code will
+# point to the HTML generated by the htags(1) tool instead of doxygen built-in
+# source browser. The htags tool is part of GNU's global source tagging system
+# (see https://www.gnu.org/software/global/global.html). You will need version
+# 4.8.6 or higher.
+#
+# To use it do the following:
+# - Install the latest version of global
+# - Enable SOURCE_BROWSER and USE_HTAGS in the configuration file
+# - Make sure the INPUT points to the root of the source tree
+# - Run doxygen as normal
+#
+# Doxygen will invoke htags (and that will in turn invoke gtags), so these
+# tools must be available from the command line (i.e. in the search path).
+#
+# The result: instead of the source browser generated by doxygen, the links to
+# source code will now point to the output of htags.
+# The default value is: NO.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+USE_HTAGS = NO
+
+# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a
+# verbatim copy of the header file for each class for which an include is
+# specified. Set to NO to disable this.
+# See also: Section \class.
+# The default value is: YES.
+
+VERBATIM_HEADERS = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all
+# compounds will be generated. Enable this if the project contains a lot of
+# classes, structs, unions or interfaces.
+# The default value is: YES.
+
+ALPHABETICAL_INDEX = YES
+
+# The IGNORE_PREFIX tag can be used to specify a prefix (or a list of prefixes)
+# that should be ignored while generating the index headers. The IGNORE_PREFIX
+# tag works for classes, function and member names. The entity will be placed in
+# the alphabetical list under the first letter of the entity name that remains
+# after removing the prefix.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+IGNORE_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output
+# The default value is: YES.
+
+GENERATE_HTML = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_OUTPUT = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each
+# generated HTML page (for example: .htm, .php, .asp).
+# The default value is: .html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FILE_EXTENSION = .html
+
+# The HTML_HEADER tag can be used to specify a user-defined HTML header file for
+# each generated HTML page. If the tag is left blank doxygen will generate a
+# standard header.
+#
+# To get valid HTML the header file that includes any scripts and style sheets
+# that doxygen needs, which is dependent on the configuration options used (e.g.
+# the setting GENERATE_TREEVIEW). It is highly recommended to start with a
+# default header using
+# doxygen -w html new_header.html new_footer.html new_stylesheet.css
+# YourConfigFile
+# and then modify the file new_header.html. See also section "Doxygen usage"
+# for information on how to generate the default header that doxygen normally
+# uses.
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. For a description
+# of the possible markers and block names see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_HEADER =
+
+# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
+# generated HTML page. If the tag is left blank doxygen will generate a standard
+# footer. See HTML_HEADER for more information on how to generate a default
+# footer and what special commands can be used inside the footer. See also
+# section "Doxygen usage" for information on how to generate the default footer
+# that doxygen normally uses.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FOOTER =
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
+# sheet that is used by each HTML page. It can be used to fine-tune the look of
+# the HTML output. If left blank doxygen will generate a default style sheet.
+# See also section "Doxygen usage" for information on how to generate the style
+# sheet that doxygen normally uses.
+# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as
+# it is more robust and this tag (HTML_STYLESHEET) will in the future become
+# obsolete.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_STYLESHEET =
+
+# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# cascading style sheets that are included after the standard style sheets
+# created by doxygen. Using this option one can overrule certain style aspects.
+# This is preferred over using HTML_STYLESHEET since it does not replace the
+# standard style sheet and is therefore more robust against future updates.
+# Doxygen will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list).
+# Note: Since the styling of scrollbars can currently not be overruled in
+# Webkit/Chromium, the styling will be left out of the default doxygen.css if
+# one or more extra stylesheets have been specified. So if scrollbar
+# customization is desired it has to be added explicitly. For an example see the
+# documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_STYLESHEET = meta/css/doxygen-awesome.css
+
+# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the HTML output directory. Note
+# that these files will be copied to the base HTML output directory. Use the
+# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
+# files. In the HTML_STYLESHEET file, use the file name only. Also note that the
+# files will be copied as-is; there are no commands or markers available.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_FILES =
+
+# The HTML_COLORSTYLE tag can be used to specify if the generated HTML output
+# should be rendered with a dark or light theme.
+# Possible values are: LIGHT always generate light mode output, DARK always
+# generate dark mode output, AUTO_LIGHT automatically set the mode according to
+# the user preference, use light mode if no preference is set (the default),
+# AUTO_DARK automatically set the mode according to the user preference, use
+# dark mode if no preference is set and TOGGLE allow to user to switch between
+# light and dark mode via a button.
+# The default value is: AUTO_LIGHT.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE = LIGHT
+
+# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
+# will adjust the colors in the style sheet and background images according to
+# this color. Hue is specified as an angle on a color-wheel, see
+# https://en.wikipedia.org/wiki/Hue for more information. For instance the value
+# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
+# purple, and 360 is red again.
+# Minimum value: 0, maximum value: 359, default value: 220.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_HUE = 220
+
+# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
+# in the HTML output. For a value of 0 the output will use gray-scales only. A
+# value of 255 will produce the most vivid colors.
+# Minimum value: 0, maximum value: 255, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_SAT = 100
+
+# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the
+# luminance component of the colors in the HTML output. Values below 100
+# gradually make the output lighter, whereas values above 100 make the output
+# darker. The value divided by 100 is the actual gamma applied, so 80 represents
+# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not
+# change the gamma.
+# Minimum value: 40, maximum value: 240, default value: 80.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_GAMMA = 80
+
+# If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML
+# documentation will contain a main index with vertical navigation menus that
+# are dynamically created via JavaScript. If disabled, the navigation index will
+# consists of multiple levels of tabs that are statically embedded in every HTML
+# page. Disable this option to support browsers that do not have JavaScript,
+# like the Qt help browser.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_DYNAMIC_MENUS = YES
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_DYNAMIC_SECTIONS = NO
+
+# If the HTML_CODE_FOLDING tag is set to YES then classes and functions can be
+# dynamically folded and expanded in the generated HTML source code.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_CODE_FOLDING = YES
+
+# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries
+# shown in the various tree structured indices initially; the user can expand
+# and collapse entries dynamically later on. Doxygen will expand the tree to
+# such a level that at most the specified number of entries are visible (unless
+# a fully collapsed tree already exceeds this amount). So setting the number of
+# entries 1 will produce a full collapsed tree by default. 0 is a special value
+# representing an infinite number of entries and will result in a full expanded
+# tree by default.
+# Minimum value: 0, maximum value: 9999, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_INDEX_NUM_ENTRIES = 100
+
+# If the GENERATE_DOCSET tag is set to YES, additional index files will be
+# generated that can be used as input for Apple's Xcode 3 integrated development
+# environment (see:
+# https://developer.apple.com/xcode/), introduced with OSX 10.5 (Leopard). To
+# create a documentation set, doxygen will generate a Makefile in the HTML
+# output directory. Running make will produce the docset in that directory and
+# running make install will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
+# startup. See https://developer.apple.com/library/archive/featuredarticles/Doxy
+# genXcode/_index.html for more information.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_DOCSET = NO
+
+# This tag determines the name of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# The default value is: Doxygen generated docs.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_FEEDNAME = "Doxygen generated docs"
+
+# This tag determines the URL of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_FEEDURL =
+
+# This tag specifies a string that should uniquely identify the documentation
+# set bundle. This should be a reverse domain-name style string, e.g.
+# com.mycompany.MyDocSet. Doxygen will append .docset to the name.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_BUNDLE_ID = org.doxygen.Project
+
+# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify
+# the documentation publisher. This should be a reverse domain-name style
+# string, e.g. com.mycompany.MyDocSet.documentation.
+# The default value is: org.doxygen.Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_ID = org.doxygen.Publisher
+
+# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher.
+# The default value is: Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_NAME = Publisher
+
+# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
+# additional HTML index files: index.hhp, index.hhc, and index.hhk. The
+# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
+# on Windows. In the beginning of 2021 Microsoft took the original page, with
+# a.o. the download links, offline the HTML help workshop was already many years
+# in maintenance mode). You can download the HTML help workshop from the web
+# archives at Installation executable (see:
+# http://web.archive.org/web/20160201063255/http://download.microsoft.com/downlo
+# ad/0/A/9/0A939EF6-E31C-430F-A3DF-DFAE7960D564/htmlhelp.exe).
+#
+# The HTML Help Workshop contains a compiler that can convert all HTML output
+# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
+# files are now used as the Windows 98 help format, and will replace the old
+# Windows help format (.hlp) on all Windows platforms in the future. Compressed
+# HTML files also contain an index, a table of contents, and you can search for
+# words in the documentation. The HTML workshop also contains a viewer for
+# compressed HTML files.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_HTMLHELP = NO
+
+# The CHM_FILE tag can be used to specify the file name of the resulting .chm
+# file. You can add a path in front of the file if the result should not be
+# written to the html output directory.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_FILE =
+
+# The HHC_LOCATION tag can be used to specify the location (absolute path
+# including file name) of the HTML help compiler (hhc.exe). If non-empty,
+# doxygen will try to run the HTML help compiler on the generated index.hhp.
+# The file has to be specified with full path.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+HHC_LOCATION =
+
+# The GENERATE_CHI flag controls if a separate .chi index file is generated
+# (YES) or that it should be included in the main .chm file (NO).
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+GENERATE_CHI = NO
+
+# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc)
+# and project file content.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_INDEX_ENCODING =
+
+# The BINARY_TOC flag controls whether a binary table of contents is generated
+# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it
+# enables the Previous and Next buttons.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+BINARY_TOC = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members to
+# the table of contents of the HTML help documentation and to the tree view.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+TOC_EXPAND = NO
+
+# The SITEMAP_URL tag is used to specify the full URL of the place where the
+# generated documentation will be placed on the server by the user during the
+# deployment of the documentation. The generated sitemap is called sitemap.xml
+# and placed on the directory specified by HTML_OUTPUT. In case no SITEMAP_URL
+# is specified no sitemap is generated. For information about the sitemap
+# protocol see https://www.sitemaps.org
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SITEMAP_URL =
+
+# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
+# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
+# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
+# (.qch) of the generated HTML documentation.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_QHP = NO
+
+# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify
+# the file name of the resulting .qch file. The path specified is relative to
+# the HTML output folder.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QCH_FILE =
+
+# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
+# Project output. For more information please see Qt Help Project / Namespace
+# (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#namespace).
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_NAMESPACE = org.doxygen.Project
+
+# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
+# Help Project output. For more information please see Qt Help Project / Virtual
+# Folders (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#virtual-folders).
+# The default value is: doc.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_VIRTUAL_FOLDER = doc
+
+# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
+# filter to add. For more information please see Qt Help Project / Custom
+# Filters (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom-filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_NAME =
+
+# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
+# custom filter to add. For more information please see Qt Help Project / Custom
+# Filters (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom-filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_ATTRS =
+
+# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
+# project's filter section matches. Qt Help Project / Filter Attributes (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#filter-attributes).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_SECT_FILTER_ATTRS =
+
+# The QHG_LOCATION tag can be used to specify the location (absolute path
+# including file name) of Qt's qhelpgenerator. If non-empty doxygen will try to
+# run qhelpgenerator on the generated .qhp file.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHG_LOCATION =
+
+# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
+# generated, together with the HTML files, they form an Eclipse help plugin. To
+# install this plugin and make it available under the help contents menu in
+# Eclipse, the contents of the directory containing the HTML and XML files needs
+# to be copied into the plugins directory of eclipse. The name of the directory
+# within the plugins directory should be the same as the ECLIPSE_DOC_ID value.
+# After copying Eclipse needs to be restarted before the help appears.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_ECLIPSEHELP = NO
+
+# A unique identifier for the Eclipse help plugin. When installing the plugin
+# the directory name containing the HTML and XML files should also have this
+# name. Each documentation set should have its own identifier.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES.
+
+ECLIPSE_DOC_ID = org.doxygen.Project
+
+# If you want full control over the layout of the generated HTML pages it might
+# be necessary to disable the index and replace it with your own. The
+# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top
+# of each HTML page. A value of NO enables the index and the value YES disables
+# it. Since the tabs in the index contain the same information as the navigation
+# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+DISABLE_INDEX = NO
+
+# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
+# structure should be generated to display hierarchical information. If the tag
+# value is set to YES, a side panel will be generated containing a tree-like
+# index structure (just like the one that is generated for HTML Help). For this
+# to work a browser that supports JavaScript, DHTML, CSS and frames is required
+# (i.e. any modern browser). Windows users are probably better off using the
+# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can
+# further fine tune the look of the index (see "Fine-tuning the output"). As an
+# example, the default style sheet generated by doxygen has an example that
+# shows how to put an image at the root of the tree instead of the PROJECT_NAME.
+# Since the tree basically has the same information as the tab index, you could
+# consider setting DISABLE_INDEX to YES when enabling this option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_TREEVIEW = YES
+
+# When both GENERATE_TREEVIEW and DISABLE_INDEX are set to YES, then the
+# FULL_SIDEBAR option determines if the side bar is limited to only the treeview
+# area (value NO) or if it should extend to the full height of the window (value
+# YES). Setting this to YES gives a layout similar to
+# https://docs.readthedocs.io with more room for contents, but less room for the
+# project logo, title, and description. If either GENERATE_TREEVIEW or
+# DISABLE_INDEX is set to NO, this option has no effect.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FULL_SIDEBAR = NO
+
+# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
+# doxygen will group on one line in the generated HTML documentation.
+#
+# Note that a value of 0 will completely suppress the enum values from appearing
+# in the overview section.
+# Minimum value: 0, maximum value: 20, default value: 4.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+ENUM_VALUES_PER_LINE = 4
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used
+# to set the initial width (in pixels) of the frame in which the tree is shown.
+# Minimum value: 0, maximum value: 1500, default value: 250.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+TREEVIEW_WIDTH = 250
+
+# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to
+# external symbols imported via tag files in a separate window.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+EXT_LINKS_IN_WINDOW = NO
+
+# If the OBFUSCATE_EMAILS tag is set to YES, doxygen will obfuscate email
+# addresses.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+OBFUSCATE_EMAILS = YES
+
+# If the HTML_FORMULA_FORMAT option is set to svg, doxygen will use the pdf2svg
+# tool (see https://github.com/dawbarton/pdf2svg) or inkscape (see
+# https://inkscape.org) to generate formulas as SVG images instead of PNGs for
+# the HTML output. These images will generally look nicer at scaled resolutions.
+# Possible values are: png (the default) and svg (looks nicer but requires the
+# pdf2svg or inkscape tool).
+# The default value is: png.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FORMULA_FORMAT = png
+
+# Use this tag to change the font size of LaTeX formulas included as images in
+# the HTML documentation. When you change the font size after a successful
+# doxygen run you need to manually remove any form_*.png images from the HTML
+# output directory to force them to be regenerated.
+# Minimum value: 8, maximum value: 50, default value: 10.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_FONTSIZE = 10
+
+# The FORMULA_MACROFILE can contain LaTeX \newcommand and \renewcommand commands
+# to create new LaTeX commands to be used in formulas as building blocks. See
+# the section "Including formulas" for details.
+
+FORMULA_MACROFILE =
+
+# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
+# https://www.mathjax.org) which uses client side JavaScript for the rendering
+# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX
+# installed or if you want to formulas look prettier in the HTML output. When
+# enabled you may also need to install MathJax separately and configure the path
+# to it using the MATHJAX_RELPATH option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+USE_MATHJAX = NO
+
+# With MATHJAX_VERSION it is possible to specify the MathJax version to be used.
+# Note that the different versions of MathJax have different requirements with
+# regards to the different settings, so it is possible that also other MathJax
+# settings have to be changed when switching between the different MathJax
+# versions.
+# Possible values are: MathJax_2 and MathJax_3.
+# The default value is: MathJax_2.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_VERSION = MathJax_2
+
+# When MathJax is enabled you can set the default output format to be used for
+# the MathJax output. For more details about the output format see MathJax
+# version 2 (see:
+# http://docs.mathjax.org/en/v2.7-latest/output.html) and MathJax version 3
+# (see:
+# http://docs.mathjax.org/en/latest/web/components/output.html).
+# Possible values are: HTML-CSS (which is slower, but has the best
+# compatibility. This is the name for Mathjax version 2, for MathJax version 3
+# this will be translated into chtml), NativeMML (i.e. MathML. Only supported
+# for NathJax 2. For MathJax version 3 chtml will be used instead.), chtml (This
+# is the name for Mathjax version 3, for MathJax version 2 this will be
+# translated into HTML-CSS) and SVG.
+# The default value is: HTML-CSS.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_FORMAT = HTML-CSS
+
+# When MathJax is enabled you need to specify the location relative to the HTML
+# output directory using the MATHJAX_RELPATH option. The destination directory
+# should contain the MathJax.js script. For instance, if the mathjax directory
+# is located at the same level as the HTML output directory, then
+# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
+# Content Delivery Network so you can quickly see the result without installing
+# MathJax. However, it is strongly recommended to install a local copy of
+# MathJax from https://www.mathjax.org before deployment. The default value is:
+# - in case of MathJax version 2: https://cdn.jsdelivr.net/npm/mathjax@2
+# - in case of MathJax version 3: https://cdn.jsdelivr.net/npm/mathjax@3
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_RELPATH =
+
+# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+# extension names that should be enabled during MathJax rendering. For example
+# for MathJax version 2 (see
+# https://docs.mathjax.org/en/v2.7-latest/tex.html#tex-and-latex-extensions):
+# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
+# For example for MathJax version 3 (see
+# http://docs.mathjax.org/en/latest/input/tex/extensions/index.html):
+# MATHJAX_EXTENSIONS = ams
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_EXTENSIONS =
+
+# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
+# of code that will be used on startup of the MathJax code. See the MathJax site
+# (see:
+# http://docs.mathjax.org/en/v2.7-latest/output.html) for more details. For an
+# example see the documentation.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_CODEFILE =
+
+# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
+# the HTML output. The underlying search engine uses javascript and DHTML and
+# should work on any modern browser. Note that when using HTML help
+# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET)
+# there is already a search function so this one should typically be disabled.
+# For large projects the javascript based search engine can be slow, then
+# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to
+# search using the keyboard; to jump to the search box use <access key> + S
+# (what the <access key> is depends on the OS and browser, but it is typically
+# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down
+# key> to jump into the search results window, the results can be navigated
+# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel
+# the search. The filter options can be selected when the cursor is inside the
+# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys>
+# to select a filter and <Enter> or <escape> to activate or cancel the filter
+# option.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SEARCHENGINE = YES
+
+# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
+# implemented using a web server instead of a web client using JavaScript. There
+# are two flavors of web server based searching depending on the EXTERNAL_SEARCH
+# setting. When disabled, doxygen will generate a PHP script for searching and
+# an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing
+# and searching needs to be provided by external tools. See the section
+# "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SERVER_BASED_SEARCH = NO
+
+# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP
+# script for searching. Instead the search results are written to an XML file
+# which needs to be processed by an external indexer. Doxygen will invoke an
+# external search engine pointed to by the SEARCHENGINE_URL option to obtain the
+# search results.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see:
+# https://xapian.org/).
+#
+# See the section "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH = NO
+
+# The SEARCHENGINE_URL should point to a search engine hosted by a web server
+# which will return the search results when EXTERNAL_SEARCH is enabled.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see:
+# https://xapian.org/). See the section "External Indexing and Searching" for
+# details.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHENGINE_URL =
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
+# search data is written to a file for indexing by an external tool. With the
+# SEARCHDATA_FILE tag the name of this file can be specified.
+# The default file is: searchdata.xml.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHDATA_FILE = searchdata.xml
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the
+# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is
+# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple
+# projects and redirect the results back to the right project.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH_ID =
+
+# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
+# projects other than the one defined by this configuration file, but that are
+# all added to the same external search index. Each project needs to have a
+# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of
+# to a relative location where the documentation can be found. The format is:
+# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTRA_SEARCH_MAPPINGS =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES, doxygen will generate LaTeX output.
+# The default value is: YES.
+
+GENERATE_LATEX = YES
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_OUTPUT = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked.
+#
+# Note that when not enabling USE_PDFLATEX the default is latex when enabling
+# USE_PDFLATEX the default is pdflatex and when in the later case latex is
+# chosen this is overwritten by pdflatex. For specific output languages the
+# default can have been set differently, this depends on the implementation of
+# the output language.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_CMD_NAME =
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
+# index for LaTeX.
+# Note: This tag is used in the Makefile / make.bat.
+# See also: LATEX_MAKEINDEX_CMD for the part in the generated output file
+# (.tex).
+# The default file is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+MAKEINDEX_CMD_NAME = makeindex
+
+# The LATEX_MAKEINDEX_CMD tag can be used to specify the command name to
+# generate index for LaTeX. In case there is no backslash (\) as first character
+# it will be automatically added in the LaTeX code.
+# Note: This tag is used in the generated output file (.tex).
+# See also: MAKEINDEX_CMD_NAME for the part in the Makefile / make.bat.
+# The default value is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_MAKEINDEX_CMD = makeindex
+
+# If the COMPACT_LATEX tag is set to YES, doxygen generates more compact LaTeX
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+COMPACT_LATEX = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used by the
+# printer.
+# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x
+# 14 inches) and executive (7.25 x 10.5 inches).
+# The default value is: a4.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PAPER_TYPE = a4
+
+# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names
+# that should be included in the LaTeX output. The package can be specified just
+# by its name or with the correct syntax as to be used with the LaTeX
+# \usepackage command. To get the times font for instance you can specify :
+# EXTRA_PACKAGES=times or EXTRA_PACKAGES={times}
+# To use the option intlimits with the amsmath package you can specify:
+# EXTRA_PACKAGES=[intlimits]{amsmath}
+# If left blank no extra packages will be included.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+EXTRA_PACKAGES =
+
+# The LATEX_HEADER tag can be used to specify a user-defined LaTeX header for
+# the generated LaTeX document. The header should contain everything until the
+# first chapter. If it is left blank doxygen will generate a standard header. It
+# is highly recommended to start with a default header using
+# doxygen -w latex new_header.tex new_footer.tex new_stylesheet.sty
+# and then modify the file new_header.tex. See also section "Doxygen usage" for
+# information on how to generate the default header that doxygen normally uses.
+#
+# Note: Only use a user-defined header if you know what you are doing!
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. The following
+# commands have a special meaning inside the header (and footer): For a
+# description of the possible markers and block names see the documentation.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HEADER =
+
+# The LATEX_FOOTER tag can be used to specify a user-defined LaTeX footer for
+# the generated LaTeX document. The footer should contain everything after the
+# last chapter. If it is left blank doxygen will generate a standard footer. See
+# LATEX_HEADER for more information on how to generate a default footer and what
+# special commands can be used inside the footer. See also section "Doxygen
+# usage" for information on how to generate the default footer that doxygen
+# normally uses. Note: Only use a user-defined footer if you know what you are
+# doing!
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_FOOTER =
+
+# The LATEX_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# LaTeX style sheets that are included after the standard style sheets created
+# by doxygen. Using this option one can overrule certain style aspects. Doxygen
+# will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list).
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_STYLESHEET =
+
+# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the LATEX_OUTPUT output
+# directory. Note that the files will be copied as-is; there are no commands or
+# markers available.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_FILES =
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
+# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
+# contain links (just like the HTML output) instead of page references. This
+# makes the output suitable for online browsing using a PDF viewer.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PDF_HYPERLINKS = YES
+
+# If the USE_PDFLATEX tag is set to YES, doxygen will use the engine as
+# specified with LATEX_CMD_NAME to generate the PDF file directly from the LaTeX
+# files. Set this option to YES, to get a higher quality PDF documentation.
+#
+# See also section LATEX_CMD_NAME for selecting the engine.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+USE_PDFLATEX = YES
+
+# The LATEX_BATCHMODE tag signals the behavior of LaTeX in case of an error.
+# Possible values are: NO same as ERROR_STOP, YES same as BATCH, BATCH In batch
+# mode nothing is printed on the terminal, errors are scrolled as if <return> is
+# hit at every error; missing files that TeX tries to input or request from
+# keyboard input (\read on a not open input stream) cause the job to abort,
+# NON_STOP In nonstop mode the diagnostic message will appear on the terminal,
+# but there is no possibility of user interaction just like in batch mode,
+# SCROLL In scroll mode, TeX will stop only for missing files to input or if
+# keyboard input is necessary and ERROR_STOP In errorstop mode, TeX will stop at
+# each error, asking for user intervention.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BATCHMODE = NO
+
+# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the
+# index chapters (such as File Index, Compound Index, etc.) in the output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HIDE_INDICES = NO
+
+# The LATEX_BIB_STYLE tag can be used to specify the style to use for the
+# bibliography, e.g. plainnat, or ieeetr. See
+# https://en.wikipedia.org/wiki/BibTeX and \cite for more info.
+# The default value is: plain.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BIB_STYLE = plain
+
+# The LATEX_EMOJI_DIRECTORY tag is used to specify the (relative or absolute)
+# path from which the emoji images will be read. If a relative path is entered,
+# it will be relative to the LATEX_OUTPUT directory. If left blank the
+# LATEX_OUTPUT directory will be used.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EMOJI_DIRECTORY =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES, doxygen will generate RTF output. The
+# RTF output is optimized for Word 97 and may not look too pretty with other RTF
+# readers/editors.
+# The default value is: NO.
+
+GENERATE_RTF = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: rtf.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_OUTPUT = rtf
+
+# If the COMPACT_RTF tag is set to YES, doxygen generates more compact RTF
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+COMPACT_RTF = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will
+# contain hyperlink fields. The RTF file will contain links (just like the HTML
+# output) instead of page references. This makes the output suitable for online
+# browsing using Word or some other Word compatible readers that support those
+# fields.
+#
+# Note: WordPad (write) and others do not support links.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_HYPERLINKS = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# configuration file, i.e. a series of assignments. You only have to provide
+# replacements, missing definitions are set to their default value.
+#
+# See also section "Doxygen usage" for information on how to generate the
+# default style sheet that doxygen normally uses.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_STYLESHEET_FILE =
+
+# Set optional variables used in the generation of an RTF document. Syntax is
+# similar to doxygen's configuration file. A template extensions file can be
+# generated using doxygen -e rtf extensionFile.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_EXTENSIONS_FILE =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES, doxygen will generate man pages for
+# classes and files.
+# The default value is: NO.
+
+GENERATE_MAN = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it. A directory man3 will be created inside the directory specified by
+# MAN_OUTPUT.
+# The default directory is: man.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_OUTPUT = man
+
+# The MAN_EXTENSION tag determines the extension that is added to the generated
+# man pages. In case the manual section does not start with a number, the number
+# 3 is prepended. The dot (.) at the beginning of the MAN_EXTENSION tag is
+# optional.
+# The default value is: .3.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_EXTENSION = .3
+
+# The MAN_SUBDIR tag determines the name of the directory created within
+# MAN_OUTPUT in which the man pages are placed. If defaults to man followed by
+# MAN_EXTENSION with the initial . removed.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_SUBDIR =
+
+# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
+# will generate one additional man file for each entity documented in the real
+# man page(s). These additional files only source the real man page, but without
+# them the man command would be unable to find the correct page.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_LINKS = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES, doxygen will generate an XML file that
+# captures the structure of the code including all documentation.
+# The default value is: NO.
+
+GENERATE_XML = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: xml.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_OUTPUT = xml
+
+# If the XML_PROGRAMLISTING tag is set to YES, doxygen will dump the program
+# listings (including syntax highlighting and cross-referencing information) to
+# the XML output. Note that enabling this will significantly increase the size
+# of the XML output.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_PROGRAMLISTING = YES
+
+# If the XML_NS_MEMB_FILE_SCOPE tag is set to YES, doxygen will include
+# namespace members in file scope as well, matching the HTML output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_NS_MEMB_FILE_SCOPE = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the DOCBOOK output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_DOCBOOK tag is set to YES, doxygen will generate Docbook files
+# that can be used to generate PDF.
+# The default value is: NO.
+
+GENERATE_DOCBOOK = NO
+
+# The DOCBOOK_OUTPUT tag is used to specify where the Docbook pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be put in
+# front of it.
+# The default directory is: docbook.
+# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
+
+DOCBOOK_OUTPUT = docbook
+
+#---------------------------------------------------------------------------
+# Configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES, doxygen will generate an
+# AutoGen Definitions (see https://autogen.sourceforge.net/) file that captures
+# the structure of the code including all documentation. Note that this feature
+# is still experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_AUTOGEN_DEF = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to Sqlite3 output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_SQLITE3 tag is set to YES doxygen will generate a Sqlite3
+# database with symbols found by doxygen stored in tables.
+# The default value is: NO.
+
+GENERATE_SQLITE3 = NO
+
+# The SQLITE3_OUTPUT tag is used to specify where the Sqlite3 database will be
+# put. If a relative path is entered the value of OUTPUT_DIRECTORY will be put
+# in front of it.
+# The default directory is: sqlite3.
+# This tag requires that the tag GENERATE_SQLITE3 is set to YES.
+
+SQLITE3_OUTPUT = sqlite3
+
+# The SQLITE3_OVERWRITE_DB tag is set to YES, the existing doxygen_sqlite3.db
+# database file will be recreated with each doxygen run. If set to NO, doxygen
+# will warn if an a database file is already found and not modify it.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_SQLITE3 is set to YES.
+
+SQLITE3_RECREATE_DB = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES, doxygen will generate a Perl module
+# file that captures the structure of the code including all documentation.
+#
+# Note that this feature is still experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_PERLMOD = NO
+
+# If the PERLMOD_LATEX tag is set to YES, doxygen will generate the necessary
+# Makefile rules, Perl scripts and LaTeX code to be able to generate PDF and DVI
+# output from the Perl module output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_LATEX = NO
+
+# If the PERLMOD_PRETTY tag is set to YES, the Perl module output will be nicely
+# formatted so it can be parsed by a human reader. This is useful if you want to
+# understand what is going on. On the other hand, if this tag is set to NO, the
+# size of the Perl module output will be much smaller and Perl will parse it
+# just the same.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_PRETTY = YES
+
+# The names of the make variables in the generated doxyrules.make file are
+# prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. This is useful
+# so different doxyrules.make files included by the same Makefile don't
+# overwrite each other's variables.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_MAKEVAR_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES, doxygen will evaluate all
+# C-preprocessor directives found in the sources and include files.
+# The default value is: YES.
+
+ENABLE_PREPROCESSING = YES
+
+# If the MACRO_EXPANSION tag is set to YES, doxygen will expand all macro names
+# in the source code. If set to NO, only conditional compilation will be
+# performed. Macro expansion can be done in a controlled way by setting
+# EXPAND_ONLY_PREDEF to YES.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+MACRO_EXPANSION = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES then
+# the macro expansion is limited to the macros specified with the PREDEFINED and
+# EXPAND_AS_DEFINED tags.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_ONLY_PREDEF = NO
+
+# If the SEARCH_INCLUDES tag is set to YES, the include files in the
+# INCLUDE_PATH will be searched if a #include is found.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SEARCH_INCLUDES = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by the
+# preprocessor. Note that the INCLUDE_PATH is not recursive, so the setting of
+# RECURSIVE has no effect here.
+# This tag requires that the tag SEARCH_INCLUDES is set to YES.
+
+INCLUDE_PATH = Private/
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will be
+# used.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+INCLUDE_FILE_PATTERNS =
+
+# The PREDEFINED tag can be used to specify one or more macro names that are
+# defined before the preprocessor is started (similar to the -D option of e.g.
+# gcc). The argument of the tag is a list of macros of the form: name or
+# name=definition (no spaces). If the definition and the "=" are omitted, "=1"
+# is assumed. To prevent a macro definition from being undefined via #undef or
+# recursively expanded use the := operator instead of the = operator.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+PREDEFINED =
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
+# tag can be used to specify a list of macro names that should be expanded. The
+# macro definition that is found in the sources will be used. Use the PREDEFINED
+# tag if you want to use a different macro definition that overrules the
+# definition found in the source code.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_AS_DEFINED =
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will
+# remove all references to function-like macros that are alone on a line, have
+# an all uppercase name, and do not end with a semicolon. Such function macros
+# are typically used for boiler-plate code, and will confuse the parser if not
+# removed.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SKIP_FUNCTION_MACROS = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to external references
+#---------------------------------------------------------------------------
+
+# The TAGFILES tag can be used to specify one or more tag files. For each tag
+# file the location of the external documentation should be added. The format of
+# a tag file without this location is as follows:
+# TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+# TAGFILES = file1=loc1 "file2 = loc2" ...
+# where loc1 and loc2 can be relative or absolute paths or URLs. See the
+# section "Linking to external documentation" for more information about the use
+# of tag files.
+# Note: Each tag file must have a unique name (where the name does NOT include
+# the path). If a tag file is not located in the directory in which doxygen is
+# run, you must also specify the path to the tagfile here.
+
+TAGFILES =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create a
+# tag file that is based on the input files it reads. See section "Linking to
+# external documentation" for more information about the usage of tag files.
+
+GENERATE_TAGFILE =
+
+# If the ALLEXTERNALS tag is set to YES, all external classes and namespaces
+# will be listed in the class and namespace index. If set to NO, only the
+# inherited external classes will be listed.
+# The default value is: NO.
+
+ALLEXTERNALS = NO
+
+# If the EXTERNAL_GROUPS tag is set to YES, all external groups will be listed
+# in the topic index. If set to NO, only the current project's groups will be
+# listed.
+# The default value is: YES.
+
+EXTERNAL_GROUPS = YES
+
+# If the EXTERNAL_PAGES tag is set to YES, all external pages will be listed in
+# the related pages index. If set to NO, only the current project's pages will
+# be listed.
+# The default value is: YES.
+
+EXTERNAL_PAGES = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to diagram generator tools
+#---------------------------------------------------------------------------
+
+# If set to YES the inheritance and collaboration graphs will hide inheritance
+# and usage relations if the target is undocumented or is not a class.
+# The default value is: YES.
+
+HIDE_UNDOC_RELATIONS = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz (see:
+# https://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
+# Bell Labs. The other options in this section have no effect if this option is
+# set to NO
+# The default value is: NO.
+
+HAVE_DOT = NO
+
+# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is allowed
+# to run in parallel. When set to 0 doxygen will base this on the number of
+# processors available in the system. You can set it explicitly to a value
+# larger than 0 to get control over the balance between CPU load and processing
+# speed.
+# Minimum value: 0, maximum value: 32, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_NUM_THREADS = 0
+
+# DOT_COMMON_ATTR is common attributes for nodes, edges and labels of
+# subgraphs. When you want a differently looking font in the dot files that
+# doxygen generates you can specify fontname, fontcolor and fontsize attributes.
+# For details please see <a href=https://graphviz.org/doc/info/attrs.html>Node,
+# Edge and Graph Attributes specification</a> You need to make sure dot is able
+# to find the font, which can be done by putting it in a standard location or by
+# setting the DOTFONTPATH environment variable or by setting DOT_FONTPATH to the
+# directory containing the font. Default graphviz fontsize is 14.
+# The default value is: fontname=Helvetica,fontsize=10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_COMMON_ATTR = "fontname=Helvetica,fontsize=10"
+
+# DOT_EDGE_ATTR is concatenated with DOT_COMMON_ATTR. For elegant style you can
+# add 'arrowhead=open, arrowtail=open, arrowsize=0.5'. <a
+# href=https://graphviz.org/doc/info/arrows.html>Complete documentation about
+# arrows shapes.</a>
+# The default value is: labelfontname=Helvetica,labelfontsize=10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_EDGE_ATTR = "labelfontname=Helvetica,labelfontsize=10"
+
+# DOT_NODE_ATTR is concatenated with DOT_COMMON_ATTR. For view without boxes
+# around nodes set 'shape=plain' or 'shape=plaintext' <a
+# href=https://www.graphviz.org/doc/info/shapes.html>Shapes specification</a>
+# The default value is: shape=box,height=0.2,width=0.4.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_NODE_ATTR = "shape=box,height=0.2,width=0.4"
+
+# You can set the path where dot can find font specified with fontname in
+# DOT_COMMON_ATTR and others dot attributes.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTPATH =
+
+# If the CLASS_GRAPH tag is set to YES or GRAPH or BUILTIN then doxygen will
+# generate a graph for each documented class showing the direct and indirect
+# inheritance relations. In case the CLASS_GRAPH tag is set to YES or GRAPH and
+# HAVE_DOT is enabled as well, then dot will be used to draw the graph. In case
+# the CLASS_GRAPH tag is set to YES and HAVE_DOT is disabled or if the
+# CLASS_GRAPH tag is set to BUILTIN, then the built-in generator will be used.
+# If the CLASS_GRAPH tag is set to TEXT the direct and indirect inheritance
+# relations will be shown as texts / links.
+# Possible values are: NO, YES, TEXT, GRAPH and BUILTIN.
+# The default value is: YES.
+
+CLASS_GRAPH = YES
+
+# If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a
+# graph for each documented class showing the direct and indirect implementation
+# dependencies (inheritance, containment, and class references variables) of the
+# class with other documented classes. Explicit enabling a collaboration graph,
+# when COLLABORATION_GRAPH is set to NO, can be accomplished by means of the
+# command \collaborationgraph. Disabling a collaboration graph can be
+# accomplished by means of the command \hidecollaborationgraph.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+COLLABORATION_GRAPH = YES
+
+# If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for
+# groups, showing the direct groups dependencies. Explicit enabling a group
+# dependency graph, when GROUP_GRAPHS is set to NO, can be accomplished by means
+# of the command \groupgraph. Disabling a directory graph can be accomplished by
+# means of the command \hidegroupgraph. See also the chapter Grouping in the
+# manual.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GROUP_GRAPHS = YES
+
+# If the UML_LOOK tag is set to YES, doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+UML_LOOK = NO
+
+# If the UML_LOOK tag is enabled, the fields and methods are shown inside the
+# class node. If there are many fields or methods and many nodes the graph may
+# become too big to be useful. The UML_LIMIT_NUM_FIELDS threshold limits the
+# number of items for each type to make the size more manageable. Set this to 0
+# for no limit. Note that the threshold may be exceeded by 50% before the limit
+# is enforced. So when you set the threshold to 10, up to 15 fields may appear,
+# but if the number exceeds 15, the total amount of fields shown is limited to
+# 10.
+# Minimum value: 0, maximum value: 100, default value: 10.
+# This tag requires that the tag UML_LOOK is set to YES.
+
+UML_LIMIT_NUM_FIELDS = 10
+
+# If the DOT_UML_DETAILS tag is set to NO, doxygen will show attributes and
+# methods without types and arguments in the UML graphs. If the DOT_UML_DETAILS
+# tag is set to YES, doxygen will add type and arguments for attributes and
+# methods in the UML graphs. If the DOT_UML_DETAILS tag is set to NONE, doxygen
+# will not generate fields with class member information in the UML graphs. The
+# class diagrams will look similar to the default class diagrams but using UML
+# notation for the relationships.
+# Possible values are: NO, YES and NONE.
+# The default value is: NO.
+# This tag requires that the tag UML_LOOK is set to YES.
+
+DOT_UML_DETAILS = NO
+
+# The DOT_WRAP_THRESHOLD tag can be used to set the maximum number of characters
+# to display on a single line. If the actual line length exceeds this threshold
+# significantly it will wrapped across multiple lines. Some heuristics are apply
+# to avoid ugly line breaks.
+# Minimum value: 0, maximum value: 1000, default value: 17.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_WRAP_THRESHOLD = 17
+
+# If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and
+# collaboration graphs will show the relations between templates and their
+# instances.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+TEMPLATE_RELATIONS = NO
+
+# If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to
+# YES then doxygen will generate a graph for each documented file showing the
+# direct and indirect include dependencies of the file with other documented
+# files. Explicit enabling an include graph, when INCLUDE_GRAPH is is set to NO,
+# can be accomplished by means of the command \includegraph. Disabling an
+# include graph can be accomplished by means of the command \hideincludegraph.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDE_GRAPH = YES
+
+# If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are
+# set to YES then doxygen will generate a graph for each documented file showing
+# the direct and indirect include dependencies of the file with other documented
+# files. Explicit enabling an included by graph, when INCLUDED_BY_GRAPH is set
+# to NO, can be accomplished by means of the command \includedbygraph. Disabling
+# an included by graph can be accomplished by means of the command
+# \hideincludedbygraph.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDED_BY_GRAPH = YES
+
+# If the CALL_GRAPH tag is set to YES then doxygen will generate a call
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable call graphs for selected
+# functions only using the \callgraph command. Disabling a call graph can be
+# accomplished by means of the command \hidecallgraph.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALL_GRAPH = NO
+
+# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable caller graphs for selected
+# functions only using the \callergraph command. Disabling a caller graph can be
+# accomplished by means of the command \hidecallergraph.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALLER_GRAPH = NO
+
+# If the GRAPHICAL_HIERARCHY tag is set to YES then doxygen will graphical
+# hierarchy of all classes instead of a textual one.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GRAPHICAL_HIERARCHY = YES
+
+# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the
+# dependencies a directory has on other directories in a graphical way. The
+# dependency relations are determined by the #include relations between the
+# files in the directories. Explicit enabling a directory graph, when
+# DIRECTORY_GRAPH is set to NO, can be accomplished by means of the command
+# \directorygraph. Disabling a directory graph can be accomplished by means of
+# the command \hidedirectorygraph.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DIRECTORY_GRAPH = YES
+
+# The DIR_GRAPH_MAX_DEPTH tag can be used to limit the maximum number of levels
+# of child directories generated in directory dependency graphs by dot.
+# Minimum value: 1, maximum value: 25, default value: 1.
+# This tag requires that the tag DIRECTORY_GRAPH is set to YES.
+
+DIR_GRAPH_MAX_DEPTH = 1
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot. For an explanation of the image formats see the section
+# output formats in the documentation of the dot tool (Graphviz (see:
+# https://www.graphviz.org/)).
+# Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order
+# to make the SVG files visible in IE 9+ (other browsers do not have this
+# requirement).
+# Possible values are: png, jpg, gif, svg, png:gd, png:gd:gd, png:cairo,
+# png:cairo:gd, png:cairo:cairo, png:cairo:gdiplus, png:gdiplus and
+# png:gdiplus:gdiplus.
+# The default value is: png.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_IMAGE_FORMAT = png
+
+# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to
+# enable generation of interactive SVG images that allow zooming and panning.
+#
+# Note that this requires a modern browser other than Internet Explorer. Tested
+# and working are Firefox, Chrome, Safari, and Opera.
+# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make
+# the SVG files visible. Older versions of IE do not have SVG support.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INTERACTIVE_SVG = NO
+
+# The DOT_PATH tag can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_PATH =
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the \dotfile
+# command).
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOTFILE_DIRS =
+
+# You can include diagrams made with dia in doxygen documentation. Doxygen will
+# then run dia to produce the diagram and insert it in the documentation. The
+# DIA_PATH tag allows you to specify the directory where the dia binary resides.
+# If left empty dia is assumed to be found in the default search path.
+
+DIA_PATH =
+
+# The DIAFILE_DIRS tag can be used to specify one or more directories that
+# contain dia files that are included in the documentation (see the \diafile
+# command).
+
+DIAFILE_DIRS =
+
+# When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the
+# path where java can find the plantuml.jar file or to the filename of jar file
+# to be used. If left blank, it is assumed PlantUML is not used or called during
+# a preprocessing step. Doxygen will generate a warning when it encounters a
+# \startuml command in this case and will not generate output for the diagram.
+
+PLANTUML_JAR_PATH =
+
+# When using plantuml, the PLANTUML_CFG_FILE tag can be used to specify a
+# configuration file for plantuml.
+
+PLANTUML_CFG_FILE =
+
+# When using plantuml, the specified paths are searched for files specified by
+# the !include statement in a plantuml block.
+
+PLANTUML_INCLUDE_PATH =
+
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
+# that will be shown in the graph. If the number of nodes in a graph becomes
+# larger than this value, doxygen will truncate the graph, which is visualized
+# by representing a node as a red box. Note that doxygen if the number of direct
+# children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that
+# the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+# Minimum value: 0, maximum value: 10000, default value: 50.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_GRAPH_MAX_NODES = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs
+# generated by dot. A depth value of 3 means that only nodes reachable from the
+# root by following a path via at most 3 edges will be shown. Nodes that lay
+# further from the root node will be omitted. Note that setting this option to 1
+# or 2 may greatly reduce the computation time needed for large code bases. Also
+# note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
+# Minimum value: 0, maximum value: 1000, default value: 0.
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+
+MAX_DOT_GRAPH_DEPTH = 0
+
+# Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10) support
+# this, this feature is disabled by default.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_MULTI_TARGETS = NO
+
+# If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page
+# explaining the meaning of the various boxes and arrows in the dot generated
+# graphs.
+# Note: This tag requires that UML_LOOK isn't set, i.e. the doxygen internal
+# graphical representation for inheritance and collaboration diagrams is used.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GENERATE_LEGEND = YES
+
+# If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate
+# files that are used to generate the various graphs.
+#
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+# files.
+# The default value is: YES.
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+DOT_CLEANUP = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. If the MSCGEN_TOOL tag is left empty (the default), then doxygen will
+# use a built-in version of mscgen tool to produce the charts. Alternatively,
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+# output file formats "png", "eps", "svg", and "ismap".
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+# contain msc files that are included in the documentation (see the \mscfile
+# command).
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+MSCFILE_DIRS =
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..261eeb9
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,201 @@
+ Apache License
+ Version 2.0, January 2004
+ http://www.apache.org/licenses/
+
+ TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+ 1. Definitions.
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diff --git a/MailMap b/MailMap
new file mode 100644
index 0000000..240c081
--- /dev/null
+++ b/MailMap
@@ -0,0 +1 @@
+amlel - amlalelmahrouss@icloud.com, amlal@el-mahrouss-logic.com +33 6 58 57 30 14 \ No newline at end of file
diff --git a/ReadMe.md b/ReadMe.md
new file mode 100644
index 0000000..12a79d4
--- /dev/null
+++ b/ReadMe.md
@@ -0,0 +1,8 @@
+# CoreBoot
+## Multi-Platform IPL.
+
+Author: Amlal EL Mahrouss
+</br>
+Purpose: A firmware for 64x0, RISC-V, AMD64 and POWER architectures.
+
+###### Copyright 2024, Amlal EL Mahrouss all rights reserved.
diff --git a/compile_flags.txt b/compile_flags.txt
new file mode 100644
index 0000000..26d546d
--- /dev/null
+++ b/compile_flags.txt
@@ -0,0 +1,2 @@
+-I./
+-std=c17
diff --git a/docs/.gitkeep b/docs/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/docs/.gitkeep
diff --git a/docs/SPECIFICATION.TXT b/docs/SPECIFICATION.TXT
new file mode 100644
index 0000000..e747e5c
--- /dev/null
+++ b/docs/SPECIFICATION.TXT
@@ -0,0 +1,31 @@
+=================================
+
+ Multi Platform IPL
+
+=================================
+
+What we want:
+
+- Optimized for each target.
+- Common Hardware Support compilant.
+- AMD64, PowerPC, RISC-V, 64x0, 32x0 support.
+- SMP support.
+
+How we're going to do that:
+
+- Abstract Memory and I/O. (pci-tree)
+- Platform Independent Device Tree. (pci-tree)
+- Common Starting point for each core (smp)
+
+Executable Layout:
+
+- 0x80000000/0x00FF/0x1000: Firmware Startup Code
+- 0x90000000/0x7c00: Executable Information Header or equivalent.
+
+Error Codes:
+
+- LX0001: Not bootable
+- LX0002: Bad arch
+- LX0003: Bad revision
+
+
diff --git a/lib/.gitkeep b/lib/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/lib/.gitkeep
diff --git a/lib/arm64/.gdbinit b/lib/arm64/.gdbinit
new file mode 100644
index 0000000..c835b7f
--- /dev/null
+++ b/lib/arm64/.gdbinit
@@ -0,0 +1,3 @@
+set disassemble-next-line on
+target remote : 1234
+
diff --git a/lib/arm64/.gitkeep b/lib/arm64/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/lib/arm64/.gitkeep
diff --git a/lib/boot.h b/lib/boot.h
new file mode 100644
index 0000000..dff5199
--- /dev/null
+++ b/lib/boot.h
@@ -0,0 +1,195 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#pragma once
+
+///
+/// @file boot.h
+/// @brief CoreBoot types, data structures, and standard library.
+///
+
+typedef __UINTPTR_TYPE__ uintptr_t;
+typedef __UINT32_TYPE__ phys_addr_t;
+
+typedef unsigned long ulong_t;
+
+typedef unsigned long long int uint64_t;
+typedef unsigned uint32_t;
+typedef unsigned short uint16_t;
+typedef unsigned char uint8_t;
+
+#ifdef __unix__
+#undef __unix__
+#define __unix__ 7
+#endif // !__unix__
+
+#define __mpboot__ __unix__
+
+typedef __INTPTR_TYPE__ intptr_t;
+
+typedef __INT64_TYPE__ int64_t;
+typedef int int32_t;
+typedef short int16_t;
+typedef char int8_t;
+
+typedef void* voidptr_t;
+typedef char* addr_t;
+typedef const char* caddr_t;
+
+typedef __UINTPTR_TYPE__ ptrtype_t;
+typedef ptrtype_t size_t;
+
+#define array_size(arr) (sizeof(arr[0]) / sizeof(arr))
+
+#ifndef nil
+#define nil ((voidptr_t)0)
+#endif // ifndef nil
+
+#ifndef null
+#define null ((voidptr_t)0)
+#endif // ifndef null
+
+#define __no 0
+#define __yes 1
+
+#define boolean char
+
+#define no __no
+#define yes __yes
+
+#ifndef __cplusplus
+#define bool boolean
+#define false no
+#define true yes
+#endif //!_cplusplus
+
+#define SYS_RESTART 0
+#define SYS_SHUTDOWN 1
+
+#define __COPYRIGHT(s) /* unused */
+
+#ifdef __COMPILE_RISCV__
+#define SYS_BOOT_ADDR (0x80020000)
+#define SYS_BOOT_ADDR_STR "0x80020000"
+#define SYS_FRAMEBUFFER_ADDR 0x40000000L
+#define SYS_UART_BASE 0x10000000
+#define SYS_FLASH_BASE_ADDR 0x08000000
+
+#define mp_sync_synchronize() __sync_synchronize()
+#elif defined(__COMPILE_POWERPC__)
+#define SYS_UART_BASE 0x10000000
+#define SYS_BOOT_ADDR 0x1030000
+#define SYS_BOOT_ADDR_STR "0x1030000"
+#define SYS_FRAMEBUFFER_ADDR 0x40000000L
+#define SYS_FLASH_BASE_ADDR 0x08000000
+
+#define mp_sync_synchronize() __sync_synchronize()
+#elif defined(__COMPILE_ARM64__)
+
+#define SYS_UART_BASE 0x09000000
+#define SYS_BOOT_ADDR 0x1030000
+#define SYS_BOOT_ADDR_STR "0x1030000"
+#define SYS_FRAMEBUFFER_ADDR 0x40000000L
+#define SYS_FLASH_BASE_ADDR 0x08000000
+
+static inline void __sync_synchronize(void)
+{
+}
+
+#define mp_sync_synchronize() __sync_synchronize()
+#endif // ifndef __COMPILE_POWERPC__
+
+#define SYS_BAUDRATE_TABLE \
+ { \
+ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 \
+ }
+
+#define SYS_STRING(s) #s
+
+#define SYS_BOOT_MAG_0 'C'
+#define SYS_BOOT_MAG_1 'B'
+
+#define SYS_BOOT_VER 0x101
+
+#define SYS_BOOT_CALL(struct, offset) \
+ mp_proc_t proc_##offset = (mp_proc_t)(struct->offset); \
+ proc_##offset();
+
+/// @brief float type.
+typedef union {
+ struct
+ {
+ char sign;
+ int mantissa;
+ short exponent;
+ };
+
+ float f;
+} float_t;
+
+/// \brief UTF-32 character
+typedef uint32_t utf_char_t;
+
+/// @brief panic the entire system.
+/// @param reason why text.
+void mp_panic(const char* reason);
+
+/// @brief update the power status of the machine.
+void mp_update_power_status(boolean restart);
+
+/// @brief puts a string in serial
+/// @param text
+/// @return
+size_t mp_put_string(const char* text);
+
+/// @brief gets a char from serial
+/// @param
+/// @return
+utf_char_t mp_get_char(void);
+
+/// @brief puts a char in serial
+/// @param ch
+void mp_put_char(utf_char_t ch);
+
+/// @brief Hangs the firmware.
+/// @param void no args.
+void mp_restart_machine(void);
+
+/// @brief Flushs the TLB.
+/// @param void no args.
+void mp_flush_tlb(void);
+
+/// @brief Print current kernel name.
+/// @param
+void mp_print_name(void);
+
+/// @brief String length getter
+/// @param str the string.
+/// @return
+size_t strlen(caddr_t str);
+
+/// @brief Compare two strings.
+/// @param src source string
+/// @param cmp string to compare.
+/// @return
+size_t strcmp(caddr_t src, caddr_t cmp);
+
+typedef void (*mp_proc_t)();
+
+/// \brief ASCII character.
+typedef char ascii_char_t;
+
+/// @brief Linear Executable Header
+/// @author Amlal EL Mahrouss (Amlal EL Mahrouss)
+struct __attribute__((aligned(4))) mp_boot_header
+{
+ const ascii_char_t h_mag[2]; // magic number
+ const ascii_char_t h_name[10]; // operating system name
+ const uint32_t h_revision; // firmware revision
+ const uint64_t h_start_address; // start address (master/slave(s) thread)
+};
+
+// EOF.
diff --git a/lib/cxx-abi.h b/lib/cxx-abi.h
new file mode 100644
index 0000000..444ad41
--- /dev/null
+++ b/lib/cxx-abi.h
@@ -0,0 +1,23 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#pragma once
+
+#define DSO_MAX_OBJECTS (128)
+
+struct atexit_func_entry_t
+{
+ void (*destructor_func)(void*);
+ void* obj_ptr;
+ void* dso_handle;
+};
+
+typedef unsigned uarch_t;
+
+namespace cxxabiv1
+{
+ typedef void* __guard;
+}
diff --git a/lib/fd.h b/lib/fd.h
new file mode 100644
index 0000000..f2e4655
--- /dev/null
+++ b/lib/fd.h
@@ -0,0 +1,32 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#pragma once
+
+#include <lib/boot.h>
+
+struct _mp_file_descriptor;
+
+/// @brief CoreBoot file/device descriptor.
+/// @version 1
+typedef struct _mp_file_descriptor
+{
+ int32_t f_kind;
+ int32_t f_filesystem;
+
+ size_t (*f_write)(void* ptr, size_t size, size_t nitems, struct _mp_file_descriptor* self);
+ size_t (*f_read)(void* ptr, size_t size, size_t nitems, struct _mp_file_descriptor* self);
+ int (*f_seek)(struct _mp_file_descriptor* self, size_t off, int whence);
+ int (*f_tell)(struct _mp_file_descriptor* self);
+ int (*f_rewind)(struct _mp_file_descriptor* self);
+ int (*f_eof)(struct _mp_file_descriptor* self);
+ int (*f_close)(struct _mp_file_descriptor* self);
+} mp_file_descriptor_t;
+
+/// @brief Grabs a new device reference.
+/// @param path the device path.
+/// @return
+mp_file_descriptor_t* mp_grab_fd(const char* path);
diff --git a/lib/mp-bit.h b/lib/mp-bit.h
new file mode 100644
index 0000000..7195fc0
--- /dev/null
+++ b/lib/mp-bit.h
@@ -0,0 +1,19 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#ifndef __BITMANIP_H__
+#define __BITMANIP_H__
+
+/// Name: CoreBoot Bits API.
+/// Purpose: Bit manip helpers.
+
+#define mp_set_bit(X, O) X = (1 << O) | X
+#define mp_clear_bit(X, O) X = ~(1 << O) & X
+#define mp_toogle(X, O) X = (1 << O) ^ X
+#define mp_lsb(X) X = X & -X
+#define mp_msb(X) X = -(mp_lsb(X)) & X
+
+#endif // ifndef __BITMANIP_H__
diff --git a/lib/netboot.h b/lib/netboot.h
new file mode 100644
index 0000000..385e6b2
--- /dev/null
+++ b/lib/netboot.h
@@ -0,0 +1,27 @@
+/* -------------------------------------------
+
+ Copyright (C) 2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#pragma once
+
+#include <lib/boot.h>
+
+#define NETBOOT_INET_MAGIC "NETB"
+#define NETBOOT_INET_MAGIC_LEN 4
+
+typedef struct NETBOOT_INET_HEADER
+{
+ char m_nb1; /// magic char 1 'N'
+ char m_nb2; /// magic char 2 'E'
+ char m_nb3; /// magic char 3 'T'
+ char m_nb4; /// magic char 4 'B'
+
+ char m_patch_name[255]; /// example: ColdChoco
+ int32_t m_length; /// the patch length.
+ char m_target[255]; /// the target file.
+ uint8_t ImpliesROM; /// does it imply an EEPROM reprogram?
+ uint8_t m_preflight;
+ uint8_t m_blob[];
+} NETBOOT_INET_HEADER;
diff --git a/lib/partition-map.h b/lib/partition-map.h
new file mode 100644
index 0000000..bdb2b82
--- /dev/null
+++ b/lib/partition-map.h
@@ -0,0 +1,103 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#ifndef __PARTITION_MAP_H__
+#define __PARTITION_MAP_H__
+
+#include <lib/boot.h>
+
+/* @brief AMD64 magic for EPM */
+#define EPM_MAGIC_X86 "EPMAM"
+
+/* @brief RISC-V magic for EPM */
+#define EPM_MAGIC_RV "EPMRV"
+
+/* @brief ARM magic for EPM */
+#define EPM_MAGIC_ARM "EPMAR"
+
+/* @brief 64x0 magic for EPM */
+#define EPM_MAGIC_64X0 "EPM64"
+
+/* @brief 32x0 magic for EPM */
+#define EPM_MAGIC_32X0 "EPM32"
+
+/* @brief POWER magic for EPM */
+#define EPM_MAGIC_PPC "EPMPC"
+
+#ifdef __aarch64__
+#define EPM_MAGIC EPM_MAGIC_ARM
+#elif defined(__riscv64__)
+#define EPM_MAGIC EPM_MAGIC_RV
+#else
+#define EPM_MAGIC "EPMMS" /* mass storage */
+#endif
+
+#define EPM_MAX_BLKS 128 /* 1 on UEFI EPM. */
+
+#define EPM_BOOT_BLK_SZ sizeof(struct boot_block)
+#define EPM_PART_BLK_SZ sizeof(struct part_block)
+
+/// @brief Start of EPM headers.
+/// @note There could be anything before this LBA.
+/// Such as PC specific structures.
+#define EPM_PART_BLK_START (0)
+
+/// @brief EPM revision (actually at version 2)
+#define EPM_REVISION (2U)
+
+/// @brief EPM GUID block.
+typedef struct boot_guid
+{
+ uint32_t data1;
+ uint16_t data2;
+ uint16_t data3;
+ uint8_t data4[8];
+} boot_guid_t;
+
+/* The first 0 > 128 addresses of a disk contains these headers. */
+
+/**
+ * @brief The EPM partition block.
+ * used to represent a partition inside a media.
+ */
+struct __attribute__((packed)) part_block
+{
+ ascii_char_t magic[5];
+ ascii_char_t name[32];
+ boot_guid_t uuid;
+ int32_t version;
+ int32_t num_blocks;
+ int64_t lba_start;
+ int64_t sector_sz;
+ int64_t lba_end;
+ int16_t type;
+ int32_t fs_version;
+ ascii_char_t fs[16]; /* ffs_2 */
+ ascii_char_t reserved[401];
+};
+
+typedef struct part_block part_block_t;
+
+///! @brief variant enum.
+///! use it in the boot block version field.
+enum
+{
+ EPM_INVALID = 0x00,
+ EPM_GENERIC_OS = 0xcf,
+ EPM_LINUX = 0x8f,
+ EPM_BSD = 0x9f,
+ EPM_ZKAOS = 0x1f,
+};
+
+/// @brief check for supported filesystem.
+boolean mp_filesystem_exists(caddr_t fs, size_t len);
+
+/// @brief Parse EPM block from blob.
+bool mp_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz);
+
+part_block_t* mp_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index);
+
+#endif // ifndef __PARTITION_MAP_H__
diff --git a/lib/pci-tree.h b/lib/pci-tree.h
new file mode 100644
index 0000000..4ca8d57
--- /dev/null
+++ b/lib/pci-tree.h
@@ -0,0 +1,70 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#pragma once
+
+/// @file pci-tree.h
+/// @brief PCI Tree layout.
+/// @author Amlal EL Mahrouss
+
+#include <lib/boot.h>
+
+#define PCI_INVALID_DATA_U8 ((uint8_t)~0)
+#define PCI_INVALID_DATA_U16 ((uint16_t)~0)
+#define PCI_INVALID_DATA_U32 ((uint32_t)~0)
+
+#define SYS_BASE_ADDRESS (0x20008000) /* PCI base mapped in virtual memory. */
+#define SYS_PCI_TREE_BASE (0x802000) /* The PCI tree base address. */
+
+#define PCI_CONFIG_SPACE (4096U)
+
+#define PCI_BUS_MAX (256U)
+#define PCI_DEV_MAX (32U)
+#define PCI_FN_MAX (8U)
+
+/* version 1.0 */
+#define SYS_PCI_VERSION (0x0100)
+
+#define SYS_PCI_DEV_MAGIC (0xfeedd00d)
+#define SYS_PCI_INT_SZ sizeof(mp_pci_num_t)
+
+#define SYS_PCI_NAME_LEN (255U)
+
+typedef char mp_pci_char_t;
+typedef uintptr_t mp_pci_num_t;
+
+typedef uint8_t mp_pci_fn_t;
+typedef uint8_t mp_pci_bus_t;
+typedef uint8_t mp_pci_device_t;
+
+/// @brief hardware tree header
+/// used by guest to resolve hardware peripherals.
+struct hw_mp_pci_tree
+{
+ mp_pci_num_t d_magic;
+ mp_pci_num_t d_version;
+ mp_pci_num_t d_off_props;
+ mp_pci_num_t d_off_struct;
+ mp_pci_num_t d_sz_props;
+ mp_pci_num_t d_sz_struct;
+
+ mp_pci_num_t d_first_node;
+ mp_pci_num_t d_next_sibling;
+
+ mp_pci_char_t d_name[SYS_PCI_NAME_LEN];
+};
+
+/// @brief Init PCI tree.
+/// @param void
+/// @return if it's successful or not.
+boolean mp_pci_init_tree(void);
+
+/// @brief Adds a new tree into the internal data structure.
+/// @param name device name
+/// @param struct_ptr device structure
+/// @param struct_sz the structure size of the device.
+/// @return if it was successful or not.
+boolean mp_pci_append_tree(const caddr_t name, mp_pci_num_t struct_ptr, mp_pci_num_t struct_sz);
diff --git a/lib/ppc64/mmu.h b/lib/ppc64/mmu.h
new file mode 100644
index 0000000..d68fcf5
--- /dev/null
+++ b/lib/ppc64/mmu.h
@@ -0,0 +1,813 @@
+/*
+ * PowerPC memory management structures
+ */
+
+#ifndef _PPC_MMU_H_
+#define _PPC_MMU_H_
+
+#ifndef __ASSEMBLY__
+#include <lib/boot.h>
+
+/* Hardware Page Table Entry */
+typedef struct _PTE
+{
+#ifdef CONFIG_PPC64BRIDGE
+ unsigned long long vsid : 52;
+ unsigned long api : 5;
+ unsigned long : 5;
+ unsigned long h : 1;
+ unsigned long v : 1;
+ unsigned long long rpn : 52;
+#else /* CONFIG_PPC64BRIDGE */
+ unsigned long v : 1; /* Entry is valid */
+ unsigned long vsid : 24; /* Virtual segment identifier */
+ unsigned long h : 1; /* Hash algorithm indicator */
+ unsigned long api : 6; /* Abbreviated page index */
+ unsigned long rpn : 20; /* Real (physical) page number */
+#endif /* CONFIG_PPC64BRIDGE */
+ unsigned long : 3; /* Unused */
+ unsigned long r : 1; /* Referenced */
+ unsigned long c : 1; /* Changed */
+ unsigned long w : 1; /* Write-thru cache mode */
+ unsigned long i : 1; /* Cache inhibited */
+ unsigned long m : 1; /* Memory coherence */
+ unsigned long g : 1; /* Guarded */
+ unsigned long : 1; /* Unused */
+ unsigned long pp : 2; /* Page protection */
+} PTE;
+
+/* Values for PP (assumes Ks=0, Kp=1) */
+#define PP_RWXX 0 /* Supervisor read/write, User none */
+#define PP_RWRX 1 /* Supervisor read/write, User read */
+#define PP_RWRW 2 /* Supervisor read/write, User read/write */
+#define PP_RXRX 3 /* Supervisor read, User read */
+
+/* Segment Register */
+typedef struct _SEGREG
+{
+ unsigned long t : 1; /* Normal or I/O type */
+ unsigned long ks : 1; /* Supervisor 'key' (normally 0) */
+ unsigned long kp : 1; /* User 'key' (normally 1) */
+ unsigned long n : 1; /* No-execute */
+ unsigned long : 4; /* Unused */
+ unsigned long vsid : 24; /* Virtual Segment Identifier */
+} SEGREG;
+
+/* Block Address Translation (BAT) Registers */
+typedef struct _P601_BATU
+{ /* Upper part of BAT for 601 processor */
+ unsigned long bepi : 15; /* Effective page index (virtual address) */
+ unsigned long : 8; /* unused */
+ unsigned long w : 1;
+ unsigned long i : 1; /* Cache inhibit */
+ unsigned long m : 1; /* Memory coherence */
+ unsigned long ks : 1; /* Supervisor key (normally 0) */
+ unsigned long kp : 1; /* User key (normally 1) */
+ unsigned long pp : 2; /* Page access protections */
+} P601_BATU;
+
+typedef struct _BATU
+{ /* Upper part of BAT (all except 601) */
+#ifdef CONFIG_PPC64BRIDGE
+ unsigned long long bepi : 47;
+#else /* CONFIG_PPC64BRIDGE */
+ unsigned long bepi : 15; /* Effective page index (virtual address) */
+#endif /* CONFIG_PPC64BRIDGE */
+ unsigned long : 4; /* Unused */
+ unsigned long bl : 11; /* Block size mask */
+ unsigned long vs : 1; /* Supervisor valid */
+ unsigned long vp : 1; /* User valid */
+} BATU;
+
+typedef struct _P601_BATL
+{ /* Lower part of BAT for 601 processor */
+ unsigned long brpn : 15; /* Real page index (physical address) */
+ unsigned long : 10; /* Unused */
+ unsigned long v : 1; /* Valid bit */
+ unsigned long bl : 6; /* Block size mask */
+} P601_BATL;
+
+typedef struct _BATL
+{ /* Lower part of BAT (all except 601) */
+#ifdef CONFIG_PPC64BRIDGE
+ unsigned long long brpn : 47;
+#else /* CONFIG_PPC64BRIDGE */
+ unsigned long brpn : 15; /* Real page index (physical address) */
+#endif /* CONFIG_PPC64BRIDGE */
+ unsigned long : 10; /* Unused */
+ unsigned long w : 1; /* Write-thru cache */
+ unsigned long i : 1; /* Cache inhibit */
+ unsigned long m : 1; /* Memory coherence */
+ unsigned long g : 1; /* Guarded (MBZ in IBAT) */
+ unsigned long : 1; /* Unused */
+ unsigned long pp : 2; /* Page access protections */
+} BATL;
+
+typedef struct _BAT
+{
+ BATU batu; /* Upper register */
+ BATL batl; /* Lower register */
+} BAT;
+
+typedef struct _P601_BAT
+{
+ P601_BATU batu; /* Upper register */
+ P601_BATL batl; /* Lower register */
+} P601_BAT;
+
+/*
+ * Simulated two-level MMU. This structure is used by the Kernel
+ * to keep track of MMU mappings and is used to update/maintain
+ * the hardware HASH table which is really a cache of mappings.
+ *
+ * The simulated structures mimic the hardware available on other
+ * platforms, notably the 80x86 and 680x0.
+ */
+
+typedef struct _pte
+{
+ unsigned long page_num : 20;
+ unsigned long flags : 12; /* Page flags (some unused bits) */
+} pte;
+
+#define PD_SHIFT (10 + 12) /* Page directory */
+#define PD_MASK 0x02FF
+#define PT_SHIFT (12) /* Page Table */
+#define PT_MASK 0x02FF
+#define PG_SHIFT (12) /* Page Entry */
+
+/* MMU context */
+
+typedef struct _MMU_context
+{
+ SEGREG segs[16]; /* Segment registers */
+ pte** pmap; /* Two-level page-map structure */
+} MMU_context;
+
+extern void _tlbie(unsigned long va); /* invalidate a TLB entry */
+extern void _tlbia(void); /* invalidate all TLB entries */
+
+#ifdef CONFIG_ADDR_MAP
+extern void init_addr_map(void);
+#endif
+
+typedef enum
+{
+ IBAT0 = 0,
+ IBAT1,
+ IBAT2,
+ IBAT3,
+ DBAT0,
+ DBAT1,
+ DBAT2,
+ DBAT3,
+#ifdef CONFIG_HIGH_BATS
+ IBAT4,
+ IBAT5,
+ IBAT6,
+ IBAT7,
+ DBAT4,
+ DBAT5,
+ DBAT6,
+ DBAT7
+#endif
+} ppc_bat_t;
+
+extern int read_bat(ppc_bat_t bat, unsigned long* upper, unsigned long* lower);
+extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower);
+extern void print_bats(void);
+
+#endif /* __ASSEMBLY__ */
+
+#define BATU_VS 0x00000002
+#define BATU_VP 0x00000001
+#define BATU_INVALID 0x00000000
+
+#define BATL_WRITETHROUGH 0x00000040
+#define BATL_CACHEINHIBIT 0x00000020
+#define BATL_MEMCOHERENCE 0x00000010
+#define BATL_GUARDEDSTORAGE 0x00000008
+#define BATL_NO_ACCESS 0x00000000
+
+#define BATL_PP_MSK 0x00000003
+#define BATL_PP_00 0x00000000 /* No access */
+#define BATL_PP_01 0x00000001 /* Read-only */
+#define BATL_PP_10 0x00000002 /* Read-write */
+#define BATL_PP_11 0x00000003
+
+#define BATL_PP_NO_ACCESS BATL_PP_00
+#define BATL_PP_RO BATL_PP_01
+#define BATL_PP_RW BATL_PP_10
+
+/* BAT Block size values */
+#define BATU_BL_128K 0x00000000
+#define BATU_BL_256K 0x00000004
+#define BATU_BL_512K 0x0000000c
+#define BATU_BL_1M 0x0000001c
+#define BATU_BL_2M 0x0000003c
+#define BATU_BL_4M 0x0000007c
+#define BATU_BL_8M 0x000000fc
+#define BATU_BL_16M 0x000001fc
+#define BATU_BL_32M 0x000003fc
+#define BATU_BL_64M 0x000007fc
+#define BATU_BL_128M 0x00000ffc
+#define BATU_BL_256M 0x00001ffc
+
+/* Block lengths for processors that support extended block length */
+#ifdef HID0_XBSEN
+#define BATU_BL_512M 0x00003ffc
+#define BATU_BL_1G 0x00007ffc
+#define BATU_BL_2G 0x0000fffc
+#define BATU_BL_4G 0x0001fffc
+#define BATU_BL_MAX BATU_BL_4G
+#else
+#define BATU_BL_MAX BATU_BL_256M
+#endif
+
+/* BAT Access Protection */
+#define BPP_XX 0x00 /* No access */
+#define BPP_RX 0x01 /* Read only */
+#define BPP_RW 0x02 /* Read/write */
+
+/* Macros to get values from BATs, once data is in the BAT register format */
+#define BATU_VALID(x) (x & 0x3)
+#define BATU_VADDR(x) (x & 0xfffe0000)
+#define BATL_PADDR(x) ((phys_addr_t)((x & 0xfffe0000) | ((x & 0x0e00ULL) << 24) | ((x & 0x04ULL) << 30)))
+#define BATU_SIZE(x) (1ULL << (fls((x & BATU_BL_MAX) >> 2) + 17))
+
+/* bytes into BATU_BL */
+#define TO_BATU_BL(x) \
+ (uint32_t)((((1ull << __ilog2_u64((uint64_t)x)) / (128 * 1024)) - 1) * 4)
+
+/* Used to set up SDR1 register */
+#define HASH_TABLE_SIZE_64K 0x00010000
+#define HASH_TABLE_SIZE_128K 0x00020000
+#define HASH_TABLE_SIZE_256K 0x00040000
+#define HASH_TABLE_SIZE_512K 0x00080000
+#define HASH_TABLE_SIZE_1M 0x00100000
+#define HASH_TABLE_SIZE_2M 0x00200000
+#define HASH_TABLE_SIZE_4M 0x00400000
+#define HASH_TABLE_MASK_64K 0x000
+#define HASH_TABLE_MASK_128K 0x001
+#define HASH_TABLE_MASK_256K 0x003
+#define HASH_TABLE_MASK_512K 0x007
+#define HASH_TABLE_MASK_1M 0x00F
+#define HASH_TABLE_MASK_2M 0x01F
+#define HASH_TABLE_MASK_4M 0x03F
+
+/* Control/status registers for the MPC8xx.
+ * A write operation to these registers causes serialized access.
+ * During software tablewalk, the registers used perform mask/shift-add
+ * operations when written/read. A TLB entry is created when the Mx_RPN
+ * is written, and the contents of several registers are used to
+ * create the entry.
+ */
+#define MI_CTR 784 /* Instruction TLB control register */
+#define MI_GPM 0x80000000 /* Set domain manager mode */
+#define MI_PPM 0x40000000 /* Set subpage protection */
+#define MI_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */
+#define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */
+#define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
+#define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */
+#define MI_RESETVAL 0x00000000 /* Value of register at reset */
+
+/* These are the Ks and Kp from the PowerPC books. For proper operation,
+ * Ks = 0, Kp = 1.
+ */
+#define MI_AP 786
+#define MI_Ks 0x80000000 /* Should not be set */
+#define MI_Kp 0x40000000 /* Should always be set */
+
+/* The effective page number register. When read, contains the information
+ * about the last instruction TLB miss. When MI_RPN is written, bits in
+ * this register are used to create the TLB entry.
+ */
+#define MI_EPN 787
+#define MI_EPNMASK 0xfffff000 /* Effective page number for entry */
+#define MI_EVALID 0x00000200 /* Entry is valid */
+#define MI_ASIDMASK 0x0000000f /* ASID match value */
+ /* Reset value is undefined */
+
+/* A "level 1" or "segment" or whatever you want to call it register.
+ * For the instruction TLB, it contains bits that get loaded into the
+ * TLB entry when the MI_RPN is written.
+ */
+#define MI_TWC 789
+#define MI_APG 0x000001e0 /* Access protection group (0) */
+#define MI_GUARDED 0x00000010 /* Guarded storage */
+#define MI_PSMASK 0x0000000c /* Mask of page size bits */
+#define MI_PS8MEG 0x0000000c /* 8M page size */
+#define MI_PS512K 0x00000004 /* 512K page size */
+#define MI_PS4K_16K 0x00000000 /* 4K or 16K page size */
+#define MI_SVALID 0x00000001 /* Segment entry is valid */
+ /* Reset value is undefined */
+
+/* Real page number. Defined by the pte. Writing this register
+ * causes a TLB entry to be created for the instruction TLB, using
+ * additional information from the MI_EPN, and MI_TWC registers.
+ */
+#define MI_RPN 790
+
+/* Define an RPN value for mapping Kernel memory to large virtual
+ * pages for boot initialization. This has real page number of 0,
+ * large page size, shared page, cache enabled, and valid.
+ * Also mark all subpages valid and write access.
+ */
+#define MI_BOOTINIT 0x000001fd
+
+#define MD_CTR 792 /* Data TLB control register */
+#define MD_GPM 0x80000000 /* Set domain manager mode */
+#define MD_PPM 0x40000000 /* Set subpage protection */
+#define MD_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */
+#define MD_WTDEF 0x10000000 /* Set writethrough when MMU dis */
+#define MD_RSV4I 0x08000000 /* Reserve 4 TLB entries */
+#define MD_TWAM 0x04000000 /* Use 4K page hardware assist */
+#define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
+#define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */
+#define MD_RESETVAL 0x04000000 /* Value of register at reset */
+
+#define M_CASID 793 /* Address space ID (context) to match */
+#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */
+
+/* These are the Ks and Kp from the PowerPC books. For proper operation,
+ * Ks = 0, Kp = 1.
+ */
+#define MD_AP 794
+#define MD_Ks 0x80000000 /* Should not be set */
+#define MD_Kp 0x40000000 /* Should always be set */
+
+/* The effective page number register. When read, contains the information
+ * about the last instruction TLB miss. When MD_RPN is written, bits in
+ * this register are used to create the TLB entry.
+ */
+#define MD_EPN 795
+#define MD_EPNMASK 0xfffff000 /* Effective page number for entry */
+#define MD_EVALID 0x00000200 /* Entry is valid */
+#define MD_ASIDMASK 0x0000000f /* ASID match value */
+ /* Reset value is undefined */
+
+/* The pointer to the base address of the first level page table.
+ * During a software tablewalk, reading this register provides the address
+ * of the entry associated with MD_EPN.
+ */
+#define M_TWB 796
+#define M_L1TB 0xfffff000 /* Level 1 table base address */
+#define M_L1INDX 0x00000ffc /* Level 1 index, when read */
+ /* Reset value is undefined */
+
+/* A "level 1" or "segment" or whatever you want to call it register.
+ * For the data TLB, it contains bits that get loaded into the TLB entry
+ * when the MD_RPN is written. It is also provides the hardware assist
+ * for finding the PTE address during software tablewalk.
+ */
+#define MD_TWC 797
+#define MD_L2TB 0xfffff000 /* Level 2 table base address */
+#define MD_L2INDX 0xfffffe00 /* Level 2 index (*pte), when read */
+#define MD_APG 0x000001e0 /* Access protection group (0) */
+#define MD_GUARDED 0x00000010 /* Guarded storage */
+#define MD_PSMASK 0x0000000c /* Mask of page size bits */
+#define MD_PS8MEG 0x0000000c /* 8M page size */
+#define MD_PS512K 0x00000004 /* 512K page size */
+#define MD_PS4K_16K 0x00000000 /* 4K or 16K page size */
+#define MD_WT 0x00000002 /* Use writethrough page attribute */
+#define MD_SVALID 0x00000001 /* Segment entry is valid */
+ /* Reset value is undefined */
+
+/* Real page number. Defined by the pte. Writing this register
+ * causes a TLB entry to be created for the data TLB, using
+ * additional information from the MD_EPN, and MD_TWC registers.
+ */
+#define MD_RPN 798
+
+/* This is a temporary storage register that could be used to save
+ * a processor working register during a tablewalk.
+ */
+#define M_TW 799
+
+/*
+ * At present, all PowerPC 400-class processors share a similar TLB
+ * architecture. The instruction and data sides share a unified,
+ * 64-entry, fully-associative TLB which is maintained totally under
+ * software control. In addition, the instruction side has a
+ * hardware-managed, 4-entry, fully- associative TLB which serves as a
+ * first level to the shared TLB. These two TLBs are known as the UTLB
+ * and ITLB, respectively.
+ */
+
+#define PPC4XX_TLB_SIZE 64
+
+/*
+ * TLB entries are defined by a "high" tag portion and a "low" data
+ * portion. On all architectures, the data portion is 32-bits.
+ *
+ * TLB entries are managed entirely under software control by reading,
+ * writing, and searchoing using the 4xx-specific tlbre, tlbwr, and tlbsx
+ * instructions.
+ */
+
+/*
+ * FSL Book-E support
+ */
+
+#define MAS0_TLBSEL_MSK 0x30000000
+#define MAS0_TLBSEL(x) (((x) << 28) & MAS0_TLBSEL_MSK)
+#define MAS0_ESEL_MSK 0x0FFF0000
+#define MAS0_ESEL(x) (((x) << 16) & MAS0_ESEL_MSK)
+#define MAS0_NV(x) ((x)&0x00000FFF)
+
+#define MAS1_VALID 0x80000000
+#define MAS1_IPROT 0x40000000
+#define MAS1_TID(x) (((x) << 16) & 0x3FFF0000)
+#define MAS1_TS 0x00001000
+#define MAS1_TSIZE(x) (((x) << 7) & 0x00000F80)
+#define TSIZE_TO_BYTES(x) (1ULL << ((x) + 10))
+
+#define MAS2_EPN 0xFFFFF000
+#define MAS2_X0 0x00000040
+#define MAS2_X1 0x00000020
+#define MAS2_W 0x00000010
+#define MAS2_I 0x00000008
+#define MAS2_M 0x00000004
+#define MAS2_G 0x00000002
+#define MAS2_E 0x00000001
+
+#define MAS3_RPN 0xFFFFF000
+#define MAS3_U0 0x00000200
+#define MAS3_U1 0x00000100
+#define MAS3_U2 0x00000080
+#define MAS3_U3 0x00000040
+#define MAS3_UX 0x00000020
+#define MAS3_SX 0x00000010
+#define MAS3_UW 0x00000008
+#define MAS3_SW 0x00000004
+#define MAS3_UR 0x00000002
+#define MAS3_SR 0x00000001
+
+#define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
+#define MAS4_TIDDSEL 0x000F0000
+#define MAS4_TSIZED(x) MAS1_TSIZE(x)
+#define MAS4_X0D 0x00000040
+#define MAS4_X1D 0x00000020
+#define MAS4_WD 0x00000010
+#define MAS4_ID 0x00000008
+#define MAS4_MD 0x00000004
+#define MAS4_GD 0x00000002
+#define MAS4_ED 0x00000001
+
+#define MAS6_SPID0 0x3FFF0000
+#define MAS6_SPID1 0x00007FFE
+#define MAS6_SAS 0x00000001
+#define MAS6_SPID MAS6_SPID0
+
+#define MAS7_RPN 0xFFFFFFFF
+
+#define FSL_BOOKE_MAS0(tlbsel, esel, nv) \
+ (MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel) | MAS0_NV(nv))
+#define FSL_BOOKE_MAS1(v, iprot, tid, ts, tsize) \
+ ((((v) << 31) & MAS1_VALID) | \
+ (((iprot) << 30) & MAS1_IPROT) | \
+ (MAS1_TID(tid)) | \
+ (((ts) << 12) & MAS1_TS) | \
+ (MAS1_TSIZE(tsize)))
+#define FSL_BOOKE_MAS2(epn, wimge) \
+ (((epn)&MAS3_RPN) | (wimge))
+#define FSL_BOOKE_MAS3(rpn, user, perms) \
+ (((rpn)&MAS3_RPN) | (user) | (perms))
+#define FSL_BOOKE_MAS7(rpn) \
+ (((uint64_t)(rpn)) >> 32)
+
+#define BOOKE_PAGESZ_1K 0
+#define BOOKE_PAGESZ_2K 1
+#define BOOKE_PAGESZ_4K 2
+#define BOOKE_PAGESZ_8K 3
+#define BOOKE_PAGESZ_16K 4
+#define BOOKE_PAGESZ_32K 5
+#define BOOKE_PAGESZ_64K 6
+#define BOOKE_PAGESZ_128K 7
+#define BOOKE_PAGESZ_256K 8
+#define BOOKE_PAGESZ_512K 9
+#define BOOKE_PAGESZ_1M 10
+#define BOOKE_PAGESZ_2M 11
+#define BOOKE_PAGESZ_4M 12
+#define BOOKE_PAGESZ_8M 13
+#define BOOKE_PAGESZ_16M 14
+#define BOOKE_PAGESZ_32M 15
+#define BOOKE_PAGESZ_64M 16
+#define BOOKE_PAGESZ_128M 17
+#define BOOKE_PAGESZ_256M 18
+#define BOOKE_PAGESZ_512M 19
+#define BOOKE_PAGESZ_1G 20
+#define BOOKE_PAGESZ_2G 21
+#define BOOKE_PAGESZ_4G 22
+#define BOOKE_PAGESZ_8G 23
+#define BOOKE_PAGESZ_16GB 24
+#define BOOKE_PAGESZ_32GB 25
+#define BOOKE_PAGESZ_64GB 26
+#define BOOKE_PAGESZ_128GB 27
+#define BOOKE_PAGESZ_256GB 28
+#define BOOKE_PAGESZ_512GB 29
+#define BOOKE_PAGESZ_1TB 30
+#define BOOKE_PAGESZ_2TB 31
+
+#define TLBIVAX_ALL 4
+#define TLBIVAX_TLB0 0
+#define TLBIVAX_TLB1 8
+
+#ifdef CONFIG_E500
+#ifndef __ASSEMBLY__
+extern void set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts, uint8_t esel, uint8_t tsize, uint8_t iprot);
+extern void disable_tlb(uint8_t esel);
+extern void invalidate_tlb(uint8_t tlb);
+extern void init_tlbs(void);
+extern int find_tlb_idx(void* addr, uint8_t tlbsel);
+extern void init_used_tlb_cams(void);
+extern int find_free_tlbcam(void);
+extern void print_tlbcam(void);
+
+extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
+extern void clear_ddr_tlbs(unsigned int memsize_in_meg);
+
+enum tlb_map_type
+{
+ TLB_MAP_RAM,
+ TLB_MAP_IO,
+};
+
+extern uint64_t tlb_map_range(ulong_t v_addr, phys_addr_t p_addr, uint64_t size, enum tlb_map_type map_type);
+
+extern void write_tlb(uint32_t _mas0, uint32_t _mas1, uint32_t _mas2, uint32_t _mas3, uint32_t _mas7);
+
+#define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, _iprot) \
+ { \
+ .mas0 = FSL_BOOKE_MAS0(_tlb, _esel, 0), \
+ .mas1 = FSL_BOOKE_MAS1(1, _iprot, 0, _ts, _sz), \
+ .mas2 = FSL_BOOKE_MAS2(_epn, _wimge), \
+ .mas3 = FSL_BOOKE_MAS3(_rpn, 0, _perms), \
+ .mas7 = FSL_BOOKE_MAS7(_rpn), \
+ }
+
+struct fsl_e_tlb_entry
+{
+ uint32_t mas0;
+ uint32_t mas1;
+ uint32_t mas2;
+ uint32_t mas3;
+ uint32_t mas7;
+};
+
+extern struct fsl_e_tlb_entry tlb_table[];
+extern int num_tlb_entries;
+#endif
+#endif
+
+#ifdef CONFIG_E300
+#define LAWAR_EN 0x80000000
+#define LAWAR_SIZE 0x0000003F
+
+#define LAWAR_TRGT_IF_PCI 0x00000000
+#define LAWAR_TRGT_IF_PCI1 0x00000000
+#define LAWAR_TRGT_IF_PCIX 0x00000000
+#define LAWAR_TRGT_IF_PCI2 0x00100000
+#define LAWAR_TRGT_IF_PCIE1 0x00200000
+#define LAWAR_TRGT_IF_PCIE2 0x00100000
+#define LAWAR_TRGT_IF_PCIE3 0x00300000
+#define LAWAR_TRGT_IF_LBC 0x00400000
+#define LAWAR_TRGT_IF_CCSR 0x00800000
+#define LAWAR_TRGT_IF_DDR_INTERLEAVED 0x00B00000
+#define LAWAR_TRGT_IF_RIO 0x00c00000
+#define LAWAR_TRGT_IF_DDR 0x00f00000
+#define LAWAR_TRGT_IF_DDR1 0x00f00000
+#define LAWAR_TRGT_IF_DDR2 0x01600000
+
+#define LAWAR_SIZE_BASE 0xa
+#define LAWAR_SIZE_4K (LAWAR_SIZE_BASE + 1)
+#define LAWAR_SIZE_8K (LAWAR_SIZE_BASE + 2)
+#define LAWAR_SIZE_16K (LAWAR_SIZE_BASE + 3)
+#define LAWAR_SIZE_32K (LAWAR_SIZE_BASE + 4)
+#define LAWAR_SIZE_64K (LAWAR_SIZE_BASE + 5)
+#define LAWAR_SIZE_128K (LAWAR_SIZE_BASE + 6)
+#define LAWAR_SIZE_256K (LAWAR_SIZE_BASE + 7)
+#define LAWAR_SIZE_512K (LAWAR_SIZE_BASE + 8)
+#define LAWAR_SIZE_1M (LAWAR_SIZE_BASE + 9)
+#define LAWAR_SIZE_2M (LAWAR_SIZE_BASE + 10)
+#define LAWAR_SIZE_4M (LAWAR_SIZE_BASE + 11)
+#define LAWAR_SIZE_8M (LAWAR_SIZE_BASE + 12)
+#define LAWAR_SIZE_16M (LAWAR_SIZE_BASE + 13)
+#define LAWAR_SIZE_32M (LAWAR_SIZE_BASE + 14)
+#define LAWAR_SIZE_64M (LAWAR_SIZE_BASE + 15)
+#define LAWAR_SIZE_128M (LAWAR_SIZE_BASE + 16)
+#define LAWAR_SIZE_256M (LAWAR_SIZE_BASE + 17)
+#define LAWAR_SIZE_512M (LAWAR_SIZE_BASE + 18)
+#define LAWAR_SIZE_1G (LAWAR_SIZE_BASE + 19)
+#define LAWAR_SIZE_2G (LAWAR_SIZE_BASE + 20)
+#define LAWAR_SIZE_4G (LAWAR_SIZE_BASE + 21)
+#define LAWAR_SIZE_8G (LAWAR_SIZE_BASE + 22)
+#define LAWAR_SIZE_16G (LAWAR_SIZE_BASE + 23)
+#define LAWAR_SIZE_32G (LAWAR_SIZE_BASE + 24)
+#endif
+
+#ifdef CONFIG_440
+/* General */
+#define TLB_VALID 0x00000200
+
+/* Supported page sizes */
+
+#define SZ_1K 0x00000000
+#define SZ_4K 0x00000010
+#define SZ_16K 0x00000020
+#define SZ_64K 0x00000030
+#define SZ_256K 0x00000040
+#define SZ_1M 0x00000050
+#define SZ_16M 0x00000070
+#define SZ_256M 0x00000090
+
+/* Storage attributes */
+#define SA_W 0x00000800 /* Write-through */
+#define SA_I 0x00000400 /* Caching inhibited */
+#define SA_M 0x00000200 /* Memory coherence */
+#define SA_G 0x00000100 /* Guarded */
+#define SA_E 0x00000080 /* Endian */
+/* Some additional macros for combinations often used */
+#define SA_IG (SA_I | SA_G)
+
+/* Access control */
+#define AC_X 0x00000024 /* Execute */
+#define AC_W 0x00000012 /* Write */
+#define AC_R 0x00000009 /* Read */
+/* Some additional macros for combinations often used */
+#define AC_RW (AC_R | AC_W)
+#define AC_RWX (AC_R | AC_W | AC_X)
+
+/* Some handy macros */
+
+#define EPN(e) ((e)&0xfffffc00)
+#define TLB0(epn, sz) ((EPN((epn)) | (sz) | TLB_VALID))
+#define TLB1(rpn, erpn) (((rpn)&0xfffffc00) | (erpn))
+#define TLB2(a) ((a)&0x00000fbf)
+
+#define tlbtab_start \
+ mflr r1; \
+ bl 0f;
+
+#define tlbtab_end \
+ .long 0, 0, 0; \
+ 0 : mflr r0; \
+ mtlr r1; \
+ blr;
+
+#define tlbentry(epn, sz, rpn, erpn, attr) \
+ .long TLB0(epn, sz), TLB1(rpn, erpn), TLB2(attr)
+
+/*----------------------------------------------------------------------------+
+| TLB specific defines.
++----------------------------------------------------------------------------*/
+#define TLB_256MB_ALIGN_MASK 0xFF0000000ULL
+#define TLB_16MB_ALIGN_MASK 0xFFF000000ULL
+#define TLB_1MB_ALIGN_MASK 0xFFFF00000ULL
+#define TLB_256KB_ALIGN_MASK 0xFFFFC0000ULL
+#define TLB_64KB_ALIGN_MASK 0xFFFFF0000ULL
+#define TLB_16KB_ALIGN_MASK 0xFFFFFC000ULL
+#define TLB_4KB_ALIGN_MASK 0xFFFFFF000ULL
+#define TLB_1KB_ALIGN_MASK 0xFFFFFFC00ULL
+#define TLB_256MB_SIZE 0x10000000
+#define TLB_16MB_SIZE 0x01000000
+#define TLB_1MB_SIZE 0x00100000
+#define TLB_256KB_SIZE 0x00040000
+#define TLB_64KB_SIZE 0x00010000
+#define TLB_16KB_SIZE 0x00004000
+#define TLB_4KB_SIZE 0x00001000
+#define TLB_1KB_SIZE 0x00000400
+
+#define TLB_WORD0_EPN_MASK 0xFFFFFC00
+#define TLB_WORD0_EPN_ENCODE(n) (((unsigned long)(n)) & 0xFFFFFC00)
+#define TLB_WORD0_EPN_DECODE(n) (((unsigned long)(n)) & 0xFFFFFC00)
+#define TLB_WORD0_V_MASK 0x00000200
+#define TLB_WORD0_V_ENABLE 0x00000200
+#define TLB_WORD0_V_DISABLE 0x00000000
+#define TLB_WORD0_TS_MASK 0x00000100
+#define TLB_WORD0_TS_1 0x00000100
+#define TLB_WORD0_TS_0 0x00000000
+#define TLB_WORD0_SIZE_MASK 0x000000F0
+#define TLB_WORD0_SIZE_1KB 0x00000000
+#define TLB_WORD0_SIZE_4KB 0x00000010
+#define TLB_WORD0_SIZE_16KB 0x00000020
+#define TLB_WORD0_SIZE_64KB 0x00000030
+#define TLB_WORD0_SIZE_256KB 0x00000040
+#define TLB_WORD0_SIZE_1MB 0x00000050
+#define TLB_WORD0_SIZE_16MB 0x00000070
+#define TLB_WORD0_SIZE_256MB 0x00000090
+#define TLB_WORD0_TPAR_MASK 0x0000000F
+#define TLB_WORD0_TPAR_ENCODE(n) ((((unsigned long)(n)) & 0x0F) << 0)
+#define TLB_WORD0_TPAR_DECODE(n) ((((unsigned long)(n)) >> 0) & 0x0F)
+
+#define TLB_WORD1_RPN_MASK 0xFFFFFC00
+#define TLB_WORD1_RPN_ENCODE(n) (((unsigned long)(n)) & 0xFFFFFC00)
+#define TLB_WORD1_RPN_DECODE(n) (((unsigned long)(n)) & 0xFFFFFC00)
+#define TLB_WORD1_PAR1_MASK 0x00000300
+#define TLB_WORD1_PAR1_ENCODE(n) ((((unsigned long)(n)) & 0x03) << 8)
+#define TLB_WORD1_PAR1_DECODE(n) ((((unsigned long)(n)) >> 8) & 0x03)
+#define TLB_WORD1_PAR1_0 0x00000000
+#define TLB_WORD1_PAR1_1 0x00000100
+#define TLB_WORD1_PAR1_2 0x00000200
+#define TLB_WORD1_PAR1_3 0x00000300
+#define TLB_WORD1_ERPN_MASK 0x0000000F
+#define TLB_WORD1_ERPN_ENCODE(n) ((((unsigned long)(n)) & 0x0F) << 0)
+#define TLB_WORD1_ERPN_DECODE(n) ((((unsigned long)(n)) >> 0) & 0x0F)
+
+#define TLB_WORD2_PAR2_MASK 0xC0000000
+#define TLB_WORD2_PAR2_ENCODE(n) ((((unsigned long)(n)) & 0x03) << 30)
+#define TLB_WORD2_PAR2_DECODE(n) ((((unsigned long)(n)) >> 30) & 0x03)
+#define TLB_WORD2_PAR2_0 0x00000000
+#define TLB_WORD2_PAR2_1 0x40000000
+#define TLB_WORD2_PAR2_2 0x80000000
+#define TLB_WORD2_PAR2_3 0xC0000000
+#define TLB_WORD2_U0_MASK 0x00008000
+#define TLB_WORD2_U0_ENABLE 0x00008000
+#define TLB_WORD2_U0_DISABLE 0x00000000
+#define TLB_WORD2_U1_MASK 0x00004000
+#define TLB_WORD2_U1_ENABLE 0x00004000
+#define TLB_WORD2_U1_DISABLE 0x00000000
+#define TLB_WORD2_U2_MASK 0x00002000
+#define TLB_WORD2_U2_ENABLE 0x00002000
+#define TLB_WORD2_U2_DISABLE 0x00000000
+#define TLB_WORD2_U3_MASK 0x00001000
+#define TLB_WORD2_U3_ENABLE 0x00001000
+#define TLB_WORD2_U3_DISABLE 0x00000000
+#define TLB_WORD2_W_MASK 0x00000800
+#define TLB_WORD2_W_ENABLE 0x00000800
+#define TLB_WORD2_W_DISABLE 0x00000000
+#define TLB_WORD2_I_MASK 0x00000400
+#define TLB_WORD2_I_ENABLE 0x00000400
+#define TLB_WORD2_I_DISABLE 0x00000000
+#define TLB_WORD2_M_MASK 0x00000200
+#define TLB_WORD2_M_ENABLE 0x00000200
+#define TLB_WORD2_M_DISABLE 0x00000000
+#define TLB_WORD2_G_MASK 0x00000100
+#define TLB_WORD2_G_ENABLE 0x00000100
+#define TLB_WORD2_G_DISABLE 0x00000000
+#define TLB_WORD2_E_MASK 0x00000080
+#define TLB_WORD2_E_ENABLE 0x00000080
+#define TLB_WORD2_E_DISABLE 0x00000000
+#define TLB_WORD2_UX_MASK 0x00000020
+#define TLB_WORD2_UX_ENABLE 0x00000020
+#define TLB_WORD2_UX_DISABLE 0x00000000
+#define TLB_WORD2_UW_MASK 0x00000010
+#define TLB_WORD2_UW_ENABLE 0x00000010
+#define TLB_WORD2_UW_DISABLE 0x00000000
+#define TLB_WORD2_UR_MASK 0x00000008
+#define TLB_WORD2_UR_ENABLE 0x00000008
+#define TLB_WORD2_UR_DISABLE 0x00000000
+#define TLB_WORD2_SX_MASK 0x00000004
+#define TLB_WORD2_SX_ENABLE 0x00000004
+#define TLB_WORD2_SX_DISABLE 0x00000000
+#define TLB_WORD2_SW_MASK 0x00000002
+#define TLB_WORD2_SW_ENABLE 0x00000002
+#define TLB_WORD2_SW_DISABLE 0x00000000
+#define TLB_WORD2_SR_MASK 0x00000001
+#define TLB_WORD2_SR_ENABLE 0x00000001
+#define TLB_WORD2_SR_DISABLE 0x00000000
+
+/*----------------------------------------------------------------------------+
+| Following instructions are not available in Book E mode of the GNU assembler.
++----------------------------------------------------------------------------*/
+#define DCCCI(ra, rb) .long 0x7c000000 | \
+ (ra << 16) | (rb << 11) | (454 << 1)
+
+#define ICCCI(ra, rb) .long 0x7c000000 | \
+ (ra << 16) | (rb << 11) | (966 << 1)
+
+#define DCREAD(rt, ra, rb) .long 0x7c000000 | (rt << 21) | (ra << 16) | (rb << 11) | (486 << 1)
+
+#define ICREAD(ra, rb) .long 0x7c000000 | \
+ (ra << 16) | (rb << 11) | (998 << 1)
+
+#define TLBSX(rt, ra, rb) .long 0x7c000000 | (rt << 21) | (ra << 16) | (rb << 11) | (914 << 1)
+
+#define TLBWE(rs, ra, ws) .long 0x7c000000 | (rs << 21) | (ra << 16) | (ws << 11) | (978 << 1)
+
+#define TLBRE(rt, ra, ws) .long 0x7c000000 | (rt << 21) | (ra << 16) | (ws << 11) | (946 << 1)
+
+#define TLBSXDOT(rt, ra, rb) .long 0x7c000001 | (rt << 21) | (ra << 16) | (rb << 11) | (914 << 1)
+
+#define MSYNC .long 0x7c000000 | \
+ (598 << 1)
+
+#define MBAR_INST .long 0x7c000000 | \
+ (854 << 1)
+
+#ifndef __ASSEMBLY__
+/* Prototypes */
+void mttlb1(unsigned long index, unsigned long value);
+void mttlb2(unsigned long index, unsigned long value);
+void mttlb3(unsigned long index, unsigned long value);
+unsigned long mftlb1(unsigned long index);
+unsigned long mftlb2(unsigned long index);
+unsigned long mftlb3(unsigned long index);
+
+void program_tlb(uint64_t phys_addr, uint32_t virt_addr, uint32_t size, uint32_t tlb_word2_i_value);
+void remove_tlb(uint32_t vaddr, uint32_t size);
+void change_tlb(uint32_t vaddr, uint32_t size, uint32_t tlb_word2_i_value);
+#endif /* __ASSEMBLY__ */
+
+#endif /* CONFIG_440 */
+#endif /* _PPC_MMU_H_ */
diff --git a/lib/ppc64/processor.h b/lib/ppc64/processor.h
new file mode 100644
index 0000000..68711df
--- /dev/null
+++ b/lib/ppc64/processor.h
@@ -0,0 +1,1424 @@
+#ifndef __ASM_PPC_PROCESSOR_H
+#define __ASM_PPC_PROCESSOR_H
+
+/// ! @note The NeWS SoC is based on the e5500 core.
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l; })
+
+#define AAA_HACK_DISABLE
+#ifdef AAA_HACK_DISABLE
+/* warning this is just to make the compiler shut up.. It does not
+ match the definition in ptrace.h. So dont use this code. */
+struct pt_regs
+{
+ unsigned long nip;
+};
+
+#else
+#include <asm/ptrace.h>
+#include <asm/types.h>
+#endif
+
+/* Machine State Register (MSR) Fields */
+
+#ifdef CONFIG_PPC64BRIDGE
+#define MSR_SF (1 << 63)
+#define MSR_ISF (1 << 61)
+#endif /* CONFIG_PPC64BRIDGE */
+#define MSR_UCLE (1 << 26) /* User-mode cache lock enable (e500) */
+#define MSR_VEC (1 << 25) /* Enable AltiVec(74xx) */
+#define MSR_SPE (1 << 25) /* Enable SPE(e500) */
+#define MSR_POW (1 << 18) /* Enable Power Management */
+#define MSR_WE (1 << 18) /* Wait State Enable */
+#define MSR_TGPR (1 << 17) /* TLB Update registers in use */
+#define MSR_CE (1 << 17) /* Critical Interrupt Enable */
+#define MSR_ILE (1 << 16) /* Interrupt Little Endian */
+#define MSR_EE (1 << 15) /* External Interrupt Enable */
+#define MSR_PR (1 << 14) /* Problem State / Privilege Level */
+#define MSR_FP (1 << 13) /* Floating Point enable */
+#define MSR_ME (1 << 12) /* Machine Check Enable */
+#define MSR_FE0 (1 << 11) /* Floating Exception mode 0 */
+#define MSR_SE (1 << 10) /* Single Step */
+#define MSR_DWE (1 << 10) /* Debug Wait Enable (4xx) */
+#define MSR_UBLE (1 << 10) /* BTB lock enable (e500) */
+#define MSR_BE (1 << 9) /* Branch Trace */
+#define MSR_DE (1 << 9) /* Debug Exception Enable */
+#define MSR_FE1 (1 << 8) /* Floating Exception mode 1 */
+#define MSR_IP (1 << 6) /* Exception prefix 0x000/0xFFF */
+#define MSR_IR (1 << 5) /* Instruction Relocate */
+#define MSR_IS (1 << 5) /* Book E Instruction space */
+#define MSR_DR (1 << 4) /* Data Relocate */
+#define MSR_DS (1 << 4) /* Book E Data space */
+#define MSR_PE (1 << 3) /* Protection Enable */
+#define MSR_PX (1 << 2) /* Protection Exclusive Mode */
+#define MSR_PMM (1 << 2) /* Performance monitor mark bit (e500) */
+#define MSR_RI (1 << 1) /* Recoverable Exception */
+#define MSR_LE (1 << 0) /* Little Endian */
+
+#ifdef CONFIG_APUS_FAST_EXCEPT
+#define MSR_ MSR_ME | MSR_IP | MSR_RI
+#else
+#define MSR_ MSR_ME | MSR_RI
+#endif
+#ifndef CONFIG_E500
+#define MSR_KERNEL MSR_ | MSR_IR | MSR_DR
+#else
+#define MSR_KERNEL MSR_ME
+#endif
+
+/* Floating Point Status and Control Register (FPSCR) Fields */
+
+#define FPSCR_FX 0x80000000 /* FPU exception summary */
+#define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */
+#define FPSCR_VX 0x20000000 /* Invalid operation summary */
+#define FPSCR_OX 0x10000000 /* Overflow exception summary */
+#define FPSCR_UX 0x08000000 /* Underflow exception summary */
+#define FPSCR_ZX 0x04000000 /* Zero-devide exception summary */
+#define FPSCR_XX 0x02000000 /* Inexact exception summary */
+#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */
+#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */
+#define FPSCR_VXIDI 0x00400000 /* Invalid op for Inv / Inv */
+#define FPSCR_VXZDZ 0x00200000 /* Invalid op for Zero / Zero */
+#define FPSCR_VXIMZ 0x00100000 /* Invalid op for Inv * Zero */
+#define FPSCR_VXVC 0x00080000 /* Invalid op for Compare */
+#define FPSCR_FR 0x00040000 /* Fraction rounded */
+#define FPSCR_FI 0x00020000 /* Fraction inexact */
+#define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */
+#define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */
+#define FPSCR_VXSOFT 0x00000400 /* Invalid op for software request */
+#define FPSCR_VXSQRT 0x00000200 /* Invalid op for square root */
+#define FPSCR_VXCVI 0x00000100 /* Invalid op for integer convert */
+#define FPSCR_VE 0x00000080 /* Invalid op exception enable */
+#define FPSCR_OE 0x00000040 /* IEEE overflow exception enable */
+#define FPSCR_UE 0x00000020 /* IEEE underflow exception enable */
+#define FPSCR_ZE 0x00000010 /* IEEE zero divide exception enable */
+#define FPSCR_XE 0x00000008 /* FP inexact exception enable */
+#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */
+#define FPSCR_RN 0x00000003 /* FPU rounding control */
+
+/* Special Purpose Registers (SPRNs)*/
+
+/* PPC440 Architecture is BOOK-E */
+#ifdef CONFIG_440
+#define CONFIG_BOOKE
+#endif
+
+#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */
+#ifdef CONFIG_BOOKE
+#define SPRN_CCR1 0x378 /* Core Configuration Register for 440 only */
+#endif
+#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */
+#define SPRN_CTR 0x009 /* Count Register */
+#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
+#ifndef CONFIG_BOOKE
+#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */
+#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */
+#else
+#define SPRN_DAC1 0x13C /* Book E Data Address Compare 1 */
+#define SPRN_DAC2 0x13D /* Book E Data Address Compare 2 */
+#endif /* CONFIG_BOOKE */
+#define SPRN_DAR 0x013 /* Data Address Register */
+#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */
+#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */
+#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */
+#define SPRN_DBAT1U 0x21A /* Data BAT 1 Upper Register */
+#define SPRN_DBAT2L 0x21D /* Data BAT 2 Lower Register */
+#define SPRN_DBAT2U 0x21C /* Data BAT 2 Upper Register */
+#define SPRN_DBAT3L 0x21F /* Data BAT 3 Lower Register */
+#define SPRN_DBAT3U 0x21E /* Data BAT 3 Upper Register */
+#define SPRN_DBAT4L 0x239 /* Data BAT 4 Lower Register */
+#define SPRN_DBAT4U 0x238 /* Data BAT 4 Upper Register */
+#define SPRN_DBAT5L 0x23B /* Data BAT 5 Lower Register */
+#define SPRN_DBAT5U 0x23A /* Data BAT 5 Upper Register */
+#define SPRN_DBAT6L 0x23D /* Data BAT 6 Lower Register */
+#define SPRN_DBAT6U 0x23C /* Data BAT 6 Upper Register */
+#define SPRN_DBAT7L 0x23F /* Data BAT 7 Lower Register */
+#define SPRN_DBAT7U 0x23E /* Data BAT 7 Lower Register */
+#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */
+#define DBCR_EDM 0x80000000
+#define DBCR_IDM 0x40000000
+#define DBCR_RST(x) (((x)&0x3) << 28)
+#define DBCR_RST_NONE 0
+#define DBCR_RST_CORE 1
+#define DBCR_RST_CHIP 2
+#define DBCR_RST_SYSTEM 3
+#define DBCR_IC 0x08000000 /* Instruction Completion Debug Evnt */
+#define DBCR_BT 0x04000000 /* Branch Taken Debug Event */
+#define DBCR_EDE 0x02000000 /* Exception Debug Event */
+#define DBCR_TDE 0x01000000 /* TRAP Debug Event */
+#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */
+#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */
+#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */
+#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */
+#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */
+#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */
+#define DBCR_D1S(x) (((x)&0x3) << 12) /* Data Adrr. Compare 1 Size */
+#define DAC_BYTE 0
+#define DAC_HALF 1
+#define DAC_WORD 2
+#define DAC_QUAD 3
+#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */
+#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */
+#define DBCR_D2S(x) (((x)&0x3) << 8) /* Data Addr. Compare 2 Size */
+#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */
+#define DBCR_SED 0x00000020 /* Second Exception Debug Event */
+#define DBCR_STD 0x00000010 /* Second Trap Debug Event */
+#define DBCR_SIA 0x00000008 /* Second IAC Enable */
+#define DBCR_SDA 0x00000004 /* Second DAC Enable */
+#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */
+#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */
+#ifndef CONFIG_BOOKE
+#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */
+#else
+#define SPRN_DBCR0 0x134 /* Book E Debug Control Register 0 */
+#endif /* CONFIG_BOOKE */
+#ifndef CONFIG_BOOKE
+#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
+#define SPRN_DBSR 0x3F0 /* Debug Status Register */
+#else
+#define SPRN_DBCR1 0x135 /* Book E Debug Control Register 1 */
+#ifdef CONFIG_BOOKE
+#define SPRN_DBDR 0x3f3 /* Debug Data Register */
+#endif
+#define SPRN_DBSR 0x130 /* Book E Debug Status Register */
+#define DBSR_IC 0x08000000 /* Book E Instruction Completion */
+#define DBSR_TIE 0x01000000 /* Book E Trap Instruction Event */
+#endif /* CONFIG_BOOKE */
+#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
+#define DCCR_NOCACHE 0 /* Noncacheable */
+#define DCCR_CACHE 1 /* Cacheable */
+#ifndef CONFIG_BOOKE
+#define SPRN_DCDBTRL 0x39c /* Data Cache Debug Tag Register Low */
+#define SPRN_DCDBTRH 0x39d /* Data Cache Debug Tag Register High */
+#endif
+#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */
+#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */
+#define DCWR_COPY 0 /* Copy-back */
+#define DCWR_WRITE 1 /* Write-through */
+#ifndef CONFIG_BOOKE
+#define SPRN_DEAR 0x3D5 /* Data Error Address Register */
+#else
+#define SPRN_DEAR 0x03D /* Book E Data Error Address Register */
+#endif /* CONFIG_BOOKE */
+#define SPRN_DEC 0x016 /* Decrement Register */
+#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */
+#ifdef CONFIG_BOOKE
+#define SPRN_DNV0 0x390 /* Data Cache Normal Victim 0 */
+#define SPRN_DNV1 0x391 /* Data Cache Normal Victim 1 */
+#define SPRN_DNV2 0x392 /* Data Cache Normal Victim 2 */
+#define SPRN_DNV3 0x393 /* Data Cache Normal Victim 3 */
+#endif
+#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
+#ifdef CONFIG_BOOKE
+#define SPRN_DTV0 0x394 /* Data Cache Transient Victim 0 */
+#define SPRN_DTV1 0x395 /* Data Cache Transient Victim 1 */
+#define SPRN_DTV2 0x396 /* Data Cache Transient Victim 2 */
+#define SPRN_DTV3 0x397 /* Data Cache Transient Victim 3 */
+#define SPRN_DVLIM 0x398 /* Data Cache Victim Limit */
+#endif
+#define SPRN_EAR 0x11A /* External Address Register */
+#ifndef CONFIG_BOOKE
+#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
+#else
+#define SPRN_ESR 0x03E /* Book E Exception Syndrome Register */
+#endif /* CONFIG_BOOKE */
+#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */
+#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */
+#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */
+#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */
+#define ESR_PIL 0x08000000 /* Program Exception - Illegal */
+#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */
+#define ESR_PTR 0x02000000 /* Program Exception - Trap */
+#define ESR_DST 0x00800000 /* Storage Exception - Data miss */
+#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */
+#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
+#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
+#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
+#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */
+
+#define HID0_ICE_SHIFT 15
+#define HID0_DCE_SHIFT 14
+#define HID0_DLOCK_SHIFT 12
+
+#define HID0_EMCP (1 << 31) /* Enable Machine Check pin */
+#define HID0_EBA (1 << 29) /* Enable Bus Address Parity */
+#define HID0_EBD (1 << 28) /* Enable Bus Data Parity */
+#define HID0_SBCLK (1 << 27)
+#define HID0_EICE (1 << 26)
+#define HID0_ECLK (1 << 25)
+#define HID0_PAR (1 << 24)
+#define HID0_DOZE (1 << 23)
+#define HID0_NAP (1 << 22)
+#define HID0_SLEEP (1 << 21)
+#define HID0_DPM (1 << 20)
+#define HID0_ICE (1 << HID0_ICE_SHIFT) /* Instruction Cache Enable */
+#define HID0_DCE (1 << HID0_DCE_SHIFT) /* Data Cache Enable */
+#define HID0_TBEN (1 << 14) /* Time Base Enable */
+#define HID0_ILOCK (1 << 13) /* Instruction Cache Lock */
+#define HID0_DLOCK (1 << HID0_DLOCK_SHIFT) /* Data Cache Lock */
+#define HID0_ICFI (1 << 11) /* Instr. Cache Flash Invalidate */
+#define HID0_DCFI (1 << 10) /* Data Cache Flash Invalidate */
+#define HID0_DCI HID0_DCFI
+#define HID0_SPD (1 << 9) /* Speculative disable */
+#define HID0_ENMAS7 (1 << 7) /* Enable MAS7 Update for 36-bit phys */
+#define HID0_SGE (1 << 7) /* Store Gathering Enable */
+#define HID0_SIED HID_SGE /* Serial Instr. Execution [Disable] */
+#define HID0_DCFA (1 << 6) /* Data Cache Flush Assist */
+#define HID0_BTIC (1 << 5) /* Branch Target Instruction Cache Enable */
+#define HID0_ABE (1 << 3) /* Address Broadcast Enable */
+#define HID0_BHTE (1 << 2) /* Branch History Table Enable */
+#define HID0_BTCD (1 << 1) /* Branch target cache disable */
+#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
+#define HID1_RFXE (1 << 17) /* Read Fault Exception Enable */
+#define HID1_ASTME (1 << 13) /* Address bus streaming mode */
+#define HID1_ABE (1 << 12) /* Address broadcast enable */
+#define HID1_MBDD (1 << 6) /* optimized sync instruction */
+#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
+#ifndef CONFIG_BOOKE
+#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */
+#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */
+#else
+#define SPRN_IAC1 0x138 /* Book E Instruction Address Compare 1 */
+#define SPRN_IAC2 0x139 /* Book E Instruction Address Compare 2 */
+#endif /* CONFIG_BOOKE */
+#define SPRN_IBAT0L 0x211 /* Instruction BAT 0 Lower Register */
+#define SPRN_IBAT0U 0x210 /* Instruction BAT 0 Upper Register */
+#define SPRN_IBAT1L 0x213 /* Instruction BAT 1 Lower Register */
+#define SPRN_IBAT1U 0x212 /* Instruction BAT 1 Upper Register */
+#define SPRN_IBAT2L 0x215 /* Instruction BAT 2 Lower Register */
+#define SPRN_IBAT2U 0x214 /* Instruction BAT 2 Upper Register */
+#define SPRN_IBAT3L 0x217 /* Instruction BAT 3 Lower Register */
+#define SPRN_IBAT3U 0x216 /* Instruction BAT 3 Upper Register */
+#define SPRN_IBAT4L 0x231 /* Instruction BAT 4 Lower Register */
+#define SPRN_IBAT4U 0x230 /* Instruction BAT 4 Upper Register */
+#define SPRN_IBAT5L 0x233 /* Instruction BAT 5 Lower Register */
+#define SPRN_IBAT5U 0x232 /* Instruction BAT 5 Upper Register */
+#define SPRN_IBAT6L 0x235 /* Instruction BAT 6 Lower Register */
+#define SPRN_IBAT6U 0x234 /* Instruction BAT 6 Upper Register */
+#define SPRN_IBAT7L 0x237 /* Instruction BAT 7 Lower Register */
+#define SPRN_IBAT7U 0x236 /* Instruction BAT 7 Upper Register */
+#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
+#define ICCR_NOCACHE 0 /* Noncacheable */
+#define ICCR_CACHE 1 /* Cacheable */
+#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */
+#ifdef CONFIG_BOOKE
+#define SPRN_ICDBTRL 0x39e /* instruction cache debug tag register low */
+#define SPRN_ICDBTRH 0x39f /* instruction cache debug tag register high */
+#endif
+#define SPRN_ICMP 0x3D5 /* Instruction TLB Compare Register */
+#define SPRN_ICTC 0x3FB /* Instruction Cache Throttling Control Reg */
+#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */
+#define SPRN_IMMR 0x27E /* Internal Memory Map Register */
+#ifdef CONFIG_BOOKE
+#define SPRN_INV0 0x370 /* Instruction Cache Normal Victim 0 */
+#define SPRN_INV1 0x371 /* Instruction Cache Normal Victim 1 */
+#define SPRN_INV2 0x372 /* Instruction Cache Normal Victim 2 */
+#define SPRN_INV3 0x373 /* Instruction Cache Normal Victim 3 */
+#define SPRN_ITV0 0x374 /* Instruction Cache Transient Victim 0 */
+#define SPRN_ITV1 0x375 /* Instruction Cache Transient Victim 1 */
+#define SPRN_ITV2 0x376 /* Instruction Cache Transient Victim 2 */
+#define SPRN_ITV3 0x377 /* Instruction Cache Transient Victim 3 */
+#define SPRN_IVLIM 0x399 /* Instruction Cache Victim Limit */
+#endif
+#define SPRN_LDSTCR 0x3F8 /* Load/Store Control Register */
+#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
+#define SPRN_LR 0x008 /* Link Register */
+#define SPRN_MBAR 0x137 /* System memory base address */
+#define SPRN_MMCR0 0x3B8 /* Monitor Mode Control Register 0 */
+#define SPRN_MMCR1 0x3BC /* Monitor Mode Control Register 1 */
+#ifdef CONFIG_BOOKE
+#define SPRN_MMUCR 0x3b2 /* MMU Control Register */
+#endif
+#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */
+#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */
+#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */
+#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */
+#ifndef CONFIG_BOOKE
+#define SPRN_PID 0x3B1 /* Process ID */
+#define SPRN_PIR 0x3FF /* Processor Identification Register */
+#else
+#define SPRN_PID 0x030 /* Book E Process ID */
+#define SPRN_PIR 0x11E /* Book E Processor Identification Register */
+#endif /* CONFIG_BOOKE */
+#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
+#define SPRN_PMC1 0x3B9 /* Performance Counter Register 1 */
+#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */
+#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */
+#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */
+#define SPRN_PVR 0x11F /* Processor Version Register */
+#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
+#ifdef CONFIG_BOOKE
+#define SPRN_RSTCFG 0x39b /* Reset Configuration */
+#endif
+#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
+#define SPRN_SDR1 0x019 /* MMU Hash Base Register */
+#define SPRN_SGR 0x3B9 /* Storage Guarded Register */
+#define SGR_NORMAL 0
+#define SGR_GUARDED 1
+#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */
+#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */
+#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */
+#define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */
+#define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */
+#define SPRN_SPRG4 0x114 /* Special Purpose Register General 4 */
+#define SPRN_SPRG5 0x115 /* Special Purpose Register General 5 */
+#define SPRN_SPRG6 0x116 /* Special Purpose Register General 6 */
+#define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */
+#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */
+#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */
+#define SPRN_SRR2 0x3DE /* Save/Restore Register 2 */
+#define SPRN_SRR3 0x3DF /* Save/Restore Register 3 */
+
+#ifdef CONFIG_BOOKE
+#define SPRN_SVR 0x3FF /* System Version Register */
+#else
+#define SPRN_SVR 0x11E /* System Version Register */
+#endif
+#define SPRN_TBHI 0x3DC /* Time Base High */
+#define SPRN_TBHU 0x3CC /* Time Base High User-mode */
+#define SPRN_TBLO 0x3DD /* Time Base Low */
+#define SPRN_TBLU 0x3CD /* Time Base Low User-mode */
+#define SPRN_TBRL 0x10C /* Time Base Read Lower Register */
+#define SPRN_TBRU 0x10D /* Time Base Read Upper Register */
+#define SPRN_TBWL 0x11C /* Time Base Write Lower Register */
+#define SPRN_TBWU 0x11D /* Time Base Write Upper Register */
+#ifndef CONFIG_BOOKE
+#define SPRN_TCR 0x3DA /* Timer Control Register */
+#else
+#define SPRN_TCR 0x154 /* Book E Timer Control Register */
+#endif /* CONFIG_BOOKE */
+#ifdef CONFIG_E500MC
+#define TCR_WP(x) (((64 - x) & 0x3) << 30) | \
+ (((64 - x) & 0x3c) << 15) /* WDT Period 2^x clocks*/
+#else
+#define TCR_WP(x) (((x)&0x3) << 30) /* WDT Period */
+#define WP_2_17 0 /* 2^17 clocks */
+#define WP_2_21 1 /* 2^21 clocks */
+#define WP_2_25 2 /* 2^25 clocks */
+#define WP_2_29 3 /* 2^29 clocks */
+#endif /* CONFIG_E500 */
+#define TCR_WRC(x) (((x)&0x3) << 28) /* WDT Reset Control */
+#define WRC_NONE 0 /* No reset will occur */
+#define WRC_CORE 1 /* Core reset will occur */
+#define WRC_CHIP 2 /* Chip reset will occur */
+#define WRC_SYSTEM 3 /* System reset will occur */
+#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */
+#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */
+#define TCR_FP(x) (((x)&0x3) << 24) /* FIT Period */
+#define FP_2_9 0 /* 2^9 clocks */
+#define FP_2_13 1 /* 2^13 clocks */
+#define FP_2_17 2 /* 2^17 clocks */
+#define FP_2_21 3 /* 2^21 clocks */
+#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */
+#define TCR_ARE 0x00400000 /* Auto Reload Enable */
+#define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */
+#define THRM1_TIN (1 << 0)
+#define THRM1_TIV (1 << 1)
+#define THRM1_THRES (0x7f << 2)
+#define THRM1_TID (1 << 29)
+#define THRM1_TIE (1 << 30)
+#define THRM1_V (1 << 31)
+#define SPRN_THRM2 0x3FD /* Thermal Management Register 2 */
+#define SPRN_THRM3 0x3FE /* Thermal Management Register 3 */
+#define THRM3_E (1 << 31)
+#define SPRN_TLBMISS 0x3D4 /* 980 7450 TLB Miss Register */
+#ifndef CONFIG_BOOKE
+#define SPRN_TSR 0x3D8 /* Timer Status Register */
+#else
+#define SPRN_TSR 0x150 /* Book E Timer Status Register */
+#endif /* CONFIG_BOOKE */
+#define TSR_ENW 0x80000000 /* Enable Next Watchdog */
+#define TSR_WIS 0x40000000 /* WDT Interrupt Status */
+#define TSR_WRS(x) (((x)&0x3) << 28) /* WDT Reset Status */
+#define WRS_NONE 0 /* No WDT reset occurred */
+#define WRS_CORE 1 /* WDT forced core reset */
+#define WRS_CHIP 2 /* WDT forced chip reset */
+#define WRS_SYSTEM 3 /* WDT forced system reset */
+#define TSR_PIS 0x08000000 /* PIT Interrupt Status */
+#define TSR_FIS 0x04000000 /* FIT Interrupt Status */
+#define SPRN_UMMCR0 0x3A8 /* User Monitor Mode Control Register 0 */
+#define SPRN_UMMCR1 0x3AC /* User Monitor Mode Control Register 0 */
+#define SPRN_UPMC1 0x3A9 /* User Performance Counter Register 1 */
+#define SPRN_UPMC2 0x3AA /* User Performance Counter Register 2 */
+#define SPRN_UPMC3 0x3AD /* User Performance Counter Register 3 */
+#define SPRN_UPMC4 0x3AE /* User Performance Counter Register 4 */
+#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */
+#define SPRN_XER 0x001 /* Fixed Point Exception Register */
+#define SPRN_ZPR 0x3B0 /* Zone Protection Register */
+
+/* Book E definitions */
+#define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */
+#define SPRN_CSRR0 0x03A /* Critical SRR0 */
+#define SPRN_CSRR1 0x03B /* Critical SRR0 */
+#define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */
+#define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */
+#define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */
+#define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */
+#define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */
+#define SPRN_SPRG7R 0x107 /* Special Purpose Register General 7 Read */
+#define SPRN_SPRG4W 0x114 /* Special Purpose Register General 4 Write */
+#define SPRN_SPRG5W 0x115 /* Special Purpose Register General 5 Write */
+#define SPRN_SPRG6W 0x116 /* Special Purpose Register General 6 Write */
+#define SPRN_SPRG7W 0x117 /* Special Purpose Register General 7 Write */
+#define SPRN_DBCR2 0x136 /* Debug Control Register 2 */
+#define SPRN_IAC3 0x13A /* Instruction Address Compare 3 */
+#define SPRN_IAC4 0x13B /* Instruction Address Compare 4 */
+#define SPRN_DVC1 0x13E /* Data Value Compare Register 1 */
+#define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */
+#define SPRN_IVOR0 0x190 /* Interrupt Vector Offset Register 0 */
+#define SPRN_IVOR1 0x191 /* Interrupt Vector Offset Register 1 */
+#define SPRN_IVOR2 0x192 /* Interrupt Vector Offset Register 2 */
+#define SPRN_IVOR3 0x193 /* Interrupt Vector Offset Register 3 */
+#define SPRN_IVOR4 0x194 /* Interrupt Vector Offset Register 4 */
+#define SPRN_IVOR5 0x195 /* Interrupt Vector Offset Register 5 */
+#define SPRN_IVOR6 0x196 /* Interrupt Vector Offset Register 6 */
+#define SPRN_IVOR7 0x197 /* Interrupt Vector Offset Register 7 */
+#define SPRN_IVOR8 0x198 /* Interrupt Vector Offset Register 8 */
+#define SPRN_IVOR9 0x199 /* Interrupt Vector Offset Register 9 */
+#define SPRN_IVOR10 0x19a /* Interrupt Vector Offset Register 10 */
+#define SPRN_IVOR11 0x19b /* Interrupt Vector Offset Register 11 */
+#define SPRN_IVOR12 0x19c /* Interrupt Vector Offset Register 12 */
+#define SPRN_IVOR13 0x19d /* Interrupt Vector Offset Register 13 */
+#define SPRN_IVOR14 0x19e /* Interrupt Vector Offset Register 14 */
+#define SPRN_IVOR15 0x19f /* Interrupt Vector Offset Register 15 */
+#define SPRN_IVOR38 0x1b0 /* Interrupt Vector Offset Register 38 */
+#define SPRN_IVOR39 0x1b1 /* Interrupt Vector Offset Register 39 */
+#define SPRN_IVOR40 0x1b2 /* Interrupt Vector Offset Register 40 */
+#define SPRN_IVOR41 0x1b3 /* Interrupt Vector Offset Register 41 */
+#define SPRN_GIVOR2 0x1b8 /* Guest Interrupt Vector Offset Register 2 */
+#define SPRN_GIVOR3 0x1b9 /* Guest Interrupt Vector Offset Register 3 */
+#define SPRN_GIVOR4 0x1ba /* Guest Interrupt Vector Offset Register 4 */
+#define SPRN_GIVOR8 0x1bb /* Guest Interrupt Vector Offset Register 8 */
+#define SPRN_GIVOR13 0x1bc /* Guest Interrupt Vector Offset Register 13 */
+#define SPRN_GIVOR14 0x1bd /* Guest Interrupt Vector Offset Register 14 */
+
+/* e500 definitions */
+#define SPRN_L1CFG0 0x203 /* L1 Cache Configuration Register 0 */
+#define SPRN_L1CFG1 0x204 /* L1 Cache Configuration Register 1 */
+#define SPRN_L2CFG0 0x207 /* L2 Cache Configuration Register 0 */
+#define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */
+#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */
+#define L1CSR0_CUL 0x00000400 /* (D-)Cache Unable to Lock */
+#define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */
+#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */
+#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */
+#define SPRN_L1CSR1 0x3f3 /* L1 Instruction Cache Control and Status Register 1 */
+#define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */
+#define L1CSR1_ICUL 0x00000400 /* I-Cache Unable to Lock */
+#define L1CSR1_ICLFR 0x00000100 /* I-Cache Lock Flash Reset */
+#define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */
+#define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */
+#define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */
+#define L1CSR2_DCWS 0x40000000 /* Data Cache Write Shadow */
+#define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */
+#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */
+#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */
+#define L2CSR0_L2WP 0x1c000000 /* L2 I/D Way Partioning */
+#define L2CSR0_L2CM 0x03000000 /* L2 Cache Coherency Mode */
+#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */
+#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */
+#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */
+#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */
+
+/* e6500 */
+#define L2CSR0_L2REP_SPLRUAGE 0x00000000 /* L2REP Streaming PLRU with Aging */
+#define L2CSR0_L2REP_FIFO 0x00001000 /* L2REP FIFO */
+#define L2CSR0_L2REP_SPLRU 0x00002000 /* L2REP Streaming PLRU */
+#define L2CSR0_L2REP_PLRU 0x00003000 /* L2REP PLRU */
+
+#define L2CSR0_L2REP_MODE L2CSR0_L2REP_SPLRUAGE
+
+#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */
+#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */
+#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */
+#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */
+#define SPRN_L2CSR1 0x3fa /* L2 Data Cache Control and Status Register 1 */
+
+#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */
+#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */
+#define TLBnCFG_NENTRY_MASK 0x00000fff
+#define SPRN_TLB0PS 0x158 /* TLB 0 Page Size Register */
+#define SPRN_TLB1PS 0x159 /* TLB 1 Page Size Register */
+#define SPRN_MMUCSR0 0x3f4 /* MMU control and status register 0 */
+#define SPRN_MMUCFG 0x3F7 /* MMU Configuration Register */
+#define MMUCFG_MAVN 0x00000003 /* MMU Architecture Version Number */
+#define MMUCFG_MAVN_V1 0x00000000 /* v1.0 */
+#define MMUCFG_MAVN_V2 0x00000001 /* v2.0 */
+#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
+#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */
+#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
+#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */
+#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
+#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
+#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
+#define SPRN_MAS7 0x3B0 /* MMU Assist Register 7 */
+#define SPRN_MAS8 0x155 /* MMU Assist Register 8 */
+
+#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */
+#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */
+#define SPRN_IVOR34 0x212 /* Interrupt Vector Offset Register 34 */
+#define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */
+#define SPRN_IVOR36 0x214 /* Interrupt Vector Offset Register 36 */
+#define SPRN_IVOR37 0x215 /* Interrupt Vector Offset Register 37 */
+#define SPRN_SPEFSCR 0x200 /* SPE & Embedded FP Status & Control */
+
+#define SPRN_MCSRR0 0x23a /* Machine Check Save and Restore Register 0 */
+#define SPRN_MCSRR1 0x23b /* Machine Check Save and Restore Register 1 */
+#define SPRN_BUCSR 0x3f5 /* Branch Control and Status Register */
+#define BUCSR_STAC_EN 0x01000000 /* Segment target addr cache enable */
+#define BUCSR_LS_EN 0x00400000 /* Link stack enable */
+#define BUCSR_BBFI 0x00000200 /* Branch buffer flash invalidate */
+#define BUCSR_BPEN 0x00000001 /* Branch prediction enable */
+#define BUCSR_ENABLE (BUCSR_STAC_EN | BUCSR_LS_EN | BUCSR_BBFI | BUCSR_BPEN)
+#define SPRN_BBEAR 0x201 /* Branch Buffer Entry Address Register */
+#define SPRN_BBTAR 0x202 /* Branch Buffer Target Address Register */
+#define SPRN_PID1 0x279 /* Process ID Register 1 */
+#define SPRN_PID2 0x27a /* Process ID Register 2 */
+#define SPRN_MCSR 0x23c /* Machine Check Syndrome register */
+#define SPRN_MCAR 0x23d /* Machine Check Address register */
+#define MCSR_MCS 0x80000000 /* Machine Check Summary */
+#define MCSR_IB 0x40000000 /* Instruction PLB Error */
+#if defined(CONFIG_440)
+#define MCSR_DRB 0x20000000 /* Data Read PLB Error */
+#define MCSR_DWB 0x10000000 /* Data Write PLB Error */
+#else
+#define MCSR_DB 0x20000000 /* Data PLB Error */
+#endif /* defined(CONFIG_440) */
+#define MCSR_TLBP 0x08000000 /* TLB Parity Error */
+#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */
+#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */
+#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */
+#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */
+#define ESR_ST 0x00800000 /* Store Operation */
+
+#if defined(CONFIG_MPC86xx)
+#define SPRN_MSSCR0 0x3f6
+#define SPRN_MSSSR0 0x3f7
+#endif
+
+#define SPRN_HDBCR0 0x3d0
+#define SPRN_HDBCR1 0x3d1
+#define SPRN_HDBCR2 0x3d2
+#define SPRN_HDBCR3 0x3d3
+#define SPRN_HDBCR4 0x3d4
+#define SPRN_HDBCR5 0x3d5
+#define SPRN_HDBCR6 0x3d6
+#define SPRN_HDBCR7 0x277
+#define SPRN_HDBCR8 0x278
+
+/* Short-hand versions for a number of the above SPRNs */
+
+#define CTR SPRN_CTR /* Counter Register */
+#define DAR SPRN_DAR /* Data Address Register */
+#define DABR SPRN_DABR /* Data Address Breakpoint Register */
+#define DAC1 SPRN_DAC1 /* Data Address Register 1 */
+#define DAC2 SPRN_DAC2 /* Data Address Register 2 */
+#define DBAT0L SPRN_DBAT0L /* Data BAT 0 Lower Register */
+#define DBAT0U SPRN_DBAT0U /* Data BAT 0 Upper Register */
+#define DBAT1L SPRN_DBAT1L /* Data BAT 1 Lower Register */
+#define DBAT1U SPRN_DBAT1U /* Data BAT 1 Upper Register */
+#define DBAT2L SPRN_DBAT2L /* Data BAT 2 Lower Register */
+#define DBAT2U SPRN_DBAT2U /* Data BAT 2 Upper Register */
+#define DBAT3L SPRN_DBAT3L /* Data BAT 3 Lower Register */
+#define DBAT3U SPRN_DBAT3U /* Data BAT 3 Upper Register */
+#define DBAT4L SPRN_DBAT4L /* Data BAT 4 Lower Register */
+#define DBAT4U SPRN_DBAT4U /* Data BAT 4 Upper Register */
+#define DBAT5L SPRN_DBAT5L /* Data BAT 5 Lower Register */
+#define DBAT5U SPRN_DBAT5U /* Data BAT 5 Upper Register */
+#define DBAT6L SPRN_DBAT6L /* Data BAT 6 Lower Register */
+#define DBAT6U SPRN_DBAT6U /* Data BAT 6 Upper Register */
+#define DBAT7L SPRN_DBAT7L /* Data BAT 7 Lower Register */
+#define DBAT7U SPRN_DBAT7U /* Data BAT 7 Upper Register */
+#define DBCR0 SPRN_DBCR0 /* Debug Control Register 0 */
+#define DBCR1 SPRN_DBCR1 /* Debug Control Register 1 */
+#define DBSR SPRN_DBSR /* Debug Status Register */
+#define DCMP SPRN_DCMP /* Data TLB Compare Register */
+#define DEC SPRN_DEC /* Decrement Register */
+#define DMISS SPRN_DMISS /* Data TLB Miss Register */
+#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */
+#define EAR SPRN_EAR /* External Address Register */
+#define ESR SPRN_ESR /* Exception Syndrome Register */
+#define HASH1 SPRN_HASH1 /* Primary Hash Address Register */
+#define HASH2 SPRN_HASH2 /* Secondary Hash Address Register */
+#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */
+#define HID1 SPRN_HID1 /* Hardware Implementation Register 1 */
+#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */
+#define IAC1 SPRN_IAC1 /* Instruction Address Register 1 */
+#define IAC2 SPRN_IAC2 /* Instruction Address Register 2 */
+#define IBAT0L SPRN_IBAT0L /* Instruction BAT 0 Lower Register */
+#define IBAT0U SPRN_IBAT0U /* Instruction BAT 0 Upper Register */
+#define IBAT1L SPRN_IBAT1L /* Instruction BAT 1 Lower Register */
+#define IBAT1U SPRN_IBAT1U /* Instruction BAT 1 Upper Register */
+#define IBAT2L SPRN_IBAT2L /* Instruction BAT 2 Lower Register */
+#define IBAT2U SPRN_IBAT2U /* Instruction BAT 2 Upper Register */
+#define IBAT3L SPRN_IBAT3L /* Instruction BAT 3 Lower Register */
+#define IBAT3U SPRN_IBAT3U /* Instruction BAT 3 Upper Register */
+#define IBAT4L SPRN_IBAT4L /* Instruction BAT 4 Lower Register */
+#define IBAT4U SPRN_IBAT4U /* Instruction BAT 4 Upper Register */
+#define IBAT5L SPRN_IBAT5L /* Instruction BAT 5 Lower Register */
+#define IBAT5U SPRN_IBAT5U /* Instruction BAT 5 Upper Register */
+#define IBAT6L SPRN_IBAT6L /* Instruction BAT 6 Lower Register */
+#define IBAT6U SPRN_IBAT6U /* Instruction BAT 6 Upper Register */
+#define IBAT7L SPRN_IBAT7L /* Instruction BAT 7 Lower Register */
+#define IBAT7U SPRN_IBAT7U /* Instruction BAT 7 Lower Register */
+#define ICMP SPRN_ICMP /* Instruction TLB Compare Register */
+#define IMISS SPRN_IMISS /* Instruction TLB Miss Register */
+#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */
+#define LDSTCR SPRN_LDSTCR /* Load/Store Control Register */
+#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
+#define LR SPRN_LR
+#define MBAR SPRN_MBAR /* System memory base address */
+#if defined(CONFIG_MPC86xx)
+#define MSSCR0 SPRN_MSSCR0
+#endif
+#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+#define PIR SPRN_PIR
+#endif
+#define SVR SPRN_SVR /* System-On-Chip Version Register */
+#define PVR SPRN_PVR /* Processor Version */
+#define RPA SPRN_RPA /* Required Physical Address Register */
+#define SDR1 SPRN_SDR1 /* MMU hash base register */
+#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */
+#define SPR1 SPRN_SPRG1
+#define SPR2 SPRN_SPRG2
+#define SPR3 SPRN_SPRG3
+#define SPRG0 SPRN_SPRG0
+#define SPRG1 SPRN_SPRG1
+#define SPRG2 SPRN_SPRG2
+#define SPRG3 SPRN_SPRG3
+#define SPRG4 SPRN_SPRG4
+#define SPRG5 SPRN_SPRG5
+#define SPRG6 SPRN_SPRG6
+#define SPRG7 SPRN_SPRG7
+#define SRR0 SPRN_SRR0 /* Save and Restore Register 0 */
+#define SRR1 SPRN_SRR1 /* Save and Restore Register 1 */
+#define SRR2 SPRN_SRR2 /* Save and Restore Register 2 */
+#define SRR3 SPRN_SRR3 /* Save and Restore Register 3 */
+#define SVR SPRN_SVR /* System Version Register */
+#define TBRL SPRN_TBRL /* Time Base Read Lower Register */
+#define TBRU SPRN_TBRU /* Time Base Read Upper Register */
+#define TBWL SPRN_TBWL /* Time Base Write Lower Register */
+#define TBWU SPRN_TBWU /* Time Base Write Upper Register */
+#define TCR SPRN_TCR /* Timer Control Register */
+#define TSR SPRN_TSR /* Timer Status Register */
+#define ICTC 1019
+#define THRM1 SPRN_THRM1 /* Thermal Management Register 1 */
+#define THRM2 SPRN_THRM2 /* Thermal Management Register 2 */
+#define THRM3 SPRN_THRM3 /* Thermal Management Register 3 */
+#define XER SPRN_XER
+
+#define DECAR SPRN_DECAR
+#define CSRR0 SPRN_CSRR0
+#define CSRR1 SPRN_CSRR1
+#define IVPR SPRN_IVPR
+#define USPRG0 SPRN_USPRG
+#define SPRG4R SPRN_SPRG4R
+#define SPRG5R SPRN_SPRG5R
+#define SPRG6R SPRN_SPRG6R
+#define SPRG7R SPRN_SPRG7R
+#define SPRG4W SPRN_SPRG4W
+#define SPRG5W SPRN_SPRG5W
+#define SPRG6W SPRN_SPRG6W
+#define SPRG7W SPRN_SPRG7W
+#define DEAR SPRN_DEAR
+#define DBCR2 SPRN_DBCR2
+#define IAC3 SPRN_IAC3
+#define IAC4 SPRN_IAC4
+#define DVC1 SPRN_DVC1
+#define DVC2 SPRN_DVC2
+#define IVOR0 SPRN_IVOR0
+#define IVOR1 SPRN_IVOR1
+#define IVOR2 SPRN_IVOR2
+#define IVOR3 SPRN_IVOR3
+#define IVOR4 SPRN_IVOR4
+#define IVOR5 SPRN_IVOR5
+#define IVOR6 SPRN_IVOR6
+#define IVOR7 SPRN_IVOR7
+#define IVOR8 SPRN_IVOR8
+#define IVOR9 SPRN_IVOR9
+#define IVOR10 SPRN_IVOR10
+#define IVOR11 SPRN_IVOR11
+#define IVOR12 SPRN_IVOR12
+#define IVOR13 SPRN_IVOR13
+#define IVOR14 SPRN_IVOR14
+#define IVOR15 SPRN_IVOR15
+#define IVOR32 SPRN_IVOR32
+#define IVOR33 SPRN_IVOR33
+#define IVOR34 SPRN_IVOR34
+#define IVOR35 SPRN_IVOR35
+#define MCSRR0 SPRN_MCSRR0
+#define MCSRR1 SPRN_MCSRR1
+#define L1CSR0 SPRN_L1CSR0
+#define L1CSR1 SPRN_L1CSR1
+#define L1CSR2 SPRN_L1CSR2
+#define L1CFG0 SPRN_L1CFG0
+#define L1CFG1 SPRN_L1CFG1
+#define L2CFG0 SPRN_L2CFG0
+#define L2CSR0 SPRN_L2CSR0
+#define L2CSR1 SPRN_L2CSR1
+#define MCSR SPRN_MCSR
+#define MMUCSR0 SPRN_MMUCSR0
+#define BUCSR SPRN_BUCSR
+#define PID0 SPRN_PID
+#define PID1 SPRN_PID1
+#define PID2 SPRN_PID2
+#define MAS0 SPRN_MAS0
+#define MAS1 SPRN_MAS1
+#define MAS2 SPRN_MAS2
+#define MAS3 SPRN_MAS3
+#define MAS4 SPRN_MAS4
+#define MAS5 SPRN_MAS5
+#define MAS6 SPRN_MAS6
+#define MAS7 SPRN_MAS7
+#define MAS8 SPRN_MAS8
+
+#if defined(CONFIG_4xx) || defined(CONFIG_44x) || defined(CONFIG_MPC85xx)
+#define DAR_DEAR DEAR
+#else
+#define DAR_DEAR DAR
+#endif
+
+/* Device Control Registers */
+
+#define DCRN_BEAR 0x090 /* Bus Error Address Register */
+#define DCRN_BESR 0x091 /* Bus Error Syndrome Register */
+#define BESR_DSES 0x80000000 /* Data-Side Error Status */
+#define BESR_DMES 0x40000000 /* DMA Error Status */
+#define BESR_RWS 0x20000000 /* Read/Write Status */
+#define BESR_ETMASK 0x1C000000 /* Error Type */
+#define ET_PROT 0
+#define ET_PARITY 1
+#define ET_NCFG 2
+#define ET_BUSERR 4
+#define ET_BUSTO 6
+#define DCRN_DMACC0 0x0C4 /* DMA Chained Count Register 0 */
+#define DCRN_DMACC1 0x0CC /* DMA Chained Count Register 1 */
+#define DCRN_DMACC2 0x0D4 /* DMA Chained Count Register 2 */
+#define DCRN_DMACC3 0x0DC /* DMA Chained Count Register 3 */
+#define DCRN_DMACR0 0x0C0 /* DMA Channel Control Register 0 */
+#define DCRN_DMACR1 0x0C8 /* DMA Channel Control Register 1 */
+#define DCRN_DMACR2 0x0D0 /* DMA Channel Control Register 2 */
+#define DCRN_DMACR3 0x0D8 /* DMA Channel Control Register 3 */
+#define DCRN_DMACT0 0x0C1 /* DMA Count Register 0 */
+#define DCRN_DMACT1 0x0C9 /* DMA Count Register 1 */
+#define DCRN_DMACT2 0x0D1 /* DMA Count Register 2 */
+#define DCRN_DMACT3 0x0D9 /* DMA Count Register 3 */
+#define DCRN_DMADA0 0x0C2 /* DMA Destination Address Register 0 */
+#define DCRN_DMADA1 0x0CA /* DMA Destination Address Register 1 */
+#define DCRN_DMADA2 0x0D2 /* DMA Destination Address Register 2 */
+#define DCRN_DMADA3 0x0DA /* DMA Destination Address Register 3 */
+#define DCRN_DMASA0 0x0C3 /* DMA Source Address Register 0 */
+#define DCRN_DMASA1 0x0CB /* DMA Source Address Register 1 */
+#define DCRN_DMASA2 0x0D3 /* DMA Source Address Register 2 */
+#define DCRN_DMASA3 0x0DB /* DMA Source Address Register 3 */
+#define DCRN_DMASR 0x0E0 /* DMA Status Register */
+#define DCRN_EXIER 0x042 /* External Interrupt Enable Register */
+#define EXIER_CIE 0x80000000 /* Critical Interrupt Enable */
+#define EXIER_SRIE 0x08000000 /* Serial Port Rx Int. Enable */
+#define EXIER_STIE 0x04000000 /* Serial Port Tx Int. Enable */
+#define EXIER_JRIE 0x02000000 /* JTAG Serial Port Rx Int. Enable */
+#define EXIER_JTIE 0x01000000 /* JTAG Serial Port Tx Int. Enable */
+#define EXIER_D0IE 0x00800000 /* DMA Channel 0 Interrupt Enable */
+#define EXIER_D1IE 0x00400000 /* DMA Channel 1 Interrupt Enable */
+#define EXIER_D2IE 0x00200000 /* DMA Channel 2 Interrupt Enable */
+#define EXIER_D3IE 0x00100000 /* DMA Channel 3 Interrupt Enable */
+#define EXIER_E0IE 0x00000010 /* External Interrupt 0 Enable */
+#define EXIER_E1IE 0x00000008 /* External Interrupt 1 Enable */
+#define EXIER_E2IE 0x00000004 /* External Interrupt 2 Enable */
+#define EXIER_E3IE 0x00000002 /* External Interrupt 3 Enable */
+#define EXIER_E4IE 0x00000001 /* External Interrupt 4 Enable */
+#define DCRN_EXISR 0x040 /* External Interrupt Status Register */
+#define DCRN_IOCR 0x0A0 /* Input/Output Configuration Register */
+#define IOCR_E0TE 0x80000000
+#define IOCR_E0LP 0x40000000
+#define IOCR_E1TE 0x20000000
+#define IOCR_E1LP 0x10000000
+#define IOCR_E2TE 0x08000000
+#define IOCR_E2LP 0x04000000
+#define IOCR_E3TE 0x02000000
+#define IOCR_E3LP 0x01000000
+#define IOCR_E4TE 0x00800000
+#define IOCR_E4LP 0x00400000
+#define IOCR_EDT 0x00080000
+#define IOCR_SOR 0x00040000
+#define IOCR_EDO 0x00008000
+#define IOCR_2XC 0x00004000
+#define IOCR_ATC 0x00002000
+#define IOCR_SPD 0x00001000
+#define IOCR_BEM 0x00000800
+#define IOCR_PTD 0x00000400
+#define IOCR_ARE 0x00000080
+#define IOCR_DRC 0x00000020
+#define IOCR_RDM(x) (((x)&0x3) << 3)
+#define IOCR_TCS 0x00000004
+#define IOCR_SCS 0x00000002
+#define IOCR_SPC 0x00000001
+
+/* System-On-Chip Version Register */
+
+/* System-On-Chip Version Register (SVR) field extraction */
+
+#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
+#define SVR_REV(svr) (((svr) >> 0) & 0xFF) /* Revision field */
+
+#define SVR_CID(svr) (((svr) >> 28) & 0x0F) /* Company or manufacturer ID */
+#define SVR_SOCOP(svr) (((svr) >> 22) & 0x3F) /* SOC integration options */
+#define SVR_SID(svr) (((svr) >> 16) & 0x3F) /* SOC ID */
+#define SVR_PROC(svr) (((svr) >> 12) & 0x0F) /* Process revision field */
+#define SVR_MFG(svr) (((svr) >> 8) & 0x0F) /* Manufacturing revision */
+#define SVR_MJREV(svr) (((svr) >> 4) & 0x0F) /* Major SOC design revision indicator */
+#define SVR_MNREV(svr) (((svr) >> 0) & 0x0F) /* Minor SOC design revision indicator */
+
+/* Processor Version Register */
+
+/* Processor Version Register (PVR) field extraction */
+
+#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */
+#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */
+
+/*
+ * AMCC has further subdivided the standard PowerPC 16-bit version and
+ * revision subfields of the PVR for the PowerPC 403s into the following:
+ */
+
+#define PVR_FAM(pvr) (((pvr) >> 20) & 0xFFF) /* Family field */
+#define PVR_MEM(pvr) (((pvr) >> 16) & 0xF) /* Member field */
+#define PVR_CORE(pvr) (((pvr) >> 12) & 0xF) /* Core field */
+#define PVR_CFG(pvr) (((pvr) >> 8) & 0xF) /* Configuration field */
+#define PVR_MAJ(pvr) (((pvr) >> 4) & 0xF) /* Major revision field */
+#define PVR_MIN(pvr) (((pvr) >> 0) & 0xF) /* Minor revision field */
+
+/* e600 core PVR fields */
+
+#define PVR_E600_VER(pvr) (((pvr) >> 15) & 0xFFFF) /* Version/type */
+#define PVR_E600_TECH(pvr) (((pvr) >> 12) & 0xF) /* Technology */
+#define PVR_E600_MAJ(pvr) (((pvr) >> 8) & 0xF) /* Major revision */
+#define PVR_E600_MIN(pvr) (((pvr) >> 0) & 0xFF) /* Minor revision */
+
+/* Processor Version Numbers */
+
+#define PVR_403GA 0x00200000
+#define PVR_403GB 0x00200100
+#define PVR_403GC 0x00200200
+#define PVR_403GCX 0x00201400
+#define PVR_405GP 0x40110000
+#define PVR_405GP_RB 0x40110040
+#define PVR_405GP_RC 0x40110082
+#define PVR_405GP_RD 0x401100C4
+#define PVR_405GP_RE 0x40110145 /* same as pc405cr rev c */
+#define PVR_405EP_RA 0x51210950
+#define PVR_405GPR_RB 0x50910951
+#define PVR_405EZ_RA 0x41511460
+#define PVR_405EXR2_RA 0x12911471 /* 405EXr rev A/B without Security */
+#define PVR_405EX1_RA 0x12911477 /* 405EX rev A/B with Security */
+#define PVR_405EXR1_RC 0x1291147B /* 405EXr rev C with Security */
+#define PVR_405EXR2_RC 0x12911479 /* 405EXr rev C without Security */
+#define PVR_405EX1_RC 0x1291147F /* 405EX rev C with Security */
+#define PVR_405EX2_RC 0x1291147D /* 405EX rev C without Security */
+#define PVR_405EXR1_RD 0x12911472 /* 405EXr rev D with Security */
+#define PVR_405EXR2_RD 0x12911470 /* 405EXr rev D without Security */
+#define PVR_405EX1_RD 0x12911475 /* 405EX rev D with Security */
+#define PVR_405EX2_RD 0x12911473 /* 405EX rev D without Security */
+#define PVR_440GP_RB 0x40120440
+#define PVR_440GP_RC 0x40120481
+#define PVR_440EP_RA 0x42221850
+#define PVR_440EP_RB 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
+#define PVR_440EP_RC 0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
+#define PVR_440GR_RA 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
+#define PVR_440GR_RB 0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
+#define PVR_440EPX1_RA 0x216218D0 /* 440EPX rev A with Security / Kasumi */
+#define PVR_440EPX2_RA 0x216218D4 /* 440EPX rev A without Security / Kasumi */
+#define PVR_440GRX1_RA 0x216218D0 /* 440GRX rev A with Security / Kasumi */
+#define PVR_440GRX2_RA 0x216218D4 /* 440GRX rev A without Security / Kasumi */
+#define PVR_440GX_RA 0x51B21850
+#define PVR_440GX_RB 0x51B21851
+#define PVR_440GX_RC 0x51B21892
+#define PVR_440GX_RF 0x51B21894
+#define PVR_405EP_RB 0x51210950
+#define PVR_440SP_6_RAB 0x53221850 /* 440SP rev A&B with RAID 6 support enabled */
+#define PVR_440SP_RAB 0x53321850 /* 440SP rev A&B without RAID 6 support */
+#define PVR_440SP_6_RC 0x53221891 /* 440SP rev C with RAID 6 support enabled */
+#define PVR_440SP_RC 0x53321891 /* 440SP rev C without RAID 6 support */
+#define PVR_440SPe_6_RA 0x53421890 /* 440SPe rev A with RAID 6 support enabled */
+#define PVR_440SPe_RA 0x53521890 /* 440SPe rev A without RAID 6 support */
+#define PVR_440SPe_6_RB 0x53421891 /* 440SPe rev B with RAID 6 support enabled */
+#define PVR_440SPe_RB 0x53521891 /* 440SPe rev B without RAID 6 support */
+#define PVR_460EX_SE_RA 0x130218A2 /* 460EX rev A with Security Engine */
+#define PVR_460EX_RA 0x130218A3 /* 460EX rev A without Security Engine */
+#define PVR_460EX_RB 0x130218A4 /* 460EX rev B with and without Sec Eng*/
+#define PVR_460GT_SE_RA 0x130218A0 /* 460GT rev A with Security Engine */
+#define PVR_460GT_RA 0x130218A1 /* 460GT rev A without Security Engine */
+#define PVR_460GT_RB 0x130218A5 /* 460GT rev B with and without Sec Eng*/
+#define PVR_460SX_RA 0x13541800 /* 460SX rev A */
+#define PVR_460SX_RA_V1 0x13541801 /* 460SX rev A Variant 1 Security disabled */
+#define PVR_460GX_RA 0x13541802 /* 460GX rev A */
+#define PVR_460GX_RA_V1 0x13541803 /* 460GX rev A Variant 1 Security disabled */
+#define PVR_APM821XX_RA 0x12C41C80 /* APM821XX rev A */
+#define PVR_601 0x00010000
+#define PVR_602 0x00050000
+#define PVR_603 0x00030000
+#define PVR_603e 0x00060000
+#define PVR_603ev 0x00070000
+#define PVR_603r 0x00071000
+#define PVR_604 0x00040000
+#define PVR_604e 0x00090000
+#define PVR_604r 0x000A0000
+#define PVR_620 0x00140000
+#define PVR_740 0x00080000
+#define PVR_750 PVR_740
+#define PVR_740P 0x10080000
+#define PVR_750P PVR_740P
+#define PVR_7400 0x000C0000
+#define PVR_7410 0x800C0000
+#define PVR_7450 0x80000000
+
+#define PVR_85xx 0x80200000
+#define PVR_85xx_REV1 (PVR_85xx | 0x0010)
+#define PVR_85xx_REV2 (PVR_85xx | 0x0020)
+#define PVR_VER_E500_V1 0x8020
+#define PVR_VER_E500_V2 0x8021
+#define PVR_VER_E500MC 0x8023
+#define PVR_VER_E5500 0x8024
+#define PVR_VER_E6500 0x8040
+
+#define PVR_86xx 0x80040000
+
+#define PVR_VIRTEX5 0x7ff21912
+
+/*
+ * For the 8xx processors, all of them report the same PVR family for
+ * the PowerPC core. The various versions of these processors must be
+ * differentiated by the version number in the Communication Processor
+ * Module (CPM).
+ */
+#define PVR_821 0x00500000
+#define PVR_823 PVR_821
+#define PVR_850 PVR_821
+#define PVR_860 PVR_821
+#define PVR_7400 0x000C0000
+#define PVR_8240 0x00810100
+
+/*
+ * PowerQUICC II family processors report different PVR values depending
+ * on silicon process (HiP3, HiP4, HiP7, etc.)
+ */
+#define PVR_8260 PVR_8240
+#define PVR_8260_HIP3 0x00810101
+#define PVR_8260_HIP4 0x80811014
+#define PVR_8260_HIP7 0x80822011
+#define PVR_8260_HIP7R1 0x80822013
+#define PVR_8260_HIP7RA 0x80822014
+
+/*
+ * MPC 52xx
+ */
+#define PVR_5200 0x80822011
+#define PVR_5200B 0x80822014
+
+/*
+ * 405EX/EXr CHIP_21 Errata
+ */
+#ifdef CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY
+#define CONFIG_SYS_4xx_CHIP_21_ERRATA
+#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EX1_RC
+#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EX1_RD
+#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x0
+#endif
+
+#ifdef CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY
+#define CONFIG_SYS_4xx_CHIP_21_ERRATA
+#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EX2_RC
+#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EX2_RD
+#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x1
+#endif
+
+#ifdef CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY
+#define CONFIG_SYS_4xx_CHIP_21_ERRATA
+#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EXR1_RC
+#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EXR1_RD
+#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x2
+#endif
+
+#ifdef CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY
+#define CONFIG_SYS_4xx_CHIP_21_ERRATA
+#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EXR2_RC
+#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EXR2_RD
+#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x3
+#endif
+
+/*
+ * System Version Register
+ */
+
+/* System Version Register (SVR) field extraction */
+
+#define SVR_SUBVER(svr) (((svr) >> 8) & 0xFF) /* Process/MFG sub-version */
+
+#define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */
+#define SVR_MEM(svr) (((svr) >> 16) & 0xF) /* Member field */
+
+#ifdef CONFIG_MPC8536
+#define SVR_MAJ(svr) (((svr) >> 4) & 0x7) /* Major revision field*/
+#else
+#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
+#endif
+#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
+
+/* Some parts define SVR[0:23] as the SOC version */
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC w/o E bit*/
+
+/* whether MPC8xxxE (i.e. has SEC) */
+#if defined(CONFIG_MPC85xx)
+#define IS_E_PROCESSOR(svr) (svr & 0x80000)
+#else
+#if defined(CONFIG_MPC83xx)
+#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000))
+#endif
+#endif
+
+#define IS_SVR_REV(svr, maj, min) \
+ ((SVR_MAJ(svr) == maj) && (SVR_MIN(svr) == min))
+
+/*
+ * SVR_SOC_VER() Version Values
+ */
+
+#define SVR_8533 0x803400
+#define SVR_8535 0x803701
+#define SVR_8536 0x803700
+#define SVR_8540 0x803000
+#define SVR_8541 0x807200
+#define SVR_8543 0x803200
+#define SVR_8544 0x803401
+#define SVR_8545 0x803102
+#define SVR_8547 0x803101
+#define SVR_8548 0x803100
+#define SVR_8555 0x807100
+#define SVR_8560 0x807000
+#define SVR_8567 0x807501
+#define SVR_8568 0x807500
+#define SVR_8569 0x808000
+#define SVR_8572 0x80E000
+#define SVR_P1010 0x80F100
+#define SVR_P1011 0x80E500
+#define SVR_P1012 0x80E501
+#define SVR_P1013 0x80E700
+#define SVR_P1014 0x80F101
+#define SVR_P1017 0x80F700
+#define SVR_P1020 0x80E400
+#define SVR_P1021 0x80E401
+#define SVR_P1022 0x80E600
+#define SVR_P1023 0x80F600
+#define SVR_P1024 0x80E402
+#define SVR_P1025 0x80E403
+#define SVR_P2010 0x80E300
+#define SVR_P2020 0x80E200
+#define SVR_P2040 0x821000
+#define SVR_P2041 0x821001
+#define SVR_P3041 0x821103
+#define SVR_P4040 0x820100
+#define SVR_P4080 0x820000
+#define SVR_P5010 0x822100
+#define SVR_P5020 0x822000
+#define SVR_P5021 0X820500
+#define SVR_P5040 0x820400
+#define SVR_T4240 0x824000
+#define SVR_T4120 0x824001
+#define SVR_T4160 0x824100
+#define SVR_T4080 0x824102
+#define SVR_C291 0x850000
+#define SVR_C292 0x850020
+#define SVR_C293 0x850030
+#define SVR_B4860 0X868000
+#define SVR_G4860 0x868001
+#define SVR_B4460 0x868003
+#define SVR_B4440 0x868100
+#define SVR_G4440 0x868101
+#define SVR_B4420 0x868102
+#define SVR_B4220 0x868103
+#define SVR_T1040 0x852000
+#define SVR_T1041 0x852001
+#define SVR_T1042 0x852002
+#define SVR_T1020 0x852100
+#define SVR_T1021 0x852101
+#define SVR_T1022 0x852102
+#define SVR_T1024 0x854000
+#define SVR_T1023 0x854100
+#define SVR_T1014 0x854400
+#define SVR_T1013 0x854500
+#define SVR_T2080 0x853000
+#define SVR_T2081 0x853100
+
+#define SVR_8610 0x80A000
+#define SVR_8641 0x809000
+#define SVR_8641D 0x809001
+
+#define SVR_9130 0x860001
+#define SVR_9131 0x860000
+#define SVR_9132 0x861000
+#define SVR_9232 0x861400
+
+#define SVR_Unknown 0xFFFFFF
+
+#define _GLOBAL(n) \
+ .globl n; \
+ n:
+
+/* Macros for setting and retrieving special purpose registers */
+
+#define stringify(s) tostring(s)
+#define tostring(s) #s
+
+#define mfdcr(rn) ({unsigned int rval; \
+ asm volatile("mfdcr %0," stringify(rn) \
+ : "=r" (rval)); rval; })
+#define mtdcr(rn, v) asm volatile("mtdcr " stringify(rn) ",%0" \
+ : \
+ : "r"(v))
+
+#define mfmsr() ({unsigned int rval; \
+ asm volatile("mfmsr %0" : "=r" (rval)); rval; })
+#define mtmsr(v) asm volatile("mtmsr %0" \
+ : \
+ : "r"(v))
+
+#define mfspr(rn) ({unsigned int rval; \
+ asm volatile("mfspr %0," stringify(rn) \
+ : "=r" (rval)); rval; })
+#define mtspr(rn, v) asm volatile("mtspr " stringify(rn) ",%0" \
+ : \
+ : "r"(v))
+
+#define tlbie(v) asm volatile("tlbie %0 \n sync" \
+ : \
+ : "r"(v))
+
+/* Segment Registers */
+
+#define SR0 0
+#define SR1 1
+#define SR2 2
+#define SR3 3
+#define SR4 4
+#define SR5 5
+#define SR6 6
+#define SR7 7
+#define SR8 8
+#define SR9 9
+#define SR10 10
+#define SR11 11
+#define SR12 12
+#define SR13 13
+#define SR14 14
+#define SR15 15
+
+#ifndef __ASSEMBLY__
+
+#include <lib/boot.h>
+
+struct cpu_type
+{
+ char name[15];
+ uint32_t soc_ver;
+ uint32_t num_cores;
+ uint32_t mask; /* which cpu(s) actually exist */
+#ifdef CONFIG_HETROGENOUS_CLUSTERS
+ uint32_t dsp_num_cores;
+ uint32_t dsp_mask; /* which DSP cpu(s) actually exist */
+#endif
+};
+
+struct cpu_type* identify_cpu(uint32_t ver);
+int fixup_cpu(void);
+
+int fsl_qoriq_core_to_cluster(unsigned int core);
+int fsl_qoriq_dsp_core_to_cluster(unsigned int core);
+
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+#define CPU_TYPE_ENTRY(n, v, nc) \
+ { \
+ .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), \
+ .mask = (1 << (nc)) - 1 \
+ }
+#define CPU_TYPE_ENTRY_MASK(n, v, nc, m) \
+ { \
+ .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), .mask = (m) \
+ }
+#else
+#if defined(CONFIG_MPC83xx)
+#define CPU_TYPE_ENTRY(x) \
+ { \
+#x, SPR_##x \
+ }
+#endif
+#endif
+
+#ifndef CONFIG_MACH_SPECIFIC
+extern int _machine;
+extern int have_of;
+#endif /* CONFIG_MACH_SPECIFIC */
+
+/* what kind of prep workstation we are */
+extern int _prep_type;
+/*
+ * This is used to identify the board type from a given PReP board
+ * vendor. Board revision is also made available.
+ */
+extern unsigned char ucSystemType;
+extern unsigned char ucBoardRev;
+extern unsigned char ucBoardRevMaj, ucBoardRevMin;
+
+struct task_struct;
+void start_thread(struct pt_regs* regs, unsigned long nip, unsigned long sp);
+void release_thread(struct task_struct*);
+
+/*
+ * Create a new Kernel thread.
+ */
+extern long kernel_thread(int (*fn)(void*), void* arg, unsigned long flags);
+
+/*
+ * Bus types
+ */
+#define EISA_bus 0
+#define EISA_bus__is_a_macro /* for versions in ksyms.c */
+#define MCA_bus 0
+#define MCA_bus__is_a_macro /* for versions in ksyms.c */
+
+/* Lazy FPU handling on uni-processor */
+extern struct task_struct* last_task_used_math;
+extern struct task_struct* last_task_used_altivec;
+
+/*
+ * this is the minimum allowable io space due to the location
+ * of the io areas on prep (first one at 0x80000000) but
+ * as soon as I get around to remapping the io areas with the BATs
+ * to match the mac we can raise this. -- Cort
+ */
+#define TASK_SIZE (0x80000000UL)
+
+/* This decides where the Kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3)
+
+typedef struct
+{
+ unsigned long seg;
+} mm_segment_t;
+
+struct thread_struct
+{
+ unsigned long ksp; /* Kernel stack pointer */
+ unsigned long wchan; /* Event task is sleeping on */
+ struct pt_regs* regs; /* Pointer to saved register state */
+ mm_segment_t fs; /* for get_fs() validation */
+ void* pgdir; /* root of page-table tree */
+ signed long last_syscall;
+ double fpr[32]; /* Complete floating point set */
+ unsigned long fpscr_pad; /* fpr ... fpscr must be contiguous */
+ unsigned long fpscr; /* Floating point status */
+#ifdef CONFIG_ALTIVEC
+ vector128 vr[32]; /* Complete AltiVec set */
+ vector128 vscr; /* AltiVec status */
+ unsigned long vrsave;
+#endif /* CONFIG_ALTIVEC */
+};
+
+#define INIT_SP (sizeof(init_stack) + (unsigned long)&init_stack)
+
+#define INIT_THREAD \
+ { \
+ INIT_SP, /* ksp */ \
+ 0, /* wchan */ \
+ (struct pt_regs*)INIT_SP - 1, /* regs */ \
+ KERNEL_DS, /*fs*/ \
+ swapper_pg_dir, /* pgdir */ \
+ 0, /* last_syscall */ \
+ {0}, 0, 0 \
+ }
+
+/*
+ * Note: the vm_start and vm_end fields here should *not*
+ * be in Kernel space. (Could vm_end == vm_start perhaps?)
+ */
+#define INIT_MMAP \
+ { \
+ &init_mm, 0, 0x1000, NULL, \
+ PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \
+ 1, NULL, NULL \
+ }
+
+/*
+ * Return saved PC of a blocked thread. For now, this is the "user" PC
+ */
+static inline unsigned long thread_saved_pc(struct thread_struct* t)
+{
+ return (t->regs) ? t->regs->nip : 0;
+}
+
+#define copy_segments(tsk, mm) \
+ do \
+ { \
+ } while (0)
+#define release_segments(mm) \
+ do \
+ { \
+ } while (0)
+#define forget_segments() \
+ do \
+ { \
+ } while (0)
+
+unsigned long get_wchan(struct task_struct* p);
+
+#define KSTK_EIP(tsk) ((tsk)->thread.regs->nip)
+#define KSTK_ESP(tsk) ((tsk)->thread.regs->gpr[1])
+
+/*
+ * NOTE! The task struct and the stack go together
+ */
+#define THREAD_SIZE (2 * PAGE_SIZE)
+#define alloc_task_struct() \
+ ((struct task_struct*)__get_free_pages(GFP_KERNEL, 1))
+#define free_task_struct(p) free_pages((unsigned long)(p), 1)
+#define get_task_struct(tsk) atomic_inc(&mem_map[MAP_NR(tsk)].count)
+
+/* in process.c - for early bootup debug -- Cort */
+int ll_printk(const char*, ...);
+void ll_puts(const char*);
+
+#define init_task (init_task_union.task)
+#define init_stack (init_task_union.stack)
+
+/* In misc.c */
+void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
+
+#endif /* ndef ASSEMBLY*/
+
+#ifdef CONFIG_MACH_SPECIFIC
+#if defined(CONFIG_8xx)
+#define _machine _MACH_8xx
+#define have_of 0
+#elif defined(CONFIG_WALNUT)
+#define _machine _MACH_walnut
+#define have_of 0
+#elif defined(CONFIG_MPC8260)
+#define _machine _MACH_8260
+#define have_of 0
+#else
+#error "Machine not defined correctly"
+#endif
+#endif /* CONFIG_MACH_SPECIFIC */
+
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_440)
+#define EPAPR_MAGIC (0x45504150)
+#else
+#define EPAPR_MAGIC (0x65504150)
+#endif
+
+#endif /* __ASM_PPC_PROCESSOR_H */
diff --git a/lib/rv64/.gitkeep b/lib/rv64/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/lib/rv64/.gitkeep
diff --git a/lib/string.h b/lib/string.h
new file mode 100644
index 0000000..a56d2f2
--- /dev/null
+++ b/lib/string.h
@@ -0,0 +1,23 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#pragma once
+
+#include <lib/boot.h>
+
+#define strncpy(DST, SRC, LEN) memncpy(DST, SRC, LEN)
+
+void strreverse(char* in_out);
+size_t strlen(const char* in);
+size_t strnlen(const char* in, size_t maxLen);
+void* memset(void* dst, const char val, size_t len);
+size_t memcpy(void* dst, const void* src);
+size_t memncpy(void* dst, const void* src, size_t len);
+void* memmove(void* dst, const void* src, size_t len);
+size_t strncmp(const char* cmp1, const char* cmp2, size_t len);
+char* strchr(char* str, const char chr);
+
+#define zero_memory(dst, sz) memset(dst, 0, sz)
diff --git a/lib/x86s/.gitkeep b/lib/x86s/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/lib/x86s/.gitkeep
diff --git a/lib/xcoff.h b/lib/xcoff.h
new file mode 100644
index 0000000..8c3d5af
--- /dev/null
+++ b/lib/xcoff.h
@@ -0,0 +1,41 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+ File: xcoff.h
+ Purpose: XCOFF for CoreBoot.
+
+ Revision History:
+
+ 04/07/24: Added file (amlel)
+
+------------------------------------------- */
+
+#ifndef __XCOFF__
+#define __XCOFF__
+
+#include <lib/boot.h>
+
+#define XCOFF_MAG 0x01F7
+
+#define XCOFF_REL_FLG 0x0001
+#define XCOFF_EXEC_FLG 0x0002
+#define XCOFF_LNNO_FLG 0x0004
+#define XCOFF_SYMNS_FLG 0x0008
+
+/// @brief XCoff identification header.
+typedef struct _xcoff_header
+{
+ uint16_t magic;
+ uint16_t target;
+ uint16_t num_secs;
+ uint32_t timestamp;
+ uint64_t symptr;
+ uint32_t numsyms;
+ uint16_t opthdr; // ?: Number of bytes in optional header
+} xcoff_header_t;
+
+typedef xcoff_header_t xcoff_header64_t;
+typedef xcoff_header_t xcoff_header32_t;
+
+#endif // ifndef __XCOFF__
diff --git a/libfdt/README b/libfdt/README
new file mode 100644
index 0000000..a96e4e3
--- /dev/null
+++ b/libfdt/README
@@ -0,0 +1,4 @@
+Flat Device Tree
+================
+
+A new implementation of fdt compatible with CoreBoot. \ No newline at end of file
diff --git a/libfdt/libfdt.h b/libfdt/libfdt.h
new file mode 100644
index 0000000..5ed9144
--- /dev/null
+++ b/libfdt/libfdt.h
@@ -0,0 +1,189 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#pragma once
+
+#include <libfdt/libfdt_env.h>
+
+#define FDT_FIRST_SUPPORTED_VERSION (0x02)
+#define FDT_LAST_COMPATIBLE_VERSION (0x10)
+#define FDT_LAST_SUPPORTED_VERSION (0x11)
+
+#define FDT_ERR_NOTFOUND (1U)
+#define FDT_ERR_EXISTS (2U)
+#define FDT_ERR_NOSPACE (3U)
+#define FDT_ERR_BADOFFSET (4U)
+#define FDT_ERR_BADPATH (5U)
+#define FDT_ERR_BADPHANDLE (6U)
+#define FDT_ERR_BADSTATE (7U)
+#define FDT_ERR_TRUNCATED (8U)
+#define FDT_ERR_BADMAGIC (9U)
+#define FDT_ERR_BADVERSION (10U)
+#define FDT_ERR_BADSTRUCTURE (11U)
+#define FDT_ERR_BADLAYOUT (12U)
+#define FDT_ERR_INTERNAL (13U)
+#define FDT_ERR_BADNCELLS (14U)
+#define FDT_ERR_BADVALUE (15U)
+#define FDT_ERR_BADOVERLAY (16U)
+#define FDT_ERR_NOPHANDLES (17U)
+#define FDT_ERR_BADFLAGS (18U)
+#define FDT_ERR_ALIGNMENT (19U)
+
+#define FDT_ERR_MAX (FDT_ERR_ALIGNMENT)
+
+#define FDT_MAX_PHANDLE (0xfffffffe)
+
+#define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */
+#define FDT_TAGSIZE sizeof(fdt32_t)
+
+struct fdt_header
+{
+ fdt32_t magic; /* magic word FDT_MAGIC */
+ fdt32_t totalsize; /* total size of DT block */
+ fdt32_t off_dt_struct; /* offset to structure */
+ fdt32_t off_dt_strings; /* offset to strings */
+ fdt32_t off_mem_rsvmap; /* offset to memory reserve map */
+ fdt32_t version; /* format version */
+ fdt32_t last_comp_version; /* last compatible version */
+
+ /* version 2 fields below */
+ fdt32_t boot_cpuid_phys; /* Which physical CPU id we're
+ booting on */
+ /* version 3 fields below */
+ fdt32_t size_dt_strings; /* size of the strings block */
+
+ /* version 17 fields below */
+ fdt32_t size_dt_struct; /* size of the structure block */
+};
+
+struct fdt_reserve_entry
+{
+ fdt64_t address;
+ fdt64_t size;
+};
+
+struct fdt_node_header
+{
+ fdt32_t tag;
+ char name[];
+};
+
+struct fdt_property
+{
+ fdt32_t tag;
+ fdt32_t len;
+ fdt32_t nameoff;
+ char data[];
+};
+
+const void* fdt_offset_ptr(const void* fdt, int offset, unsigned int checklen);
+
+static inline voidptr_t fdt_offset_ptr_w(const voidptr_t fdt, int32_t offset, uint32_t checklen)
+{
+ return (voidptr_t)(fdt_offset_ptr(fdt, offset, checklen));
+}
+
+/*
+ * External helpers to access words from a device tree blob.
+*/
+
+static inline uint16_t fdt16_ld(const fdt16_t* p)
+{
+ const uint8_t* bp = (const uint8_t*)p;
+
+ return ((uint16_t)bp[0] << 8) | bp[1];
+}
+
+static inline uint32_t fdt32_ld(const fdt32_t* p)
+{
+ const uint8_t* bp = (const uint8_t*)p;
+
+ return ((uint32_t)bp[0] << 24) | ((uint32_t)bp[1] << 16) | ((uint32_t)bp[2] << 8) | bp[3];
+}
+
+static inline void fdt32_st(void* property, uint32_t value)
+{
+ uint8_t* bp = (uint8_t*)property;
+
+ bp[0] = value >> 24;
+ bp[1] = (value >> 16) & 0xff;
+ bp[2] = (value >> 8) & 0xff;
+ bp[3] = value & 0xff;
+}
+
+static inline uint64_t fdt64_ld(const fdt64_t* p)
+{
+ const uint8_t* bp = (const uint8_t*)p;
+
+ return ((uint64_t)bp[0] << 56) | ((uint64_t)bp[1] << 48) | ((uint64_t)bp[2] << 40) | ((uint64_t)bp[3] << 32) | ((uint64_t)bp[4] << 24) | ((uint64_t)bp[5] << 16) | ((uint64_t)bp[6] << 8) | bp[7];
+}
+
+static inline void fdt64_st(void* property, uint64_t value)
+{
+ uint8_t* bp = (uint8_t*)property;
+
+ bp[0] = value >> 56;
+ bp[1] = (value >> 48) & 0xff;
+ bp[2] = (value >> 40) & 0xff;
+ bp[3] = (value >> 32) & 0xff;
+ bp[4] = (value >> 24) & 0xff;
+ bp[5] = (value >> 16) & 0xff;
+ bp[6] = (value >> 8) & 0xff;
+ bp[7] = value & 0xff;
+}
+
+//
+// Node traversal functions
+//
+
+int fdt_next_node(const void* fdt, int offset, int* depth);
+
+/// @brief - get offset of first direct subnode
+/// @param fdt fdt blob
+/// @param offset offset of node to check
+/// @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
+
+int fdt_first_subnode(const void* fdt, int offset);
+
+/// @brief - get offset of next direct subnode
+/// @param fdt fdt blob
+/// @param offset offset of node to check
+/// @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more subnodes.
+
+int fdt_next_subnode(const void* fdt, int offset);
+
+#define fdt_get_header(fdt, field) (fdt32_ld(&((const struct fdt_header*)(fdt))->field))
+
+#define fdt_magic(fdt) (fdt_get_header(fdt, magic))
+#define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize))
+#define fdt_off_dt_struct(fdt) (fdt_get_header(fdt, off_dt_struct))
+#define fdt_off_dt_strings(fdt) (fdt_get_header(fdt, off_dt_strings))
+#define fdt_off_mem_rsvmap(fdt) (fdt_get_header(fdt, off_mem_rsvmap))
+#define fdt_version(fdt) (fdt_get_header(fdt, version))
+#define fdt_last_comp_version(fdt) (fdt_get_header(fdt, last_comp_version))
+#define fdt_boot_cpuid_phys(fdt) (fdt_get_header(fdt, boot_cpuid_phys))
+#define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings))
+#define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct))
+
+#define fdt_set_hdr_(name) \
+ static inline void fdt_set_##name(void* fdt, uint32_t val) \
+ { \
+ struct fdt_header* fdth = (struct fdt_header*)fdt; \
+ fdth->name = cpu_to_fdt32(val); \
+ }
+
+fdt_set_hdr_(magic);
+fdt_set_hdr_(totalsize);
+fdt_set_hdr_(off_dt_struct);
+fdt_set_hdr_(off_dt_strings);
+fdt_set_hdr_(off_mem_rsvmap);
+fdt_set_hdr_(version);
+fdt_set_hdr_(last_comp_version);
+fdt_set_hdr_(boot_cpuid_phys);
+fdt_set_hdr_(size_dt_strings);
+fdt_set_hdr_(size_dt_struct);
+
+#undef fdt_set_hdr_
diff --git a/libfdt/libfdt_address.c b/libfdt/libfdt_address.c
new file mode 100644
index 0000000..7d40178
--- /dev/null
+++ b/libfdt/libfdt_address.c
@@ -0,0 +1,134 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <libfdt/libfdt_env.h>
+
+extern fdt32_t* fdt_getprop(const void* fdt, int nodeoffset, const char* name, int* len);
+extern fdt32_t* fdt_append_prop(const void* fdt, int nodeoffset, const char* name, uint8_t* data, int32_t len);
+
+#ifndef FDT_MAX_NCELLS
+#define FDT_MAX_NCELLS (4)
+#endif
+
+#ifndef FDT_BAD_NCELLS
+#define FDT_BAD_NCELLS (14)
+#endif
+
+#ifndef FDT_NOT_FOUND
+#define FDT_NOT_FOUND (1)
+#endif
+
+#ifndef FDT_BAD_VALUE
+#define FDT_BAD_VALUE (15)
+#endif
+
+static int fdt_cells(const void* fdt, int nodeoffset, const char* name)
+{
+ const fdt32_t* c = null;
+ uint32_t val = 0;
+ int len = 0;
+
+ c = fdt_getprop(fdt, nodeoffset, name, &len);
+ if (c == null)
+ return len;
+
+ if (len != sizeof(*c))
+ return len;
+
+ val = fdt32_to_cpu(*c);
+ if (val > FDT_MAX_NCELLS)
+ return -FDT_BAD_NCELLS;
+
+ return (int)val;
+}
+
+int fdt_address_cells(const void* fdt, int nodeoffset)
+{
+ int val = 0;
+ val = fdt_cells(fdt, nodeoffset, "#address-cells");
+ if (val == 0)
+ return -FDT_BAD_NCELLS;
+
+ if (val == -FDT_NOT_FOUND)
+ return 2;
+
+ return (int)val;
+}
+
+int fdt_size_cells(const void* fdt, int nodeoffset)
+{
+ int val = 0;
+ val = fdt_cells(fdt, nodeoffset, "#size-cells");
+
+ if (val == -FDT_NOT_FOUND)
+ return 2;
+
+ return (int)val;
+}
+
+int fdt_append_prop_addr_range(void* fdt, int parent, int nodeoffset, const char* name, uint64_t addr, uint64_t size)
+{
+ int addr_cells, size_cells, ret;
+ uint8_t data[sizeof(fdt64_t) * 2], *prop;
+
+ ret = fdt_address_cells(fdt, nodeoffset);
+ if (ret < 0)
+ return ret;
+
+ addr_cells = ret;
+
+ ret = fdt_size_cells(fdt, nodeoffset);
+ if (ret < 0)
+ return ret;
+
+ size_cells = ret;
+
+ // check address validity
+ prop = data;
+ if (addr_cells == 1)
+ {
+ // seems to do a check according to two parameters.
+ // addr > __UINT32_MAX__ detects any out of range addresses?
+ // ((__UINT32_MAX__ + 1 - addr) < size check if it's lower than it's size
+
+ if ((addr > __UINT32_MAX__) || ((__UINT32_MAX__ + 1 - addr) < size))
+ return -FDT_BAD_VALUE;
+
+ // finally set the flat device tree.
+ fdt32_st(prop, (uint32_t)addr);
+ }
+ else if (addr_cells == 2)
+ {
+ // no need to check, apparently.
+ fdt64_st(prop, addr);
+ }
+ else
+ {
+ return -FDT_BAD_NCELLS;
+ }
+
+ // access size
+ prop += addr_cells * sizeof(fdt32_t);
+
+ if (size_cells == 1)
+ {
+ if (size > __UINT32_MAX__)
+ return -FDT_BAD_VALUE;
+
+ fdt32_st(prop, (uint32_t)size);
+ }
+ else if (size_cells == 2)
+ {
+ fdt64_st(prop, size);
+ }
+ else
+ {
+ return -FDT_BAD_NCELLS;
+ }
+
+ return fdt_append_prop(fdt, nodeoffset, name, data,
+ (addr_cells + size_cells) * sizeof(fdt32_t));
+}
diff --git a/libfdt/libfdt_empty_tree.c b/libfdt/libfdt_empty_tree.c
new file mode 100644
index 0000000..6c70312
--- /dev/null
+++ b/libfdt/libfdt_empty_tree.c
@@ -0,0 +1,49 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <libfdt/libfdt_env.h>
+
+extern int fdt_create(void* buf, int bufsize);
+extern int fdt_open_into(void* buf, void* into, int bufsize);
+extern int fdt_begin_node(void* buf, const char* name);
+extern int fdt_end_node(void* buf);
+extern int fdt_finish(void* buf);
+extern int fdt_finish_reverse_map(void* buf);
+
+#define fdt_check_err(err) \
+ if (err) \
+ return err
+
+/**
+ * @brief creates a empty tree with a specified buffer and size.
+ *
+ * @param buf the buffer.
+ * @param bufsize the size.
+ * @return int
+ */
+
+int fdt_create_empty_tree(void* buf, int bufsize)
+{
+ int err;
+ err = fdt_create(buf, bufsize);
+ fdt_check_err(err);
+
+ err = fdt_finish_reverse_map(buf);
+ fdt_check_err(err);
+
+ err = fdt_begin_node(buf, "");
+ fdt_check_err(err);
+
+ err = fdt_end_node(buf);
+ fdt_check_err(err);
+
+ err = fdt_finish(buf);
+ fdt_check_err(err);
+
+ return fdt_open_into(buf, buf, bufsize);
+}
+
+#undef fdt_check_err
diff --git a/libfdt/libfdt_env.h b/libfdt/libfdt_env.h
new file mode 100644
index 0000000..039e8cc
--- /dev/null
+++ b/libfdt/libfdt_env.h
@@ -0,0 +1,68 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#ifndef __SYS_FDT_H__
+#define __SYS_FDT_H__
+
+#include <lib/boot.h>
+
+#ifdef __USE_SPARSE__
+#define FDT_FORCE __attribute__((force))
+#define FDT_BITWISE __attribute__((bitwise))
+#else
+#define FDT_FORCE
+#define FDT_BITWISE
+#endif
+
+typedef uint16_t FDT_BITWISE fdt16_t;
+typedef uint32_t FDT_BITWISE fdt32_t;
+typedef uint64_t FDT_BITWISE fdt64_t;
+
+#define EXTRACT_BYTE(x, n) ((unsigned long long)((uint8_t*)&x)[n])
+#define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
+#define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
+ (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
+#define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
+ (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
+ (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
+ (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
+
+static inline uint16_t fdt16_to_cpu(fdt16_t x)
+{
+ return (FDT_FORCE uint16_t)CPU_TO_FDT16(x);
+}
+
+static inline fdt16_t cpu_to_fdt16(uint16_t x)
+{
+ return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x);
+}
+
+static inline uint32_t fdt32_to_cpu(fdt32_t x)
+{
+ return (FDT_FORCE uint32_t)CPU_TO_FDT32(x);
+}
+
+static inline fdt32_t cpu_to_fdt32(uint32_t x)
+{
+ return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x);
+}
+
+static inline uint64_t fdt64_to_cpu(fdt64_t x)
+{
+ return (FDT_FORCE uint64_t)CPU_TO_FDT64(x);
+}
+
+static inline fdt64_t cpu_to_fdt64(uint64_t x)
+{
+ return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x);
+}
+
+#undef CPU_TO_FDT64
+#undef CPU_TO_FDT32
+#undef CPU_TO_FDT16
+#undef EXTRACT_BYTE
+
+#endif //!__SYS_FDT_H__
diff --git a/libfdt/libfdt_strerror.c b/libfdt/libfdt_strerror.c
new file mode 100644
index 0000000..4002afc
--- /dev/null
+++ b/libfdt/libfdt_strerror.c
@@ -0,0 +1,75 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <libfdt/libfdt_env.h>
+#include <libfdt/libfdt.h>
+
+/***********************************************************************************/
+/* @brief FDT error reporting system */
+/***********************************************************************************/
+
+/// @brief Error information structure.
+struct fdt_err
+{
+ const char* e_str;
+};
+
+#define fdt_error(VAL) \
+ [(VAL)] = { \
+ .e_str = #VAL, \
+ }
+
+static struct fdt_err mp_fdtErrTbl[] = {
+ fdt_error(FDT_ERR_NOTFOUND),
+ fdt_error(FDT_ERR_EXISTS),
+ fdt_error(FDT_ERR_NOSPACE),
+
+ fdt_error(FDT_ERR_BADOFFSET),
+ fdt_error(FDT_ERR_BADPATH),
+ fdt_error(FDT_ERR_BADPHANDLE),
+ fdt_error(FDT_ERR_BADSTATE),
+
+ fdt_error(FDT_ERR_TRUNCATED),
+ fdt_error(FDT_ERR_BADMAGIC),
+ fdt_error(FDT_ERR_BADVERSION),
+ fdt_error(FDT_ERR_BADSTRUCTURE),
+ fdt_error(FDT_ERR_BADLAYOUT),
+ fdt_error(FDT_ERR_INTERNAL),
+ fdt_error(FDT_ERR_BADNCELLS),
+ fdt_error(FDT_ERR_BADVALUE),
+ fdt_error(FDT_ERR_BADOVERLAY),
+ fdt_error(FDT_ERR_NOPHANDLES),
+ fdt_error(FDT_ERR_BADFLAGS),
+ fdt_error(FDT_ERR_ALIGNMENT),
+};
+
+#define fdt_error_length() mpux_array_size(mp_fdtErrTbl)
+
+/// @brief Returns the error value as a string.
+/// @param errval
+/// @return
+const char* fdt_strerror(int32_t errval)
+{
+ if (errval > 0)
+ {
+ return ("<valid offset/length>");
+ }
+ else if (errval == 0)
+ {
+ return ("<no error>");
+ }
+ else if (-errval < fdt_error_length())
+ {
+ const char* serr = mp_fdtErrTbl[errval].e_str;
+
+ if (serr != null)
+ {
+ return serr;
+ }
+ }
+
+ return ("<unknown error>");
+}
diff --git a/pci-map/.gitkeep b/pci-map/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/pci-map/.gitkeep
diff --git a/pci-map/standard.json b/pci-map/standard.json
new file mode 100644
index 0000000..cf9c334
--- /dev/null
+++ b/pci-map/standard.json
@@ -0,0 +1,11 @@
+[
+ {
+ "Machine": "Standard PC",
+ "Type": "Desktop",
+ "Vendor": "Amlal EL Mahrouss.",
+ "FrameBuffer": "0x1000000",
+ "BootLoader": "0x4000000",
+ "PCITree": "0x8002000",
+ "ROM": "0xFFFF000"
+ }
+]
diff --git a/run_format.sh b/run_format.sh
new file mode 100755
index 0000000..cd22f98
--- /dev/null
+++ b/run_format.sh
@@ -0,0 +1,16 @@
+#!/bin/bash
+
+THIS_PATH="$(realpath "$0")"
+THIS_DIR="$(dirname "$THIS_PATH")"
+
+# Find all files in THIS_DIR which end in .ino, .cpp, etc., as specified
+# in the regular expression just below
+FILE_LIST="$(find "$THIS_DIR" | grep -E ".*(\.ino|\.cpp|\.c|\.h|\.hpp|\.hxx|\.cxx|\.cc|\.hh)$")"
+
+echo -e "Files found to format = \n\"\"\"\n$FILE_LIST\n\"\"\""
+
+# Format each file.
+# - NB: do NOT put quotes around `$FILE_LIST` below or else the `clang-format` command will
+# mistakenly see the entire blob of newline-separated file names as a SINGLE file name instead
+# of as a new-line separated list of *many* file names!
+clang-format --verbose -i --style=file $FILE_LIST
diff --git a/src/32x0/32x0_boot.32x b/src/32x0/32x0_boot.32x
new file mode 100644
index 0000000..44ee037
--- /dev/null
+++ b/src/32x0/32x0_boot.32x
@@ -0,0 +1,42 @@
+;; 32x0 Runtime zero routine
+;; org: 0x1000 (very different from the 64x0)
+;; interrupts: 0x800 (much like the 64x0)
+;; brief: jump to main
+
+;; Copyright 2024, Amlal EL Mahrouss, all rights reserved.
+
+%def ROMBOOT_BASE $1000
+
+org ROMBOOT_BASE
+
+move.w r0, __vector_interrupts_table
+move.w r1, __vector_interrupts_table_length
+move.w r2, 0
+
+__vector_L1:
+ move.b [r0+r2], [$800+r2]
+ incr r2
+ cmp r2, r1
+ je __vector_done
+ jmp __vector_L1
+
+__vector_done:
+ ;; forth interpreter and setup it's stack.
+ move.w sp, $7c00
+ jmp $8000
+
+ mh
+
+__vector_interrupts_table:
+ dw 0
+ dw 0
+ dw 0
+ dw 0
+ dw 0
+ dw 0
+ dw 0
+ dw 0
+ dw 0
+
+__vector_interrupts_table_length:
+ dw 9
diff --git a/src/64x0/.gitkeep b/src/64x0/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/src/64x0/.gitkeep
diff --git a/src/64x0/64x0_boot.64x b/src/64x0/64x0_boot.64x
new file mode 100644
index 0000000..6ee71b2
--- /dev/null
+++ b/src/64x0/64x0_boot.64x
@@ -0,0 +1,13 @@
+# 64x0 Runtime zero routine
+# org: 1M
+# interrupts: 1M - 2048
+# brief: jump to r16 which contains the code to jump on.
+
+# Copyright 2024, Amlal EL Mahrouss, all rights reserved.
+
+export .text __start
+ lda r15, 0x7c00
+ lda r16, 0x8000
+ mv r5, r15
+ mv r19, r16
+ jrl
diff --git a/src/amd64/amd64-boot.asm b/src/amd64/amd64-boot.asm
new file mode 100644
index 0000000..bcd6058
--- /dev/null
+++ b/src/amd64/amd64-boot.asm
@@ -0,0 +1,40 @@
+;; AMD64 CoreBoot Master Boot Program.
+;; Written by Amlal EL Mahrouss
+
+%define ENTRYPOINT 0x00FF
+
+[bits 16]
+[org ENTRYPOINT]
+
+amd64_bios_start:
+ cli
+ cld
+
+ mov ax, cs
+ mov ds, ax
+ mov es, ax
+ mov ss, ax
+ mov fs, ax
+
+ jmp amd64_bios_programmable_area
+ jmp 0x0000:0x7c00
+ jmp $
+
+amd64_vendor_information:
+ db "ZKA", 0
+ dw 0x010
+amd64_vendor_information_end:
+
+amd64_bios_programmable_area:
+ times 1024 nop
+ ret
+amd64_bios_programmable_area_end:
+
+times 2048-13-($-$$) nop
+
+;; SIZE: 13 Bytes.
+;; PURPOSE: BIOS Computer Metadata
+amd64_bios_entrypoint_area:
+ dw ENTRYPOINT ;; ENTRYPOINT.
+ db "13/21/2024" ;; DATE.
+ db 0x01 ;; VERSION.
diff --git a/src/amd64/amd64-test.asm b/src/amd64/amd64-test.asm
new file mode 100644
index 0000000..2a8bef8
--- /dev/null
+++ b/src/amd64/amd64-test.asm
@@ -0,0 +1,19 @@
+;; AMD64 CoreBoot Sample program.
+;; Written by Amlal EL Mahrouss
+
+[bits 16]
+[org 0x7c00]
+
+; --------------
+; Main entrypoint, just loop.
+; --------------
+amd64_main:
+ jmp $
+ cli
+ hlt
+
+times 512-6-2-2-($-$$) nop
+
+db "BOOT1", 0 ;; Payload
+dw 0x0100 ;; Version 1
+dw 0 ;; Binary Blob
diff --git a/src/amd64/amd64.sh b/src/amd64/amd64.sh
new file mode 100755
index 0000000..ea9efa0
--- /dev/null
+++ b/src/amd64/amd64.sh
@@ -0,0 +1,4 @@
+#! /bin/sh
+
+nasm amd64-boot.asm -f bin -o amd64-boot.rom
+nasm amd64-test.asm -f bin -o amd64-test.bin
diff --git a/src/arm64/arm64-30pin.c b/src/arm64/arm64-30pin.c
new file mode 100644
index 0000000..aca7628
--- /dev/null
+++ b/src/arm64/arm64-30pin.c
@@ -0,0 +1,13 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/partition-map.h>
+
+extern size_t mp_send_read_30pin(voidptr_t blob, size_t* size, size_t* start_lba);
+
+/// @note This version is for the 30-pin recovery system.
+
+struct TRB_PACKET; \ No newline at end of file
diff --git a/src/arm64/arm64-boot.S b/src/arm64/arm64-boot.S
new file mode 100644
index 0000000..c62a227
--- /dev/null
+++ b/src/arm64/arm64-boot.S
@@ -0,0 +1,15 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+.text
+
+.balign 4
+.global mp_reset_vector
+
+mp_reset_vector:
+ ldr sp, =__mp_stack_end
+ /* don't care about page_zero, it's gonna be a raw binary */
+ b mp_start_exec
diff --git a/src/arm64/arm64-err.c b/src/arm64/arm64-err.c
new file mode 100644
index 0000000..5877cca
--- /dev/null
+++ b/src/arm64/arm64-err.c
@@ -0,0 +1,23 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+
+/// BUGS: 0
+
+/// @brief Goes into a panic state.
+/// @param reason why?
+void mp_panic(const char* reason)
+{
+ mp_put_string("Error: ");
+ mp_put_string(reason);
+ mp_put_char('\n');
+
+ while (yes)
+ {
+ asm volatile("hlt #0");
+ }
+}
diff --git a/src/arm64/arm64-start-context.S b/src/arm64/arm64-start-context.S
new file mode 100644
index 0000000..389f958
--- /dev/null
+++ b/src/arm64/arm64-start-context.S
@@ -0,0 +1,17 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+.text
+.balign 4
+.global mp_start_context
+.global mp_boot_processor_ready
+
+mp_start_context:
+ bl mp_start_context
+ ldr pc, [lr]
+
+mp_boot_processor_ready:
+ ldr pc, [lr]
diff --git a/src/arm64/arm64-uart.c b/src/arm64/arm64-uart.c
new file mode 100644
index 0000000..fff3bbf
--- /dev/null
+++ b/src/arm64/arm64-uart.c
@@ -0,0 +1,54 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+#include <lib/string.h>
+
+/// BUGS: 0
+
+#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*)(mp_uart_ptr + addr))
+
+/* this file handles the UART */
+
+static uint32_t* mp_uart_ptr = (uint32_t*)SYS_UART_BASE;
+
+// we need that one, to avoid sending mutliple chars to UART.
+static boolean mp_locked_put_char = no;
+
+utf_char_t mp_get_char(void)
+{
+ while ((ARM64_MMIO_REG(0x018) & (1 << 4)))
+ {
+ }
+
+ return (utf_char_t)*mp_uart_ptr;
+}
+
+void mp_put_char(utf_char_t ch)
+{
+ while ((ARM64_MMIO_REG(0x018) & (1 << 5)))
+ {
+ }
+
+ *mp_uart_ptr = ch;
+}
+
+/// @brief UART put string
+/// @param text the input text.
+size_t mp_put_string(const char* text)
+{
+ if (text == nil)
+ return 0;
+
+ size_t i = 0;
+
+ for (; i < strlen(text); i++)
+ {
+ mp_put_char(text[i]);
+ }
+
+ return i;
+}
diff --git a/src/arm64/makefile b/src/arm64/makefile
new file mode 100644
index 0000000..19f88f5
--- /dev/null
+++ b/src/arm64/makefile
@@ -0,0 +1,69 @@
+ #
+ # ========================================================
+ #
+ # CoreBoot
+ # Date Added: 08/11/2023
+ # Copyright 2024, ZKA Technologies, all rights reserved.
+ #
+ # ========================================================
+ #
+
+CC=arm-none-eabi-gcc
+AS=arm-none-eabi-as
+
+FIRMWARE=boot.rom
+
+FLAGS=-c -D__COMPILE_ARM64__ -I../../ -Wall -c -nostdlib -ffreestanding -fno-builtin \
+ -D__BSTRICT__ -D__BDEBUG__
+
+C_SRC=$(wildcard *.c) $(wildcard ../*.c) -c
+
+AS_FLAGS= -c -I../../
+
+LD=arm-none-eabi-ld
+OBJ=*.o
+FLAGS_LD= --script=script.lds -o core-boot.elf -nostdlib
+
+EMU=qemu-system-arm
+EMU_FLAGS=-M virt -cpu cortex-a15 -kernel $(FIRMWARE) -s \
+ -drive file=bootstg2.rom,format=raw
+
+WAIT=sleep 1
+
+.PHONY: all
+all: firmware-link
+ @echo "[CoreBoot] build done."
+
+.PHONY: firmware-link
+firmware-link: firmware-compile
+ $(LD) $(OBJ) $(FLAGS_LD)
+
+.PHONY: rom
+rom:
+ qemu-img create -f qcow2 epm.img 256M
+ qemu-img create -f raw boot.rom 512K
+ qemu-img create -f raw bootstg2.rom 64M
+ dd if=core-boot.elf of=boot.rom bs=1 seek=0 conv=notrunc
+
+# compile firmware
+.PHONY: firmware-compile
+firmware-compile:
+ $(CC) $(FLAGS) $(C_SRC)
+ $(AS) -march=armv7-a -mcpu=cortex-a15 arm64-start-context.S -o arm64-start-context.o
+ $(AS) -march=armv7-a -mcpu=cortex-a15 arm64-boot.S -o arm64-boot.o
+
+
+# launch qemu rule
+.PHONY: run
+run:
+ $(EMU) $(EMU_FLAGS)
+
+# launch qemu with attached debugger
+.PHONY: run-dbg
+run-dbg:
+ $(EMU) $(EMU_FLAGS)
+
+# remove object files
+.PHONY: clean
+clean:
+ rm -f $(wildcard *.o) $(wildcard *.elf) $(wildcard *.rom) $(wildcard *.epm)
diff --git a/src/arm64/script.lds b/src/arm64/script.lds
new file mode 100644
index 0000000..37bd647
--- /dev/null
+++ b/src/arm64/script.lds
@@ -0,0 +1,14 @@
+ENTRY(mp_reset_vector)
+SECTIONS
+{
+ . = 0x40100000;
+
+ .text : { *(.text) }
+ .data : { *(.data) }
+ .bss : { *(.bss COMMON) }
+ . = ALIGN(8);
+ . = . + 0x1000; /* 4kB of stack memory */
+ __mp_stack_end = .;
+
+ PROVIDE(mp_memory_end = .);
+}
diff --git a/src/compile_flags.txt b/src/compile_flags.txt
new file mode 100644
index 0000000..c76ae60
--- /dev/null
+++ b/src/compile_flags.txt
@@ -0,0 +1,3 @@
+-std=c17
+-I../
+-I../lib
diff --git a/src/coreboot-ahci-driver.c b/src/coreboot-ahci-driver.c
new file mode 100644
index 0000000..aae3169
--- /dev/null
+++ b/src/coreboot-ahci-driver.c
@@ -0,0 +1,108 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+/**
+ * @file coreboot-ahci-driver.cc
+ * @author Amlal EL Mahrouss (amlal@el-mahrouss-logic.com)
+ * @brief PowerPC Disk support, via AHCI.
+ * @version 0.2
+ * @date 2024-01-16
+ *
+ * @copyright Copyright (c) 2024, Amlal EL Mahrouss.
+ *
+ */
+
+#include <lib/pci-tree.h>
+#include <lib/boot.h>
+
+#define SYS_AHCI_DRIVER_NAME ("@ahci")
+
+/// BUGS: 0
+/// @brief AHCI support for PowerPC.
+
+/// @brief AHCI HBA port.
+typedef struct hba_port
+{
+ uint32_t clb; // 0x00, command list base address, 1K-byte aligned
+ uint32_t clbu; // 0x04, command list base address upper 32 bits
+ uint32_t fb; // 0x08, FIS base address, 256-byte aligned
+ uint32_t fbu; // 0x0C, FIS base address upper 32 bits
+ uint32_t is; // 0x10, interrupt status
+ uint32_t ie; // 0x14, interrupt enable
+ uint32_t cmd; // 0x18, command and status
+ uint32_t reserved0; // 0x1C, Reserved
+ uint32_t tfd; // 0x20, task file data
+ uint32_t sig; // 0x24, signature
+ uint32_t ssts; // 0x28, SATA status (SCR0:SStatus)
+ uint32_t sctl; // 0x2C, SATA control (SCR2:SControl)
+ uint32_t serr; // 0x30, SATA error (SCR1:SError)
+ uint32_t sact; // 0x34, SATA active (SCR3:SActive)
+ uint32_t ci; // 0x38, command issue
+ uint32_t sntf; // 0x20, SATA notification (SCR4:SNotification)
+ uint32_t fbs; // 0x40, FIS-based switch control
+ uint32_t reserved1[11]; // 0x44 ~ 0x6F, Reserved
+ uint32_t vendor[4]; // 0x70 ~ 0x7F, vendor specific
+} hba_port_t;
+
+/// @brief Check if port is active.
+/// @param port host bus address port.
+/// @return
+static boolean hba_port_active(volatile hba_port_t* port)
+{
+ if (!port)
+ return false;
+
+ return port->sact;
+}
+
+/// @brief Start HBA command.
+/// @param port host bus address port.
+/// @return
+static boolean hba_start_cmd(volatile hba_port_t* port)
+{
+ if (!port)
+ return false;
+
+ size_t timeout = 1000000;
+
+ while ((port->cmd & 0x8000))
+ {
+ if (!timeout)
+ return false;
+
+ --timeout;
+ }
+
+ port->cmd |= 0x0001;
+ port->cmd |= 0x0010;
+
+ return true;
+}
+
+/// @brief Stop HBA command.
+/// @param port host bus address port.
+/// @return
+static boolean hba_stop_cmd(volatile hba_port_t* port)
+{
+ if (!port)
+ return false;
+
+ port->cmd &= ~0x0001;
+ port->cmd &= ~0x0010;
+
+ while (1)
+ {
+ if ((port->cmd & 0x8000))
+ continue;
+
+ if ((port->cmd & 0x4000))
+ continue;
+
+ break;
+ }
+
+ return true;
+}
diff --git a/src/coreboot-cpu-api.c b/src/coreboot-cpu-api.c
new file mode 100644
index 0000000..2f104c4
--- /dev/null
+++ b/src/coreboot-cpu-api.c
@@ -0,0 +1,22 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+
+/// @brief Restarts the computer.
+/// @param none.
+void mp_restart_machine(void)
+{
+#ifdef __COMPILE_RISCV__
+ volatile uint32_t* brd_pwr = (volatile uint32_t*)0x100000;
+ *brd_pwr = 0x7777; // send reboot signal from DMA.
+
+ while (1)
+ {
+ asm volatile("wfi");
+ }
+#endif
+}
diff --git a/src/coreboot-cxx-abi.cc b/src/coreboot-cxx-abi.cc
new file mode 100644
index 0000000..a035e78
--- /dev/null
+++ b/src/coreboot-cxx-abi.cc
@@ -0,0 +1,91 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/cxx-abi.h>
+
+/// BUGS: 0
+
+extern "C" __SIZE_TYPE__ mp_put_string(const char* text);
+extern "C" void mp_panic(const char* reason);
+
+extern "C" void __stack_chk_fail()
+{
+ mp_put_string("[stack-canary] Buffer overflow detected, halting...\n");
+ mp_panic("stack_canary_fail");
+}
+
+void* __dso_handle;
+
+extern "C" __SIZE_TYPE__ mp_put_string(const char* text);
+extern "C" void mp_panic(const char* reason);
+
+atexit_func_entry_t __atexit_funcs[DSO_MAX_OBJECTS];
+uarch_t __atexit_func_count;
+
+extern "C" void __cxa_pure_virtual()
+{
+ mp_put_string("[__cxa_pure_virtual] Placeholder\n");
+}
+
+extern "C" int __cxa_atexit(void (*f)(void*), void* arg, void* dso)
+{
+ if (__atexit_func_count >= DSO_MAX_OBJECTS)
+ return -1;
+
+ __atexit_funcs[__atexit_func_count].destructor_func = f;
+ __atexit_funcs[__atexit_func_count].obj_ptr = arg;
+ __atexit_funcs[__atexit_func_count].dso_handle = dso;
+
+ __atexit_func_count++;
+
+ return 0;
+}
+
+extern "C" void __cxa_finalize(void* f)
+{
+ uarch_t i = __atexit_func_count;
+ if (!f)
+ {
+ while (i--)
+ {
+ if (__atexit_funcs[i].destructor_func)
+ {
+ (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
+ };
+ }
+
+ return;
+ }
+
+ while (i--)
+ {
+ if (__atexit_funcs[i].destructor_func)
+ {
+ (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
+ __atexit_funcs[i].destructor_func = 0;
+ };
+ }
+}
+
+namespace cxxabiv1
+{
+ extern "C" int __cxa_guard_acquire(__guard* g)
+ {
+ (void)g;
+ return 0;
+ }
+
+ extern "C" int __cxa_guard_release(__guard* g)
+ {
+ *(char*)g = 1;
+ return 0;
+ }
+
+ extern "C" void __cxa_guard_abort(__guard* g)
+ {
+ (void)g;
+ }
+} // namespace cxxabiv1
diff --git a/src/coreboot-partition-map-parse.c b/src/coreboot-partition-map-parse.c
new file mode 100644
index 0000000..b4647ae
--- /dev/null
+++ b/src/coreboot-partition-map-parse.c
@@ -0,0 +1,58 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/partition-map.h>
+
+bool mp_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz)
+{
+ if (!start_lba ||
+ !end_lba ||
+ !blob ||
+ !blob_sz ||
+ !sector_sz ||
+ (sizeof(part_block_t) * index) > blob_sz)
+ return false;
+
+ part_block_t* block = (part_block_t*)(block + (sizeof(part_block_t) * index));
+
+ if (block->version != EPM_REVISION ||
+ block->num_blocks < 1 ||
+ block->num_blocks > EPM_MAX_BLKS ||
+ strcmp(block->magic, EPM_MAGIC) > 0 ||
+ block->lba_end == 0 ||
+ block->lba_start == 0)
+ {
+ return false;
+ }
+
+ *end_lba = block->lba_end;
+ *start_lba = block->lba_start;
+ *sector_sz = block->sector_sz;
+
+ return true;
+}
+
+part_block_t* mp_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index)
+{
+ if (!blob ||
+ !blob_sz ||
+ (sizeof(part_block_t) * index) > blob_sz)
+ return nil;
+
+ part_block_t* block = (part_block_t*)(block + (sizeof(part_block_t) * index));
+
+ if (block->version != EPM_REVISION ||
+ block->num_blocks < 1 ||
+ block->num_blocks > EPM_MAX_BLKS ||
+ strcmp(block->magic, EPM_MAGIC) > 0 ||
+ block->lba_end == 0 ||
+ block->lba_start == 0)
+ {
+ return nil;
+ }
+
+ return block;
+} \ No newline at end of file
diff --git a/src/coreboot-partition-map.c b/src/coreboot-partition-map.c
new file mode 100644
index 0000000..64ee94d
--- /dev/null
+++ b/src/coreboot-partition-map.c
@@ -0,0 +1,37 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/partition-map.h>
+#include <lib/string.h>
+
+// include this for documentation.
+
+#define MP_FILESYSTEM_COUNT 3
+#define MP_FILESYSTEM_LIST \
+ { \
+ "NeFS", "HPFS", "HFS+" \
+ }
+
+/// @brief check if filesystem is supported by CoreBoot.
+/// @param fs the filesystem magic, as provided by EPM.
+boolean mp_filesystem_exists(caddr_t fs, size_t len)
+{
+ if (fs == nil ||
+ *fs == 0)
+ return no;
+
+ char* fs_list[] = MP_FILESYSTEM_LIST;
+
+ for (size_t fs_index = 0; fs_index < MP_FILESYSTEM_COUNT; fs_index++)
+ {
+ if (strncmp(fs_list[fs_index], fs, strlen(fs_list[fs_index])) == 0)
+ {
+ return yes;
+ }
+ }
+
+ return no;
+}
diff --git a/src/coreboot-pci-tree.c b/src/coreboot-pci-tree.c
new file mode 100644
index 0000000..e5082d2
--- /dev/null
+++ b/src/coreboot-pci-tree.c
@@ -0,0 +1,106 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+/**
+ * @file coreboot-pci-tree.c
+ * @author Amlal EL Mahrouss (amlal@el-mahrouss-logic.com)
+ * @brief PCI tree implementation.
+ * @version 0.1
+ * @date 2024-01-22
+ *
+ * @copyright Copyright (c) 2024 Amlal EL Mahrouss
+ *
+ */
+
+#include <lib/pci-tree.h>
+#include <lib/string.h>
+
+/// BUGS: 0
+
+/// Standard Root table (Mahrouss Table)
+#define SYS_PCI_ROOT_NAME "/elmh/@/"
+
+static struct hw_mp_pci_tree* mp_base_tree = nil;
+static struct hw_mp_pci_tree* mp_latest_tree = nil;
+static struct hw_mp_pci_tree* mp_last_tree = nil;
+
+/// \brief Init the PCI device tree structure.
+/// \return if it already exists -> false
+/// Otherwise true.
+boolean mp_pci_init_tree(void)
+{
+ mp_base_tree = (struct hw_mp_pci_tree*)(SYS_PCI_TREE_BASE);
+
+ // huh? anyway let's ignore it then.
+ if (mp_base_tree->d_magic != SYS_PCI_DEV_MAGIC)
+ {
+ mp_base_tree->d_magic = SYS_PCI_DEV_MAGIC;
+
+ memncpy(mp_base_tree->d_name, SYS_PCI_ROOT_NAME, strlen(SYS_PCI_ROOT_NAME));
+
+ mp_base_tree->d_next_sibling = 0;
+ mp_base_tree->d_off_props = 0;
+ mp_base_tree->d_sz_struct = 0;
+ mp_base_tree->d_sz_props = 0;
+ mp_base_tree->d_off_struct = 0;
+ mp_base_tree->d_version = SYS_PCI_VERSION;
+
+ mp_base_tree->d_next_sibling =
+ (mp_pci_num_t)(mp_base_tree + sizeof(struct hw_mp_pci_tree));
+ mp_base_tree->d_first_node = (mp_pci_num_t)mp_base_tree;
+
+ mp_put_string(">> Append root device: " SYS_PCI_ROOT_NAME "\r\n");
+ }
+
+ mp_latest_tree = mp_base_tree;
+
+ return yes;
+}
+
+/// \brief Adds a new device to the tree.
+/// \param name the device name.
+/// \param struct_ptr the struct containing the device.
+/// \param struct_sz the structure size.
+boolean mp_pci_append_tree(const caddr_t name, mp_pci_num_t struct_ptr, mp_pci_num_t struct_sz)
+{
+ if (!name || *name == 0 || mp_latest_tree == nil)
+ return no;
+
+ struct hw_mp_pci_tree* mp_pci_tree = (struct hw_mp_pci_tree*)(mp_latest_tree);
+
+ while (mp_pci_tree->d_magic == SYS_PCI_DEV_MAGIC)
+ {
+ if (strcmp(mp_pci_tree->d_name, name) == 0)
+ return no;
+
+ mp_pci_tree =
+ (struct hw_mp_pci_tree*)(mp_pci_tree +
+ sizeof(struct hw_mp_pci_tree));
+ }
+
+ mp_pci_tree->d_magic = SYS_PCI_DEV_MAGIC;
+
+ memncpy(mp_pci_tree->d_name, name, strlen(name));
+
+ mp_pci_tree->d_off_struct = struct_ptr;
+ mp_pci_tree->d_sz_struct = struct_sz;
+ mp_pci_tree->d_off_props = 0;
+ mp_pci_tree->d_sz_props = 0;
+ mp_pci_tree->d_version = SYS_PCI_VERSION;
+
+ mp_pci_tree->d_next_sibling =
+ (mp_pci_num_t)(mp_pci_tree + sizeof(struct hw_mp_pci_tree));
+ mp_pci_tree->d_first_node = (mp_pci_num_t)mp_latest_tree;
+
+ mp_latest_tree = mp_pci_tree;
+ mp_last_tree = mp_pci_tree;
+
+ mp_put_string(">> Append device: ");
+ mp_put_string(name);
+ mp_put_string("\r\n");
+
+ return yes;
+}
diff --git a/src/coreboot-print-name.c b/src/coreboot-print-name.c
new file mode 100644
index 0000000..0ce81f8
--- /dev/null
+++ b/src/coreboot-print-name.c
@@ -0,0 +1,28 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+
+/// @brief Print firmware name.
+/// @param
+void mp_print_name(void)
+{
+#ifdef __COMPILE_POWERPC__
+ mp_put_string(">> CoreBoot for POWER.\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_ARM64__
+ mp_put_string(">> CoreBoot for ARM64.\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_AMD64__
+ mp_put_string(">> CoreBoot for AMD64.\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_RISCV__
+ mp_put_string(">> CoreBoot for RISC-V.\r\n");
+#endif // __COMPILE_POWERPC__
+}
diff --git a/src/coreboot-start.c b/src/coreboot-start.c
new file mode 100644
index 0000000..295ffee
--- /dev/null
+++ b/src/coreboot-start.c
@@ -0,0 +1,136 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/mp-bit.h>
+#include <lib/partition-map.h>
+#include <lib/pci-tree.h>
+#include <lib/boot.h>
+
+/// BUGS: 0
+
+/////////////////////////////////////////////////////////////////////////////////////////
+
+// @name start.c //
+
+// @brief Start file // This is where the firmware starts it's initialization //
+// code. //
+
+// @author Amlal EL Mahrouss //
+
+/////////////////////////////////////////////////////////////////////////////////////////
+
+extern void mp_append_scsi_tree(void);
+extern void mp_append_video_tree(void);
+
+extern void mp_start_context(uintptr_t);
+extern void mp_start_rom(void);
+
+extern int mp_boot_processor_ready;
+
+/// @brief hardware thread counter.
+uint64_t __mp_hart_counter = 0UL;
+
+/// @brief Start executing the firmware.
+/// @param
+void mp_start_exec(void)
+{
+ ++__mp_hart_counter;
+
+ uintptr_t hart = __mp_hart_counter;
+
+ mp_sync_synchronize();
+
+ // let the hart 0 init our stuff.
+ if (hart == 1)
+ {
+ mp_put_string("TQ> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
+ mp_put_string(__DATE__);
+ mp_put_string("\r\r\n");
+
+#ifdef __COMPILE_POWERPC__
+ mp_put_string("TQ> CPU: PowerPC 64-bit Based SoC.\r\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_AMD64__
+ mp_put_string("TQ> CPU: x64 Based SoC.\r\r\n");
+#endif // __COMPILE_AMD64__
+
+#ifdef __COMPILE_ARM64__
+ mp_put_string("TQ> CPU: AArch64 Based SoC.\r\r\n");
+#endif // __COMPILE_ARM64__
+
+#ifdef __COMPILE_ARM32__
+ mp_put_string("TQ> CPU: AArch32 Based SoC.\r\r\n");
+#endif // __COMPILE_ARM64__
+
+#ifdef __COMPILE_RISCV__
+ mp_put_string("TQ> CPU: RV64 Based SoC.\r\r\n");
+#endif // __COMPILE_RISCV__
+ }
+
+ /// @brief Boots here if LX header matches what we except.
+
+ volatile struct mp_boot_header* boot_hdr =
+ (volatile struct mp_boot_header*)(SYS_FLASH_BASE_ADDR);
+
+ /**
+ boot if:
+ - ident matches.
+ - version matches.
+ */
+
+ if (boot_hdr->h_mag[0] == SYS_BOOT_MAG_0 &&
+ boot_hdr->h_mag[1] == SYS_BOOT_MAG_1)
+ {
+ if (boot_hdr->h_revision != SYS_BOOT_VER)
+ {
+ if (hart == 1)
+ {
+ mp_put_string("TQ> Can't Boot the Stage2, invalid signature. (CB0003)\r\n");
+ }
+ }
+ else
+ {
+ if (hart == 1)
+ {
+ mp_put_string("TQ> Executing Stage2: ");
+ mp_put_string((const char*)boot_hdr->h_name);
+ mp_put_char('\r');
+ mp_put_char('\n');
+
+ // printf("TQ> address: %x\n", boot_hdr->h_start_address);
+ }
+
+ if (boot_hdr->h_start_address != 0)
+ {
+ mp_boot_processor_ready = 1;
+ mp_start_context(boot_hdr->h_start_address);
+ }
+
+ mp_put_string("TQ> Stage2 has returned? (CB0002)\r\n");
+ }
+ }
+ else
+ {
+ if (hart == 1)
+ {
+ mp_put_string("TQ> Can't boot to Stage2. (CB0001)\r\n");
+ }
+ }
+
+ /// end of TODO
+
+ if (hart > 1)
+ {
+ while (1)
+ {
+ if (__mp_hart_counter == 0)
+ {
+ mp_restart_machine();
+ }
+ }
+ }
+}
diff --git a/src/coreboot-string.c b/src/coreboot-string.c
new file mode 100644
index 0000000..88b5efa
--- /dev/null
+++ b/src/coreboot-string.c
@@ -0,0 +1,185 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+/**
+ * @file coreboot-string.c
+ * @author Amlal EL Mahrouss (amlal@el-mahrouss-logic.com)
+ * @brief string library.
+ * @version 0.1
+ * @date 2024-01-16
+ *
+ * @copyright Copyright (c) 2024 Amlal EL Mahrouss
+ *
+ */
+
+#include <lib/string.h>
+
+/// BUGS: 0
+
+size_t strncmp(const char* src, const char* cmp, size_t size)
+{
+ if (src == nil)
+ return 0;
+
+ int32_t counter = 0;
+
+ for (size_t index = 0; index < size; ++index)
+ {
+ if (src[index] != cmp[index])
+ ++counter;
+ }
+
+ return counter;
+}
+
+void* memset(void* ptr, const char value, size_t len)
+{
+ if (ptr == nil)
+ return nil;
+
+ char* start = ptr;
+
+ while (len)
+ {
+ *start = value;
+ ++start;
+
+ --len;
+ }
+
+ return (void*)start;
+}
+
+void* memmove(void* dest, const void* src, size_t len)
+{
+ memncpy(dest, src, len);
+ return dest;
+}
+
+size_t memcpy(void* dst, const void* src)
+{
+ if (src == nil || dst == nil)
+ return 0;
+
+ const char* src_chr = src;
+ char* dst_chr = dst;
+ size_t index = 0;
+ size_t len = strlen(src);
+
+ while (index < len)
+ {
+ dst_chr[index] = src_chr[index];
+ ++index;
+ }
+
+ return 0;
+}
+
+/* @brief unoptimized memcpy, TODO: use isa specific memcpy. */
+size_t memncpy(void* dst, const void* src, size_t len)
+{
+#if __OL == 3 && defined(__riscv)
+ riscv_memncpy(dst, src, len);
+#else
+
+ if (src == nil || dst == nil)
+ return 0;
+
+ const char* src_chr = src;
+ char* dst_chr = dst;
+ size_t index = 0;
+
+ while (index < len)
+ {
+ dst_chr[index] = src_chr[index];
+ ++index;
+ }
+
+ return 0;
+#endif
+}
+
+size_t strlen(const char* str)
+{
+ if (*str == 0)
+ return 0;
+
+ size_t len = 0;
+ while (str[len] != '\0')
+ ++len;
+
+ return len;
+}
+
+size_t strnlen(const char* str, size_t len)
+{
+ size_t cnt = 0;
+
+ while (len > cnt)
+ {
+ ++cnt;
+
+ if (str[cnt] == '\0')
+ return (size_t)-1;
+ }
+
+ return len;
+}
+
+void strreverse(char* s)
+{
+ if (s == nil)
+ return;
+ if (*s == '\0')
+ return;
+
+ char *first, *last, temp;
+
+ first = s;
+ last = s + strlen(s) - 1;
+
+ while (first != last)
+ {
+ temp = *first;
+ *(first++) = *last;
+ *(last--) = temp;
+ }
+}
+
+char* strchr(char* str, const char chr)
+{
+ while (*str != chr)
+ {
+ ++str;
+
+ if (*str == 0)
+ return nil;
+ }
+
+ return str;
+}
+
+/// @brief Compare two strings.
+/// @param src source string
+/// @param cmp string to compare.
+/// @return
+size_t strcmp(caddr_t src, caddr_t cmp)
+{
+ if (src == null || *src == 0)
+ return 1;
+ if (cmp == null || *cmp == 0)
+ return 1;
+
+ int32_t counter = 0;
+
+ for (size_t index = 0; src[index] != 0; ++index)
+ {
+ if (cmp[index] != src[index])
+ ++counter;
+ }
+
+ return counter;
+}
diff --git a/src/custom_hw/coreboot-flash.c b/src/custom_hw/coreboot-flash.c
new file mode 100644
index 0000000..1416bc3
--- /dev/null
+++ b/src/custom_hw/coreboot-flash.c
@@ -0,0 +1,10 @@
+/* -------------------------------------------
+
+Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/mp-bit.h>
+#include <lib/partition-map.h>
+#include <lib/pci-tree.h>
+#include <lib/boot.h>
diff --git a/src/ppc64/.gdbinit b/src/ppc64/.gdbinit
new file mode 100644
index 0000000..bdf82ae
--- /dev/null
+++ b/src/ppc64/.gdbinit
@@ -0,0 +1,3 @@
+set disassemble-next-line on
+target remote : 1234
+
diff --git a/src/ppc64/.gitkeep b/src/ppc64/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/src/ppc64/.gitkeep
diff --git a/src/ppc64/linkscript.ld b/src/ppc64/linkscript.ld
new file mode 100644
index 0000000..da9209c
--- /dev/null
+++ b/src/ppc64/linkscript.ld
@@ -0,0 +1,15 @@
+ENTRY(mp_reset_vector)
+SECTIONS
+{
+ . = 0xf00000;
+
+ .startup . : { ppc64-boot.o(.text) }
+ .text : { *(.text) }
+ .data : { *(.data) }
+ .bss : { *(.bss COMMON) }
+ . = ALIGN(8);
+ . = . + 0x1000; /* 4kB of stack memory */
+ stack_top = .;
+
+ PROVIDE(mp_memory_end = .);
+}
diff --git a/src/ppc64/makefile b/src/ppc64/makefile
new file mode 100644
index 0000000..9098a05
--- /dev/null
+++ b/src/ppc64/makefile
@@ -0,0 +1,66 @@
+ #
+ # ========================================================
+ #
+ # CoreBoot
+ # Date Added: 08/11/2023
+ # Copyright 2024, ZKA Technologies, all rights reserved.
+ #
+ # ========================================================
+ #
+
+CC=powerpc-linux-gnu-gcc
+AS=powerpc-linux-gnu-as
+
+FIRMWARE=boot.rom
+
+FLAGS=-c -mcpu=e5500 -D__COMPILE_POWERPC__ -I../../ -Wall -c -nostdlib -ffreestanding -fno-builtin \
+ -D__BSTRICT__ -D__BDEBUG__
+
+C_SRC=$(wildcard *.c) $(wildcard ../*.c) -c
+
+AS_FLAGS= -c -I../../
+
+LD=powerpc-linux-gnu-ld
+OBJ=*.o
+FLAGS_LD= --script=linkscript.ld -o core-boot.elf -nostdlib
+
+EMU=qemu-system-ppc64
+EMU_FLAGS= -drive file=epm.img,media=disk,snapshot=off,format=raw \
+ -device virtio-scsi-pci,id=scsi -smp 4 -device VGA -cpu e5500 -d guest_errors,unimp \
+ -M ppce500 -bios $(FIRMWARE) -s
+
+WAIT=sleep 1
+
+IMG_CMD=qemu-img create -f qcow2 epm.img 256M
+
+.PHONY: all
+all: firmware-link
+ @echo "[CoreBoot] build done."
+
+.PHONY: firmware-link
+firmware-link: firmware-compile
+ $(LD) $(OBJ) $(FLAGS_LD)
+ $(IMG_CMD)
+ qemu-img create -f raw boot.rom 512K
+ dd if=core-boot.elf of=boot.rom bs=1 seek=0 conv=notrunc
+
+# compile firmware
+.PHONY: firmware-compile
+firmware-compile:
+ $(CC) $(FLAGS) $(C_SRC)
+ $(AS) $(AS_FLAGS) ppc64-boot.S -o ppc64-boot.o
+
+# launch qemu rule
+.PHONY: run
+run:
+ $(EMU) $(EMU_FLAGS)
+
+# launch qemu with attached debugger
+.PHONY: run-dbg
+run-dbg:
+ $(EMU) $(EMU_FLAGS)
+
+# remove object files
+.PHONY: clean
+clean:
+ rm -f $(wildcard *.o) $(wildcard *.elf) $(wildcard *.rom) $(wildcard *.epm)
diff --git a/src/ppc64/ppc64-boot.S b/src/ppc64/ppc64-boot.S
new file mode 100644
index 0000000..f28b4f3
--- /dev/null
+++ b/src/ppc64/ppc64-boot.S
@@ -0,0 +1,56 @@
+.balign 4
+.section .text
+
+.global mp_reset_vector
+
+mp_reset_vector:
+ bl .Laddr /* get current address */
+.Laddr:
+ mflr 4 /* real address of .Laddr */
+ lwz 0,(.Lstk-.Laddr)(4) /* stack address location */
+ mr 1,0 /* use user defined stack */
+
+ addi 1,1,-4 /* make sure we don't overwrite debug mem */
+ lis 0,0
+ stw 0,0(1) /* clear back chain */
+ stwu 1,-64(1) /* push another stack frame */
+
+ /* Let her rip */
+
+ bl mp_init_hw
+ /* finally execute the firmware */
+ bl mp_start_exec
+ /* return value from main is argument to exit */
+ bl mp_reset_vector
+
+ trap
+
+.global mp_start_rom
+.global mp_start_context
+.global mp_boot_processor_ready
+
+.equ SYS_BOOT_ADDR, 0x1030000
+
+mp_start_rom:
+ lis 3, SYS_BOOT_ADDR@h
+ addi 3, 3, SYS_BOOT_ADDR@l
+
+ blr
+
+mp_start_context:
+ li 4, 0
+ cmp 0, 0, 4, 3
+ blt run_context
+ mr 3, 31
+ blr
+run_context:
+ blr /* r3 is filled here */
+
+.Lstk:
+/* .long __stack*/
+ .long stack_top
+
+.data
+
+mp_boot_processor_ready:
+ .word 0
diff --git a/src/ppc64/ppc64-err.c b/src/ppc64/ppc64-err.c
new file mode 100644
index 0000000..ebf8452
--- /dev/null
+++ b/src/ppc64/ppc64-err.c
@@ -0,0 +1,23 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+
+/// BUGS: 0
+
+/// @brief Goes into a panic state.
+/// @param reason why?
+void mp_panic(const char* reason)
+{
+ mp_put_string("Error: ");
+ mp_put_string(reason);
+ mp_put_char('\n');
+
+ while (yes)
+ {
+ (void)0;
+ }
+}
diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
new file mode 100644
index 0000000..827471b
--- /dev/null
+++ b/src/ppc64/ppc64-hal.c
@@ -0,0 +1,97 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/ppc64/mmu.h>
+#include <lib/ppc64/processor.h>
+
+#include <lib/pci-tree.h>
+#include <lib/boot.h>
+
+void mp_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)
+{
+ mtspr(MAS0, mas0);
+ mtspr(MAS1, mas1);
+ mtspr(MAS2, mas2);
+ mtspr(MAS3, mas3);
+ mtspr(MAS7, mas7);
+
+ mp_flush_tlb();
+}
+
+void mp_set_tlb(uint8_t tlb,
+ uint32_t epn,
+ uint64_t rpn,
+ uint8_t perms,
+ uint8_t wimge,
+ uint8_t ts,
+ uint8_t esel,
+ uint8_t tsize,
+ uint8_t iprot)
+{
+ if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1))
+ {
+ // this mmu-version does not allow odd tsize values
+ return;
+ }
+ uint32_t mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
+ uint32_t mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
+ uint32_t mas2 = FSL_BOOKE_MAS2(epn, wimge);
+ uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
+ uint32_t mas7 = FSL_BOOKE_MAS7(rpn);
+
+ mp_write_tlb(mas0, mas1, mas2, mas3, mas7);
+}
+
+/// @brief Init hardware before jumping to kernel.
+/// @param
+void mp_init_hw(void)
+{
+
+ /// amlal:
+ /// map VGA framebuffer
+ mp_set_tlb(0, SYS_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
+ 0x0000A000, /* p_addr. 0x0000A0000 */
+ MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
+ MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
+ 0, /* ts i.e AS=0 */
+ 1, /* esel (a.k.a tlb_index*/
+ BOOKE_PAGESZ_64K, /* tsize ie 2^10kB ie 1MB */
+ 1);
+
+ // map ccsrbar and uart.
+ // at start we execute from esel = 0, so chose something else..
+ mp_set_tlb(1, SYS_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
+ 0xfe0000000, /* p_addr. 0xfe0000000 */
+ MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
+ MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
+ 0, /* ts i.e AS=0 */
+ 2, /* esel (a.k.a tlb_index*/
+ BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
+ 1);
+
+ /// amlal:
+ /// map pci base for kernel
+ mp_set_tlb(0, SYS_BASE_ADDRESS, /* v_addr, 0xFE008000 */
+ 0xFE0008000, /* p_addr. 0xfe0000000 */
+ MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
+ MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
+ 0, /* ts i.e AS=0 */
+ 3, /* esel (a.k.a tlb_index*/
+ BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
+ 1);
+
+ mp_pci_init_tree();
+
+ mp_pci_append_tree("@fb", SYS_FRAMEBUFFER_ADDR, 0x0);
+ mp_pci_append_tree("@mbci", 0x0, 0x0);
+ mp_pci_append_tree("@serial", SYS_UART_BASE, 0);
+ mp_pci_append_tree("@pci", SYS_BASE_ADDRESS, 0x0);
+}
+
+void mp_flush_tlb(void)
+{
+ asm volatile("isync;tlbwe;msync;isync");
+};
diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c
new file mode 100644
index 0000000..23aeebd
--- /dev/null
+++ b/src/ppc64/ppc64-uart.c
@@ -0,0 +1,48 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/string.h>
+#include <lib/boot.h>
+
+/// BUGS: 0
+
+#define SYS_NS16550_COM1 (SYS_UART_BASE + 0x4500)
+#define SYS_NS16550_COM2 (SYS_UART_BASE + 0x4600)
+
+volatile ascii_char_t* const UART0DR = (ascii_char_t*)SYS_NS16550_COM1;
+
+/* this file handles the UART */
+
+/// @brief Get character from UART.
+/// @param
+/// @return
+utf_char_t mp_get_char(void)
+{
+ while (!(*(((volatile uint8_t*)UART0DR) + 0x05) & 0x01))
+ ;
+ return (utf_char_t)*UART0DR;
+}
+
+/// @brief Put character into UART.
+/// @param ch
+void mp_put_char(utf_char_t ch)
+{
+ *UART0DR = (ascii_char_t)(ch);
+}
+
+/// @brief Put string in UART.
+/// @param text the input text.
+size_t mp_put_string(const char* text)
+{
+ while (*text != '\0')
+ { /* Loop until end of string */
+
+ mp_put_char(*text); /* Transmit char */
+
+ text++; /* Next char */
+ }
+ return 0;
+}
diff --git a/src/rv64/.gdbinit b/src/rv64/.gdbinit
new file mode 100644
index 0000000..c835b7f
--- /dev/null
+++ b/src/rv64/.gdbinit
@@ -0,0 +1,3 @@
+set disassemble-next-line on
+target remote : 1234
+
diff --git a/src/rv64/linkscript.ld b/src/rv64/linkscript.ld
new file mode 100644
index 0000000..0a82477
--- /dev/null
+++ b/src/rv64/linkscript.ld
@@ -0,0 +1,46 @@
+ENTRY(mp_reset_vector);
+
+. = 0x80000000;
+
+SECTIONS {
+ .text : ALIGN(4K) {
+ PROVIDE(_text_start = .);
+
+ *(.init);
+ *(.text);
+
+ PROVIDE(_text_end = .);
+ }
+
+ PROVIDE(mp_global_pointer = .);
+
+ .bss : ALIGN(4K) {
+ PROVIDE(_bss_start = .);
+
+ *(.bss);
+
+ PROVIDE(_bss_end = .);
+ }
+
+ .rodata : ALIGN(4K) {
+ PROVIDE(_rodata_start = .);
+
+ *(.rodata);
+
+ PROVIDE(_rodata_end = .);
+ }
+
+
+ .data : ALIGN(4K) {
+ PROVIDE(_data_start = .);
+
+ *(.data);
+
+ PROVIDE(_data_end = .);
+ }
+
+ PROVIDE(mp_stack_end = . + 0x1000);
+
+ PROVIDE(mp_memory_end = .);
+ PROVIDE(mp_boot_processor_ready = . + 0x4);
+}
diff --git a/src/rv64/makefile b/src/rv64/makefile
new file mode 100644
index 0000000..0bd8a28
--- /dev/null
+++ b/src/rv64/makefile
@@ -0,0 +1,53 @@
+ #
+ # ========================================================
+ #
+ # CoreBoot
+ # Date Added: 08/11/2023
+ # Copyright 2024, ZKA Technologies, all rights reserved.
+ #
+ # ========================================================
+ #
+
+CC=riscv64-unknown-elf-gcc
+FIRMWARE=core-boot.elf
+FLAGS=-D__COMPILE_RISCV__ -I../../ -Wall -c -nostdlib -ffreestanding -fno-builtin -D__BSTRICT__ -D__BDEBUG__ -O0 -mcmodel=medany
+C_SRC= $(wildcard *.s) $(wildcard *.c) $(wildcard ../*.c) -c
+
+CXX=riscv64-unknown-elf-g++
+CXX_SRC= $(wildcard *.cc) $(wildcard ../*.cc) -c
+
+LD=riscv64-unknown-elf-ld
+OBJ=*.o
+FLAGS_LD= --script=linkscript.ld -o core-boot.elf
+
+EMU=qemu-system-riscv64 -m 4G -smp 2 -machine virt -bios $(FIRMWARE) -d int -device VGA
+
+.PHONY: all
+all: firmware-link
+ @echo "[CoreBoot] Done."
+
+# link (make firmware)
+.PHONY: firmware-link
+firmware-link: firmware-compile
+ $(LD) $(OBJ) $(FLAGS_LD)
+
+# compile firmware
+.PHONY: firmware-compile
+firmware-compile:
+ $(CC) $(FLAGS) $(C_SRC)
+ $(CXX) -ffreestanding -fno-rtti -fno-exceptions $(FLAGS) $(CXX_SRC)
+
+# launch qemu rule
+.PHONY: run
+run:
+ $(EMU)
+
+# launch qemu with attached debugger
+.PHONY: run-dbg
+run-dbg:
+ $(EMU) -S
+
+# remove object files
+.PHONY: clean
+clean:
+ rm -f $(wildcard *.o) $(wildcard *.elf) $(wildcard *.rom) $(wildcard *.epm)
diff --git a/src/rv64/rv64-api.s b/src/rv64/rv64-api.s
new file mode 100644
index 0000000..f7427de
--- /dev/null
+++ b/src/rv64/rv64-api.s
@@ -0,0 +1,16 @@
+# ====================================
+#
+# Amlal EL Mahrouss CoreBoot
+# (c) Amlal EL Mahrouss all rights reserved.
+#
+# Purpose: Assembler API for RISC-V
+#
+# ====================================
+
+.balign 4
+.global mp_flush_tlb
+
+mp_flush_tlb:
+ sfence.vma
+
+ ret
diff --git a/src/rv64/rv64-boot.s b/src/rv64/rv64-boot.s
new file mode 100644
index 0000000..8fca5de
--- /dev/null
+++ b/src/rv64/rv64-boot.s
@@ -0,0 +1,114 @@
+/*
+ * ========================================================
+ *
+ * CoreBoot
+ * Copyright 2024, Amlal EL Mahrouss, all rights reserved.
+ *
+ * Purpose: Startup code for RISC-V.
+ *
+ * ========================================================
+ */
+
+
+/* Code starts at 8M, everything below is memory mapped hardware. */
+
+.option norvc
+
+.extern mp_start_exec
+
+.global mp_reset_vector
+.global mp_hart_present
+
+.section .init
+.align 4
+
+mp_reset_vector:
+ .cfi_startproc
+
+ csrr t0, mhartid
+ beqz t0, mp_start_exec_asm
+
+ j mp_start_other
+
+ .cfi_endproc
+
+mp_start_exec_asm:
+ lw t0, __mp_hart_counter
+ lw t1, mp_boot_processor_ready
+
+ not t0, t0
+
+ addi t1, zero, 1
+
+.option push
+.option norelax
+
+ la gp, mp_global_pointer
+
+.option pop
+
+ la sp, mp_stack_end
+
+ la t5, _bss_start
+ la t6, _bss_end
+
+crt0_bss_clear:
+ sd zero, (t5)
+ addi t5, t5, 8
+ bgeu t5, t6, crt0_bss_clear
+
+
+ j mp_start_exec
+ j mp_hang
+
+mp_start_other:
+ lw t1, mp_boot_processor_ready
+
+mp_start_other_wait:
+ beq t1, zero, mp_start_other_wait
+
+ la t0, mp_stack_list
+ ld t1, mp_stack_align
+ mv sp, t0
+ add t0, zero, t1
+ j mp_hang
+
+.global mp_start_rom
+.global mp_start_context
+
+mp_start_context:
+ mv ra, zero
+ add ra, zero, a1
+ mret
+
+.equ SYS_BOOT_ADDR, 0x80020000
+
+mp_start_rom:
+ li x5, SYS_BOOT_ADDR
+ mv ra, zero
+ add ra, zero, t0
+ mret
+
+mp_hang:
+ j mp_start_exec
+L0:
+ wfi
+ j L0
+
+.bss
+
+.align 4
+mp_hart_present:
+ .long 0
+
+.data
+
+.align 4
+mp_stack_list:
+ .long mp_memory_end
+
+mp_stack_align:
+ .word 0x8000
+
+__mp_max_harts:
+ .word 2
diff --git a/src/rv64/rv64-err.c b/src/rv64/rv64-err.c
new file mode 100644
index 0000000..19be090
--- /dev/null
+++ b/src/rv64/rv64-err.c
@@ -0,0 +1,23 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+
+/// BUGS: 0
+
+/// @brief Goes into a panic state.
+/// @param reason why?
+void mp_panic(const char* reason)
+{
+ mp_put_string("Error: ");
+ mp_put_string(reason);
+ mp_put_char('\n');
+
+ while (yes)
+ {
+ asm volatile("wfi");
+ }
+}
diff --git a/src/rv64/rv64-uart.c b/src/rv64/rv64-uart.c
new file mode 100644
index 0000000..ea896bc
--- /dev/null
+++ b/src/rv64/rv64-uart.c
@@ -0,0 +1,54 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+#include <lib/string.h>
+
+/// BUGS: 0
+
+/* this file handles the UART */
+
+static uint8_t* mp_uart_ptr = (uint8_t*)SYS_UART_BASE;
+
+utf_char_t mp_get_char(void)
+{
+ uintptr_t ptr = SYS_UART_BASE;
+ while (!(*(((volatile uint8_t*)ptr) + 0x05) & 0x01))
+ ;
+
+ return (utf_char_t)*mp_uart_ptr;
+}
+
+// we need that one, to avoid sending mutliple chars to UART.
+static boolean mp_locked_put_char = no;
+
+void mp_put_char(utf_char_t ch)
+{
+ while (mp_locked_put_char)
+ {
+ }
+
+ mp_locked_put_char = yes;
+ *mp_uart_ptr = ch;
+ mp_locked_put_char = no;
+}
+
+/// @brief UART put string
+/// @param text the input text.
+size_t mp_put_string(const char* text)
+{
+ if (text == nil)
+ return 0;
+
+ size_t i = 0;
+
+ for (; i < strlen(text); i++)
+ {
+ mp_put_char(text[i]);
+ }
+
+ return i;
+}
diff --git a/src/x86s/.gitkeep b/src/x86s/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/src/x86s/.gitkeep