HAL: Amd64: Got interrupts working.

Signed-off-by: Amlal El Mahrouss <amlalelmahrouss@icloud.com>

6 files changed, 95 insertions, 121 deletions

diff --git a/Private/HALKit/AMD64/HalCoreInterruptHandler.cpp b/Private/HALKit/AMD64/HalCoreInterruptHandler.cpp
index 70b6e782..eb81532d 100644
--- a/Private/HALKit/AMD64/HalCoreInterruptHandler.cpp
+++ b/Private/HALKit/AMD64/HalCoreInterruptHandler.cpp
@@ -11,7 +11,7 @@
 #include <KernelKit/ProcessManager.hpp>
 #include <NewKit/String.hpp>
 
-static const char* kExceptionMessage[32] = {
+static const char* kExceptionMessages[32] = {
     "Division by zero",
     "Debug Breakpoint",
     "Non-maskable interrupt",
@@ -49,12 +49,15 @@ static const char* kExceptionMessage[32] = {
 /// @brief System call interrupt (like DOS and NT)
 #define kKernelSyscallInterrupt (0x21)
 
-extern "C" HCore::UIntPtr rt_handle_interrupts(HCore::UIntPtr &rsp) {
-  HCore::HAL::rt_cli();
-
+EXTERN_C HCore::UIntPtr rt_handle_interrupts(HCore::UIntPtr &rsp) {
   HCore::HAL::StackFramePtr sf = (HCore::HAL::StackFramePtr)rsp;
 
-  HCore::HAL::rt_sti();
+  if (sf->IntNum < 32) {
+
+  } else if (sf->IntNum == 0x21) {
+    
+  }
+
   return rsp;
 }
 
diff --git a/Private/HALKit/AMD64/HalDescriptorLoader.cpp b/Private/HALKit/AMD64/HalDescriptorLoader.cpp
index 64f7ca65..58cce26c 100644
--- a/Private/HALKit/AMD64/HalDescriptorLoader.cpp
+++ b/Private/HALKit/AMD64/HalDescriptorLoader.cpp
@@ -9,59 +9,34 @@
 
 #include <ArchKit/ArchKit.hpp>
 
+EXTERN_C HCore::UIntPtr ke_handle_irq;
+
 namespace HCore::HAL {
-void GDTLoader::Load(Register64 &gdt) {
-  Register64 gdtReg;
+static Register64 kRegGdt;
 
-  gdtReg.Base = gdt.Base;
-  gdtReg.Limit = gdt.Limit;
+void GDTLoader::Load(Register64 &gdt) {
+  kRegGdt.Base = gdt.Base;
+  kRegGdt.Limit = gdt.Limit;
 
-  rt_load_gdt(gdtReg);
+  rt_load_gdt(kRegGdt);
 }
 
-namespace Detail::AMD64 {
-struct InterruptDescriptorAMD64 final {
-  UInt16 OffsetLow;  // offset bits 0..15
-  UInt16 Selector;   // a code segment selector in GDT or LDT
-  UInt8
-      Ist;  // bits 0..2 holds Interrupt Stack Table offset, rest of bits zero.
-  UInt8 TypeAttributes;  // gate type, dpl, and p fields
-  UInt16 OffsetMid;      // offset bits 16..31
-  UInt32 OffsetHigh;     // offset bits 32..63
-  UInt32 Zero;           // reserved
-};
-}  // namespace Detail::AMD64
-
-#define kInterruptGate 0x8E
-#define kTrapGate 0x8F
-#define kTaskGate 0x85
-#define kGdtSelector 0xa0
-
-extern "C" HCore::UIntPtr rt_handle_interrupts(HCore::UIntPtr &rsp);
-
-static ALIGN(0x10)
-    Detail::AMD64::InterruptDescriptorAMD64 kIdtRegs[kKernelMaxSystemCalls];
-
 static HAL::Register64 kRegIdt;
 
 void IDTLoader::Load(Register64 &idt) {
-  VoidPtr *baseIdt = (VoidPtr *)idt.Base;
-
-  for (auto i = 0; i < 32; i++) {
-    kIdtRegs[i].Selector = kGdtSelector;
-    kIdtRegs[i].Ist = 001;
-    kIdtRegs[i].TypeAttributes = kTrapGate;
-    kIdtRegs[i].OffsetLow = (UIntPtr)baseIdt & 0xFFFF;
-    kIdtRegs[i].OffsetMid = (UIntPtr)baseIdt >> 16 & 0xFFFF;
-    kIdtRegs[i].OffsetHigh = (UIntPtr)baseIdt >> 32 & 0xFFFFFFFF;
-    kIdtRegs[i].Zero = 0;
+  volatile ::HCore::Detail::AMD64::InterruptDescriptorAMD64* baseIdt = (::HCore::Detail::AMD64::InterruptDescriptorAMD64 *)idt.Base;
+
+  for (auto i = 0; i < kKernelIdtSize; i++) {
+    baseIdt[i].Selector = kGdtCodeSelector;
+    baseIdt[i].Ist = 00;
+    baseIdt[i].TypeAttributes = kInterruptGate;
+    baseIdt[i].OffsetLow = (UInt16)((UInt32) ke_handle_irq & 0x000000000000ffff);
+    baseIdt[i].OffsetMid = (UInt16)(((UInt32) ke_handle_irq & 0x00000000ffff0000) >> 16);
+    baseIdt[i].OffsetHigh = (UInt32)((UInt32) ke_handle_irq & 0xffffffff00000000) >> 32;
+    baseIdt[i].Zero = 0;
   }
 
-  kRegIdt.Base = (UIntPtr)&kIdtRegs[0];
-  kRegIdt.Limit =
-      sizeof(Detail::AMD64::InterruptDescriptorAMD64) * idt.Limit - 1;
-
-  rt_load_idt(kRegIdt);
+  rt_load_idt(idt);
 }
 
 void GDTLoader::Load(Ref<Register64> &gdt) { GDTLoader::Load(gdt.Leak()); }
diff --git a/Private/HALKit/AMD64/HalInterruptRouting.asm b/Private/HALKit/AMD64/HalInterruptRouting.asm
index 89f4be0f..232071bf 100644
--- a/Private/HALKit/AMD64/HalInterruptRouting.asm
+++ b/Private/HALKit/AMD64/HalInterruptRouting.asm
@@ -11,82 +11,59 @@
 
 [bits 64]
 
-%macro IntDecl 1
-    dq HCoreInterrupt%1
-%endmacro
-
-%macro IntExp 1
-HCoreInterrupt%1:
-    cld
-    push %1
-    call ke_handle_irq
-%endmacro
-
-%macro IntNormal 1
-HCoreInterrupt%1:
-    cld
-    push  0
-    push  %1
-    call ke_handle_irq
-%endmacro
-
 ; This file handles the core interrupt table
 ; Last edited 31/01/24
 
 extern rt_handle_interrupts
-global __EXEC_IVT
+global PowerOnSelfTest
+global ke_handle_irq
 
 section .text
 
 ke_handle_irq:
-    sti
-    iretq
+    cli
 
-    IntNormal 0
-    IntNormal 1
-    IntNormal 2
-    IntNormal 3
-    IntNormal 4
-    IntNormal 5
-    IntNormal 6
-    IntNormal 7
-    IntExp   8
-    IntNormal 9
-    IntExp   10
-    IntExp   11
-    IntExp   12
-    IntExp   13
-    IntExp   14
-    IntNormal 15
-    IntNormal 16
-    IntExp 17
-    IntNormal 18
-    IntNormal 19
-    IntNormal 20
-    IntNormal 21
-    IntNormal 22
-    IntNormal 23
-    IntNormal 24
-    IntNormal 25
-    IntNormal 26
-    IntNormal 27
-    IntNormal 28
-    IntNormal 29
-    IntExp   30
-    IntNormal 31
-    IntNormal 32
-    
-__EXEC_IVT:
-    %assign i 0
-    %rep 32
-        IntDecl i
-    %assign i i+1
-    %endrep
+push rax
+    push rbx
+    push rcx
+    push rdx
+    push rsi
+    push rdi
+    push rbp
+    push r8
+    push r9
+    push r10
+    push r11
+    push r12
+    push r13
+    push r14
+    push r15
 
-section .text
+    mov rcx, rsp
+    call rt_handle_interrupts
+    mov rsp, rax
 
-global PowerOnSelfTest
+    pop r15
+    pop r14
+    pop r13
+    pop r12
+    pop r11
+    pop r10
+    pop r9
+    pop r8
+    pop rbp
+    pop rdi
+    pop rsi
+    pop rdx
+    pop rcx
+    pop rbx
+    pop rax
+
+    sti
+    iretq
 
+;; this one is doing a POST for us.
+;; testing interrupts.
 PowerOnSelfTest:
     int 0x21
     ret
\ No newline at end of file
diff --git a/Private/HALKit/AMD64/HalKernelMain.cxx b/Private/HALKit/AMD64/HalKernelMain.cxx
index dd006565..9beedf63 100644
--- a/Private/HALKit/AMD64/HalKernelMain.cxx
+++ b/Private/HALKit/AMD64/HalKernelMain.cxx
@@ -20,12 +20,10 @@
 #include <NewKit/KernelHeap.hpp>
 #include <NewKit/UserHeap.hpp>
 
-EXTERN_C HCore::VoidPtr __EXEC_IVT;
-
 namespace Detail {
 using namespace HCore;
 
-EXTERN_C void PowerOnSelfTest();
+EXTERN_C void PowerOnSelfTest(void);
 
 /**
     @brief Global descriptor table entry, either null, code or data.
@@ -77,15 +75,15 @@ EXTERN_C void RuntimeMain(
   HCore::HAL::GDTLoader gdt;
   gdt.Load(gdtBase);
 
+  HCore::UIntPtr* kInterruptVectorTable = new HCore::UIntPtr[kKernelIdtSize];
+  
   HCore::HAL::Register64 idtBase;
-  idtBase.Base = (HCore::UIntPtr)__EXEC_IVT;
-  idtBase.Limit = kKernelMaxSystemCalls;
+  idtBase.Base = (HCore::UIntPtr)kInterruptVectorTable;
+  idtBase.Limit = kKernelIdtSize * sizeof(HCore::Detail::AMD64::InterruptDescriptorAMD64) - 1;
 
   HCore::HAL::IDTLoader idt;
   idt.Load(idtBase);
 
-  HCore::kcout << "TESTING\n";
-
   if (HandoverHeader->f_Bootloader == 0xDD) {
     /// Mounts a NewFS partition.
     HCore::IFilesystemManager::Mount(new HCore::NewFilesystemManager());
diff --git a/Private/HALKit/AMD64/HalPageAlloc.cpp b/Private/HALKit/AMD64/HalPageAlloc.cpp
index fd691be2..4654ab7b 100644
--- a/Private/HALKit/AMD64/HalPageAlloc.cpp
+++ b/Private/HALKit/AMD64/HalPageAlloc.cpp
@@ -16,7 +16,7 @@
 
 static HCore::SizeT kPageCnt = 0UL;
 
-#define kPagePad 512
+#define kKernelPagingPadding 4096
 
 namespace HCore {
 namespace HAL {
@@ -30,7 +30,7 @@ static auto hal_try_alloc_new_page(SizeT sz, Boolean rw, Boolean user)
   pte->Present = true;
 
   kKernelVirtualStart =
-      (VoidPtr)((UIntPtr)kKernelVirtualStart + kPageCnt + sz + kPagePad);
+      (VoidPtr)((UIntPtr)kKernelVirtualStart + kPageCnt + sz + kKernelPagingPadding);
   return pte;
 }
 
diff --git a/Private/HALKit/AMD64/Processor.hpp b/Private/HALKit/AMD64/Processor.hpp
index 2ba98abf..95da4210 100644
--- a/Private/HALKit/AMD64/Processor.hpp
+++ b/Private/HALKit/AMD64/Processor.hpp
@@ -26,6 +26,25 @@
 #define IsActiveLow(flag) (flag & 2)
 #define IsLevelTriggered(flag) (flag & 8)
 
+#define kInterruptGate 0b10001110
+#define kTrapGate 0b10001111
+#define kTaskGate 0b10001100
+#define kGdtCodeSelector 0x08
+
+namespace HCore {
+namespace Detail::AMD64 {
+struct InterruptDescriptorAMD64 final {
+  UInt16 OffsetLow;  // offset bits 0..15
+  UInt16 Selector;   // a code segment selector in GDT or LDT
+  UInt8  Ist;  // bits 0..2 holds Interrupt Stack Table offset, rest of bits zero.
+  UInt8 TypeAttributes;  // gate type, dpl, and p fields
+  UInt16 OffsetMid;      // offset bits 16..31
+  UInt32 OffsetHigh;     // offset bits 32..63
+  UInt32 Zero;           // reserved
+};
+}  // namespace Detail::AMD64
+} // namespace HCore
+
 namespace HCore::HAL {
 extern "C" UChar In8(UInt16 port);
 extern "C" UShort In16(UInt16 port);
@@ -140,3 +159,5 @@ extern "C" void idt_handle_pf(HCore::UIntPtr rsp);
 
 extern "C" void rt_load_idt(HCore::HAL::Register64 ptr);
 extern "C" void rt_load_gdt(HCore::HAL::Register64 ptr);
+
+#define kKernelIdtSize 256
\ No newline at end of file