Kernel & Bootloader: Improvements and Fix ATA Read and Write problem.

Signed-off-by: Amlal El Mahrouss <amlalelmahrouss@icloud.com>

12 files changed, 186 insertions, 116 deletions

diff --git a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
index e0f9b7fd..9bdd368b 100644
--- a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
+++ b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
@@ -59,11 +59,11 @@ bool ACPIManager::Checksum(const char *checksum, SSizeT len) {
   return chr == 0;
 }
 
-void rt_shutdown_acpi_qemu_20(void) { HAL::out16(0xb004, 0x2000); }
+void rt_shutdown_acpi_qemu_20(void) { HAL::Out16(0xb004, 0x2000); }
 
-void rt_shutdown_acpi_qemu_30_plus(void) { HAL::out16(0x604, 0x2000); }
+void rt_shutdown_acpi_qemu_30_plus(void) { HAL::Out16(0x604, 0x2000); }
 
-void rt_shutdown_acpi_virtualbox(void) { HAL::out16(0x4004, 0x3400); }
+void rt_shutdown_acpi_virtualbox(void) { HAL::Out16(0x4004, 0x3400); }
 
 /// you'll have to parse the MADT otherwise!
 }  // namespace HCore
diff --git a/Private/HALKit/AMD64/DebugOutput.cxx b/Private/HALKit/AMD64/DebugOutput.cxx
index e23d9dae..ad9fc8c5 100644
--- a/Private/HALKit/AMD64/DebugOutput.cxx
+++ b/Private/HALKit/AMD64/DebugOutput.cxx
@@ -26,19 +26,19 @@ static int kState = kStateLimbo;
 
 bool serial_init() {
 #ifdef __DEBUG__
-  HAL::out8(PORT + 1, 0x00);  // Disable all interrupts
-  HAL::out8(PORT + 3, 0x80);  // Enable DLAB (set baud rate divisor)
-  HAL::out8(PORT + 0, 0x03);  // Set divisor to 3 (lo byte) 38400 baud
-  HAL::out8(PORT + 1, 0x00);  //                  (hi byte)
-  HAL::out8(PORT + 3, 0x03);  // 8 bits, no parity, one stop bit
-  HAL::out8(PORT + 2, 0xC7);  // Enable FIFO, clear them, with 14-byte threshold
-  HAL::out8(PORT + 4, 0x0B);  // IRQs enabled, RTS/DSR set
-  HAL::out8(PORT + 4, 0x1E);  // Set in loopback mode, test the serial chip
-  HAL::out8(PORT + 0, 0xAE);  // Test serial chip (send byte 0xAE and check if
+  HAL::Out8(PORT + 1, 0x00);  // Disable all interrupts
+  HAL::Out8(PORT + 3, 0x80);  // Enable DLAB (set baud rate divisor)
+  HAL::Out8(PORT + 0, 0x03);  // Set divisor to 3 (lo byte) 38400 baud
+  HAL::Out8(PORT + 1, 0x00);  //                  (hi byte)
+  HAL::Out8(PORT + 3, 0x03);  // 8 bits, no parity, one stop bit
+  HAL::Out8(PORT + 2, 0xC7);  // Enable FIFO, clear them, with 14-byte threshold
+  HAL::Out8(PORT + 4, 0x0B);  // IRQs enabled, RTS/DSR set
+  HAL::Out8(PORT + 4, 0x1E);  // Set in loopback mode, test the serial chip
+  HAL::Out8(PORT + 0, 0xAE);  // Test serial chip (send byte 0xAE and check if
                               // serial returns same byte)
 
   // Check if serial is faulty (i.e: not same byte as sent)
-  if (HAL::in8(PORT) != 0xAE) {
+  if (HAL::In8(PORT) != 0xAE) {
     ke_stop(RUNTIME_CHECK_HANDSHAKE);
   }
 
@@ -46,7 +46,7 @@ bool serial_init() {
 
   // If serial is not faulty set it in normal operation mode
   // (not-loopback with IRQs enabled and OUT#1 and OUT#2 bits enabled)
-  HAL::out8(Detail::PORT + 4, 0x0F);
+  HAL::Out8(Detail::PORT + 4, 0x0F);
 #endif
 
   return true;
@@ -62,7 +62,7 @@ void system_io_print(const char *bytes) {
   SizeT len = string_length(bytes, 256);
 
   while (index < len) {
-    HAL::out8(Detail::PORT, bytes[index]);
+    HAL::Out8(Detail::PORT, bytes[index]);
     ++index;
   }
 
diff --git a/Private/HALKit/AMD64/DebugPort.cxx b/Private/HALKit/AMD64/DebugPort.cxx
index e5138e27..b0f2f6d1 100644
--- a/Private/HALKit/AMD64/DebugPort.cxx
+++ b/Private/HALKit/AMD64/DebugPort.cxx
@@ -41,19 +41,19 @@ void rt_debug_listen(DebuggerPorts* theHook) noexcept {
   if (theHook == nullptr) return;
 
   for (UInt32 i = 0U; i < kDebugMaxPorts; ++i) {
-    HAL::out16(theHook->fPort[i], kDebugMag0);
+    HAL::Out16(theHook->fPort[i], kDebugMag0);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag1);
+    HAL::Out16(theHook->fPort[i], kDebugMag1);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag2);
+    HAL::Out16(theHook->fPort[i], kDebugMag2);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag3);
+    HAL::Out16(theHook->fPort[i], kDebugMag3);
     HAL::rt_wait_for_io();
 
-    if (HAL::in16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++;
+    if (HAL::In16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++;
   }
 }
 }  // namespace HCore
diff --git a/Private/HALKit/AMD64/HalProcessor.cpp b/Private/HALKit/AMD64/HalProcessor.cpp
index afdb29b1..80efed3a 100644
--- a/Private/HALKit/AMD64/HalProcessor.cpp
+++ b/Private/HALKit/AMD64/HalProcessor.cpp
@@ -15,33 +15,33 @@
  */
 
 namespace HCore::HAL {
-void out8(UInt16 port, UInt8 value) {
+void Out8(UInt16 port, UInt8 value) {
   asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-void out16(UInt16 port, UInt16 value) {
+void Out16(UInt16 port, UInt16 value) {
   asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-void out32(UInt16 port, UInt32 value) {
+void Out32(UInt16 port, UInt32 value) {
   asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-UInt8 in8(UInt16 port) {
+UInt8 In8(UInt16 port) {
   UInt8 value = 0UL;
   asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-UInt16 in16(UInt16 port) {
+UInt16 In16(UInt16 port) {
   UInt16 value = 0UL;
   asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-UInt32 in32(UInt16 port) {
+UInt32 In32(UInt16 port) {
   UInt32 value = 0UL;
   asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory");
 
diff --git a/Private/HALKit/AMD64/PCI/Device.cpp b/Private/HALKit/AMD64/PCI/Device.cpp
index 9fdcda43..815043c9 100644
--- a/Private/HALKit/AMD64/PCI/Device.cpp
+++ b/Private/HALKit/AMD64/PCI/Device.cpp
@@ -16,10 +16,10 @@ HCore::UInt LumiaPCIReadRaw(HCore::UInt bar, HCore::UShort bus,
                        ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
                        (bar & 0xFC);
 
-  HCore::HAL::out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
                     target);
 
-  return HCore::HAL::in32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigData);
+  return HCore::HAL::In32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigData);
 }
 
 void LumiaPCISetCfgTarget(HCore::UInt bar, HCore::UShort bus, HCore::UShort dev,
@@ -28,7 +28,7 @@ void LumiaPCISetCfgTarget(HCore::UInt bar, HCore::UShort bus, HCore::UShort dev,
                        ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
                        (bar & ~3);
 
-  HCore::HAL::out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
                     target);
 }
 
@@ -42,10 +42,10 @@ UInt Device::Read(UInt bar, Size sz) {
   LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
-    return HAL::in32((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+    return HAL::In32((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
   if (sz == 2)
-    return HAL::in16((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
-  if (sz == 1) return HAL::in8((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+    return HAL::In16((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+  if (sz == 1) return HAL::In8((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
 
   return 0xFFFF;
 }
@@ -54,11 +54,11 @@ void Device::Write(UInt bar, UIntPtr data, Size sz) {
   LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
-    HAL::out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data);
+    HAL::Out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data);
   if (sz == 2)
-    HAL::out16((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UShort)data);
+    HAL::Out16((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UShort)data);
   if (sz == 1)
-    HAL::out8((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UChar)data);
+    HAL::Out8((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UChar)data);
 }
 
 UShort Device::DeviceId() {
diff --git a/Private/HALKit/AMD64/Processor.hpp b/Private/HALKit/AMD64/Processor.hpp
index 9b73216b..883d1910 100644
--- a/Private/HALKit/AMD64/Processor.hpp
+++ b/Private/HALKit/AMD64/Processor.hpp
@@ -17,13 +17,13 @@
 #define IsLevelTriggered(flag) (flag & 8)
 
 namespace HCore::HAL {
-extern "C" UChar in8(UInt16 port);
-extern "C" UShort in16(UInt16 port);
-extern "C" UInt in32(UInt16 port);
+extern "C" UChar In8(UInt16 port);
+extern "C" UShort In16(UInt16 port);
+extern "C" UInt In32(UInt16 port);
 
-extern "C" void out16(UShort port, UShort byte);
-extern "C" void out8(UShort port, UChar byte);
-extern "C" void out32(UShort port, UInt byte);
+extern "C" void Out16(UShort port, UShort byte);
+extern "C" void Out8(UShort port, UChar byte);
+extern "C" void Out32(UShort port, UInt byte);
 
 extern "C" void rt_wait_for_io();
 extern "C" void rt_halt();
diff --git a/Private/KernelKit/PCI/Express.hpp b/Private/KernelKit/PCI/Express.hpp
index 45676c23..8b46fbeb 100644
--- a/Private/KernelKit/PCI/Express.hpp
+++ b/Private/KernelKit/PCI/Express.hpp
@@ -9,4 +9,6 @@
 
 #pragma once
 
-#include <NewKit/Defines.hpp>
\ No newline at end of file
+#include <NewKit/Defines.hpp>
+
+#define PCI_EXPRESS_BUS_COUNT (4096)
diff --git a/Private/KernelKit/PCI/IO-Impl-AMD64.inl b/Private/KernelKit/PCI/IO-Impl-AMD64.inl
index c5247d13..f720f2b6 100644
--- a/Private/KernelKit/PCI/IO-Impl-AMD64.inl
+++ b/Private/KernelKit/PCI/IO-Impl-AMD64.inl
@@ -7,7 +7,8 @@
 
     Revision History:
 
-    30/01/24: Added file (amlel)
+    30/01/24: Add file. (amlel)
+    02/02/24: Update I/O routines. (amlel)
 
 ------------------------------------------- */
 
@@ -17,11 +18,11 @@ template <typename T>
 T IOArray<Sz>::In(SizeT index) {
   switch (sizeof(T)) {
     case 4:
-      return HAL::in32(m_Ports[index].Leak());
+      return HAL::In32(m_Ports[index].Leak());
     case 2:
-      return HAL::in16(m_Ports[index].Leak());
+      return HAL::In16(m_Ports[index].Leak());
     case 1:
-      return HAL::in8(m_Ports[index].Leak());
+      return HAL::In8(m_Ports[index].Leak());
     default:
       return 0xFFFF;
   }
@@ -33,11 +34,11 @@ void IOArray<Sz>::Out(SizeT index, T value) {
   switch (sizeof(T)) {
 #ifdef __x86_64__
     case 4:
-      HAL::out32(m_Ports[index].Leak(), value);
+      HAL::Out32(m_Ports[index].Leak(), value);
     case 2:
-      HAL::out16(m_Ports[index].Leak(), value);
+      HAL::Out16(m_Ports[index].Leak(), value);
     case 1:
-      HAL::out8(m_Ports[index].Leak(), value);
+      HAL::Out8(m_Ports[index].Leak(), value);
 #endif
     default:
       break;
diff --git a/Private/NewBoot/BootKit/Arch/ATA.hxx b/Private/NewBoot/BootKit/Arch/ATA.hxx
index 6e692c3d..db92e290 100644
--- a/Private/NewBoot/BootKit/Arch/ATA.hxx
+++ b/Private/NewBoot/BootKit/Arch/ATA.hxx
@@ -113,8 +113,10 @@ using namespace HCore;
 
 Boolean ATAInitDriver(UInt8 Bus, UInt8 Drv);
 Void ATAWait(UInt16 IO);
-UInt16 ATAReadLba(UInt32 Lba, UInt8 Bus, Boolean Master);
-Void ATAWriteLba(UInt16 Byte, UInt32 Lba, UInt8 Bus, Boolean Master);
+Void ATAReadLba(UInt32 Lba, UInt8 Bus, Boolean Master, wchar_t* Buf,
+                SizeT Offset);
+Void ATAWriteLba(UInt16 Byte, UInt32 Lba, UInt8 Bus, Boolean Master,
+                 wchar_t* Buf, SizeT Offset);
 Boolean ATAIsDetected(Void);
 
 class BATADevice final {
@@ -134,11 +136,21 @@ class BATADevice final {
     Boolean mMaster{false};
   };
 
+  operator bool() { return ATAIsDetected(); }
+
   BATADevice& Read(WideChar*, const SizeT&);
   BATADevice& Write(WideChar*, const SizeT&);
 
-  ATATraits& Traits();
+  ATATraits& Leak();
 
  private:
   ATATraits mTraits;
 };
+
+enum {
+  kATADevicePATA,
+  kATADeviceSATA,
+  kATADevicePATA_PI,
+  kATADeviceSATA_PI,
+  kATADeviceCount,
+};
diff --git a/Private/NewBoot/BootKit/BootKit.hxx b/Private/NewBoot/BootKit/BootKit.hxx
index edd8015b..2b57ec56 100644
--- a/Private/NewBoot/BootKit/BootKit.hxx
+++ b/Private/NewBoot/BootKit/BootKit.hxx
@@ -93,35 +93,39 @@ class BFileReader final {
 #include <BootKit/Platform.hxx>
 #include <BootKit/Protocol.hxx>
 
+/***********************************************************************************/
+/// Provide some useful processor features.
+/***********************************************************************************/
+
 #ifdef __EFI_x86_64__
 
-inline void out8(UInt16 port, UInt8 value) {
+inline void Out8(UInt16 port, UInt8 value) {
   asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-inline void out16(UInt16 port, UInt16 value) {
+inline void Out16(UInt16 port, UInt16 value) {
   asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-inline void out32(UInt16 port, UInt32 value) {
+inline void Out32(UInt16 port, UInt32 value) {
   asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-inline UInt8 in8(UInt16 port) {
+inline UInt8 In8(UInt16 port) {
   UInt8 value = 0UL;
   asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-inline UInt16 in16(UInt16 port) {
+inline UInt16 In16(UInt16 port) {
   UInt16 value = 0UL;
   asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-inline UInt32 in32(UInt16 port) {
+inline UInt32 In32(UInt16 port) {
   UInt32 value = 0UL;
   asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory");
 
diff --git a/Private/NewBoot/Source/HEL/AMD64/ATA.cxx b/Private/NewBoot/Source/HEL/AMD64/ATA.cxx
index 0f8d9170..fb11f409 100644
--- a/Private/NewBoot/Source/HEL/AMD64/ATA.cxx
+++ b/Private/NewBoot/Source/HEL/AMD64/ATA.cxx
@@ -7,21 +7,31 @@
  * 	========================================================
  */
 
+/**
+ * @file ATA.cxx
+ * @author Amlal El Mahrouss (amlalelmahrouss@icloud.com)
+ * @brief ATA driver.
+ * @version 0.1
+ * @date 2024-02-02
+ *
+ * @copyright Copyright (c) 2024
+ *
+ */
+
 #include <BootKit/Arch/ATA.hxx>
 #include <BootKit/BootKit.hxx>
 
-/***********************************************************************************/
-/// Provide some useful processor features.
-/***********************************************************************************/
+/// bugs: 0
 
 static Boolean kATADetected = false;
+static Int32 kATADeviceType = kATADeviceCount;
 
 void ATASelect(UInt8 Bus, Boolean isMaster) {
   if (Bus == ATA_PRIMARY)
-    out8(ATA_PRIMARY_IO + ATA_REG_HDDEVSEL,
+    Out8(ATA_PRIMARY_IO + ATA_REG_HDDEVSEL,
          isMaster ? ATA_PRIMARY_SEL : ATA_SECONDARY_SEL);
   else
-    out8(ATA_SECONDARY_IO + ATA_REG_HDDEVSEL,
+    Out8(ATA_SECONDARY_IO + ATA_REG_HDDEVSEL,
          isMaster ? ATA_PRIMARY_SEL : ATA_SECONDARY_SEL);
 }
 
@@ -33,14 +43,14 @@ Boolean ATAInitDriver(UInt8 Bus, UInt8 Drive, UInt16& OutBus,
 
   ATASelect(Bus, Drive);
 
-  out8(IO + ATA_REG_SEC_COUNT0, 0);
-  out8(IO + ATA_REG_LBA0, 0);
-  out8(IO + ATA_REG_LBA1, 0);
-  out8(IO + ATA_REG_LBA2, 0);
+  Out8(IO + ATA_REG_SEC_COUNT0, 0);
+  Out8(IO + ATA_REG_LBA0, 0);
+  Out8(IO + ATA_REG_LBA1, 0);
+  Out8(IO + ATA_REG_LBA2, 0);
 
-  out8(IO + ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
+  Out8(IO + ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
 
-  UInt8 status = in8(IO + ATA_REG_STATUS);
+  UInt8 status = In8(IO + ATA_REG_STATUS);
 
   if (status & ATA_SR_ERR) {
 #ifdef __DEBUG__
@@ -52,17 +62,26 @@ Boolean ATAInitDriver(UInt8 Bus, UInt8 Drive, UInt16& OutBus,
   OutBus = (Bus == ATA_PRIMARY) ? BATADevice::kPrimary : BATADevice::kSecondary;
   OutMaster = (Bus == ATA_PRIMARY);
 
-  unsigned cl = in16(Bus + ATA_CYL_LOW); /* get the "signature bytes" */
-  unsigned ch = in16(Bus + ATA_CYL_HIGH);
+  unsigned cl = In16(Bus + ATA_CYL_LOW); /* get the "signature bytes" */
+  unsigned ch = In16(Bus + ATA_CYL_HIGH);
 
   /* differentiate ATA, ATAPI, SATA and SATAPI */
-  if (cl == 0x14 && ch == 0xEB)
-    writer.WriteString(L"HCoreLdr: PATAPI detected.\r\n");
-  if (cl == 0x69 && ch == 0x96)
-    writer.WriteString(L"HCoreLdr: SATAPI detected.\r\n");
-  if (cl == 0 && ch == 0) writer.WriteString(L"HCoreLdr: PATA detected.\r\n");
-  if (cl == 0x3c && ch == 0xc3)
-    writer.WriteString(L"HCoreLdr: SATA detected.\r\n");
+  if (cl == 0x14 && ch == 0xEB) {
+    writer.WriteString(L"HCoreLdr: PATAPI drive detected.\r\n");
+    kATADeviceType = kATADevicePATA_PI;
+  }
+  if (cl == 0x69 && ch == 0x96) {
+    writer.WriteString(L"HCoreLdr: SATAPI drive detected.\r\n");
+    kATADeviceType = kATADeviceSATA_PI;
+  }
+  if (cl == 0 && ch == 0) {
+    writer.WriteString(L"HCoreLdr: PATA drive detected.\r\n");
+    kATADeviceType = kATADevicePATA;
+  }
+  if (cl == 0x3c && ch == 0xc3) {
+    writer.WriteString(L"HCoreLdr: SATA drive detected.\r\n");
+    kATADeviceType = kATADeviceSATA;
+  }
 
   return true;
 }
@@ -71,50 +90,71 @@ Boolean ATAInitDriver(UInt8 Bus, UInt8 Drive, UInt16& OutBus,
  * This polls the ATA drive.
  */
 void ATAWait(UInt16 IO) {
-  for (int i = 0; i < 4000; i++) in8(IO + ATA_REG_ALT_STATUS);
+  for (int i = 0; i < 4000; i++) In8(IO + ATA_REG_ALT_STATUS);
 }
 
 void ATAPoll(UInt16 IO) { ATAWait(IO); }
 
-UInt16 ATAReadLba(UInt32 Lba, UInt8 Bus, Boolean Master) {
+Void ATAReadLba(UInt32 Lba, UInt8 Bus, Boolean Master, CharacterType* Buf,
+                SizeT Offset) {
   UInt16 IO = Bus;
-  ATASelect(IO, Master ? ATA_MASTER : ATA_SLAVE);
 
-  out8(IO + ATA_REG_SEC_COUNT0, Lba / 512);
+  ATASelect(IO + ATA_REG_HDDEVSEL,
+            (Master ? ATA_MASTER : ATA_SLAVE) | Lba >> 24 & 0xF);
+
+  ATASelect(IO + 1, 0);
 
-  out8(IO + ATA_REG_LBA0, (UInt8)Lba);
-  out8(IO + ATA_REG_LBA1, (UInt8)(Lba >> 8));
-  out8(IO + ATA_REG_LBA2, (UInt8)(Lba >> 16));
+  Out8(IO + ATA_REG_SEC_COUNT0, 1);
 
-  out8(IO + ATA_REG_COMMAND, ATA_CMD_READ_PIO);
+  Out8(IO + ATA_REG_LBA0, (UInt8)Lba);
+  Out8(IO + ATA_REG_LBA1, (UInt8)(Lba >> 8));
+  Out8(IO + ATA_REG_LBA2, (UInt8)(Lba >> 16));
 
-  while ((in8(ATA_COMMAND(IO))) & 0x88) ATAWait(IO);
+  Out8(IO + ATA_REG_COMMAND, ATA_CMD_READ_PIO);
 
-  auto chr = in8(IO + ATA_REG_DATA);
+  ATAPoll(IO);
+
+  for (SizeT index = 0UL; index < 256; ++index) {
+    Buf[index + Offset] = In16(IO + ATA_REG_DATA);
+  }
 
-  while ((in8(ATA_COMMAND(IO))) & 0x88) ATAWait(IO);
-  return chr;
+  ATAWait(IO);
 }
 
-Void ATAWriteLba(UInt16 Byte, UInt32 Lba, UInt8 Bus, Boolean Master) {
+Void ATAWriteLba(UInt16 Byte, UInt32 Lba, UInt8 Bus, Boolean Master,
+                 wchar_t* Buf, SizeT Offset) {
   UInt16 IO = Bus;
-  ATASelect(IO, Master ? ATA_MASTER : ATA_SLAVE);
 
-  out8(IO + ATA_REG_SEC_COUNT0, Lba / 512);
+  ATASelect(IO + ATA_REG_HDDEVSEL,
+            (Master ? ATA_MASTER : ATA_SLAVE) | Lba >> 24 & 0xF);
 
-  out8(IO + ATA_REG_LBA0, (UInt8)Lba);
-  out8(IO + ATA_REG_LBA1, (UInt8)(Lba >> 8));
-  out8(IO + ATA_REG_LBA2, (UInt8)(Lba >> 16));
+  ATASelect(IO + 1, 0);
 
-  out8(IO + ATA_REG_COMMAND, ATA_CMD_WRITE_PIO);  // TODO: support DMA
+  Out8(IO + ATA_REG_SEC_COUNT0, 1);
 
-  while ((in8(ATA_COMMAND(IO))) & 0x88) ATAWait(IO);
+  Out8(IO + ATA_REG_LBA0, (UInt8)Lba);
+  Out8(IO + ATA_REG_LBA1, (UInt8)(Lba >> 8));
+  Out8(IO + ATA_REG_LBA2, (UInt8)(Lba >> 16));
 
-  out32(IO + ATA_REG_DATA, Byte);
+  Out8(IO + ATA_REG_COMMAND, ATA_CMD_WRITE_PIO);
+
+  ATAPoll(IO);
+
+  for (SizeT index = 0UL; index < 256; ++index) {
+    Out16(IO + ATA_REG_DATA, Buf[index + Offset]);
+  }
 
-  while ((in8(ATA_COMMAND(IO))) & 0x88) ATAWait(IO);
+  ATAWait(IO);
 }
 
+/***
+ *
+ *
+ * ATA Device class.
+ *
+ *
+ */
+
 Boolean ATAIsDetected(Void) { return kATADetected; }
 
 /**
@@ -124,14 +164,14 @@ Boolean ATAIsDetected(Void) { return kATADetected; }
 BATADevice::BATADevice() noexcept {
   if (ATAIsDetected()) return;
 
-  if (ATAInitDriver(ATA_PRIMARY, true, this->Traits().mBus,
-                    this->Traits().mMaster) ||
-      ATAInitDriver(ATA_PRIMARY, false, this->Traits().mBus,
-                    this->Traits().mMaster) ||
-      ATAInitDriver(ATA_SECONDARY, true, this->Traits().mBus,
-                    this->Traits().mMaster) ||
-      ATAInitDriver(ATA_SECONDARY, false, this->Traits().mBus,
-                    this->Traits().mMaster)) {
+  if (ATAInitDriver(ATA_PRIMARY, true, this->Leak().mBus,
+                    this->Leak().mMaster) ||
+      ATAInitDriver(ATA_PRIMARY, false, this->Leak().mBus,
+                    this->Leak().mMaster) ||
+      ATAInitDriver(ATA_SECONDARY, true, this->Leak().mBus,
+                    this->Leak().mMaster) ||
+      ATAInitDriver(ATA_SECONDARY, false, this->Leak().mBus,
+                    this->Leak().mMaster)) {
     kATADetected = true;
 
     BTextWriter writer;
@@ -144,10 +184,14 @@ BATADevice& BATADevice::Read(CharacterType* Buf, const SizeT& Sz) {
 
   if (!Buf || Sz < 1) return *this;
 
-  for (SizeT i = 0UL; i < Sz; ++i) {
-    Buf[i] = ATAReadLba(this->Traits().mBase + i, this->Traits().mBus,
-                        this->Traits().mMaster);
+  SizeT Off = 0;
+
+  for (SizeT i = 0UL; i < (Sz / 512); ++i) {
+    ATAReadLba(this->Leak().mBase + i, this->Leak().mBus, this->Leak().mMaster,
+               Buf, Off);
+    Off += 256;
   }
+
   return *this;
 }
 
@@ -156,11 +200,20 @@ BATADevice& BATADevice::Write(CharacterType* Buf, const SizeT& Sz) {
 
   if (!Buf || Sz < 1) return *this;
 
+  SizeT Off = 0UL;
+
   for (SizeT i = 0UL; i < Sz; ++i) {
-    ATAWriteLba(Buf[i], this->Traits().mBase + i, this->Traits().mBus,
-                this->Traits().mMaster);
+    ATAWriteLba(Buf[i], this->Leak().mBase + i, this->Leak().mBus,
+                this->Leak().mMaster, Buf, Off);
+
+    Off += 256;
   }
+
   return *this;
 }
 
-BATADevice::ATATraits& BATADevice::Traits() { return mTraits; }
+/**
+ * @brief ATA Config getter.
+ * @return BATADevice::ATATraits& the drive config.
+ */
+BATADevice::ATATraits& BATADevice::Leak() { return mTraits; }
diff --git a/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx b/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx
index 31ec449f..841a1f40 100644
--- a/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx
+++ b/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx
@@ -27,8 +27,6 @@ EFI_EXTERN_C int EfiMain(EfiHandlePtr ImageHandle,
 
   UInt64 mapKey = 0;
 
-  CharacterType bytes[1024];
-
   BFileReader reader(L"\\Root\\System\\HCoreKrnl.exe\0");
   auto blob = reader.ReadAll();