Merge branch 'HCR-9-add-support-for-file-load-hel-amd64' into 'trunk'

Merge Fixes and WiP Bootloader.

See merge request mahrouss-logic/micro-kernel!3

23 files changed, 517 insertions, 69 deletions

diff --git a/Drivers/README.TXT b/Drivers/README.TXT
new file mode 100644
index 00000000..d26f409b
--- /dev/null
+++ b/Drivers/README.TXT
@@ -0,0 +1,15 @@
+==========================
+Basic Device Drivers (BDD)
+==========================
+
+1 - Build them
+2 - Place them inside Private/Root
+3 - And continue your build.
+
+
+====================
+What are these?
+====================
+
+These are HCore device drivers.
+Running in Ring-3. To let the driver restart in case of a crash.
diff --git a/Internal/Tools/.gitkeep b/Internal/Tools/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Internal/Tools/.gitkeep
+++ /dev/null
diff --git a/Private/EFIKit/EFILib.hxx b/Private/EFIKit/Api.hxx
index b08c2866..b08c2866 100644
--- a/Private/EFIKit/EFILib.hxx
+++ b/Private/EFIKit/Api.hxx
diff --git a/Private/EFIKit/EFI.hxx b/Private/EFIKit/EFI.hxx
index af9c0de9..529efe65 100644
--- a/Private/EFIKit/EFI.hxx
+++ b/Private/EFIKit/EFI.hxx
@@ -418,6 +418,10 @@ typedef struct EfiIPV6 {
   UInt8 Addr[16];
 } EfiIPV6;
 
-#define kEFIYellow 0x0E
+#define kEFIYellow (0x01 | 0x02 | 0x04 | 0x08)
+
+#ifdef __x86_64
+#define __EFI_x86_64__ 1
+#endif  // __x86_64
 
 #endif  // __EFI__
diff --git a/Private/FSKit/NewFS.hxx b/Private/FSKit/NewFS.hxx
index 022100cb..75f4e554 100644
--- a/Private/FSKit/NewFS.hxx
+++ b/Private/FSKit/NewFS.hxx
@@ -30,7 +30,7 @@ enum {
   kUnknowmn = 0xFF,           // unknown device or unsupported (floppy)
 };
 
-struct NewBootBlock final {
+struct PACKED NewBootBlock final {
   HCore::Char Ident[kIdentLen];
   HCore::Char Shell[kNameLen];
 
@@ -56,7 +56,7 @@ struct NewBootBlock final {
 #define kKindDirectory 2
 #define kKindSymlink 3
 
-struct NewCatalog final {
+struct PACKED NewCatalog final {
   HCore::Char Name[kNameLen];
 
   HCore::Int32 Flags;
@@ -66,7 +66,7 @@ struct NewCatalog final {
   HCore::Lba LastFork;
 };
 
-struct NewFork {
+struct PACKED NewFork final {
   HCore::Int32 Flags;
   HCore::Int32 Kind;
 
@@ -90,7 +90,7 @@ struct NewFork {
 #define kConfigLen 64
 #define kPartLen 32
 
-struct NewPartitionBlock final {
+struct PACKED NewPartitionBlock final {
   HCore::Char PartitionName[kPartLen];
   HCore::Char JsonPath[kConfigLen];
 
diff --git a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
index e0f9b7fd..9bdd368b 100644
--- a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
+++ b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
@@ -59,11 +59,11 @@ bool ACPIManager::Checksum(const char *checksum, SSizeT len) {
   return chr == 0;
 }
 
-void rt_shutdown_acpi_qemu_20(void) { HAL::out16(0xb004, 0x2000); }
+void rt_shutdown_acpi_qemu_20(void) { HAL::Out16(0xb004, 0x2000); }
 
-void rt_shutdown_acpi_qemu_30_plus(void) { HAL::out16(0x604, 0x2000); }
+void rt_shutdown_acpi_qemu_30_plus(void) { HAL::Out16(0x604, 0x2000); }
 
-void rt_shutdown_acpi_virtualbox(void) { HAL::out16(0x4004, 0x3400); }
+void rt_shutdown_acpi_virtualbox(void) { HAL::Out16(0x4004, 0x3400); }
 
 /// you'll have to parse the MADT otherwise!
 }  // namespace HCore
diff --git a/Private/HALKit/AMD64/DebugOutput.cxx b/Private/HALKit/AMD64/DebugOutput.cxx
index e23d9dae..ad9fc8c5 100644
--- a/Private/HALKit/AMD64/DebugOutput.cxx
+++ b/Private/HALKit/AMD64/DebugOutput.cxx
@@ -26,19 +26,19 @@ static int kState = kStateLimbo;
 
 bool serial_init() {
 #ifdef __DEBUG__
-  HAL::out8(PORT + 1, 0x00);  // Disable all interrupts
-  HAL::out8(PORT + 3, 0x80);  // Enable DLAB (set baud rate divisor)
-  HAL::out8(PORT + 0, 0x03);  // Set divisor to 3 (lo byte) 38400 baud
-  HAL::out8(PORT + 1, 0x00);  //                  (hi byte)
-  HAL::out8(PORT + 3, 0x03);  // 8 bits, no parity, one stop bit
-  HAL::out8(PORT + 2, 0xC7);  // Enable FIFO, clear them, with 14-byte threshold
-  HAL::out8(PORT + 4, 0x0B);  // IRQs enabled, RTS/DSR set
-  HAL::out8(PORT + 4, 0x1E);  // Set in loopback mode, test the serial chip
-  HAL::out8(PORT + 0, 0xAE);  // Test serial chip (send byte 0xAE and check if
+  HAL::Out8(PORT + 1, 0x00);  // Disable all interrupts
+  HAL::Out8(PORT + 3, 0x80);  // Enable DLAB (set baud rate divisor)
+  HAL::Out8(PORT + 0, 0x03);  // Set divisor to 3 (lo byte) 38400 baud
+  HAL::Out8(PORT + 1, 0x00);  //                  (hi byte)
+  HAL::Out8(PORT + 3, 0x03);  // 8 bits, no parity, one stop bit
+  HAL::Out8(PORT + 2, 0xC7);  // Enable FIFO, clear them, with 14-byte threshold
+  HAL::Out8(PORT + 4, 0x0B);  // IRQs enabled, RTS/DSR set
+  HAL::Out8(PORT + 4, 0x1E);  // Set in loopback mode, test the serial chip
+  HAL::Out8(PORT + 0, 0xAE);  // Test serial chip (send byte 0xAE and check if
                               // serial returns same byte)
 
   // Check if serial is faulty (i.e: not same byte as sent)
-  if (HAL::in8(PORT) != 0xAE) {
+  if (HAL::In8(PORT) != 0xAE) {
     ke_stop(RUNTIME_CHECK_HANDSHAKE);
   }
 
@@ -46,7 +46,7 @@ bool serial_init() {
 
   // If serial is not faulty set it in normal operation mode
   // (not-loopback with IRQs enabled and OUT#1 and OUT#2 bits enabled)
-  HAL::out8(Detail::PORT + 4, 0x0F);
+  HAL::Out8(Detail::PORT + 4, 0x0F);
 #endif
 
   return true;
@@ -62,7 +62,7 @@ void system_io_print(const char *bytes) {
   SizeT len = string_length(bytes, 256);
 
   while (index < len) {
-    HAL::out8(Detail::PORT, bytes[index]);
+    HAL::Out8(Detail::PORT, bytes[index]);
     ++index;
   }
 
diff --git a/Private/HALKit/AMD64/DebugPort.cxx b/Private/HALKit/AMD64/DebugPort.cxx
index e5138e27..b0f2f6d1 100644
--- a/Private/HALKit/AMD64/DebugPort.cxx
+++ b/Private/HALKit/AMD64/DebugPort.cxx
@@ -41,19 +41,19 @@ void rt_debug_listen(DebuggerPorts* theHook) noexcept {
   if (theHook == nullptr) return;
 
   for (UInt32 i = 0U; i < kDebugMaxPorts; ++i) {
-    HAL::out16(theHook->fPort[i], kDebugMag0);
+    HAL::Out16(theHook->fPort[i], kDebugMag0);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag1);
+    HAL::Out16(theHook->fPort[i], kDebugMag1);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag2);
+    HAL::Out16(theHook->fPort[i], kDebugMag2);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag3);
+    HAL::Out16(theHook->fPort[i], kDebugMag3);
     HAL::rt_wait_for_io();
 
-    if (HAL::in16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++;
+    if (HAL::In16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++;
   }
 }
 }  // namespace HCore
diff --git a/Private/HALKit/AMD64/HalProcessor.cpp b/Private/HALKit/AMD64/HalProcessor.cpp
index afdb29b1..80efed3a 100644
--- a/Private/HALKit/AMD64/HalProcessor.cpp
+++ b/Private/HALKit/AMD64/HalProcessor.cpp
@@ -15,33 +15,33 @@
  */
 
 namespace HCore::HAL {
-void out8(UInt16 port, UInt8 value) {
+void Out8(UInt16 port, UInt8 value) {
   asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-void out16(UInt16 port, UInt16 value) {
+void Out16(UInt16 port, UInt16 value) {
   asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-void out32(UInt16 port, UInt32 value) {
+void Out32(UInt16 port, UInt32 value) {
   asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-UInt8 in8(UInt16 port) {
+UInt8 In8(UInt16 port) {
   UInt8 value = 0UL;
   asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-UInt16 in16(UInt16 port) {
+UInt16 In16(UInt16 port) {
   UInt16 value = 0UL;
   asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-UInt32 in32(UInt16 port) {
+UInt32 In32(UInt16 port) {
   UInt32 value = 0UL;
   asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory");
 
diff --git a/Private/HALKit/AMD64/PCI/Device.cpp b/Private/HALKit/AMD64/PCI/Device.cpp
index 9fdcda43..815043c9 100644
--- a/Private/HALKit/AMD64/PCI/Device.cpp
+++ b/Private/HALKit/AMD64/PCI/Device.cpp
@@ -16,10 +16,10 @@ HCore::UInt LumiaPCIReadRaw(HCore::UInt bar, HCore::UShort bus,
                        ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
                        (bar & 0xFC);
 
-  HCore::HAL::out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
                     target);
 
-  return HCore::HAL::in32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigData);
+  return HCore::HAL::In32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigData);
 }
 
 void LumiaPCISetCfgTarget(HCore::UInt bar, HCore::UShort bus, HCore::UShort dev,
@@ -28,7 +28,7 @@ void LumiaPCISetCfgTarget(HCore::UInt bar, HCore::UShort bus, HCore::UShort dev,
                        ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
                        (bar & ~3);
 
-  HCore::HAL::out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
                     target);
 }
 
@@ -42,10 +42,10 @@ UInt Device::Read(UInt bar, Size sz) {
   LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
-    return HAL::in32((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+    return HAL::In32((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
   if (sz == 2)
-    return HAL::in16((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
-  if (sz == 1) return HAL::in8((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+    return HAL::In16((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+  if (sz == 1) return HAL::In8((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
 
   return 0xFFFF;
 }
@@ -54,11 +54,11 @@ void Device::Write(UInt bar, UIntPtr data, Size sz) {
   LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
-    HAL::out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data);
+    HAL::Out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data);
   if (sz == 2)
-    HAL::out16((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UShort)data);
+    HAL::Out16((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UShort)data);
   if (sz == 1)
-    HAL::out8((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UChar)data);
+    HAL::Out8((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UChar)data);
 }
 
 UShort Device::DeviceId() {
diff --git a/Private/HALKit/AMD64/Processor.hpp b/Private/HALKit/AMD64/Processor.hpp
index 9b73216b..883d1910 100644
--- a/Private/HALKit/AMD64/Processor.hpp
+++ b/Private/HALKit/AMD64/Processor.hpp
@@ -17,13 +17,13 @@
 #define IsLevelTriggered(flag) (flag & 8)
 
 namespace HCore::HAL {
-extern "C" UChar in8(UInt16 port);
-extern "C" UShort in16(UInt16 port);
-extern "C" UInt in32(UInt16 port);
+extern "C" UChar In8(UInt16 port);
+extern "C" UShort In16(UInt16 port);
+extern "C" UInt In32(UInt16 port);
 
-extern "C" void out16(UShort port, UShort byte);
-extern "C" void out8(UShort port, UChar byte);
-extern "C" void out32(UShort port, UInt byte);
+extern "C" void Out16(UShort port, UShort byte);
+extern "C" void Out8(UShort port, UChar byte);
+extern "C" void Out32(UShort port, UInt byte);
 
 extern "C" void rt_wait_for_io();
 extern "C" void rt_halt();
diff --git a/Private/KernelKit/PCI/Express.hpp b/Private/KernelKit/PCI/Express.hpp
index 45676c23..8b46fbeb 100644
--- a/Private/KernelKit/PCI/Express.hpp
+++ b/Private/KernelKit/PCI/Express.hpp
@@ -9,4 +9,6 @@
 
 #pragma once
 
-#include <NewKit/Defines.hpp>
\ No newline at end of file
+#include <NewKit/Defines.hpp>
+
+#define PCI_EXPRESS_BUS_COUNT (4096)
diff --git a/Private/KernelKit/PCI/IO-Impl-AMD64.inl b/Private/KernelKit/PCI/IO-Impl-AMD64.inl
index c5247d13..f720f2b6 100644
--- a/Private/KernelKit/PCI/IO-Impl-AMD64.inl
+++ b/Private/KernelKit/PCI/IO-Impl-AMD64.inl
@@ -7,7 +7,8 @@
 
     Revision History:
 
-    30/01/24: Added file (amlel)
+    30/01/24: Add file. (amlel)
+    02/02/24: Update I/O routines. (amlel)
 
 ------------------------------------------- */
 
@@ -17,11 +18,11 @@ template <typename T>
 T IOArray<Sz>::In(SizeT index) {
   switch (sizeof(T)) {
     case 4:
-      return HAL::in32(m_Ports[index].Leak());
+      return HAL::In32(m_Ports[index].Leak());
     case 2:
-      return HAL::in16(m_Ports[index].Leak());
+      return HAL::In16(m_Ports[index].Leak());
     case 1:
-      return HAL::in8(m_Ports[index].Leak());
+      return HAL::In8(m_Ports[index].Leak());
     default:
       return 0xFFFF;
   }
@@ -33,11 +34,11 @@ void IOArray<Sz>::Out(SizeT index, T value) {
   switch (sizeof(T)) {
 #ifdef __x86_64__
     case 4:
-      HAL::out32(m_Ports[index].Leak(), value);
+      HAL::Out32(m_Ports[index].Leak(), value);
     case 2:
-      HAL::out16(m_Ports[index].Leak(), value);
+      HAL::Out16(m_Ports[index].Leak(), value);
     case 1:
-      HAL::out8(m_Ports[index].Leak(), value);
+      HAL::Out8(m_Ports[index].Leak(), value);
 #endif
     default:
       break;
diff --git a/Private/KernelKit/ProcessManager.hpp b/Private/KernelKit/ProcessManager.hpp
index dbcd08b2..5637dd6f 100644
--- a/Private/KernelKit/ProcessManager.hpp
+++ b/Private/KernelKit/ProcessManager.hpp
@@ -16,8 +16,6 @@
 #include <NewKit/MutableArray.hpp>
 #include <NewKit/UserHeap.hpp>
 
-#include "NewKit/Defines.hpp"
-
 #define kMinMicroTime AffinityKind::kStandard
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
diff --git a/Private/NewBoot/BootKit/Arch/ATA.hxx b/Private/NewBoot/BootKit/Arch/ATA.hxx
new file mode 100644
index 00000000..5c42237a
--- /dev/null
+++ b/Private/NewBoot/BootKit/Arch/ATA.hxx
@@ -0,0 +1,156 @@
+/*
+ *	========================================================
+ *
+ *	NewBoot
+ * 	Copyright Mahrouss Logic, all rights reserved.
+ *
+ * 	========================================================
+ */
+
+#pragma once
+
+#include <CompilerKit/CompilerKit.hpp>
+#include <NewKit/Defines.hpp>
+
+using namespace HCore;
+
+// Status register
+#define ATA_SR_BSY 0x80
+#define ATA_SR_DRDY 0x40
+#define ATA_SR_DF 0x20
+#define ATA_SR_DSC 0x10
+#define ATA_SR_DRQ 0x08
+#define ATA_SR_CORR 0x04
+#define ATA_SR_IDX 0x02
+#define ATA_SR_ERR 0x01
+
+// Error register
+#define ATA_ER_BBK 0x80
+#define ATA_ER_UNC 0x40
+#define ATA_ER_MC 0x20
+#define ATA_ER_IDNF 0x10
+#define ATA_ER_MCR 0x08
+#define ATA_ER_ABRT 0x04
+#define ATA_ER_TK0NF 0x02
+#define ATA_ER_AMNF 0x01
+
+#define ATA_CMD_READ_PIO 0x20
+#define ATA_CMD_READ_PIO_EXT 0x24
+#define ATA_CMD_READ_DMA 0xC8
+#define ATA_CMD_READ_DMA_EXT 0x25
+#define ATA_CMD_WRITE_PIO 0x30
+#define ATA_CMD_WRITE_PIO_EXT 0x34
+#define ATA_CMD_WRITE_DMA 0xCA
+#define ATA_CMD_WRITE_DMA_EXT 0x35
+#define ATA_CMD_CACHE_FLUSH 0xE7
+#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
+#define ATA_CMD_PACKET 0xA0
+#define ATA_CMD_IDENTIFY_PACKET 0xA1
+#define ATA_CMD_IDENTIFY 0xEC
+
+#define ATA_IDENT_DEVICE_TYPE 0
+#define ATA_IDENT_CYLINDERS 2
+#define ATA_IDENT_HEADS 6
+#define ATA_IDENT_SECTORS 12
+#define ATA_IDENT_SERIAL 20
+#define ATA_IDENT_MODEL 54
+#define ATA_IDENT_CAPABILITIES 98
+#define ATA_IDENT_FIELDVALID 106
+#define ATA_IDENT_MAX_LBA 120
+#define ATA_IDENT_COMMANDSETS 164
+#define ATA_IDENT_MAX_LBA_EXT 200
+
+#define ATA_MASTER 0x00
+#define ATA_SLAVE 0x01
+
+// Register
+#define ATA_REG_DATA 0x00
+#define ATA_REG_ERROR 0x01
+#define ATA_REG_FEATURES 0x01
+#define ATA_REG_SEC_COUNT0 0x02
+#define ATA_REG_LBA0 0x03
+#define ATA_REG_LBA1 0x04
+#define ATA_REG_LBA2 0x05
+#define ATA_REG_HDDEVSEL 0x06
+#define ATA_REG_COMMAND 0x07
+#define ATA_REG_STATUS 0x07
+#define ATA_REG_SEC_COUNT1 0x08
+#define ATA_REG_LBA3 0x09
+#define ATA_REG_LBA4 0x0A
+#define ATA_REG_LBA5 0x0B
+#define ATA_REG_CONTROL 0x0C
+#define ATA_REG_ALT_STATUS 0x0C
+#define ATA_REG_DEV_ADDRESS 0x0D
+
+#define ATA_PRIMARY_IO 0x1F0
+#define ATA_SECONDARY_IO 0x170
+#define ATA_PRIMARY_DCR_AS 0x3F6
+#define ATA_SECONDARY_DCR_AS 0x376
+
+// Irq
+#define ATA_PRIMARY_IRQ 14
+#define ATA_SECONDARY_IRQ 15
+
+// Channels
+#define ATA_PRIMARY 0x00
+#define ATA_SECONDARY 0x01
+
+#define ATA_CYL_LOW 4
+#define ATA_CYL_HIGH 5
+
+// IO Direction
+#define ATA_READ 0x00
+#define ATA_WRITE 0x013
+
+#define ATA_PRIMARY_SEL 0xA0
+#define ATA_SECONDARY_SEL 0xB0
+
+// ATA Helpers
+#define ATA_ADDRESS1(x) (x + 3)
+#define ATA_ADDRESS2(x) (x + 4)
+#define ATA_ADDRESS3(x) (x + 5)
+#define ATA_COMMAND(x) (x + 7)
+
+Boolean ATAInitDriver(UInt8 Bus, UInt8 Drv);
+Void ATAWait(UInt16 IO);
+Void ATAReadLba(UInt32 Lba, UInt8 Bus, Boolean Master, wchar_t* Buf,
+                SizeT Offset);
+Void ATAWriteLba(UInt32 Lba, UInt8 Bus, Boolean Master, wchar_t* Buf,
+                 SizeT Offset);
+Boolean ATAIsDetected(Void);
+
+class BATADevice final {
+ public:
+  enum {
+    kPrimary = ATA_PRIMARY_IO,
+    kSecondary = ATA_SECONDARY_IO,
+  };
+
+  explicit BATADevice() noexcept;
+
+  HCORE_COPY_DEFAULT(BATADevice);
+
+  struct ATATraits final {
+    SizeT mBase{1024};
+    UInt16 mBus{kPrimary};
+    Boolean mMaster{false};
+  };
+
+  operator bool() { return ATAIsDetected(); }
+
+  BATADevice& Read(WideChar* Buf, const SizeT& SecCount);
+  BATADevice& Write(WideChar* Buf, const SizeT& SecCount);
+
+  ATATraits& Leak();
+
+ private:
+  ATATraits mTraits;
+};
+
+enum {
+  kATADevicePATA,
+  kATADeviceSATA,
+  kATADevicePATA_PI,
+  kATADeviceSATA_PI,
+  kATADeviceCount,
+};
diff --git a/Private/NewBoot/BootKit/BootKit.hxx b/Private/NewBoot/BootKit/BootKit.hxx
index cec3bdc2..70519aba 100644
--- a/Private/NewBoot/BootKit/BootKit.hxx
+++ b/Private/NewBoot/BootKit/BootKit.hxx
@@ -14,6 +14,7 @@
 
 #pragma once
 
+#include <BootKit/Arch/ATA.hxx>
 #include <NewKit/Defines.hpp>
 
 using namespace HCore;
@@ -27,7 +28,7 @@ enum {
   kSegmentBss = 6,
 };
 
-typedef wchar_t CharacterType;
+typedef WideChar CharacterType;
 
 /**
  * @brief BootKit Text Writer class
@@ -80,6 +81,7 @@ class BFileReader final {
  private:
   Int32 mErrorCode{kOperationOkay};
   CharacterType mPath[255];
+  BATADevice mDevice;
 };
 
 /***********************************************************************************/
@@ -88,3 +90,44 @@ class BFileReader final {
 
 #include <BootKit/Platform.hxx>
 #include <BootKit/Protocol.hxx>
+
+/***********************************************************************************/
+/// Provide some useful processor features.
+/***********************************************************************************/
+
+#ifdef __EFI_x86_64__
+
+inline void Out8(UInt16 port, UInt8 value) {
+  asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory");
+}
+
+inline void Out16(UInt16 port, UInt16 value) {
+  asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory");
+}
+
+inline void Out32(UInt16 port, UInt32 value) {
+  asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory");
+}
+
+inline UInt8 In8(UInt16 port) {
+  UInt8 value = 0UL;
+  asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory");
+
+  return value;
+}
+
+inline UInt16 In16(UInt16 port) {
+  UInt16 value = 0UL;
+  asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory");
+
+  return value;
+}
+
+inline UInt32 In32(UInt16 port) {
+  UInt32 value = 0UL;
+  asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory");
+
+  return value;
+}
+
+#endif  // __EFI_x86_64__
diff --git a/Private/NewBoot/Source/HEL/AMD64/ATA.cxx b/Private/NewBoot/Source/HEL/AMD64/ATA.cxx
new file mode 100644
index 00000000..4f1b3171
--- /dev/null
+++ b/Private/NewBoot/Source/HEL/AMD64/ATA.cxx
@@ -0,0 +1,230 @@
+/*
+ *	========================================================
+ *
+ *	NewBoot
+ * 	Copyright Mahrouss Logic, all rights reserved.
+ *
+ * 	========================================================
+ */
+
+/**
+ * @file ATA.cxx
+ * @author Amlal El Mahrouss (amlalelmahrouss@icloud.com)
+ * @brief ATA driver.
+ * @version 0.1
+ * @date 2024-02-02
+ *
+ * @copyright Copyright (c) 2024
+ *
+ */
+
+#include <BootKit/Arch/ATA.hxx>
+#include <BootKit/BootKit.hxx>
+
+/// bugs: 0
+
+static Boolean kATADetected = false;
+static Int32 kATADeviceType = kATADeviceCount;
+
+void ATASelect(UInt8 Bus, Boolean isMaster) {
+  if (Bus == ATA_PRIMARY)
+    Out8(ATA_PRIMARY_IO + ATA_REG_HDDEVSEL,
+         isMaster ? ATA_PRIMARY_SEL : ATA_SECONDARY_SEL);
+  else
+    Out8(ATA_SECONDARY_IO + ATA_REG_HDDEVSEL,
+         isMaster ? ATA_PRIMARY_SEL : ATA_SECONDARY_SEL);
+}
+
+Boolean ATAInitDriver(UInt8 Bus, UInt8 Drive, UInt16& OutBus,
+                      Boolean& OutMaster) {
+  BTextWriter writer;
+
+  UInt16 IO = (Bus == ATA_PRIMARY) ? ATA_PRIMARY_IO : ATA_SECONDARY_IO;
+
+  ATASelect(Bus, Drive);
+
+  Out8(IO + ATA_REG_SEC_COUNT0, 0);
+  Out8(IO + ATA_REG_LBA0, 0);
+  Out8(IO + ATA_REG_LBA1, 0);
+  Out8(IO + ATA_REG_LBA2, 0);
+
+  Out8(IO + ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
+
+  UInt8 status = In8(IO + ATA_REG_STATUS);
+
+  if (status & ATA_SR_ERR) {
+#ifdef __DEBUG__
+    writer.WriteString(L"HCoreLdr: Init ATA: Bad Drive!\r\n");
+#endif  // ifdef __DEBUG__
+    return false;
+  }
+
+  OutBus = (Bus == ATA_PRIMARY) ? BATADevice::kPrimary : BATADevice::kSecondary;
+  OutMaster = (Bus == ATA_PRIMARY);
+
+  unsigned cl = In16(Bus + ATA_CYL_LOW); /* get the "signature bytes" */
+  unsigned ch = In16(Bus + ATA_CYL_HIGH);
+
+  /* differentiate ATA, ATAPI, SATA and SATAPI */
+  if (cl == 0x14 && ch == 0xEB) {
+    writer.WriteString(L"HCoreLdr: PATAPI drive detected.\r\n");
+    kATADeviceType = kATADevicePATA_PI;
+  }
+  if (cl == 0x69 && ch == 0x96) {
+    writer.WriteString(L"HCoreLdr: SATAPI drive detected.\r\n");
+    kATADeviceType = kATADeviceSATA_PI;
+  }
+  if (cl == 0 && ch == 0) {
+    writer.WriteString(L"HCoreLdr: PATA drive detected.\r\n");
+    kATADeviceType = kATADevicePATA;
+  }
+  if (cl == 0x3c && ch == 0xc3) {
+    writer.WriteString(L"HCoreLdr: SATA drive detected.\r\n");
+    kATADeviceType = kATADeviceSATA;
+  }
+
+  return true;
+}
+
+/*** @brief
+ * This polls the ATA drive.
+ */
+void ATAWait(UInt16 IO) {
+  for (int i = 0; i < 4000; i++) In8(IO + ATA_REG_ALT_STATUS);
+}
+
+void ATAPoll(UInt16 IO) { ATAWait(IO); }
+
+Void ATAReadLba(UInt32 Lba, UInt8 Bus, Boolean Master, CharacterType* Buf,
+                SizeT Offset) {
+  UInt16 IO = Bus;
+
+  ATASelect(IO + ATA_REG_HDDEVSEL,
+            (Master ? ATA_MASTER : ATA_SLAVE) | Lba >> 24 & 0xF);
+
+  ATASelect(IO + 1, 0);
+
+  Out8(IO + ATA_REG_SEC_COUNT0, 1);
+
+  Out8(IO + ATA_REG_LBA0, (UInt8)Lba);
+  Out8(IO + ATA_REG_LBA1, (UInt8)(Lba >> 8));
+  Out8(IO + ATA_REG_LBA2, (UInt8)(Lba >> 16));
+
+  Out8(IO + ATA_REG_COMMAND, ATA_CMD_READ_PIO);
+
+  ATAPoll(IO);
+
+  for (SizeT index = 0UL; index < 256; ++index) {
+    Buf[index + Offset] = In16(IO + ATA_REG_DATA);
+  }
+
+  ATAWait(IO);
+}
+
+Void ATAWriteLba(UInt32 Lba, UInt8 Bus, Boolean Master, wchar_t* Buf,
+                 SizeT Offset) {
+  UInt16 IO = Bus;
+
+  ATASelect(IO + ATA_REG_HDDEVSEL,
+            (Master ? ATA_MASTER : ATA_SLAVE) | Lba >> 24 & 0xF);
+
+  ATASelect(IO + 1, 0);
+
+  Out8(IO + ATA_REG_SEC_COUNT0, 1);
+
+  Out8(IO + ATA_REG_LBA0, (UInt8)Lba);
+  Out8(IO + ATA_REG_LBA1, (UInt8)(Lba >> 8));
+  Out8(IO + ATA_REG_LBA2, (UInt8)(Lba >> 16));
+
+  Out8(IO + ATA_REG_COMMAND, ATA_CMD_WRITE_PIO);
+
+  ATAPoll(IO);
+
+  for (SizeT index = 0UL; index < 256; ++index) {
+    Out16(IO + ATA_REG_DATA, Buf[index + Offset]);
+  }
+
+  ATAWait(IO);
+}
+
+/***
+ *
+ *
+ * ATA Device class.
+ *
+ *
+ */
+
+Boolean ATAIsDetected(Void) { return kATADetected; }
+
+/**
+ * @brief Init ATA driver.
+ * @param void none.
+ */
+BATADevice::BATADevice() noexcept {
+  if (ATAIsDetected()) return;
+
+  if (ATAInitDriver(ATA_PRIMARY, true, this->Leak().mBus,
+                    this->Leak().mMaster) ||
+      ATAInitDriver(ATA_PRIMARY, false, this->Leak().mBus,
+                    this->Leak().mMaster) ||
+      ATAInitDriver(ATA_SECONDARY, true, this->Leak().mBus,
+                    this->Leak().mMaster) ||
+      ATAInitDriver(ATA_SECONDARY, false, this->Leak().mBus,
+                    this->Leak().mMaster)) {
+    kATADetected = true;
+
+    BTextWriter writer;
+    writer.WriteString(L"BATADevice::BATADevice: OnLine\r\n");
+  }
+}
+
+/**
+    @brief Read Buf from disk
+    @param Sz Sector size
+    @param Buf buffer
+*/
+BATADevice& BATADevice::Read(CharacterType* Buf, const SizeT& Sz) {
+  if (!ATAIsDetected()) return *this;
+
+  if (!Buf || Sz < 1) return *this;
+
+  SizeT Off = 0;
+
+  for (SizeT i = 0UL; i < Sz; ++i) {
+    ATAReadLba(this->Leak().mBase + i, this->Leak().mBus, this->Leak().mMaster,
+               Buf, Off);
+
+    Off += 512;
+  }
+
+  return *this;
+}
+
+/**
+    @brief Write Buf into disk
+    @param Sz Sector size
+    @param Buf buffer
+*/
+BATADevice& BATADevice::Write(CharacterType* Buf, const SizeT& Sz) {
+  if (!ATAIsDetected()) return *this;
+
+  if (!Buf || Sz < 1) return *this;
+
+  SizeT Off = 0UL;
+
+  for (SizeT i = 0UL; i < Sz; ++i) {
+    ATAWriteLba(this->Leak().mBase + i, this->Leak().mBus, this->Leak().mMaster,
+                Buf, Off);
+
+    Off += 512;
+  }
+
+  return *this;
+}
+
+/**
+ * @brief ATA Config getter.
+ * @return BATADevice::ATATraits& the drive config.
+ */
+BATADevice::ATATraits& BATADevice::Leak() { return mTraits; }
diff --git a/Private/NewBoot/Source/HEL/AMD64/BootKit.cxx b/Private/NewBoot/Source/HEL/AMD64/BootKit.cxx
index 43a79b41..99f8d41b 100644
--- a/Private/NewBoot/Source/HEL/AMD64/BootKit.cxx
+++ b/Private/NewBoot/Source/HEL/AMD64/BootKit.cxx
@@ -8,7 +8,7 @@
  */
 
 #include <BootKit/BootKit.hxx>
-#include <EFIKit/EFILib.hxx>
+#include <EFIKit/Api.hxx>
 
 /// bugs 0
 
@@ -85,7 +85,7 @@ BFileReader::BFileReader(const CharacterType *path) {
 */
 HCore::VoidPtr BFileReader::ReadAll() {
   BTextWriter writer;
-  writer.WriteString(L"*** PE/COFF: Reading ")
+  writer.WriteString(L"*** BFileReader::ReadAll: Reading ")
       .WriteString(mPath)
       .WriteString(L" *** \r\n");
 
diff --git a/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx b/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx
index d06338b5..69f235c4 100644
--- a/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx
+++ b/Private/NewBoot/Source/HEL/AMD64/Entrypoint.cxx
@@ -10,7 +10,7 @@
 #define __BOOTLOADER__ 1
 
 #include <BootKit/BootKit.hxx>
-#include <EFIKit/EFILib.hxx>
+#include <EFIKit/Api.hxx>
 
 // don't remove EfiGUID, it will call initializer_list!
 
@@ -19,14 +19,14 @@ EFI_EXTERN_C int EfiMain(EfiHandlePtr ImageHandle,
   KeInitEFI(SystemTable);
 
   BTextWriter writer;
+
   writer.WriteString(L"HCoreLdr: Firmware: ")
       .WriteString(SystemTable->FirmwareVendor)
-      .WriteString(L"\r\nHCoreLdr: Booting on \\Volume0\\ (FAT32)")
       .WriteString(L"\r\n");
 
   UInt64 mapKey = 0;
 
-  BFileReader reader(L"\\MAHROUSS\\Root\\System\\HCoreKrnl.exe\0");
+  BFileReader reader(L"\\Root\\System\\HCoreKrnl.exe\0");
   auto blob = reader.ReadAll();
 
   if (!blob)
diff --git a/Private/NewBoot/Source/HEL/AMD64/Platform.cxx b/Private/NewBoot/Source/HEL/AMD64/Platform.cxx
index dbd2b900..f92de33b 100644
--- a/Private/NewBoot/Source/HEL/AMD64/Platform.cxx
+++ b/Private/NewBoot/Source/HEL/AMD64/Platform.cxx
@@ -15,8 +15,7 @@
  */
 
 #include <BootKit/Platform.hxx>
-
-#include "EFIKit/EFILib.hxx"
+#include <EFIKit/Api.hxx>
 
 extern "C" void rt_halt() { asm volatile("hlt"); }
 
diff --git a/Private/NewBoot/Source/makefile b/Private/NewBoot/Source/makefile
index f10a4194..063fa42a 100644
--- a/Private/NewBoot/Source/makefile
+++ b/Private/NewBoot/Source/makefile
@@ -6,7 +6,7 @@
 CC_GNU=x86_64-w64-mingw32-g++
 LD_GNU=x86_64-w64-mingw32-ld
 
-FLAG_GNU=-fshort-wchar -fPIC -D__DBG__ -DEFI_FUNCTION_WRAPPER -I../ -I../../ -I../../efiSDK/inc -I./ -c  -ffreestanding -fno-rtti -fno-exceptions -std=c++20 -D__HAVE_HCORE_APIS__ -D__HCORE__ -I./ -I$(HOME)/
+FLAG_GNU=-fshort-wchar -fPIC -D__DEBUG__ -DEFI_FUNCTION_WRAPPER -I../ -I../../ -I../../efiSDK/inc -I./ -c  -ffreestanding -fno-rtti -fno-exceptions -std=c++20 -D__HAVE_HCORE_APIS__ -D__HCORE__ -I./ -I$(HOME)/
 
 .PHONY: invalid-recipe
 invalid-recipe:
@@ -14,15 +14,14 @@ invalid-recipe:
 
 .PHONY: bootloader-amd64
 bootloader-amd64:
-	$(CC_GNU) $(FLAG_GNU) HEL/AMD64/*.cxx *.cxx
+	$(CC_GNU) $(FLAG_GNU) HEL/AMD64/*.cxx
 	$(LD_GNU) *.o -e efi_main -filealign:16 -shared --subsystem=10 -ffreestanding -o HCoreLdr.exe
 	cp HCoreLdr.exe CDROM/EFI/BOOT/BOOTX64.EFI
-	cp ../../HCoreKrnl.exe CDROM/EFI/BOOT/HCoreKrnl.exe
 
 .PHONY: run-efi-debug
 run-efi-debug:
 	wget https://retrage.github.io/edk2-nightly/bin/DEBUGX64_OVMF.fd -O OVMF.fd
-	qemu-system-x86_64 -bios OVMF.fd -net none -drive file=fat:rw:CDROM,format=raw -d int
+	qemu-system-x86_64 -bios OVMF.fd -drive file=fat:rw:CDROM,format=raw -d int
 
 .PHONY: clean
 clean:
diff --git a/Internal/.gitkeep b/Tools/.gitkeep
index e69de29b..e69de29b 100644
--- a/Internal/.gitkeep
+++ b/Tools/.gitkeep
diff --git a/Internal/Tools/NewFSPartTool.cxx b/Tools/PartTool.cxx
index 41bdd392..df40ae3c 100644
--- a/Internal/Tools/NewFSPartTool.cxx
+++ b/Tools/PartTool.cxx
@@ -20,7 +20,8 @@
 
 int main() {
   std::cout
-      << "NewFSPartTool: Make a NewFS partition image from a directory!\n"
+      << "PartTool: build a NewFS partition image from a directory!\n"
       << "Copyright Mahrouss Logic, all rights reserved. (INTERNAL TOOL)\n";
+
   return 0;
 }