Merged in MHR-23 (pull request #12)

MHR-23: Merge work.

9 files changed, 431 insertions, 0 deletions

diff --git a/Kernel/KernelKit/PCI/Database.hpp b/Kernel/KernelKit/PCI/Database.hpp
new file mode 100644
index 00000000..002e572a
--- /dev/null
+++ b/Kernel/KernelKit/PCI/Database.hpp
@@ -0,0 +1,38 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+------------------------------------------- */
+#pragma once
+
+#include <KernelKit/PCI/Device.hpp>
+#include <NewKit/Defines.hpp>
+
+namespace NewOS
+{
+	namespace Types
+	{
+		// https://wiki.osdev.org/PCI
+		enum class PciDeviceKind : UChar
+		{
+			MassStorageController			  = 0x1,
+			NetworkController				  = 0x2,
+			DisplayController				  = 0x3,
+			MultimediaController			  = 0x4,
+			MemoryController				  = 0x5,
+			Bridge							  = 0x6,
+			CommunicationController			  = 0x7,
+			GenericSystemPeripheral			  = 0x8,
+			InputDeviceController			  = 0x9,
+			DockingStation					  = 0xa,
+			Processor						  = 0xb,
+			SerialBusController				  = 0xc,
+			WirelessController				  = 0xd,
+			IntelligentController			  = 0xe,
+			SatelliteCommunicationsController = 0xf,
+			CoProcessor						  = 0x40,
+			Unassgined						  = 0xf,
+			Invalid							  = Unassgined,
+		};
+	} // namespace Types
+} // namespace NewOS
diff --git a/Kernel/KernelKit/PCI/Device.hpp b/Kernel/KernelKit/PCI/Device.hpp
new file mode 100644
index 00000000..69a99494
--- /dev/null
+++ b/Kernel/KernelKit/PCI/Device.hpp
@@ -0,0 +1,79 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+------------------------------------------- */
+#pragma once
+
+#include <NewKit/Defines.hpp>
+
+namespace NewOS::PCI
+{
+	enum class PciConfigKind : UShort
+	{
+		ConfigAddress = 0xCF8,
+		ConfigData	  = 0xCFC,
+		Invalid		  = 0xFFF
+	};
+
+	class Device final
+	{
+	public:
+		Device() = default;
+
+	public:
+		explicit Device(UShort bus, UShort device, UShort function, UShort bar);
+
+		Device& operator=(const Device&) = default;
+
+		Device(const Device&) = default;
+
+		~Device();
+
+	public:
+		UInt Read(UInt bar, Size szData);
+		void Write(UInt bar, UIntPtr data, Size szData);
+
+	public:
+		operator bool();
+
+	public:
+		template <typename T>
+		UInt Read(UInt bar)
+		{
+			static_assert(sizeof(T) <= 4, "64-bit PCI addressing is unsupported");
+			return Read(bar, sizeof(T));
+		}
+
+		template <typename T>
+		void Write(UInt bar, UIntPtr data)
+		{
+			static_assert(sizeof(T) <= 4, "64-bit PCI addressing is unsupported");
+			Write(bar, data, sizeof(T));
+		}
+
+	public:
+		UShort DeviceId();
+		UShort VendorId();
+		UShort InterfaceId();
+		UChar  Class();
+		UChar  Subclass();
+		UChar  ProgIf();
+		UChar  HeaderType();
+
+	public:
+		void EnableMmio();
+		void BecomeBusMaster(); // for PCI-DMA, PC-DMA does not need that.
+
+		UShort Vendor();
+
+	private:
+		UShort fBus;
+		UShort fDevice;
+		UShort fFunction;
+		UShort fBar;
+	};
+} // namespace NewOS::PCI
+
+EXTERN_C void NewOSPCISetCfgTarget(NewOS::UInt bar);
+EXTERN_C NewOS::UInt NewOSPCIReadRaw(NewOS::UInt bar);
diff --git a/Kernel/KernelKit/PCI/Dma.hpp b/Kernel/KernelKit/PCI/Dma.hpp
new file mode 100644
index 00000000..dc7b8601
--- /dev/null
+++ b/Kernel/KernelKit/PCI/Dma.hpp
@@ -0,0 +1,81 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+------------------------------------------- */
+
+#pragma once
+
+#include <KernelKit/DeviceManager.hpp>
+#include <KernelKit/PCI/Device.hpp>
+#include <NewKit/Array.hpp>
+#include <NewKit/OwnPtr.hpp>
+#include <NewKit/Ref.hpp>
+
+namespace NewOS
+{
+	enum class DmaKind
+	{
+		PCI, // Bus mastering is required to be turned on. Basiaclly a request
+		// control system. 64-Bit access depends on the PAE bit and the device
+		// (if Double Address Cycle is available)
+		ISA, // Four DMA channels 0-3; 8 bit transfers and only a megabyte of RAM.
+		Invalid,
+	};
+
+	class DMAWrapper final
+	{
+	public:
+		explicit DMAWrapper() = delete;
+
+	public:
+		explicit DMAWrapper(nullPtr) = delete;
+		explicit DMAWrapper(voidPtr Ptr, DmaKind Kind = DmaKind::PCI)
+			: fAddress(Ptr), fKind(Kind)
+		{
+		}
+
+	public:
+		DMAWrapper& operator=(voidPtr Ptr);
+
+	public:
+		DMAWrapper& operator=(const DMAWrapper&) = default;
+		DMAWrapper(const DMAWrapper&)			 = default;
+
+	public:
+		~DMAWrapper() = default;
+
+		template <class T>
+		T* operator->();
+
+		template <class T>
+		T* Get(const UIntPtr off = 0);
+
+	public:
+			 operator bool();
+		bool operator!();
+
+	public:
+		bool	Write(const UIntPtr& bit, const UIntPtr& offset);
+		UIntPtr Read(const UIntPtr& offset);
+		Boolean Check(UIntPtr offset) const;
+
+	public:
+		UIntPtr operator[](const UIntPtr& offset);
+
+	private:
+		voidPtr fAddress{nullptr};
+		DmaKind fKind{DmaKind::Invalid};
+
+	private:
+		friend class DMAFactory;
+	};
+
+	class DMAFactory final
+	{
+	public:
+		static OwnPtr<IOBuf<Char*>> Construct(OwnPtr<DMAWrapper>& dma);
+	};
+} // namespace NewOS
+
+#include <KernelKit/PCI/Dma.inl>
diff --git a/Kernel/KernelKit/PCI/Dma.inl b/Kernel/KernelKit/PCI/Dma.inl
new file mode 100644
index 00000000..53c52802
--- /dev/null
+++ b/Kernel/KernelKit/PCI/Dma.inl
@@ -0,0 +1,20 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+------------------------------------------- */
+
+namespace NewOS
+{
+    template<class T>
+    T* DMAWrapper::operator->()
+    {
+        return fAddress;
+    }
+
+    template<class T>
+    T* DMAWrapper::Get(const UIntPtr offset)
+    {
+        return reinterpret_cast<T*>((UIntPtr) fAddress + offset);
+    }
+}
diff --git a/Kernel/KernelKit/PCI/Express.hpp b/Kernel/KernelKit/PCI/Express.hpp
new file mode 100644
index 00000000..d6266ad2
--- /dev/null
+++ b/Kernel/KernelKit/PCI/Express.hpp
@@ -0,0 +1,11 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+------------------------------------------- */
+
+#pragma once
+
+#include <NewKit/Defines.hpp>
+
+#define PCI_EXPRESS_BUS_COUNT (4096)
diff --git a/Kernel/KernelKit/PCI/IO-Impl-AMD64.inl b/Kernel/KernelKit/PCI/IO-Impl-AMD64.inl
new file mode 100644
index 00000000..92a15b8b
--- /dev/null
+++ b/Kernel/KernelKit/PCI/IO-Impl-AMD64.inl
@@ -0,0 +1,47 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+    File: IO-Impl-AMD64.hpp
+    Purpose: I/O for AMD64.
+
+    Revision History:
+
+    30/01/24: Add file. (amlel)
+    02/02/24: Update I/O routines. (amlel)
+
+------------------------------------------- */
+
+namespace NewOS {
+template <SizeT Sz>
+template <typename T>
+T IOArray<Sz>::In(SizeT index) {
+  switch (sizeof(T)) {
+    case 4:
+      return HAL::In32(fPorts[index].Leak());
+    case 2:
+      return HAL::In16(fPorts[index].Leak());
+    case 1:
+      return HAL::In8(fPorts[index].Leak());
+    default:
+      return 0xFFFF;
+  }
+}
+
+template <SizeT Sz>
+template <typename T>
+void IOArray<Sz>::Out(SizeT index, T value) {
+  switch (sizeof(T)) {
+#ifdef __x86_64__
+    case 4:
+      HAL::Out32(fPorts[index].Leak(), value);
+    case 2:
+      HAL::Out16(fPorts[index].Leak(), value);
+    case 1:
+      HAL::Out8(fPorts[index].Leak(), value);
+#endif
+    default:
+      break;
+  }
+}
+}  // namespace NewOS
diff --git a/Kernel/KernelKit/PCI/IO.hpp b/Kernel/KernelKit/PCI/IO.hpp
new file mode 100644
index 00000000..0b10f5d0
--- /dev/null
+++ b/Kernel/KernelKit/PCI/IO.hpp
@@ -0,0 +1,59 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+------------------------------------------- */
+
+#pragma once
+
+#include <ArchKit/ArchKit.hpp>
+#include <NewKit/Array.hpp>
+#include <NewKit/Defines.hpp>
+#include <NewKit/Ref.hpp>
+
+namespace NewOS
+{
+	template <SizeT Sz>
+	class IOArray final
+	{
+	public:
+		IOArray() = delete;
+
+		IOArray(nullPtr) = delete;
+
+		explicit IOArray(Array<UShort, Sz>& ports)
+			: fPorts(ports)
+		{
+		}
+		~IOArray()
+		{
+		}
+
+		IOArray& operator=(const IOArray&) = default;
+
+		IOArray(const IOArray&) = default;
+
+		operator bool()
+		{
+			return !fPorts.Empty();
+		}
+
+	public:
+		template <typename T>
+		T In(SizeT index);
+
+		template <typename T>
+		void Out(SizeT index, T value);
+
+	private:
+		Array<UShort, Sz> fPorts;
+	};
+
+	using IOArray16 = IOArray<16>;
+} // namespace NewOS
+
+#ifdef __x86_64__
+#include <KernelKit/PCI/IO-Impl-AMD64.inl>
+#else
+#error Please provide platform specific code for the I/O
+#endif // ifdef __x86_64__
diff --git a/Kernel/KernelKit/PCI/Iterator.hpp b/Kernel/KernelKit/PCI/Iterator.hpp
new file mode 100644
index 00000000..278711a7
--- /dev/null
+++ b/Kernel/KernelKit/PCI/Iterator.hpp
@@ -0,0 +1,38 @@
+#ifndef __PCI_ITERATOR_HPP__
+#define __PCI_ITERATOR_HPP__
+
+#include <KernelKit/PCI/Database.hpp>
+#include <KernelKit/PCI/Device.hpp>
+#include <NewKit/Array.hpp>
+#include <NewKit/Defines.hpp>
+#include <NewKit/Ref.hpp>
+
+#define NEWOS_BUS_COUNT		 (256)
+#define NEWOS_DEVICE_COUNT	 (33)
+#define NEWOS_FUNCTION_COUNT (8)
+
+namespace NewOS::PCI
+{
+	class Iterator final
+	{
+	public:
+		Iterator() = delete;
+
+	public:
+		explicit Iterator(const Types::PciDeviceKind& deviceType);
+
+		Iterator& operator=(const Iterator&) = default;
+
+		Iterator(const Iterator&) = default;
+
+		~Iterator();
+
+	public:
+		Ref<PCI::Device> operator[](const Size& sz);
+
+	private:
+		Array<PCI::Device, NEWOS_BUS_COUNT> fDevices;
+	};
+} // namespace NewOS::PCI
+
+#endif // __PCI_ITERATOR_HPP__
diff --git a/Kernel/KernelKit/PCI/PCI.hpp b/Kernel/KernelKit/PCI/PCI.hpp
new file mode 100644
index 00000000..2e523d4a
--- /dev/null
+++ b/Kernel/KernelKit/PCI/PCI.hpp
@@ -0,0 +1,58 @@
+/* -------------------------------------------
+
+    Copyright SoftwareLabs
+
+------------------------------------------- */
+#pragma once
+
+#include <NewKit/Defines.hpp>
+
+#define PCI_CONFIG_ADDRESS (0xCF8)
+#define PCI_CONFIG_DATA	   (0xCFC)
+
+#define PCI_DEVICE_COUNT (32)
+#define PCI_FUNC_COUNT	 (8)
+#define PCI_BUS_COUNT	 (255)
+
+namespace NewOS::PCI
+{
+	// model
+	struct DeviceHeader
+	{
+		UInt16 VendorId;
+		UInt16 DeviceId;
+		UInt8  Command;
+		UInt8  Status;
+		UInt8  RevisionId;
+		UInt8  ProgIf;
+		UInt8  SubClass;
+		UInt8  Class;
+		UInt8  CacheLineSz;
+		UInt8  LatencyTimer;
+		UInt8  HeaderType;
+		UInt8  Bist;
+		UInt8  Bus;
+		UInt8  Device;
+		UInt8  Function;
+	};
+
+	namespace Detail
+	{
+		class BAR
+		{
+		public:
+			UIntPtr BAR;
+			SizeT	Size;
+		};
+	} // namespace Detail
+
+	class BAR
+	{
+	public:
+		Detail::BAR BAR1;
+		Detail::BAR BAR2;
+		Detail::BAR BAR3;
+		Detail::BAR BAR4;
+		Detail::BAR BAR5;
+	};
+} // namespace NewOS::PCI