Unstable: See below.

These changes are related to the current ticket regarding AHCI support.
This commit is just to upstream changes from local.

Signed-off-by: Amlal El Mahrouss <amlal@el-mahrouss-logic.com>

22 files changed, 0 insertions, 770 deletions

diff --git a/Private/Drivers/.gitkeep b/Private/Drivers/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/ACPI/.gitkeep b/Private/Drivers/ACPI/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/ACPI/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/ACPI/ACPI.hpp b/Private/Drivers/ACPI/ACPI.hpp
deleted file mode 100644
index 1a4329fc..00000000
--- a/Private/Drivers/ACPI/ACPI.hpp
+++ /dev/null
@@ -1,67 +0,0 @@
-/* -------------------------------------------
-
-    Copyright Mahrouss Logic
-
-------------------------------------------- */
-
-#ifndef __ACPI__
-#define __ACPI__
-
-/**
-    https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html
-    https://wiki.osdev.org/RSDT
-*/
-
-#include <NewKit/Defines.hpp>
-
-namespace HCore {
-class SDT {
- public:
-  Char Signature[4];
-  UInt32 Length;
-  UInt8 Revision;
-  Char Checksum;
-  Char OemId[6];
-  Char OemTableId[8];
-  UInt32 OemRev;
-  UInt32 CreatorID;
-  UInt32 CreatorRevision;
-};
-
-class RSDP : public SDT {
- public:
-  UInt32 RsdtAddress;
-  UIntPtr XsdtAddress;
-  UInt8 ExtendedChecksum;
-  UInt8 Reserved0[3];
-};
-
-class ConfigHeader {
- public:
-  UInt64 BaseAddress;
-  UInt16 PciSegGroup;
-  UInt8 StartBus;
-  UInt8 EndBus;
-  UInt32 Reserved;
-};
-
-enum class AddressSpace : UInt8 {
-  SystemMemory = 0,
-  SystemIO = 1,
-  Pci = 2,
-  Controller = 3,
-  SmBus = 4,
-  Invalid = 0xFF,
-};
-
-class Address {
- public:
-  AddressSpace AddressSpaceId;
-  UInt8 RegisterBitWidth;
-  UInt8 RegisterBitOffset;
-  UInt8 Reserved;
-  UIntPtr Address;
-};
-}  // namespace HCore
-
-#endif  // !__ACPI__
diff --git a/Private/Drivers/ACPI/ACPIManager.hxx b/Private/Drivers/ACPI/ACPIManager.hxx
deleted file mode 100644
index dc3dd573..00000000
--- a/Private/Drivers/ACPI/ACPIManager.hxx
+++ /dev/null
@@ -1,44 +0,0 @@
-/* -------------------------------------------
-
-    Copyright Mahrouss Logic
-
-------------------------------------------- */
-
-#ifndef __ACPI_MANAGER__
-#define __ACPI_MANAGER__
-
-#include <Drivers/ACPI/ACPI.hpp>
-#include <KernelKit/DebugOutput.hpp>
-#include <NewKit/Defines.hpp>
-#include <NewKit/Ref.hpp>
-
-namespace HCore {
-class ACPIManager final {
- public:
-  explicit ACPIManager(voidPtr rsdptr);
-  ~ACPIManager() = default;
-
-  ACPIManager &operator=(const ACPIManager &) = default;
-  ACPIManager(const ACPIManager &) = default;
-
- public:
-  void Shutdown();  // shutdown
-  void Reset();     // soft-reboot
-
-  ErrorOr<voidPtr> Find(const char *signature);
-
-  bool Checksum(const char *checksum, SSizeT len);  // watch for collides!
-
- public:
-  ErrorOr<voidPtr> operator[](const char *signature) {
-    return this->Find(signature);
-  }
-
- private:
-  VoidPtr m_Rsdp;    // pointer to root descriptor.
-  SSizeT m_Entries;  // number of entries, -1 tells that no invalid entries were
-                     // found.
-};
-}  // namespace HCore
-
-#endif  // !__ACPI_MANAGER__
diff --git a/Private/Drivers/ACPI/compile_flags.txt b/Private/Drivers/ACPI/compile_flags.txt
deleted file mode 100644
index 1bc51142..00000000
--- a/Private/Drivers/ACPI/compile_flags.txt
+++ /dev/null
@@ -1,4 +0,0 @@
--I./
--I../
--I../../
--std=c++20
diff --git a/Private/Drivers/AHCI/.gitkeep b/Private/Drivers/AHCI/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/AHCI/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/AHCI/Defines.hxx b/Private/Drivers/AHCI/Defines.hxx
deleted file mode 100644
index c1d3c063..00000000
--- a/Private/Drivers/AHCI/Defines.hxx
+++ /dev/null
@@ -1,316 +0,0 @@
-/* -------------------------------------------
-
-    Copyright Mahrouss Logic
-
-    File: Defines.hxx
-    Purpose: AHCI header.
-
-    Revision History:
-
-    03/02/24: Added file (amlel)
-
-------------------------------------------- */
-
-#pragma once
-
-#include <NewKit/Defines.hpp>
-
-// Forward declarations of structs.
-
-struct HbaPort;
-struct FisData;
-struct FisRegD2H;
-struct FisRegH2D;
-
-// Enum types
-
-typedef enum {
-  FIS_TYPE_REG_H2D = 0x27,    // Register FIS - host to device
-  FIS_TYPE_REG_D2H = 0x34,    // Register FIS - device to host
-  FIS_TYPE_DMA_ACT = 0x39,    // DMA activate FIS - device to host
-  FIS_TYPE_DMA_SETUP = 0x41,  // DMA setup FIS - bidirectional
-  FIS_TYPE_DATA = 0x46,       // Data FIS - bidirectional
-  FIS_TYPE_BIST = 0x58,       // BIST activate FIS - bidirectional
-  FIS_TYPE_PIO_SETUP = 0x5F,  // PIO setup FIS - device to host
-  FIS_TYPE_DEV_BITS = 0xA1,   // Set device bits FIS - device to host
-} AHCI_FIS_TYPE;
-
-typedef enum {
-  AHCI_ATA_CMD_IDENTIFY = 0xEC,
-  AHCI_ATA_CMD_READ_DMA = 0xC8,
-  AHCI_ATA_CMD_READ_DMA_EX = 0x25,
-  AHCI_ATA_CMD_WRITE_DMA = 0xCA,
-  AHCI_ATA_CMD_WRITE_DMA_EX = 0x35
-} AHCI_FIS_COMMAND;
-
-typedef struct FisRegH2D final {
-  // DWORD 0
-  HCore::UInt8 fisType;  // FIS_TYPE_REG_H2D
-
-  HCore::UInt8 portMul : 4;    // Port multiplier
-  HCore::UInt8 reserved0 : 3;  // Reserved
-  HCore::UInt8 cmdOrCtrl : 1;  // 1: Command, 0: Control
-
-  HCore::UInt8 command;   // Command register
-  HCore::UInt8 featurel;  // Feature register, 7:0
-
-  // DWORD 1
-  HCore::UInt8 lba0;    // LBA low register, 7:0
-  HCore::UInt8 lba1;    // LBA mid register, 15:8
-  HCore::UInt8 lba2;    // LBA high register, 23:16
-  HCore::UInt8 device;  // Device register
-
-  // DWORD 2
-  HCore::UInt8 lba3;         // LBA register, 31:24
-  HCore::UInt8 lba4;         // LBA register, 39:32
-  HCore::UInt8 lba5;         // LBA register, 47:40
-  HCore::UInt8 featureHigh;  // Feature register, 15:8
-
-  // DWORD 3
-  HCore::UInt8 countLow;   // Count register, 7:0
-  HCore::UInt8 countHigh;  // Count register, 15:8
-  HCore::UInt8 icc;        // Isochronous command completion
-  HCore::UInt8 control;    // Control register
-
-  // DWORD 4
-  HCore::UInt8 reserved1[4];  // Reserved
-} FisRegH2D;
-
-typedef struct FisRegD2H final {
-  // DWORD 0
-  HCore::UInt8 fisType;  // FIS_TYPE_REG_D2H
-
-  HCore::UInt8 portMul : 4;       // Port multiplier
-  HCore::UInt8 reserved0 : 2;     // Reserved
-  HCore::UInt8 interruptBit : 1;  // Interrupt bit
-  HCore::UInt8 reserved1 : 1;     // Reserved
-
-  HCore::UInt8 status;  // Status register
-  HCore::UInt8 error;   // Error register
-
-  // DWORD 1
-  HCore::UInt8 lba0;    // LBA low register, 7:0
-  HCore::UInt8 lba1;    // LBA mid register, 15:8
-  HCore::UInt8 lba2;    // LBA high register, 23:16
-  HCore::UInt8 device;  // Device register
-
-  // DWORD 2
-  HCore::UInt8 lba3;  // LBA register, 31:24
-  HCore::UInt8 lba4;  // LBA register, 39:32
-  HCore::UInt8 lba5;  // LBA register, 47:40
-  HCore::UInt8 rsv2;  // Reserved
-
-  // DWORD 3
-  HCore::UInt8 countLow;   // Count register, 7:0
-  HCore::UInt8 countHigh;  // Count register, 15:8
-  HCore::UInt8 rsv3[2];    // Reserved
-
-  // DWORD 4
-  HCore::UInt8 rsv4[4];  // Reserved
-} FisRegD2H;
-
-typedef struct FisData final {
-  // DWORD 0
-  HCore::UInt8 fisType;  // FIS_TYPE_DATA
-
-  HCore::UInt8 portMul : 4;    // Port multiplier
-  HCore::UInt8 reserved0 : 4;  // Reserved
-
-  HCore::UInt8 reserved1[2];  // Reserved
-
-  // DWORD 1 ~ N
-  HCore::UInt32 data[1];  // Payload
-} FisData;
-
-typedef struct FisPioSetup final {
-  // DWORD 0
-  HCore::UInt8 fisType;  // FIS_TYPE_PIO_SETUP
-
-  HCore::UInt8 portMul : 4;       // Port multiplier
-  HCore::UInt8 reserved0 : 1;     // Reserved
-  HCore::UInt8 d : 1;             // Data transfer direction, 1 - device to host
-  HCore::UInt8 interruptBit : 1;  // Interrupt bit
-  HCore::UInt8 reserved1 : 1;
-
-  HCore::UInt8 status;  // Status register
-  HCore::UInt8 error;   // Error register
-
-  // DWORD 1
-  HCore::UInt8 lba0;    // LBA low register, 7:0
-  HCore::UInt8 lba1;    // LBA mid register, 15:8
-  HCore::UInt8 lba2;    // LBA high register, 23:16
-  HCore::UInt8 device;  // Device register
-
-  // DWORD 2
-  HCore::UInt8 lba3;  // LBA register, 31:24
-  HCore::UInt8 lba4;  // LBA register, 39:32
-  HCore::UInt8 lba5;  // LBA register, 47:40
-  HCore::UInt8 rsv2;  // Reserved
-
-  // DWORD 3
-  HCore::UInt8 countLow;   // Count register, 7:0
-  HCore::UInt8 countHigh;  // Count register, 15:8
-  HCore::UInt8 rsv3;       // Reserved
-  HCore::UInt8 eStatus;    // New value of status register
-
-  // DWORD 4
-  HCore::UInt16 tc;      // Transfer count
-  HCore::UInt8 rsv4[2];  // Reserved
-} FisPioSetup;
-
-typedef struct FisDmaSetup final {
-  // DWORD 0
-  HCore::UInt8 fisType;  // FIS_TYPE_DMA_SETUP
-
-  HCore::UInt8 portMul : 4;       // Port multiplier
-  HCore::UInt8 reserved0 : 1;     // Reserved
-  HCore::UInt8 dtd : 1;           // Data transfer direction, 1 - device to host
-  HCore::UInt8 interruptBit : 1;  // Interrupt bit
-  HCore::UInt8
-      autoEnable : 1;  // Auto-activate. Specifies if DMA Activate FIS is needed
-
-  HCore::UInt8 reserved1[2];  // Reserved
-
-  // DWORD 1&2
-  HCore::UInt64 dmaBufferId;  // DMA Buffer Identifier. Used to Identify DMA buffer in
-                       // host memory. SATA Spec says host specific and not in
-                       // Spec. Trying AHCI spec might work.
-
-  // DWORD 3
-  HCore::UInt32 rsvd;  // More reserved
-
-  // DWORD 4
-  HCore::UInt32 dmabufOffset;  // Byte offset into buffer. First 2 bits must be 0
-
-  // DWORD 5
-  HCore::UInt32 transferCount;  // Number of bytes to transfer. Bit 0 must be 0
-
-  // DWORD 6
-  HCore::UInt32 reserved3;  // Reserved
-} FisDmaSetup;
-
-typedef struct FisDevBits final {
-  // DWORD 0
-  HCore::UInt8 fisType;  // FIS_TYPE_DMA_SETUP (A1h)
-
-  HCore::UInt8 reserved0 : 5;  // Reserved
-  HCore::UInt8 r0 : 1;
-  HCore::UInt8 interruptBit : 1;
-  HCore::UInt8 n : 1;
-
-  HCore::UInt8 statusLow : 3;
-  HCore::UInt8 r1 : 1;
-  HCore::UInt8 statusHigh : 3;
-
-  HCore::UInt8 r2 : 1;
-  HCore::UInt8 error;
-
-  // DWORD 1
-  HCore::UInt32 act;
-} FisDevBits;
-
-/// \brief Enable AHCI device bit in GHC register.
-#ifndef kAhciGHC_AE
-#define kAhciGHC_AE (31)
-#endif  //! ifndef kAhciGHC_AE
-
-typedef struct HbaPort final {
-  HCore::UInt32 clb;            // 0x00, command list base address, 1K-byte aligned
-  HCore::UInt32 clbu;           // 0x04, command list base address upper 32 bits
-  HCore::UInt32 fb;             // 0x08, FIS base address, 256-byte aligned
-  HCore::UInt32 fbu;            // 0x0C, FIS base address upper 32 bits
-  HCore::UInt32 is;             // 0x10, interrupt status
-  HCore::UInt32 ie;             // 0x14, interrupt enable
-  HCore::UInt32 cmd;            // 0x18, command and status
-  HCore::UInt32 reserved0;      // 0x1C, Reserved
-  HCore::UInt32 tfd;            // 0x20, task file data
-  HCore::UInt32 sig;            // 0x24, signature
-  HCore::UInt32 ssts;           // 0x28, SATA status (SCR0:SStatus)
-  HCore::UInt32 sctl;           // 0x2C, SATA control (SCR2:SControl)
-  HCore::UInt32 serr;           // 0x30, SATA error (SCR1:SError)
-  HCore::UInt32 sact;           // 0x34, SATA active (SCR3:SActive)
-  HCore::UInt32 ci;             // 0x38, command issue
-  HCore::UInt32 sntf;           // 0x20, SATA notification (SCR4:SNotification)
-  HCore::UInt32 fbs;            // 0x40, FIS-based switch control
-  HCore::UInt32 reserved1[11];  // 0x44 ~ 0x6F, Reserved
-  HCore::UInt32 vendor[4];      // 0x70 ~ 0x7F, vendor specific
-} HbaPort;
-
-typedef struct HbaMem final {
-  // 0x00 - 0x2B, Generic Host Control
-  HCore::UInt32 cap;      // 0x00, Host capability
-  HCore::UInt32 ghc;      // 0x04, Global host control
-  HCore::UInt32 is;       // 0x08, Interrupt status
-  HCore::UInt32 pi;       // 0x0C, Port implemented
-  HCore::UInt32 vs;       // 0x10, Version
-  HCore::UInt32 ccc_ctl;  // 0x14, Command completion coalescing control
-  HCore::UInt32 ccc_pts;  // 0x18, Command completion coalescing ports
-  HCore::UInt32 em_loc;   // 0x1C, Enclosure management location
-  HCore::UInt32 em_ctl;   // 0x20, Enclosure management control
-  HCore::UInt32 cap2;     // 0x24, Host capabilities extended
-  HCore::UInt32 bohc;     // 0x28, BIOS/OS handoff control and status
-
-  HCore::UInt16 rsv;
-  HCore::UInt32 resv2;
-
-  HbaPort ports[1];  // 1 ~ 32
-} HbaMem;
-
-typedef struct HbaCmdHeader final {
-  // DW0
-  HCore::UInt8 cfl : 5;           // Command FIS length in DWORDS, 2 ~ 16
-  HCore::UInt8 atapi : 1;         // ATAPI
-  HCore::UInt8 write : 1;         // Write, 1: H2D, 0: D2H
-  HCore::UInt8 prefetchable : 1;  // Prefetchable
-
-  HCore::UInt8 reset : 1;      // Reset
-  HCore::UInt8 BIST : 1;       // BIST
-  HCore::UInt8 clear : 1;      // Clear busy upon R_OK
-  HCore::UInt8 reserved0 : 1;  // Reserved
-  HCore::UInt8 pmp : 4;        // Port multiplier port
-
-  HCore::UInt16 prdtl;           // Physical region descriptor table length in entries
-  volatile HCore::UInt32 prdbc;  // Physical region descriptor byte count transferred
-
-  HCore::UInt32 ctba;   // Command table descriptor base address
-  HCore::UInt32 ctbau;  // Command table descriptor base address upper 32 bits
-
-  HCore::UInt32 reserved1[4];  // Reserved
-} HbaCmdHeader;
-
-typedef struct HbaFis final {
-  // 0x00
-  FisDmaSetup dsfis;  // DMA Setup FIS
-  HCore::UInt8 pad0[4];
-  // 0x20
-  FisPioSetup psfis;  // PIO Setup FIS
-  HCore::UInt8 pad1[12];
-  // 0x40
-  FisRegD2H rfis;  // Register – Device to Host FIS
-  HCore::UInt8 pad2[4];
-  // 0x58
-  FisDevBits sdbfis;  // Set Device Bit FIS
-  // 0x60
-  HCore::UInt8 ufis[64];
-  // 0xA0
-  HCore::UInt8 rsv[0x100 - 0xA0];
-} HbaFis;
-
-typedef struct HbaPrdtEntry final {
-  HCore::UInt32 dba;        // Data base address
-  HCore::UInt32 dbau;       // Data base address upper 32 bits
-  HCore::UInt32 reserved0;  // Reserved
-  // DW3
-  HCore::UInt32 dbc : 22;          // Byte count, 4M max
-  HCore::UInt32 reserved1 : 9;     // Reserved
-  HCore::UInt32 interruptBit : 1;  // Interrupt on completion
-} HbaPrdtEntry;
-
-typedef struct HbaCmdTbl final {
-  HCore::UInt8 cfis[64];  // Command FIS
-  HCore::UInt8 acmd[16];  // ATAPI command, 12 or 16 bytes
-  HCore::UInt8 rsv[48];   // Reserved
-  HbaPrdtEntry prdtEntries[1];  // Physical region descriptor table entries, 0 ~ 65535
-} HbaCmdTbl;
-
-/* EOF */
diff --git a/Private/Drivers/AHCI/compile_flags.txt b/Private/Drivers/AHCI/compile_flags.txt
deleted file mode 100644
index 1bc51142..00000000
--- a/Private/Drivers/AHCI/compile_flags.txt
+++ /dev/null
@@ -1,4 +0,0 @@
--I./
--I../
--I../../
--std=c++20
diff --git a/Private/Drivers/ATA/Defines.hxx b/Private/Drivers/ATA/Defines.hxx
deleted file mode 100644
index f4a02467..00000000
--- a/Private/Drivers/ATA/Defines.hxx
+++ /dev/null
@@ -1,118 +0,0 @@
-/* -------------------------------------------
-
-    Copyright Mahrouss Logic
-
-    File: Defines.hxx
-    Purpose: ATA header.
-
-    Revision History:
-
-    03/02/24: Added file (amlel)
-
-------------------------------------------- */
-
-#pragma once
-
-#include <CompilerKit/CompilerKit.hxx>
-#include <NewKit/Defines.hpp>
-
-using namespace HCore;
-
-// Status register
-#define ATA_SR_BSY 0x80
-#define ATA_SR_DRDY 0x40
-#define ATA_SR_DF 0x20
-#define ATA_SR_DSC 0x10
-#define ATA_SR_DRQ 0x08
-#define ATA_SR_CORR 0x04
-#define ATA_SR_IDX 0x02
-#define ATA_SR_ERR 0x01
-
-// Error register
-#define ATA_ER_BBK 0x80
-#define ATA_ER_UNC 0x40
-#define ATA_ER_MC 0x20
-#define ATA_ER_IDNF 0x10
-#define ATA_ER_MCR 0x08
-#define ATA_ER_ABRT 0x04
-#define ATA_ER_TK0NF 0x02
-#define ATA_ER_AMNF 0x01
-
-#define ATA_CMD_READ_PIO 0x20
-#define ATA_CMD_READ_PIO_EXT 0x24
-#define ATA_CMD_READ_DMA 0xC8
-#define ATA_CMD_READ_DMA_EXT 0x25
-#define ATA_CMD_WRITE_PIO 0x30
-#define ATA_CMD_WRITE_PIO_EXT 0x34
-#define ATA_CMD_WRITE_DMA 0xCA
-#define ATA_CMD_WRITE_DMA_EXT 0x35
-#define ATA_CMD_CACHE_FLUSH 0xE7
-#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
-#define ATA_CMD_PACKET 0xA0
-#define ATA_CMD_IDENTIFY_PACKET 0xA1
-#define ATA_CMD_IDENTIFY 0xEC
-
-#define ATA_IDENT_DEVICE_TYPE 0
-#define ATA_IDENT_CYLINDERS 2
-#define ATA_IDENT_HEADS 6
-#define ATA_IDENT_SECTORS 12
-#define ATA_IDENT_SERIAL 20
-#define ATA_IDENT_MODEL 54
-#define ATA_IDENT_CAPABILITIES 98
-#define ATA_IDENT_FIELDVALID 106
-#define ATA_IDENT_MAX_LBA 120
-#define ATA_IDENT_COMMANDSETS 164
-#define ATA_IDENT_MAX_LBA_EXT 200
-
-#define ATA_MASTER 0x00
-#define ATA_SLAVE 0x01
-
-// Register
-#define ATA_REG_DATA 0x00
-#define ATA_REG_ERROR 0x01
-#define ATA_REG_FEATURES 0x01
-#define ATA_REG_SEC_COUNT0 0x02
-#define ATA_REG_LBA0 0x03
-#define ATA_REG_LBA1 0x04
-#define ATA_REG_LBA2 0x05
-#define ATA_REG_HDDEVSEL 0x06
-#define ATA_REG_COMMAND 0x07
-#define ATA_REG_STATUS 0x07
-#define ATA_REG_SEC_COUNT1 0x08
-#define ATA_REG_LBA3 0x09
-#define ATA_REG_LBA4 0x0A
-#define ATA_REG_LBA5 0x0B
-#define ATA_REG_CONTROL 0x0C
-#define ATA_REG_ALT_STATUS 0x0C
-#define ATA_REG_DEV_ADDRESS 0x0D
-
-#define ATA_REG_NEIN 0x01
-
-#define ATA_PRIMARY_IO 0x1F0
-#define ATA_SECONDARY_IO 0x170
-#define ATA_PRIMARY_DCR_AS 0x3F6
-#define ATA_SECONDARY_DCR_AS 0x376
-
-// Irq
-#define ATA_PRIMARY_IRQ 14
-#define ATA_SECONDARY_IRQ 15
-
-// Channels
-#define ATA_PRIMARY 0x00
-#define ATA_SECONDARY 0x01
-
-#define ATA_CYL_LOW 4
-#define ATA_CYL_HIGH 5
-
-// IO Direction
-#define ATA_READ 0x00
-#define ATA_WRITE 0x013
-
-#define ATA_PRIMARY_SEL 0xA0
-#define ATA_SECONDARY_SEL 0xB0
-
-// ATA Helpers
-#define ATA_ADDRESS1(x) (x + 3)
-#define ATA_ADDRESS2(x) (x + 4)
-#define ATA_ADDRESS3(x) (x + 5)
-#define ATA_COMMAND(x)  (x + 7)
diff --git a/Private/Drivers/ATA/compile_flags.txt b/Private/Drivers/ATA/compile_flags.txt
deleted file mode 100644
index 1bc51142..00000000
--- a/Private/Drivers/ATA/compile_flags.txt
+++ /dev/null
@@ -1,4 +0,0 @@
--I./
--I../
--I../../
--std=c++20
diff --git a/Private/Drivers/Ethernet/.gitkeep b/Private/Drivers/Ethernet/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/Ethernet/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/Ethernet/compile_flags.txt b/Private/Drivers/Ethernet/compile_flags.txt
deleted file mode 100644
index 545816fc..00000000
--- a/Private/Drivers/Ethernet/compile_flags.txt
+++ /dev/null
@@ -1,4 +0,0 @@
--I./
--I../
--I../../Private
--std=c++20
diff --git a/Private/Drivers/HPET/.gitkeep b/Private/Drivers/HPET/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/HPET/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/NVME/.gitkeep b/Private/Drivers/NVME/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/NVME/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/NVME/compile_flags.txt b/Private/Drivers/NVME/compile_flags.txt
deleted file mode 100644
index 1bc51142..00000000
--- a/Private/Drivers/NVME/compile_flags.txt
+++ /dev/null
@@ -1,4 +0,0 @@
--I./
--I../
--I../../
--std=c++20
diff --git a/Private/Drivers/PS2/PS2KernelMouse.hxx b/Private/Drivers/PS2/PS2KernelMouse.hxx
deleted file mode 100644
index e78bd97f..00000000
--- a/Private/Drivers/PS2/PS2KernelMouse.hxx
+++ /dev/null
@@ -1,109 +0,0 @@
-/* -------------------------------------------
-
-    Copyright Mahrouss Logic
-
-    File: PS2KernelMouse.hxx
-    Purpose: PS/2 mouse.
-
-    Revision History:
-
-    03/02/24: Added file (amlel)
-
-------------------------------------------- */
-
-#pragma once
-
-#include <ArchKit/ArchKit.hpp>
-#include <CompilerKit/CompilerKit.hxx>
-#include <NewKit/Defines.hpp>
-
-namespace HCore {
-/// @brief Enabled for kernel purposes, kernel mouse.
-class PS2KernelMouse final {
- public:
-  explicit PS2KernelMouse() = default;
-  ~PS2KernelMouse() = default;
-
-  HCORE_COPY_DEFAULT(PS2KernelMouse);
-
- public:
-  Void Init() noexcept {
-    HCore::kcout << "HCoreKrnl.exe: Enabling PS/2 mouse...\r\n";
-
-    this->Write(0xFF);
-
-    HAL::Out8(0x64, 0xA8);
-
-    this->Wait();
-
-    HAL::Out8(0x64, 0x20);
-
-    this->WaitInput();
-
-    UInt8 dataStatus = HAL::In8(0x60);
-
-    dataStatus |= 0b10;
-
-    this->Wait();
-
-    HAL::Out8(0x60, dataStatus);
-
-    this->Write(0xF6);
-    auto f6Dat = this->Read();
-
-    this->Write(0xF4);
-    auto f4Dat = this->Read();
-
-    HCore::kcout << "HCoreKrnl.exe: PS/2 mouse is OK: " << hex_number(f6Dat);
-    HCore::kcout << ", " << hex_number(f4Dat) << end_line();
-  }
-
-  private:
-  Bool WaitInput() noexcept {
-    UInt64 timeout = 100000;
-
-    while (timeout) {
-      if ((HAL::In8(0x64) & 0x1)) {
-        HCore::kcout << "HCoreKrnl.exe: Wait: OK\r\n";
-        return true;
-      }
-
-      --timeout;
-    }  // wait until we can read
-
-    HCore::kcout << "HCoreKrnl.exe: Wait: Timeout\r\n";
-    // return the ack bit.
-    return false;
-  }
-
-  Bool Wait() noexcept {
-    UInt64 timeout = 100000;
-
-    while (timeout) {
-      if ((HAL::In8(0x64) & 0b10) == 0) {
-        HCore::kcout << "HCoreKrnl.exe: Wait: OK\r\n";
-        return true;
-      }
-
-      --timeout;
-    }  // wait until we can read
-
-    HCore::kcout << "HCoreKrnl.exe: Wait: Timeout\r\n";
-    // return the ack bit.
-    return false;
-  }
-
-  Void Write(UInt8 val) {
-    this->Wait();
-    HAL::Out8(0x64, 0xD4);
-    this->Wait();
-
-    HAL::Out8(0x60, val);
-  }
-
-  UInt8 Read() {
-    this->WaitInput();
-    return HAL::In8(0x60);
-  }
-};
-}  // namespace HCore
diff --git a/Private/Drivers/README.TXT b/Private/Drivers/README.TXT
deleted file mode 100644
index e6af72bc..00000000
--- a/Private/Drivers/README.TXT
+++ /dev/null
@@ -1,21 +0,0 @@
-==========================
-Basic Device Drivers (BDD)
-==========================
-
-1 - Build them
-2 - Place them inside Private/Root
-3 - And continue your build.
-
-===============
-What are these?
-===============
-
-These are HCore device drivers.
-Some of them are running in Ring-3, to let the driver restart in case of a crash.
-
-===========
-Maintainers
-===========
-
-ACPIManager: Amlal EL Mahrouss
-AHCI: Amlal EL Mahrouss
\ No newline at end of file
diff --git a/Private/Drivers/WiFi/.gitkeep b/Private/Drivers/WiFi/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/WiFi/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/WiFi/compile_flags.txt b/Private/Drivers/WiFi/compile_flags.txt
deleted file mode 100644
index 1bc51142..00000000
--- a/Private/Drivers/WiFi/compile_flags.txt
+++ /dev/null
@@ -1,4 +0,0 @@
--I./
--I../
--I../../
--std=c++20
diff --git a/Private/Drivers/XHCI/.gitkeep b/Private/Drivers/XHCI/.gitkeep
deleted file mode 100644
index e69de29b..00000000
--- a/Private/Drivers/XHCI/.gitkeep
+++ /dev/null
diff --git a/Private/Drivers/XHCI/Defines.hxx b/Private/Drivers/XHCI/Defines.hxx
deleted file mode 100644
index d67809af..00000000
--- a/Private/Drivers/XHCI/Defines.hxx
+++ /dev/null
@@ -1,67 +0,0 @@
-/* -------------------------------------------
-
-    Copyright Mahrouss Logic
-
-    File: Defines.hxx
-    Purpose: XHCI (and backwards) header.
-
-    Revision History:
-
-    01/02/24: Added file (amlel)
-    03/02/24: Update filename to Defines.hxx (amlel)
-
-------------------------------------------- */
-
-#pragma once
-
-#include <NewKit/Defines.hpp>
-
-using namespace HCore;
-
-#define kUSBCommand (UInt16)0x0
-#define kUSBStatus (UInt16)0x2
-#define kUSBInterruptEnable (UInt16)0x4
-#define kUSBFrameNum (UInt16)0x6
-#define kUSBFrameListBaseAddress (UInt16)0x8
-#define kUSBFrameModifyStart (UInt16)0xC
-#define kUSBPort1StatusCtrl (UInt16)0x10
-#define kUSBPort2StatusCtrl (UInt16)0x12
-
-typedef struct USBCommandRegister final {
-  UInt8 mReserved[8];  // Reserved
-  UInt8
-      mMaxPacket;  //  	0 = Max packet size 32 bits 1 = Max packet size 64 bits
-  UInt8 mConfigure;
-  UInt8 mSoftwareDebug;
-  UInt8 mGlobalResume;
-  UInt8 mGlobalSuspend;
-  UInt8 mHostCtrlReset;
-  UInt8 mRun;  //  	1 = Controller execute frame list entries
-} USBCommandRegister;
-
-typedef struct USBStatusRegister final {
-  UInt8 mReserved[8];  // Reserved
-  UInt8 mHalted;       //  1 = bit 0 in CMD is zero 0 = bit 0 in CMD is 1
-  UInt8 mProcessError;
-  UInt8 mSystemError;
-  UInt8 mResumeDetected;
-  UInt8 mErrorInterrupt;
-  UInt8 mInterrupt;
-} USBStatusRegister;
-
-typedef struct USBInterruptEnableRegister final {
-  UInt8 mReserved[4];  // Reserved
-  UInt8 mShortPacket;  //  1=Enable interrupt 0=Disable interrupt
-  UInt8 mComplete;     //  1=Enable interrupt 0=Disable interrupt
-  UInt8 mResume;       //  1=Enable interrupt 0=Disable interrupt
-  UInt8 mTimeoutCRC;   //  1=Enable interrupt 0=Disable interrupt
-} USBInterruptEnableRegister;
-
-/*
-    Some terminology:
-
-    Frame Number: Number of processed entry of Frame List.
-    Frame List Base Address:
-    32-bit physical adress of Frame List. Remember that first 12 bytes are
-   always 0. The Frame List must contain 1024 entries.
-*/
diff --git a/Private/Drivers/XHCI/compile_flags.txt b/Private/Drivers/XHCI/compile_flags.txt
deleted file mode 100644
index 1bc51142..00000000
--- a/Private/Drivers/XHCI/compile_flags.txt
+++ /dev/null
@@ -1,4 +0,0 @@
--I./
--I../
--I../../
--std=c++20