Kernel & Bootloader: Improvements and Fix ATA Read and Write problem.

Signed-off-by: Amlal El Mahrouss <amlalelmahrouss@icloud.com>

6 files changed, 41 insertions, 41 deletions

diff --git a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
index e0f9b7fd..9bdd368b 100644
--- a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
+++ b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp
@@ -59,11 +59,11 @@ bool ACPIManager::Checksum(const char *checksum, SSizeT len) {
   return chr == 0;
 }
 
-void rt_shutdown_acpi_qemu_20(void) { HAL::out16(0xb004, 0x2000); }
+void rt_shutdown_acpi_qemu_20(void) { HAL::Out16(0xb004, 0x2000); }
 
-void rt_shutdown_acpi_qemu_30_plus(void) { HAL::out16(0x604, 0x2000); }
+void rt_shutdown_acpi_qemu_30_plus(void) { HAL::Out16(0x604, 0x2000); }
 
-void rt_shutdown_acpi_virtualbox(void) { HAL::out16(0x4004, 0x3400); }
+void rt_shutdown_acpi_virtualbox(void) { HAL::Out16(0x4004, 0x3400); }
 
 /// you'll have to parse the MADT otherwise!
 }  // namespace HCore
diff --git a/Private/HALKit/AMD64/DebugOutput.cxx b/Private/HALKit/AMD64/DebugOutput.cxx
index e23d9dae..ad9fc8c5 100644
--- a/Private/HALKit/AMD64/DebugOutput.cxx
+++ b/Private/HALKit/AMD64/DebugOutput.cxx
@@ -26,19 +26,19 @@ static int kState = kStateLimbo;
 
 bool serial_init() {
 #ifdef __DEBUG__
-  HAL::out8(PORT + 1, 0x00);  // Disable all interrupts
-  HAL::out8(PORT + 3, 0x80);  // Enable DLAB (set baud rate divisor)
-  HAL::out8(PORT + 0, 0x03);  // Set divisor to 3 (lo byte) 38400 baud
-  HAL::out8(PORT + 1, 0x00);  //                  (hi byte)
-  HAL::out8(PORT + 3, 0x03);  // 8 bits, no parity, one stop bit
-  HAL::out8(PORT + 2, 0xC7);  // Enable FIFO, clear them, with 14-byte threshold
-  HAL::out8(PORT + 4, 0x0B);  // IRQs enabled, RTS/DSR set
-  HAL::out8(PORT + 4, 0x1E);  // Set in loopback mode, test the serial chip
-  HAL::out8(PORT + 0, 0xAE);  // Test serial chip (send byte 0xAE and check if
+  HAL::Out8(PORT + 1, 0x00);  // Disable all interrupts
+  HAL::Out8(PORT + 3, 0x80);  // Enable DLAB (set baud rate divisor)
+  HAL::Out8(PORT + 0, 0x03);  // Set divisor to 3 (lo byte) 38400 baud
+  HAL::Out8(PORT + 1, 0x00);  //                  (hi byte)
+  HAL::Out8(PORT + 3, 0x03);  // 8 bits, no parity, one stop bit
+  HAL::Out8(PORT + 2, 0xC7);  // Enable FIFO, clear them, with 14-byte threshold
+  HAL::Out8(PORT + 4, 0x0B);  // IRQs enabled, RTS/DSR set
+  HAL::Out8(PORT + 4, 0x1E);  // Set in loopback mode, test the serial chip
+  HAL::Out8(PORT + 0, 0xAE);  // Test serial chip (send byte 0xAE and check if
                               // serial returns same byte)
 
   // Check if serial is faulty (i.e: not same byte as sent)
-  if (HAL::in8(PORT) != 0xAE) {
+  if (HAL::In8(PORT) != 0xAE) {
     ke_stop(RUNTIME_CHECK_HANDSHAKE);
   }
 
@@ -46,7 +46,7 @@ bool serial_init() {
 
   // If serial is not faulty set it in normal operation mode
   // (not-loopback with IRQs enabled and OUT#1 and OUT#2 bits enabled)
-  HAL::out8(Detail::PORT + 4, 0x0F);
+  HAL::Out8(Detail::PORT + 4, 0x0F);
 #endif
 
   return true;
@@ -62,7 +62,7 @@ void system_io_print(const char *bytes) {
   SizeT len = string_length(bytes, 256);
 
   while (index < len) {
-    HAL::out8(Detail::PORT, bytes[index]);
+    HAL::Out8(Detail::PORT, bytes[index]);
     ++index;
   }
 
diff --git a/Private/HALKit/AMD64/DebugPort.cxx b/Private/HALKit/AMD64/DebugPort.cxx
index e5138e27..b0f2f6d1 100644
--- a/Private/HALKit/AMD64/DebugPort.cxx
+++ b/Private/HALKit/AMD64/DebugPort.cxx
@@ -41,19 +41,19 @@ void rt_debug_listen(DebuggerPorts* theHook) noexcept {
   if (theHook == nullptr) return;
 
   for (UInt32 i = 0U; i < kDebugMaxPorts; ++i) {
-    HAL::out16(theHook->fPort[i], kDebugMag0);
+    HAL::Out16(theHook->fPort[i], kDebugMag0);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag1);
+    HAL::Out16(theHook->fPort[i], kDebugMag1);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag2);
+    HAL::Out16(theHook->fPort[i], kDebugMag2);
     HAL::rt_wait_for_io();
 
-    HAL::out16(theHook->fPort[i], kDebugMag3);
+    HAL::Out16(theHook->fPort[i], kDebugMag3);
     HAL::rt_wait_for_io();
 
-    if (HAL::in16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++;
+    if (HAL::In16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++;
   }
 }
 }  // namespace HCore
diff --git a/Private/HALKit/AMD64/HalProcessor.cpp b/Private/HALKit/AMD64/HalProcessor.cpp
index afdb29b1..80efed3a 100644
--- a/Private/HALKit/AMD64/HalProcessor.cpp
+++ b/Private/HALKit/AMD64/HalProcessor.cpp
@@ -15,33 +15,33 @@
  */
 
 namespace HCore::HAL {
-void out8(UInt16 port, UInt8 value) {
+void Out8(UInt16 port, UInt8 value) {
   asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-void out16(UInt16 port, UInt16 value) {
+void Out16(UInt16 port, UInt16 value) {
   asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-void out32(UInt16 port, UInt32 value) {
+void Out32(UInt16 port, UInt32 value) {
   asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory");
 }
 
-UInt8 in8(UInt16 port) {
+UInt8 In8(UInt16 port) {
   UInt8 value = 0UL;
   asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-UInt16 in16(UInt16 port) {
+UInt16 In16(UInt16 port) {
   UInt16 value = 0UL;
   asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory");
 
   return value;
 }
 
-UInt32 in32(UInt16 port) {
+UInt32 In32(UInt16 port) {
   UInt32 value = 0UL;
   asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory");
 
diff --git a/Private/HALKit/AMD64/PCI/Device.cpp b/Private/HALKit/AMD64/PCI/Device.cpp
index 9fdcda43..815043c9 100644
--- a/Private/HALKit/AMD64/PCI/Device.cpp
+++ b/Private/HALKit/AMD64/PCI/Device.cpp
@@ -16,10 +16,10 @@ HCore::UInt LumiaPCIReadRaw(HCore::UInt bar, HCore::UShort bus,
                        ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
                        (bar & 0xFC);
 
-  HCore::HAL::out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
                     target);
 
-  return HCore::HAL::in32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigData);
+  return HCore::HAL::In32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigData);
 }
 
 void LumiaPCISetCfgTarget(HCore::UInt bar, HCore::UShort bus, HCore::UShort dev,
@@ -28,7 +28,7 @@ void LumiaPCISetCfgTarget(HCore::UInt bar, HCore::UShort bus, HCore::UShort dev,
                        ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
                        (bar & ~3);
 
-  HCore::HAL::out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
                     target);
 }
 
@@ -42,10 +42,10 @@ UInt Device::Read(UInt bar, Size sz) {
   LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
-    return HAL::in32((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+    return HAL::In32((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
   if (sz == 2)
-    return HAL::in16((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
-  if (sz == 1) return HAL::in8((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+    return HAL::In16((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
+  if (sz == 1) return HAL::In8((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
 
   return 0xFFFF;
 }
@@ -54,11 +54,11 @@ void Device::Write(UInt bar, UIntPtr data, Size sz) {
   LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
-    HAL::out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data);
+    HAL::Out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data);
   if (sz == 2)
-    HAL::out16((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UShort)data);
+    HAL::Out16((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UShort)data);
   if (sz == 1)
-    HAL::out8((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UChar)data);
+    HAL::Out8((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UChar)data);
 }
 
 UShort Device::DeviceId() {
diff --git a/Private/HALKit/AMD64/Processor.hpp b/Private/HALKit/AMD64/Processor.hpp
index 9b73216b..883d1910 100644
--- a/Private/HALKit/AMD64/Processor.hpp
+++ b/Private/HALKit/AMD64/Processor.hpp
@@ -17,13 +17,13 @@
 #define IsLevelTriggered(flag) (flag & 8)
 
 namespace HCore::HAL {
-extern "C" UChar in8(UInt16 port);
-extern "C" UShort in16(UInt16 port);
-extern "C" UInt in32(UInt16 port);
+extern "C" UChar In8(UInt16 port);
+extern "C" UShort In16(UInt16 port);
+extern "C" UInt In32(UInt16 port);
 
-extern "C" void out16(UShort port, UShort byte);
-extern "C" void out8(UShort port, UChar byte);
-extern "C" void out32(UShort port, UInt byte);
+extern "C" void Out16(UShort port, UShort byte);
+extern "C" void Out8(UShort port, UChar byte);
+extern "C" void Out32(UShort port, UInt byte);
 
 extern "C" void rt_wait_for_io();
 extern "C" void rt_halt();