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authorAmlal El Mahrouss <amlal.elmahrouss@icloud.com>2024-01-30 21:49:58 +0100
committerAmlal El Mahrouss <amlal.elmahrouss@icloud.com>2024-01-30 21:49:58 +0100
commitdf44a789fc90497325ba91be515c02145ae39142 (patch)
tree71fca5d75367399a38c37e9adc43ac5e816a0327 /Private/KernelKit/PCI
parent08eeda990be33db8048031df2a40ec28955e6430 (diff)
Kernel: Provide platform specific code for IOArray.
Kernel: Add PE header for Kernel AND bootloader. Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>
Diffstat (limited to 'Private/KernelKit/PCI')
-rw-r--r--Private/KernelKit/PCI/IO-Impl-AMD64.inl46
-rw-r--r--Private/KernelKit/PCI/IO.hpp77
2 files changed, 72 insertions, 51 deletions
diff --git a/Private/KernelKit/PCI/IO-Impl-AMD64.inl b/Private/KernelKit/PCI/IO-Impl-AMD64.inl
new file mode 100644
index 00000000..c5247d13
--- /dev/null
+++ b/Private/KernelKit/PCI/IO-Impl-AMD64.inl
@@ -0,0 +1,46 @@
+/* -------------------------------------------
+
+ Copyright Mahrouss Logic
+
+ File: IO-Impl-AMD64.hpp
+ Purpose: I/O for AMD64.
+
+ Revision History:
+
+ 30/01/24: Added file (amlel)
+
+------------------------------------------- */
+
+namespace HCore {
+template <SizeT Sz>
+template <typename T>
+T IOArray<Sz>::In(SizeT index) {
+ switch (sizeof(T)) {
+ case 4:
+ return HAL::in32(m_Ports[index].Leak());
+ case 2:
+ return HAL::in16(m_Ports[index].Leak());
+ case 1:
+ return HAL::in8(m_Ports[index].Leak());
+ default:
+ return 0xFFFF;
+ }
+}
+
+template <SizeT Sz>
+template <typename T>
+void IOArray<Sz>::Out(SizeT index, T value) {
+ switch (sizeof(T)) {
+#ifdef __x86_64__
+ case 4:
+ HAL::out32(m_Ports[index].Leak(), value);
+ case 2:
+ HAL::out16(m_Ports[index].Leak(), value);
+ case 1:
+ HAL::out8(m_Ports[index].Leak(), value);
+#endif
+ default:
+ break;
+ }
+}
+} // namespace HCore
diff --git a/Private/KernelKit/PCI/IO.hpp b/Private/KernelKit/PCI/IO.hpp
index bcc728f4..778650b6 100644
--- a/Private/KernelKit/PCI/IO.hpp
+++ b/Private/KernelKit/PCI/IO.hpp
@@ -9,69 +9,44 @@
#pragma once
-#include <NewKit/Defines.hpp>
-
#include <ArchKit/Arch.hpp>
#include <NewKit/Array.hpp>
+#include <NewKit/Defines.hpp>
#include <NewKit/Ref.hpp>
-namespace HCore
-{
-template<SizeT Sz>
-class IOArray final
-{
- public:
- IOArray() = delete;
+namespace HCore {
+template <SizeT Sz>
+class IOArray final {
+ public:
+ IOArray() = delete;
- IOArray(nullPtr) = delete;
+ IOArray(nullPtr) = delete;
- explicit IOArray(Array <UShort, Sz> &ports) : m_Ports(ports) {}
- ~IOArray() {}
+ explicit IOArray(Array<UShort, Sz> &ports) : m_Ports(ports) {}
+ ~IOArray() {}
- IOArray &operator=(const IOArray &) = default;
+ IOArray &operator=(const IOArray &) = default;
- IOArray(const IOArray &) = default;
+ IOArray(const IOArray &) = default;
- operator bool() {
- return !m_Ports.Empty();
- }
+ operator bool() { return !m_Ports.Empty(); }
- public:
- template<typename T>
- T In(SizeT index) {
- switch (sizeof(T)) {
-#ifdef __x86_64__
- case 4:
- return HAL::in32(m_Ports[index].Leak());
- case 2:
- return HAL::in16(m_Ports[index].Leak());
- case 1:
- return HAL::in8(m_Ports[index].Leak());
-#endif
- default:
- return 0xFFFF;
- }
- }
+ public:
+ template <typename T>
+ T In(SizeT index);
- template<typename T>
- void Out(SizeT index, T value) {
- switch (sizeof(T)) {
-#ifdef __x86_64__
- case 4:
- HAL::out32(m_Ports[index].Leak(), value);
- case 2:
- HAL::out16(m_Ports[index].Leak(), value);
- case 1:
- HAL::out8(m_Ports[index].Leak(), value);
-#endif
- default:
- break;
- }
- }
+ template <typename T>
+ void Out(SizeT index, T value);
- private:
- Array <UShort, Sz> m_Ports;
+ private:
+ Array<UShort, Sz> m_Ports;
};
using IOArray16 = IOArray<16>;
-} // namespace HCore
+} // namespace HCore
+
+#ifdef __x86_64__
+#include <KernelKit/PCI/IO-Impl-AMD64.inl>
+#else
+#error Please provide platform specific code for the I/O
+#endif // ifdef __x86_64__