diff options
| author | Amlal El Mahrouss <amlal@nekernel.org> | 2025-03-29 10:59:55 +0100 |
|---|---|---|
| committer | Amlal El Mahrouss <amlal@nekernel.org> | 2025-03-29 10:59:55 +0100 |
| commit | b7709d9dc8fc74ab1c60336b487a2c2f90ceeb99 (patch) | |
| tree | 752d60a92c2902e4669fae0639888a065cb7beba /dev/kernel | |
| parent | 2c272e3ca3272cf8f1449c76cc83b1b927f419c9 (diff) | |
hal/amd64: unify GDT/IDT setup and rename I/O ops
Normalize descriptor loading logic under Register64.
Prefix low-level port and MSR functions with hal_ for consistency.
Improve APIC init flow to reflect MADT-based IRQ routing.
Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>
Diffstat (limited to 'dev/kernel')
| -rw-r--r-- | dev/kernel/HALKit/AMD64/CPUID.h | 5 | ||||
| -rw-r--r-- | dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc | 6 | ||||
| -rw-r--r-- | dev/kernel/HALKit/AMD64/HalDescriptorLoader.cc | 14 | ||||
| -rw-r--r-- | dev/kernel/HALKit/AMD64/HalKernelMain.cc | 2 | ||||
| -rw-r--r-- | dev/kernel/HALKit/AMD64/HalProcessorAMD64.cc | 19 | ||||
| -rw-r--r-- | dev/kernel/HALKit/AMD64/Processor.h | 26 | ||||
| -rw-r--r-- | dev/kernel/HALKit/POWER/Processor.h | 2 |
7 files changed, 41 insertions, 33 deletions
diff --git a/dev/kernel/HALKit/AMD64/CPUID.h b/dev/kernel/HALKit/AMD64/CPUID.h index c9a887bc..75857558 100644 --- a/dev/kernel/HALKit/AMD64/CPUID.h +++ b/dev/kernel/HALKit/AMD64/CPUID.h @@ -15,6 +15,11 @@ #include <NewKit/Defines.h> +EXTERN_C +{ +#include <cpuid.h> +} + namespace Kernel { diff --git a/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc b/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc index 0791b28f..a24771a9 100644 --- a/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc +++ b/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc @@ -15,7 +15,7 @@ #include <NewKit/KernelPanic.h> #include <KernelKit/HardwareThreadScheduler.h> -#define kApicSignature "APIC" +#define kAPIC_Signature "APIC" #define kAPIC_ICR_Low 0x300 #define kAPIC_ICR_High 0x310 @@ -44,7 +44,7 @@ namespace Kernel::HAL HAL::StackFramePtr mFrame; }; - STATIC struct PROCESS_APIC_MADT* kMADTBlock = nullptr; + STATIC PROCESS_APIC_MADT* kMADTBlock = nullptr; STATIC Bool kSMPAware = false; STATIC Int64 kSMPCount = 0; @@ -203,7 +203,7 @@ namespace Kernel::HAL } auto hw_and_pow_int = PowerFactoryInterface(vendor_ptr); - kRawMADT = hw_and_pow_int.Find(kApicSignature).Leak().Leak(); + kRawMADT = hw_and_pow_int.Find(kAPIC_Signature).Leak().Leak(); kMADTBlock = reinterpret_cast<PROCESS_APIC_MADT*>(kRawMADT); kSMPAware = NO; diff --git a/dev/kernel/HALKit/AMD64/HalDescriptorLoader.cc b/dev/kernel/HALKit/AMD64/HalDescriptorLoader.cc index a83ed2e5..2b161d11 100644 --- a/dev/kernel/HALKit/AMD64/HalDescriptorLoader.cc +++ b/dev/kernel/HALKit/AMD64/HalDescriptorLoader.cc @@ -77,7 +77,7 @@ namespace Kernel::HAL /// @brief Loads the provided Global Descriptor Table. /// @param gdt /// @return - Void GDTLoader::Load(RegisterGDT& gdt) + Void GDTLoader::Load(Register64& gdt) { hal_load_gdt(gdt); } @@ -114,13 +114,23 @@ namespace Kernel::HAL rt_sti(); } - void GDTLoader::Load(Ref<RegisterGDT>& gdt) + /// @brief Loads the Global Descriptor Table into the CPU. + /// @param gdt GDT register wrapped in a ref. + void GDTLoader::Load(Ref<Register64>& gdt) { + if (!gdt) + return; + GDTLoader::Load(gdt.Leak()); } + /// @brief Loads the IDT, for interupts. + /// @param idt IDT register wrapped in a ref. void IDTLoader::Load(Ref<Register64>& idt) { + if (!idt) + return; + IDTLoader::Load(idt.Leak()); } } // namespace Kernel::HAL diff --git a/dev/kernel/HALKit/AMD64/HalKernelMain.cc b/dev/kernel/HALKit/AMD64/HalKernelMain.cc index 8b092509..159161eb 100644 --- a/dev/kernel/HALKit/AMD64/HalKernelMain.cc +++ b/dev/kernel/HALKit/AMD64/HalKernelMain.cc @@ -78,7 +78,7 @@ EXTERN_C void hal_init_platform( }; // Load memory descriptors. - Kernel::HAL::RegisterGDT gdt_reg; + Kernel::HAL::Register64 gdt_reg; gdt_reg.Base = reinterpret_cast<Kernel::UIntPtr>(kGDTArray); gdt_reg.Limit = (sizeof(Kernel::HAL::Detail::NE_GDT_ENTRY) * kGDTEntriesCount) - 1; diff --git a/dev/kernel/HALKit/AMD64/HalProcessorAMD64.cc b/dev/kernel/HALKit/AMD64/HalProcessorAMD64.cc index b3cf8d09..ea129c90 100644 --- a/dev/kernel/HALKit/AMD64/HalProcessorAMD64.cc +++ b/dev/kernel/HALKit/AMD64/HalProcessorAMD64.cc @@ -17,7 +17,14 @@ namespace Kernel::HAL { - Void lrt_out8(UInt16 port, UInt8 value) + Void hal_set_msr(UInt32 msr, UInt32 lo, UInt32 hi) noexcept + { + asm volatile("wrmsr" + : + : "a"(lo), "d"(hi), "c"(msr)); + } + + Void lrt_hal_out8(UInt16 port, UInt8 value) { asm volatile("outb %%al, %1" : @@ -25,7 +32,7 @@ namespace Kernel::HAL : "memory"); } - Void lrt_out16(UInt16 port, UInt16 value) + Void lrt_hal_out16(UInt16 port, UInt16 value) { asm volatile("outw %%ax, %1" : @@ -33,7 +40,7 @@ namespace Kernel::HAL : "memory"); } - Void lrt_out32(UInt16 port, UInt32 value) + Void lrt_hal_out32(UInt16 port, UInt32 value) { asm volatile("outl %%eax, %1" : @@ -41,7 +48,7 @@ namespace Kernel::HAL : "memory"); } - UInt8 lrt_in8(UInt16 port) + UInt8 lrt_hal_in8(UInt16 port) { UInt8 value = 0UL; asm volatile("inb %1, %%al" @@ -52,7 +59,7 @@ namespace Kernel::HAL return value; } - UInt16 lrt_in16(UInt16 port) + UInt16 lrt_hal_in16(UInt16 port) { UInt16 value = 0UL; asm volatile("inw %1, %%ax" @@ -63,7 +70,7 @@ namespace Kernel::HAL return value; } - UInt32 lrt_in32(UInt16 port) + UInt32 lrt_hal_in32(UInt16 port) { UInt32 value = 0UL; asm volatile("inl %1, %%eax" diff --git a/dev/kernel/HALKit/AMD64/Processor.h b/dev/kernel/HALKit/AMD64/Processor.h index 57f50a48..38822be1 100644 --- a/dev/kernel/HALKit/AMD64/Processor.h +++ b/dev/kernel/HALKit/AMD64/Processor.h @@ -28,13 +28,10 @@ #define kPIC2Command (0xA0) #define kPIC2Data (0xA1) -EXTERN_C -{ -#include <cpuid.h> -} - #include <HALKit/AMD64/CPUID.h> +#define rtl_nop_op() asm volatile("nop") + /// @brief Maximum entries of the interrupt descriptor table. #define kKernelIdtSize (0x100) @@ -85,12 +82,6 @@ namespace Kernel::HAL UIntPtr Base; }; - struct PACKED RegisterGDT final - { - UShort Limit; - UIntPtr Base; - }; - using RawRegister = UInt64; using Reg = RawRegister; using InterruptId = UInt16; /* For each element in the IVT */ @@ -167,8 +158,8 @@ namespace Kernel::HAL class GDTLoader final { public: - static Void Load(RegisterGDT& gdt); - static Void Load(Ref<RegisterGDT>& gdt); + static Void Load(Register64& gdt); + static Void Load(Ref<Register64>& gdt); }; class IDTLoader final @@ -230,12 +221,7 @@ namespace Kernel::HAL /// @param msr MSR /// @param lo low byte /// @param hi high byte - inline Void hal_set_msr(UInt32 msr, UInt32 lo, UInt32 hi) noexcept - { - asm volatile("wrmsr" - : - : "a"(lo), "d"(hi), "c"(msr)); - } + Void hal_set_msr(UInt32 msr, UInt32 lo, UInt32 hi) noexcept; /// @brief Processor specific namespace. namespace Detail @@ -320,7 +306,7 @@ EXTERN_C Kernel::Void idt_handle_math(Kernel::UIntPtr rsp); EXTERN_C Kernel::Void idt_handle_pf(Kernel::UIntPtr rsp); EXTERN_C ATTRIBUTE(naked) Kernel::Void hal_load_idt(Kernel::HAL::Register64 ptr); -EXTERN_C ATTRIBUTE(naked) Kernel::Void hal_load_gdt(Kernel::HAL::RegisterGDT ptr); +EXTERN_C ATTRIBUTE(naked) Kernel::Void hal_load_gdt(Kernel::HAL::Register64 ptr); inline Kernel::VoidPtr kKernelBitMpStart = nullptr; inline Kernel::UIntPtr kKernelBitMpSize = 0UL; diff --git a/dev/kernel/HALKit/POWER/Processor.h b/dev/kernel/HALKit/POWER/Processor.h index 6db4e3cd..90d6e65d 100644 --- a/dev/kernel/HALKit/POWER/Processor.h +++ b/dev/kernel/HALKit/POWER/Processor.h @@ -11,7 +11,7 @@ #include <NewKit/Defines.h> #include <NewKit/Utils.h> -#define NoOp() asm volatile("mr 0, 0") +#define rtl_nop_op() asm volatile("mr 0, 0") #define kHalPPCAlignment __attribute__((aligned(4))) namespace Kernel::HAL |
