diff options
Diffstat (limited to 'dev')
| -rw-r--r-- | dev/ZKAKit/HALKit/AMD64/HalCommonAPI.asm | 10 | ||||
| -rw-r--r-- | dev/ZKAKit/HALKit/AMD64/HalCoreMPScheduler.cc | 27 | ||||
| -rw-r--r-- | dev/ZKAKit/HALKit/AMD64/Processor.h | 22 |
3 files changed, 49 insertions, 10 deletions
diff --git a/dev/ZKAKit/HALKit/AMD64/HalCommonAPI.asm b/dev/ZKAKit/HALKit/AMD64/HalCommonAPI.asm index e69de29b..61a38a56 100644 --- a/dev/ZKAKit/HALKit/AMD64/HalCommonAPI.asm +++ b/dev/ZKAKit/HALKit/AMD64/HalCommonAPI.asm @@ -0,0 +1,10 @@ +;; /* +;; * ======================================================== +;; * +;; * ZKA +;; * Copyright (C) 2024, EL Mahrouss Logic, all rights reserved., all rights reserved. +;; * +;; * ======================================================== +;; */ + +section .text
\ No newline at end of file diff --git a/dev/ZKAKit/HALKit/AMD64/HalCoreMPScheduler.cc b/dev/ZKAKit/HALKit/AMD64/HalCoreMPScheduler.cc index d484c2a0..ba57eaa0 100644 --- a/dev/ZKAKit/HALKit/AMD64/HalCoreMPScheduler.cc +++ b/dev/ZKAKit/HALKit/AMD64/HalCoreMPScheduler.cc @@ -49,7 +49,7 @@ namespace Kernel::HAL STATIC Int64 kSMPCount = 0; STATIC Int32 cSMPInterrupt = 0; - STATIC UInt64 cSMPCores[cSMPMax] = {0}; + STATIC UInt64 kAPICLocales[cSMPMax] = {0}; STATIC VoidPtr kRawMADT = nullptr; /// @brief Multiple APIC Descriptor Table. @@ -156,12 +156,23 @@ namespace Kernel::HAL kProcessBlocks[process_index].f_Stack = stack_ptr; kProcessBlocks[process_index].f_Image = image; + if (!mp_is_smp()) + { + /// TODO: Switch from process_index in hash list. + } + return Yes; } /***********************************************************************************/ - /// @brief Fetch and enable cores inside main CPU. - /// @param vendor_ptr RSD PTR structure. + /// @brief Is the current config SMP aware? + /// @return True if YES, False if not. + /***********************************************************************************/ + Bool mp_is_smp(Void) noexcept { return kSMPAware; } + + /***********************************************************************************/ + /// @brief Fetch and enable SMP scheduler. + /// @param vendor_ptr SMP containing structure. /***********************************************************************************/ Void mp_get_cores(VoidPtr vendor_ptr) noexcept { @@ -184,7 +195,7 @@ namespace Kernel::HAL cSMPInterrupt = 0; kSMPCount = 0; - kcout << "Probing MADT cores...\r"; + kcout << "SMP: Probing Local APICs...\r"; UIntPtr madt_address = kMADTBlock->Address; @@ -197,14 +208,14 @@ namespace Kernel::HAL switch (kMADTBlock->List[index].Type) { case 0x00: { - cSMPCores[index] = kMADTBlock->List[index].LAPIC.ProcessorID; - kcout << "Core ID: " << number(cSMPCores[index]) << endl; + kAPICLocales[index] = kMADTBlock->List[index].LAPIC.ProcessorID; + kcout << "SMP: APIC ID: " << number(kAPICLocales[index]) << endl; ++kSMPCount; break; } case 0x05: { madt_address = kMADTBlock->List[index].LAPIC_ADDRESS_OVERRIDE.Address; - kcout << "Address: " << number(madt_address) << endl; + kcout << "SMP: APIC address: " << number(madt_address) << endl; break; } } @@ -212,7 +223,7 @@ namespace Kernel::HAL ++index; } - kcout << "# of cores: " << number(kSMPCount) << endl; + kcout << "SMP: number of cores: " << number(kSMPCount) << endl; // Kernel is now SMP aware. // That means that the scheduler is now available (on MP Kernels) diff --git a/dev/ZKAKit/HALKit/AMD64/Processor.h b/dev/ZKAKit/HALKit/AMD64/Processor.h index 9d0a989c..6a0a705c 100644 --- a/dev/ZKAKit/HALKit/AMD64/Processor.h +++ b/dev/ZKAKit/HALKit/AMD64/Processor.h @@ -177,14 +177,30 @@ namespace Kernel::HAL static Void Load(Register64& idt); static Void Load(Ref<Register64>& idt); }; + /***********************************************************************************/ + /// @brief Is the current config SMP aware? + /// @return True if YES, False if not. + /***********************************************************************************/ + Bool mp_is_smp(Void) noexcept; + + /***********************************************************************************/ + /// @brief Fetch and enable SMP scheduler. + /// @param vendor_ptr SMP containing structure. + /***********************************************************************************/ + Void mp_get_cores(VoidPtr vendor_ptr) noexcept; + + /***********************************************************************************/ - Void mp_get_cores(VoidPtr rsp_ptr) noexcept; Void hal_send_start_ipi(UInt32 apicId, UInt8 vector, UInt32 targetAddress); Void hal_send_end_ipi(UInt32 apicId, UInt8 vector, UInt32 targetAddress); + /***********************************************************************************/ + + /***********************************************************************************/ /// @brief Do a cpuid to check if MSR exists on CPU. /// @retval true it does exists. /// @retval false it doesn't. + /***********************************************************************************/ inline Bool hal_has_msr() noexcept { static UInt32 eax, unused, edx; // eax, edx @@ -195,10 +211,12 @@ namespace Kernel::HAL return edx & (1 << 5); } - /// @brief Get Model-specific register. + /***********************************************************************************/ + /// @brief Get Model specific register inside core. /// @param msr MSR /// @param lo low byte /// @param hi high byte + /***********************************************************************************/ inline Void hal_get_msr(UInt32 msr, UInt32* lo, UInt32* hi) noexcept { if (!lo || !hi) |