From 86a2d7327f84519f525d66a7745554b41dddeb93 Mon Sep 17 00:00:00 2001 From: Amlal El Mahrouss Date: Sat, 27 Apr 2024 16:47:12 +0200 Subject: MHR-18: Improved virtual memory architecture. Signed-off-by: Amlal El Mahrouss --- Private/Applications/.gitkeep | 0 Private/HALKit/64x0/HalVirtualMemory.cxx | 2 +- Private/HALKit/64x0/MBCI/.gitkeep | 0 Private/HALKit/AMD64/HalControlRegister.s | 8 ++++---- Private/HALKit/AMD64/HalKernelMain.cxx | 2 ++ Private/HALKit/AMD64/HalPageAlloc.hpp | 2 +- Private/Source/PageAllocator.cxx | 4 ++-- Private/Source/PageManager.cxx | 14 +++++++------- 8 files changed, 17 insertions(+), 15 deletions(-) delete mode 100644 Private/Applications/.gitkeep create mode 100644 Private/HALKit/64x0/MBCI/.gitkeep diff --git a/Private/Applications/.gitkeep b/Private/Applications/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/HALKit/64x0/HalVirtualMemory.cxx b/Private/HALKit/64x0/HalVirtualMemory.cxx index 2ae0f7ac..96202c00 100644 --- a/Private/HALKit/64x0/HalVirtualMemory.cxx +++ b/Private/HALKit/64x0/HalVirtualMemory.cxx @@ -10,5 +10,5 @@ using namespace NewOS; /// @brief Flush system TLB, looks like the POWER version, as it acts the same, no specific instruction for that. -/// @note The 88K MMU should be present in the die. +/// @note The 88K MMU should be present as well. EXTERN_C void hal_flush_tlb() { asm volatile("invltlb"); } diff --git a/Private/HALKit/64x0/MBCI/.gitkeep b/Private/HALKit/64x0/MBCI/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/HALKit/AMD64/HalControlRegister.s b/Private/HALKit/AMD64/HalControlRegister.s index 74dda36c..2a649f04 100644 --- a/Private/HALKit/AMD64/HalControlRegister.s +++ b/Private/HALKit/AMD64/HalControlRegister.s @@ -11,10 +11,12 @@ .globl hal_read_cr0 .globl hal_flush_tlb -.section .text +.text hal_flush_tlb: - invlpg (%rcx) + call hal_read_cr3 + mov %rcx, %rax + call hal_write_cr3 ret hal_read_cr3: @@ -36,5 +38,3 @@ hal_write_cr3: hal_write_cr0: movq %cr0, %rdi ret - - diff --git a/Private/HALKit/AMD64/HalKernelMain.cxx b/Private/HALKit/AMD64/HalKernelMain.cxx index d6b4ab76..82b80d34 100644 --- a/Private/HALKit/AMD64/HalKernelMain.cxx +++ b/Private/HALKit/AMD64/HalKernelMain.cxx @@ -74,5 +74,7 @@ EXTERN_C void hal_init_platform( AppMain(); + hal_flush_tlb(); + NewOS::ke_stop(RUNTIME_CHECK_BOOTSTRAP); } diff --git a/Private/HALKit/AMD64/HalPageAlloc.hpp b/Private/HALKit/AMD64/HalPageAlloc.hpp index d23c6e96..553f136e 100644 --- a/Private/HALKit/AMD64/HalPageAlloc.hpp +++ b/Private/HALKit/AMD64/HalPageAlloc.hpp @@ -26,7 +26,7 @@ #define kPTESize (0x1000) #endif // !kPTESize -EXTERN_C void hal_flush_tlb(NewOS::UIntPtr pde); +EXTERN_C void hal_flush_tlb(); EXTERN_C void hal_write_cr3(NewOS::UIntPtr pde); EXTERN_C void hal_write_cr0(NewOS::UIntPtr bit); diff --git a/Private/Source/PageAllocator.cxx b/Private/Source/PageAllocator.cxx index 9b1e05f0..d7635e99 100644 --- a/Private/Source/PageAllocator.cxx +++ b/Private/Source/PageAllocator.cxx @@ -26,7 +26,7 @@ void exec_disable(UIntPtr VirtualAddr) { MUST_PASS(!VirtualAddrTable->Accessed); VirtualAddrTable->ExecDisable = true; - hal_flush_tlb(VirtualAddr); + hal_flush_tlb(); } bool page_disable(UIntPtr VirtualAddr) { @@ -37,7 +37,7 @@ bool page_disable(UIntPtr VirtualAddr) { if (VirtualAddrTable->Accessed) return false; VirtualAddrTable->Present = false; - hal_flush_tlb(VirtualAddr); + hal_flush_tlb(); return true; } diff --git a/Private/Source/PageManager.cxx b/Private/Source/PageManager.cxx index 722df55e..368f2974 100644 --- a/Private/Source/PageManager.cxx +++ b/Private/Source/PageManager.cxx @@ -30,15 +30,15 @@ PTEWrapper::PTEWrapper(Boolean Rw, Boolean User, Boolean ExecDisable, PTEWrapper::~PTEWrapper() {} /// @brief Flush virtual address. -/// @param VirtAddr +/// @param VirtAddr void PageManager::FlushTLB(UIntPtr VirtAddr) { if (VirtAddr == kBadAddress) return; - hal_flush_tlb(VirtAddr); + hal_flush_tlb(); } /// @brief Reclaim freed page. -/// @return +/// @return bool PTEWrapper::Reclaim() { if (!this->fPresent) { this->fPresent = true; @@ -52,7 +52,7 @@ bool PTEWrapper::Reclaim() { /// @param Rw r/w? /// @param User user mode? /// @param ExecDisable disable execution on page? -/// @return +/// @return PTEWrapper PageManager::Request(Boolean Rw, Boolean User, Boolean ExecDisable) { // Store PTE wrapper right after PTE. VoidPtr ptr = NewOS::HAL::hal_alloc_page(Rw, User); @@ -61,8 +61,8 @@ PTEWrapper PageManager::Request(Boolean Rw, Boolean User, Boolean ExecDisable) { } /// @brief Disable PTE. -/// @param wrapper the wrapper. -/// @return +/// @param wrapper the wrapper. +/// @return bool PageManager::Free(Ref &wrapper) { if (wrapper) { if (!Detail::page_disable(wrapper->VirtualAddress())) return false; @@ -73,7 +73,7 @@ bool PageManager::Free(Ref &wrapper) { } /// @brief Virtual PTE address. -/// @return +/// @return The virtual address of the page. const UIntPtr PTEWrapper::VirtualAddress() { return (fVirtAddr); } -- cgit v1.2.3