From 9898520f721220a2af4be59fd92e8ad8afcd4287 Mon Sep 17 00:00:00 2001 From: Amlal El Mahrouss Date: Sun, 17 Mar 2024 10:59:07 +0100 Subject: Unstable: See below. These changes are related to the current ticket regarding AHCI support. This commit is just to upstream changes from local. Signed-off-by: Amlal El Mahrouss --- BUG_LIST.TXT | 1 + Private/Builtins/.gitkeep | 0 Private/Builtins/ACPI/.gitkeep | 0 Private/Builtins/ACPI/ACPI.hpp | 67 +++++ Private/Builtins/ACPI/ACPIManager.hxx | 44 +++ Private/Builtins/ACPI/compile_flags.txt | 4 + Private/Builtins/AHCI/.gitkeep | 0 Private/Builtins/AHCI/API.hxx | 24 ++ Private/Builtins/AHCI/Defines.hxx | 316 +++++++++++++++++++++ Private/Builtins/AHCI/compile_flags.txt | 4 + Private/Builtins/ATA/Defines.hxx | 120 ++++++++ Private/Builtins/ATA/compile_flags.txt | 4 + Private/Builtins/Ethernet/.gitkeep | 0 Private/Builtins/Ethernet/compile_flags.txt | 4 + Private/Builtins/HPET/.gitkeep | 0 Private/Builtins/NVME/.gitkeep | 0 Private/Builtins/NVME/compile_flags.txt | 4 + Private/Builtins/PS2/PS2MouseInterface.hxx | 109 +++++++ Private/Builtins/README.TXT | 16 ++ Private/Builtins/WiFi/.gitkeep | 0 Private/Builtins/WiFi/compile_flags.txt | 4 + Private/Builtins/XHCI/.gitkeep | 0 Private/Builtins/XHCI/Defines.hxx | 67 +++++ Private/Builtins/XHCI/compile_flags.txt | 4 + Private/CompilerKit/Version.hxx | 4 +- Private/Drivers/.gitkeep | 0 Private/Drivers/ACPI/.gitkeep | 0 Private/Drivers/ACPI/ACPI.hpp | 67 ----- Private/Drivers/ACPI/ACPIManager.hxx | 44 --- Private/Drivers/ACPI/compile_flags.txt | 4 - Private/Drivers/AHCI/.gitkeep | 0 Private/Drivers/AHCI/Defines.hxx | 316 --------------------- Private/Drivers/AHCI/compile_flags.txt | 4 - Private/Drivers/ATA/Defines.hxx | 118 -------- Private/Drivers/ATA/compile_flags.txt | 4 - Private/Drivers/Ethernet/.gitkeep | 0 Private/Drivers/Ethernet/compile_flags.txt | 4 - Private/Drivers/HPET/.gitkeep | 0 Private/Drivers/NVME/.gitkeep | 0 Private/Drivers/NVME/compile_flags.txt | 4 - Private/Drivers/PS2/PS2KernelMouse.hxx | 109 ------- Private/Drivers/README.TXT | 21 -- Private/Drivers/WiFi/.gitkeep | 0 Private/Drivers/WiFi/compile_flags.txt | 4 - Private/Drivers/XHCI/.gitkeep | 0 Private/Drivers/XHCI/Defines.hxx | 67 ----- Private/Drivers/XHCI/compile_flags.txt | 4 - Private/FSKit/Defines.hxx | 2 +- Private/FSKit/NewFS.hxx | 2 +- Private/FirmwareKit/Handover.hxx | 4 +- Private/HALKit/AMD64/HalACPIManager.cpp | 2 +- .../HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp | 2 +- Private/HALKit/AMD64/HalKernelMouse.cxx | 180 ++++++------ Private/KernelKit/Defines.hpp | 2 +- Private/KernelKit/FileManager.hpp | 2 - Private/NewBoot/BootKit/Arch/ATA.hxx | 3 +- Private/NewBoot/BootKit/Arch/SATA.hxx | 4 +- Private/NewBoot/NetBoot/EfiModule.cxx | 6 + Private/NewBoot/Source/BootMain.cxx | 2 + Private/NewBoot/Source/HEL/AMD64/AMD64-ATA.cxx | 2 +- Private/NewKit/Defines.hpp | 2 +- Private/Source/Storage/AHCI.cxx | 29 -- Private/Source/Storage/AHCIDeviceInterface.cxx | 29 ++ Private/Source/Storage/ATA-Wrapper.cxx | 102 +++++++ Private/Source/Storage/ATA.cxx | 102 ------- Private/Source/Storage/NVME.cxx | 11 - Private/Source/Storage/NVMEDeviceInterface.cxx | 11 + Private/Source/Storage/Storage.cxx | 11 - Private/Source/Storage/StorageBase.cxx | 11 + Private/StorageKit/Storage.hpp | 6 +- Public/Kits/System.Zip/Defines.hpp | 2 +- SPECIFICATION.TXT | 19 +- 72 files changed, 1079 insertions(+), 1035 deletions(-) create mode 100644 BUG_LIST.TXT create mode 100644 Private/Builtins/.gitkeep create mode 100644 Private/Builtins/ACPI/.gitkeep create mode 100644 Private/Builtins/ACPI/ACPI.hpp create mode 100644 Private/Builtins/ACPI/ACPIManager.hxx create mode 100644 Private/Builtins/ACPI/compile_flags.txt create mode 100644 Private/Builtins/AHCI/.gitkeep create mode 100644 Private/Builtins/AHCI/API.hxx create mode 100644 Private/Builtins/AHCI/Defines.hxx create mode 100644 Private/Builtins/AHCI/compile_flags.txt create mode 100644 Private/Builtins/ATA/Defines.hxx create mode 100644 Private/Builtins/ATA/compile_flags.txt create mode 100644 Private/Builtins/Ethernet/.gitkeep create mode 100644 Private/Builtins/Ethernet/compile_flags.txt create mode 100644 Private/Builtins/HPET/.gitkeep create mode 100644 Private/Builtins/NVME/.gitkeep create mode 100644 Private/Builtins/NVME/compile_flags.txt create mode 100644 Private/Builtins/PS2/PS2MouseInterface.hxx create mode 100644 Private/Builtins/README.TXT create mode 100644 Private/Builtins/WiFi/.gitkeep create mode 100644 Private/Builtins/WiFi/compile_flags.txt create mode 100644 Private/Builtins/XHCI/.gitkeep create mode 100644 Private/Builtins/XHCI/Defines.hxx create mode 100644 Private/Builtins/XHCI/compile_flags.txt delete mode 100644 Private/Drivers/.gitkeep delete mode 100644 Private/Drivers/ACPI/.gitkeep delete mode 100644 Private/Drivers/ACPI/ACPI.hpp delete mode 100644 Private/Drivers/ACPI/ACPIManager.hxx delete mode 100644 Private/Drivers/ACPI/compile_flags.txt delete mode 100644 Private/Drivers/AHCI/.gitkeep delete mode 100644 Private/Drivers/AHCI/Defines.hxx delete mode 100644 Private/Drivers/AHCI/compile_flags.txt delete mode 100644 Private/Drivers/ATA/Defines.hxx delete mode 100644 Private/Drivers/ATA/compile_flags.txt delete mode 100644 Private/Drivers/Ethernet/.gitkeep delete mode 100644 Private/Drivers/Ethernet/compile_flags.txt delete mode 100644 Private/Drivers/HPET/.gitkeep delete mode 100644 Private/Drivers/NVME/.gitkeep delete mode 100644 Private/Drivers/NVME/compile_flags.txt delete mode 100644 Private/Drivers/PS2/PS2KernelMouse.hxx delete mode 100644 Private/Drivers/README.TXT delete mode 100644 Private/Drivers/WiFi/.gitkeep delete mode 100644 Private/Drivers/WiFi/compile_flags.txt delete mode 100644 Private/Drivers/XHCI/.gitkeep delete mode 100644 Private/Drivers/XHCI/Defines.hxx delete mode 100644 Private/Drivers/XHCI/compile_flags.txt delete mode 100644 Private/Source/Storage/AHCI.cxx create mode 100644 Private/Source/Storage/AHCIDeviceInterface.cxx create mode 100644 Private/Source/Storage/ATA-Wrapper.cxx delete mode 100644 Private/Source/Storage/ATA.cxx delete mode 100644 Private/Source/Storage/NVME.cxx create mode 100644 Private/Source/Storage/NVMEDeviceInterface.cxx delete mode 100644 Private/Source/Storage/Storage.cxx create mode 100644 Private/Source/Storage/StorageBase.cxx diff --git a/BUG_LIST.TXT b/BUG_LIST.TXT new file mode 100644 index 00000000..9f26b768 --- /dev/null +++ b/BUG_LIST.TXT @@ -0,0 +1 @@ +- PS/2 Mouse doesn't raise interrupt on qemu q35, pc machines. \ No newline at end of file diff --git a/Private/Builtins/.gitkeep b/Private/Builtins/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/ACPI/.gitkeep b/Private/Builtins/ACPI/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/ACPI/ACPI.hpp b/Private/Builtins/ACPI/ACPI.hpp new file mode 100644 index 00000000..1a4329fc --- /dev/null +++ b/Private/Builtins/ACPI/ACPI.hpp @@ -0,0 +1,67 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + +------------------------------------------- */ + +#ifndef __ACPI__ +#define __ACPI__ + +/** + https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html + https://wiki.osdev.org/RSDT +*/ + +#include + +namespace HCore { +class SDT { + public: + Char Signature[4]; + UInt32 Length; + UInt8 Revision; + Char Checksum; + Char OemId[6]; + Char OemTableId[8]; + UInt32 OemRev; + UInt32 CreatorID; + UInt32 CreatorRevision; +}; + +class RSDP : public SDT { + public: + UInt32 RsdtAddress; + UIntPtr XsdtAddress; + UInt8 ExtendedChecksum; + UInt8 Reserved0[3]; +}; + +class ConfigHeader { + public: + UInt64 BaseAddress; + UInt16 PciSegGroup; + UInt8 StartBus; + UInt8 EndBus; + UInt32 Reserved; +}; + +enum class AddressSpace : UInt8 { + SystemMemory = 0, + SystemIO = 1, + Pci = 2, + Controller = 3, + SmBus = 4, + Invalid = 0xFF, +}; + +class Address { + public: + AddressSpace AddressSpaceId; + UInt8 RegisterBitWidth; + UInt8 RegisterBitOffset; + UInt8 Reserved; + UIntPtr Address; +}; +} // namespace HCore + +#endif // !__ACPI__ diff --git a/Private/Builtins/ACPI/ACPIManager.hxx b/Private/Builtins/ACPI/ACPIManager.hxx new file mode 100644 index 00000000..1fa5e714 --- /dev/null +++ b/Private/Builtins/ACPI/ACPIManager.hxx @@ -0,0 +1,44 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + +------------------------------------------- */ + +#ifndef __ACPI_MANAGER__ +#define __ACPI_MANAGER__ + +#include +#include +#include +#include + +namespace HCore { +class ACPIManager final { + public: + explicit ACPIManager(voidPtr rsdPtr); + ~ACPIManager() = default; + + ACPIManager &operator=(const ACPIManager &) = default; + ACPIManager(const ACPIManager &) = default; + + public: + void Shutdown(); // shutdown + void Reset(); // soft-reboot + + ErrorOr Find(const char *signature); + + bool Checksum(const char *checksum, SSizeT len); // watch for collides! + + public: + ErrorOr operator[](const char *signature) { + return this->Find(signature); + } + + private: + VoidPtr m_Rsdp; // pointer to root descriptor. + SSizeT m_Entries; // number of entries, -1 tells that no invalid entries were + // found. +}; +} // namespace HCore + +#endif // !__ACPI_MANAGER__ diff --git a/Private/Builtins/ACPI/compile_flags.txt b/Private/Builtins/ACPI/compile_flags.txt new file mode 100644 index 00000000..1bc51142 --- /dev/null +++ b/Private/Builtins/ACPI/compile_flags.txt @@ -0,0 +1,4 @@ +-I./ +-I../ +-I../../ +-std=c++20 diff --git a/Private/Builtins/AHCI/.gitkeep b/Private/Builtins/AHCI/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/AHCI/API.hxx b/Private/Builtins/AHCI/API.hxx new file mode 100644 index 00000000..90e68bad --- /dev/null +++ b/Private/Builtins/AHCI/API.hxx @@ -0,0 +1,24 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + + File: API.hxx + Purpose: AHCI API. + + Revision History: + + 03/17/24: Added file (amlel) + +------------------------------------------- */ + +#pragma once + +#include +#include +#include + +#define kObjectAHCINamespace "AHCI_DRV\\" + +namespace HCore::Builtins { +inline Boolean ke_get_ahci_handle(ObjectPtr* ppAhciObject); +} // namespace HCore::Builtins \ No newline at end of file diff --git a/Private/Builtins/AHCI/Defines.hxx b/Private/Builtins/AHCI/Defines.hxx new file mode 100644 index 00000000..c1d3c063 --- /dev/null +++ b/Private/Builtins/AHCI/Defines.hxx @@ -0,0 +1,316 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + + File: Defines.hxx + Purpose: AHCI header. + + Revision History: + + 03/02/24: Added file (amlel) + +------------------------------------------- */ + +#pragma once + +#include + +// Forward declarations of structs. + +struct HbaPort; +struct FisData; +struct FisRegD2H; +struct FisRegH2D; + +// Enum types + +typedef enum { + FIS_TYPE_REG_H2D = 0x27, // Register FIS - host to device + FIS_TYPE_REG_D2H = 0x34, // Register FIS - device to host + FIS_TYPE_DMA_ACT = 0x39, // DMA activate FIS - device to host + FIS_TYPE_DMA_SETUP = 0x41, // DMA setup FIS - bidirectional + FIS_TYPE_DATA = 0x46, // Data FIS - bidirectional + FIS_TYPE_BIST = 0x58, // BIST activate FIS - bidirectional + FIS_TYPE_PIO_SETUP = 0x5F, // PIO setup FIS - device to host + FIS_TYPE_DEV_BITS = 0xA1, // Set device bits FIS - device to host +} AHCI_FIS_TYPE; + +typedef enum { + AHCI_ATA_CMD_IDENTIFY = 0xEC, + AHCI_ATA_CMD_READ_DMA = 0xC8, + AHCI_ATA_CMD_READ_DMA_EX = 0x25, + AHCI_ATA_CMD_WRITE_DMA = 0xCA, + AHCI_ATA_CMD_WRITE_DMA_EX = 0x35 +} AHCI_FIS_COMMAND; + +typedef struct FisRegH2D final { + // DWORD 0 + HCore::UInt8 fisType; // FIS_TYPE_REG_H2D + + HCore::UInt8 portMul : 4; // Port multiplier + HCore::UInt8 reserved0 : 3; // Reserved + HCore::UInt8 cmdOrCtrl : 1; // 1: Command, 0: Control + + HCore::UInt8 command; // Command register + HCore::UInt8 featurel; // Feature register, 7:0 + + // DWORD 1 + HCore::UInt8 lba0; // LBA low register, 7:0 + HCore::UInt8 lba1; // LBA mid register, 15:8 + HCore::UInt8 lba2; // LBA high register, 23:16 + HCore::UInt8 device; // Device register + + // DWORD 2 + HCore::UInt8 lba3; // LBA register, 31:24 + HCore::UInt8 lba4; // LBA register, 39:32 + HCore::UInt8 lba5; // LBA register, 47:40 + HCore::UInt8 featureHigh; // Feature register, 15:8 + + // DWORD 3 + HCore::UInt8 countLow; // Count register, 7:0 + HCore::UInt8 countHigh; // Count register, 15:8 + HCore::UInt8 icc; // Isochronous command completion + HCore::UInt8 control; // Control register + + // DWORD 4 + HCore::UInt8 reserved1[4]; // Reserved +} FisRegH2D; + +typedef struct FisRegD2H final { + // DWORD 0 + HCore::UInt8 fisType; // FIS_TYPE_REG_D2H + + HCore::UInt8 portMul : 4; // Port multiplier + HCore::UInt8 reserved0 : 2; // Reserved + HCore::UInt8 interruptBit : 1; // Interrupt bit + HCore::UInt8 reserved1 : 1; // Reserved + + HCore::UInt8 status; // Status register + HCore::UInt8 error; // Error register + + // DWORD 1 + HCore::UInt8 lba0; // LBA low register, 7:0 + HCore::UInt8 lba1; // LBA mid register, 15:8 + HCore::UInt8 lba2; // LBA high register, 23:16 + HCore::UInt8 device; // Device register + + // DWORD 2 + HCore::UInt8 lba3; // LBA register, 31:24 + HCore::UInt8 lba4; // LBA register, 39:32 + HCore::UInt8 lba5; // LBA register, 47:40 + HCore::UInt8 rsv2; // Reserved + + // DWORD 3 + HCore::UInt8 countLow; // Count register, 7:0 + HCore::UInt8 countHigh; // Count register, 15:8 + HCore::UInt8 rsv3[2]; // Reserved + + // DWORD 4 + HCore::UInt8 rsv4[4]; // Reserved +} FisRegD2H; + +typedef struct FisData final { + // DWORD 0 + HCore::UInt8 fisType; // FIS_TYPE_DATA + + HCore::UInt8 portMul : 4; // Port multiplier + HCore::UInt8 reserved0 : 4; // Reserved + + HCore::UInt8 reserved1[2]; // Reserved + + // DWORD 1 ~ N + HCore::UInt32 data[1]; // Payload +} FisData; + +typedef struct FisPioSetup final { + // DWORD 0 + HCore::UInt8 fisType; // FIS_TYPE_PIO_SETUP + + HCore::UInt8 portMul : 4; // Port multiplier + HCore::UInt8 reserved0 : 1; // Reserved + HCore::UInt8 d : 1; // Data transfer direction, 1 - device to host + HCore::UInt8 interruptBit : 1; // Interrupt bit + HCore::UInt8 reserved1 : 1; + + HCore::UInt8 status; // Status register + HCore::UInt8 error; // Error register + + // DWORD 1 + HCore::UInt8 lba0; // LBA low register, 7:0 + HCore::UInt8 lba1; // LBA mid register, 15:8 + HCore::UInt8 lba2; // LBA high register, 23:16 + HCore::UInt8 device; // Device register + + // DWORD 2 + HCore::UInt8 lba3; // LBA register, 31:24 + HCore::UInt8 lba4; // LBA register, 39:32 + HCore::UInt8 lba5; // LBA register, 47:40 + HCore::UInt8 rsv2; // Reserved + + // DWORD 3 + HCore::UInt8 countLow; // Count register, 7:0 + HCore::UInt8 countHigh; // Count register, 15:8 + HCore::UInt8 rsv3; // Reserved + HCore::UInt8 eStatus; // New value of status register + + // DWORD 4 + HCore::UInt16 tc; // Transfer count + HCore::UInt8 rsv4[2]; // Reserved +} FisPioSetup; + +typedef struct FisDmaSetup final { + // DWORD 0 + HCore::UInt8 fisType; // FIS_TYPE_DMA_SETUP + + HCore::UInt8 portMul : 4; // Port multiplier + HCore::UInt8 reserved0 : 1; // Reserved + HCore::UInt8 dtd : 1; // Data transfer direction, 1 - device to host + HCore::UInt8 interruptBit : 1; // Interrupt bit + HCore::UInt8 + autoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed + + HCore::UInt8 reserved1[2]; // Reserved + + // DWORD 1&2 + HCore::UInt64 dmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in + // host memory. SATA Spec says host specific and not in + // Spec. Trying AHCI spec might work. + + // DWORD 3 + HCore::UInt32 rsvd; // More reserved + + // DWORD 4 + HCore::UInt32 dmabufOffset; // Byte offset into buffer. First 2 bits must be 0 + + // DWORD 5 + HCore::UInt32 transferCount; // Number of bytes to transfer. Bit 0 must be 0 + + // DWORD 6 + HCore::UInt32 reserved3; // Reserved +} FisDmaSetup; + +typedef struct FisDevBits final { + // DWORD 0 + HCore::UInt8 fisType; // FIS_TYPE_DMA_SETUP (A1h) + + HCore::UInt8 reserved0 : 5; // Reserved + HCore::UInt8 r0 : 1; + HCore::UInt8 interruptBit : 1; + HCore::UInt8 n : 1; + + HCore::UInt8 statusLow : 3; + HCore::UInt8 r1 : 1; + HCore::UInt8 statusHigh : 3; + + HCore::UInt8 r2 : 1; + HCore::UInt8 error; + + // DWORD 1 + HCore::UInt32 act; +} FisDevBits; + +/// \brief Enable AHCI device bit in GHC register. +#ifndef kAhciGHC_AE +#define kAhciGHC_AE (31) +#endif //! ifndef kAhciGHC_AE + +typedef struct HbaPort final { + HCore::UInt32 clb; // 0x00, command list base address, 1K-byte aligned + HCore::UInt32 clbu; // 0x04, command list base address upper 32 bits + HCore::UInt32 fb; // 0x08, FIS base address, 256-byte aligned + HCore::UInt32 fbu; // 0x0C, FIS base address upper 32 bits + HCore::UInt32 is; // 0x10, interrupt status + HCore::UInt32 ie; // 0x14, interrupt enable + HCore::UInt32 cmd; // 0x18, command and status + HCore::UInt32 reserved0; // 0x1C, Reserved + HCore::UInt32 tfd; // 0x20, task file data + HCore::UInt32 sig; // 0x24, signature + HCore::UInt32 ssts; // 0x28, SATA status (SCR0:SStatus) + HCore::UInt32 sctl; // 0x2C, SATA control (SCR2:SControl) + HCore::UInt32 serr; // 0x30, SATA error (SCR1:SError) + HCore::UInt32 sact; // 0x34, SATA active (SCR3:SActive) + HCore::UInt32 ci; // 0x38, command issue + HCore::UInt32 sntf; // 0x20, SATA notification (SCR4:SNotification) + HCore::UInt32 fbs; // 0x40, FIS-based switch control + HCore::UInt32 reserved1[11]; // 0x44 ~ 0x6F, Reserved + HCore::UInt32 vendor[4]; // 0x70 ~ 0x7F, vendor specific +} HbaPort; + +typedef struct HbaMem final { + // 0x00 - 0x2B, Generic Host Control + HCore::UInt32 cap; // 0x00, Host capability + HCore::UInt32 ghc; // 0x04, Global host control + HCore::UInt32 is; // 0x08, Interrupt status + HCore::UInt32 pi; // 0x0C, Port implemented + HCore::UInt32 vs; // 0x10, Version + HCore::UInt32 ccc_ctl; // 0x14, Command completion coalescing control + HCore::UInt32 ccc_pts; // 0x18, Command completion coalescing ports + HCore::UInt32 em_loc; // 0x1C, Enclosure management location + HCore::UInt32 em_ctl; // 0x20, Enclosure management control + HCore::UInt32 cap2; // 0x24, Host capabilities extended + HCore::UInt32 bohc; // 0x28, BIOS/OS handoff control and status + + HCore::UInt16 rsv; + HCore::UInt32 resv2; + + HbaPort ports[1]; // 1 ~ 32 +} HbaMem; + +typedef struct HbaCmdHeader final { + // DW0 + HCore::UInt8 cfl : 5; // Command FIS length in DWORDS, 2 ~ 16 + HCore::UInt8 atapi : 1; // ATAPI + HCore::UInt8 write : 1; // Write, 1: H2D, 0: D2H + HCore::UInt8 prefetchable : 1; // Prefetchable + + HCore::UInt8 reset : 1; // Reset + HCore::UInt8 BIST : 1; // BIST + HCore::UInt8 clear : 1; // Clear busy upon R_OK + HCore::UInt8 reserved0 : 1; // Reserved + HCore::UInt8 pmp : 4; // Port multiplier port + + HCore::UInt16 prdtl; // Physical region descriptor table length in entries + volatile HCore::UInt32 prdbc; // Physical region descriptor byte count transferred + + HCore::UInt32 ctba; // Command table descriptor base address + HCore::UInt32 ctbau; // Command table descriptor base address upper 32 bits + + HCore::UInt32 reserved1[4]; // Reserved +} HbaCmdHeader; + +typedef struct HbaFis final { + // 0x00 + FisDmaSetup dsfis; // DMA Setup FIS + HCore::UInt8 pad0[4]; + // 0x20 + FisPioSetup psfis; // PIO Setup FIS + HCore::UInt8 pad1[12]; + // 0x40 + FisRegD2H rfis; // Register – Device to Host FIS + HCore::UInt8 pad2[4]; + // 0x58 + FisDevBits sdbfis; // Set Device Bit FIS + // 0x60 + HCore::UInt8 ufis[64]; + // 0xA0 + HCore::UInt8 rsv[0x100 - 0xA0]; +} HbaFis; + +typedef struct HbaPrdtEntry final { + HCore::UInt32 dba; // Data base address + HCore::UInt32 dbau; // Data base address upper 32 bits + HCore::UInt32 reserved0; // Reserved + // DW3 + HCore::UInt32 dbc : 22; // Byte count, 4M max + HCore::UInt32 reserved1 : 9; // Reserved + HCore::UInt32 interruptBit : 1; // Interrupt on completion +} HbaPrdtEntry; + +typedef struct HbaCmdTbl final { + HCore::UInt8 cfis[64]; // Command FIS + HCore::UInt8 acmd[16]; // ATAPI command, 12 or 16 bytes + HCore::UInt8 rsv[48]; // Reserved + HbaPrdtEntry prdtEntries[1]; // Physical region descriptor table entries, 0 ~ 65535 +} HbaCmdTbl; + +/* EOF */ diff --git a/Private/Builtins/AHCI/compile_flags.txt b/Private/Builtins/AHCI/compile_flags.txt new file mode 100644 index 00000000..1bc51142 --- /dev/null +++ b/Private/Builtins/AHCI/compile_flags.txt @@ -0,0 +1,4 @@ +-I./ +-I../ +-I../../ +-std=c++20 diff --git a/Private/Builtins/ATA/Defines.hxx b/Private/Builtins/ATA/Defines.hxx new file mode 100644 index 00000000..a4a212bd --- /dev/null +++ b/Private/Builtins/ATA/Defines.hxx @@ -0,0 +1,120 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + + File: Defines.hxx + Purpose: ATA header. + + Revision History: + + 03/02/24: Added file (amlel) + +------------------------------------------- */ + +#pragma once + +#include +#include + +using namespace HCore; + +// Status register +#define ATA_SR_BSY 0x80 +#define ATA_SR_DRDY 0x40 +#define ATA_SR_DF 0x20 +#define ATA_SR_DSC 0x10 +#define ATA_SR_DRQ 0x08 +#define ATA_SR_CORR 0x04 +#define ATA_SR_IDX 0x02 +#define ATA_SR_ERR 0x01 + +// Error register +#define ATA_ER_BBK 0x80 +#define ATA_ER_UNC 0x40 +#define ATA_ER_MC 0x20 +#define ATA_ER_IDNF 0x10 +#define ATA_ER_MCR 0x08 +#define ATA_ER_ABRT 0x04 +#define ATA_ER_TK0NF 0x02 +#define ATA_ER_AMNF 0x01 + +#define ATA_CMD_READ_PIO 0x20 +#define ATA_CMD_READ_PIO_EXT 0x24 +#define ATA_CMD_READ_DMA 0xC8 +#define ATA_CMD_READ_DMA_EXT 0x25 +#define ATA_CMD_WRITE_PIO 0x30 +#define ATA_CMD_WRITE_PIO_EXT 0x34 +#define ATA_CMD_WRITE_DMA 0xCA +#define ATA_CMD_WRITE_DMA_EXT 0x35 +#define ATA_CMD_CACHE_FLUSH 0xE7 +#define ATA_CMD_CACHE_FLUSH_EXT 0xEA +#define ATA_CMD_PACKET 0xA0 +#define ATA_CMD_IDENTIFY_PACKET 0xA1 +#define ATA_CMD_IDENTIFY 0xEC + +#define ATA_IDENT_DEVICE_TYPE 0 +#define ATA_IDENT_CYLINDERS 2 +#define ATA_IDENT_HEADS 6 +#define ATA_IDENT_SECTORS 12 +#define ATA_IDENT_SERIAL 20 +#define ATA_IDENT_MODEL 54 +#define ATA_IDENT_CAPABILITIES 98 +#define ATA_IDENT_FIELDVALID 106 +#define ATA_IDENT_MAX_LBA 120 +#define ATA_IDENT_COMMANDSETS 164 +#define ATA_IDENT_MAX_LBA_EXT 200 + +#define ATA_MASTER 0x00 +#define ATA_SLAVE 0x01 + +// Register +#define ATA_REG_DATA 0x00 +#define ATA_REG_ERROR 0x01 +#define ATA_REG_FEATURES 0x01 +#define ATA_REG_SEC_COUNT0 0x02 +#define ATA_REG_LBA0 0x03 +#define ATA_REG_LBA1 0x04 +#define ATA_REG_LBA2 0x05 +#define ATA_REG_HDDEVSEL 0x06 +#define ATA_REG_COMMAND 0x07 +#define ATA_REG_STATUS 0x07 +#define ATA_REG_SEC_COUNT1 0x08 +#define ATA_REG_LBA3 0x09 +#define ATA_REG_LBA4 0x0A +#define ATA_REG_LBA5 0x0B +#define ATA_REG_CONTROL 0x0C +#define ATA_REG_ALT_STATUS 0x0C +#define ATA_REG_DEV_ADDRESS 0x0D + +#define ATA_REG_NEIN 0x01 + +#define ATA_PRIMARY_IO 0x1F0 +#define ATA_SECONDARY_IO 0x170 +#define ATA_PRIMARY_DCR_AS 0x3F6 +#define ATA_SECONDARY_DCR_AS 0x376 + +// Irq +#define ATA_PRIMARY_IRQ 14 +#define ATA_SECONDARY_IRQ 15 + +// Channels +#define ATA_PRIMARY 0x00 +#define ATA_SECONDARY 0x01 + +#define ATA_CYL_LOW 4 +#define ATA_CYL_HIGH 5 + +// IO Direction +#define ATA_READ 0x00 +#define ATA_WRITE 0x013 + +#define ATA_PRIMARY_SEL 0xA0 +#define ATA_SECONDARY_SEL 0xB0 + +// ATA Helpers +#define ATA_ADDRESS1(x) (x + 3) +#define ATA_ADDRESS2(x) (x + 4) +#define ATA_ADDRESS3(x) (x + 5) +#define ATA_COMMAND(x) (x + 7) + +#define kATASectorSize 4096 diff --git a/Private/Builtins/ATA/compile_flags.txt b/Private/Builtins/ATA/compile_flags.txt new file mode 100644 index 00000000..1bc51142 --- /dev/null +++ b/Private/Builtins/ATA/compile_flags.txt @@ -0,0 +1,4 @@ +-I./ +-I../ +-I../../ +-std=c++20 diff --git a/Private/Builtins/Ethernet/.gitkeep b/Private/Builtins/Ethernet/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/Ethernet/compile_flags.txt b/Private/Builtins/Ethernet/compile_flags.txt new file mode 100644 index 00000000..545816fc --- /dev/null +++ b/Private/Builtins/Ethernet/compile_flags.txt @@ -0,0 +1,4 @@ +-I./ +-I../ +-I../../Private +-std=c++20 diff --git a/Private/Builtins/HPET/.gitkeep b/Private/Builtins/HPET/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/NVME/.gitkeep b/Private/Builtins/NVME/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/NVME/compile_flags.txt b/Private/Builtins/NVME/compile_flags.txt new file mode 100644 index 00000000..1bc51142 --- /dev/null +++ b/Private/Builtins/NVME/compile_flags.txt @@ -0,0 +1,4 @@ +-I./ +-I../ +-I../../ +-std=c++20 diff --git a/Private/Builtins/PS2/PS2MouseInterface.hxx b/Private/Builtins/PS2/PS2MouseInterface.hxx new file mode 100644 index 00000000..682151e9 --- /dev/null +++ b/Private/Builtins/PS2/PS2MouseInterface.hxx @@ -0,0 +1,109 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + + File: PS2MouseInterface.hxx + Purpose: PS/2 mouse. + + Revision History: + + 03/02/24: Added file (amlel) + +------------------------------------------- */ + +#pragma once + +#include +#include +#include + +namespace HCore { +/// @brief PS/2 Mouse driver interface +class PS2MouseInterface final { + public: + explicit PS2MouseInterface() = default; + ~PS2MouseInterface() = default; + + HCORE_COPY_DEFAULT(PS2MouseInterface); + + public: + Void Init() noexcept { + HCore::kcout << "HCoreKrnl.exe: Enabling PS/2 mouse...\r\n"; + + this->Write(0xFF); + + HAL::Out8(0x64, 0xA8); + + this->Wait(); + + HAL::Out8(0x64, 0x20); + + this->WaitInput(); + + UInt8 dataStatus = HAL::In8(0x60); + + dataStatus |= 0b10; + + this->Wait(); + + HAL::Out8(0x60, dataStatus); + + this->Write(0xF6); + auto f6Dat = this->Read(); + + this->Write(0xF4); + auto f4Dat = this->Read(); + + HCore::kcout << "HCoreKrnl.exe: PS/2 mouse is OK: " << hex_number(f6Dat); + HCore::kcout << ", " << hex_number(f4Dat) << end_line(); + } + + private: + Bool WaitInput() noexcept { + UInt64 timeout = 100000; + + while (timeout) { + if ((HAL::In8(0x64) & 0x1)) { + HCore::kcout << "HCoreKrnl.exe: Wait: OK\r\n"; + return true; + } + + --timeout; + } // wait until we can read + + HCore::kcout << "HCoreKrnl.exe: Wait: Timeout\r\n"; + // return the ack bit. + return false; + } + + Bool Wait() noexcept { + UInt64 timeout = 100000; + + while (timeout) { + if ((HAL::In8(0x64) & 0b10) == 0) { + HCore::kcout << "HCoreKrnl.exe: Wait: OK\r\n"; + return true; + } + + --timeout; + } // wait until we can read + + HCore::kcout << "HCoreKrnl.exe: Wait: Timeout\r\n"; + // return the ack bit. + return false; + } + + Void Write(UInt8 val) { + this->Wait(); + HAL::Out8(0x64, 0xD4); + this->Wait(); + + HAL::Out8(0x60, val); + } + + UInt8 Read() { + this->WaitInput(); + return HAL::In8(0x60); + } +}; +} // namespace HCore diff --git a/Private/Builtins/README.TXT b/Private/Builtins/README.TXT new file mode 100644 index 00000000..ce39f472 --- /dev/null +++ b/Private/Builtins/README.TXT @@ -0,0 +1,16 @@ +============== +HCore Builtins +============== + +=============== +What are these? +=============== + +These are HCore builtins device drivers. + +=========== +Maintainers +=========== + +ACPIManager: Amlal EL Mahrouss +AHCI: Amlal EL Mahrouss \ No newline at end of file diff --git a/Private/Builtins/WiFi/.gitkeep b/Private/Builtins/WiFi/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/WiFi/compile_flags.txt b/Private/Builtins/WiFi/compile_flags.txt new file mode 100644 index 00000000..1bc51142 --- /dev/null +++ b/Private/Builtins/WiFi/compile_flags.txt @@ -0,0 +1,4 @@ +-I./ +-I../ +-I../../ +-std=c++20 diff --git a/Private/Builtins/XHCI/.gitkeep b/Private/Builtins/XHCI/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Private/Builtins/XHCI/Defines.hxx b/Private/Builtins/XHCI/Defines.hxx new file mode 100644 index 00000000..32eb8cca --- /dev/null +++ b/Private/Builtins/XHCI/Defines.hxx @@ -0,0 +1,67 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + + File: Defines.hxx + Purpose: XHCI (and backwards) header. + + Revision History: + + 01/02/24: Added file (amlel) + 03/02/24: Update filename to Defines.hxx (amlel) + +------------------------------------------- */ + +#pragma once + +#include + +using namespace HCore; + +#define kUSBCommand (UInt16)0x0 +#define kUSBStatus (UInt16)0x2 +#define kUSBInterruptEnable (UInt16)0x4 +#define kUSBFrameNum (UInt16)0x6 +#define kUSBFrameListBaseAddress (UInt16)0x8 +#define kUSBFrameModifyStart (UInt16)0xC +#define kUSBPort1StatusCtrl (UInt16)0x10 +#define kUSBPort2StatusCtrl (UInt16)0x12 + +typedef struct USBCommandRegister final { + UInt8 mReserved[8]; // Reserved + UInt8 + mMaxPacket; // 0 = Max packet size 32 bits 1 = Max packet size 64 bits + UInt8 mConfigure; + UInt8 mSoftwareDebug; + UInt8 mGlobalResume; + UInt8 mGlobalSuspend; + UInt8 mHostCtrlReset; + UInt8 mRun; // 1 = Controller execute frame list entries +} USBCommandRegister; + +typedef struct USBStatusRegister final { + UInt8 mReserved[8]; // Reserved + UInt8 mHalted; // 1 = bit 0 in CMD is zero 0 = bit 0 in CMD is 1 + UInt8 mProcessError; + UInt8 mSystemError; + UInt8 mResumeDetected; + UInt8 mErrorInterrupt; + UInt8 mInterrupt; +} USBStatusRegister; + +typedef struct USBInterruptEnableRegister final { + UInt8 mReserved[4]; // Reserved + UInt8 mShortPacket; // 1=Enable interrupt 0=Disable interrupt + UInt8 mComplete; // 1=Enable interrupt 0=Disable interrupt + UInt8 mResume; // 1=Enable interrupt 0=Disable interrupt + UInt8 mTimeoutCRC; // 1=Enable interrupt 0=Disable interrupt +} USBInterruptEnableRegister; + +/* + Some terminology: + + Frame Number: Number of processed entry of the Frame List. + Frame List Base Address: + 32-bit physical adress of Frame List. Remember that first 12 bytes are + always 0. The Frame List must contain 1024 entries. +*/ diff --git a/Private/Builtins/XHCI/compile_flags.txt b/Private/Builtins/XHCI/compile_flags.txt new file mode 100644 index 00000000..1bc51142 --- /dev/null +++ b/Private/Builtins/XHCI/compile_flags.txt @@ -0,0 +1,4 @@ +-I./ +-I../ +-I../../ +-std=c++20 diff --git a/Private/CompilerKit/Version.hxx b/Private/CompilerKit/Version.hxx index d29e0543..5c1e3bd0 100644 --- a/Private/CompilerKit/Version.hxx +++ b/Private/CompilerKit/Version.hxx @@ -1,4 +1,4 @@ #pragma once -#define BOOTLOADER_VERSION L"v1.13.A" -#define KERNEL_VERSION "v1.13.A" +#define BOOTLOADER_VERSION L"v1.14.0" +#define KERNEL_VERSION "v1.14.0" diff --git a/Private/Drivers/.gitkeep b/Private/Drivers/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/ACPI/.gitkeep b/Private/Drivers/ACPI/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/ACPI/ACPI.hpp b/Private/Drivers/ACPI/ACPI.hpp deleted file mode 100644 index 1a4329fc..00000000 --- a/Private/Drivers/ACPI/ACPI.hpp +++ /dev/null @@ -1,67 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - -------------------------------------------- */ - -#ifndef __ACPI__ -#define __ACPI__ - -/** - https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html - https://wiki.osdev.org/RSDT -*/ - -#include - -namespace HCore { -class SDT { - public: - Char Signature[4]; - UInt32 Length; - UInt8 Revision; - Char Checksum; - Char OemId[6]; - Char OemTableId[8]; - UInt32 OemRev; - UInt32 CreatorID; - UInt32 CreatorRevision; -}; - -class RSDP : public SDT { - public: - UInt32 RsdtAddress; - UIntPtr XsdtAddress; - UInt8 ExtendedChecksum; - UInt8 Reserved0[3]; -}; - -class ConfigHeader { - public: - UInt64 BaseAddress; - UInt16 PciSegGroup; - UInt8 StartBus; - UInt8 EndBus; - UInt32 Reserved; -}; - -enum class AddressSpace : UInt8 { - SystemMemory = 0, - SystemIO = 1, - Pci = 2, - Controller = 3, - SmBus = 4, - Invalid = 0xFF, -}; - -class Address { - public: - AddressSpace AddressSpaceId; - UInt8 RegisterBitWidth; - UInt8 RegisterBitOffset; - UInt8 Reserved; - UIntPtr Address; -}; -} // namespace HCore - -#endif // !__ACPI__ diff --git a/Private/Drivers/ACPI/ACPIManager.hxx b/Private/Drivers/ACPI/ACPIManager.hxx deleted file mode 100644 index dc3dd573..00000000 --- a/Private/Drivers/ACPI/ACPIManager.hxx +++ /dev/null @@ -1,44 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - -------------------------------------------- */ - -#ifndef __ACPI_MANAGER__ -#define __ACPI_MANAGER__ - -#include -#include -#include -#include - -namespace HCore { -class ACPIManager final { - public: - explicit ACPIManager(voidPtr rsdptr); - ~ACPIManager() = default; - - ACPIManager &operator=(const ACPIManager &) = default; - ACPIManager(const ACPIManager &) = default; - - public: - void Shutdown(); // shutdown - void Reset(); // soft-reboot - - ErrorOr Find(const char *signature); - - bool Checksum(const char *checksum, SSizeT len); // watch for collides! - - public: - ErrorOr operator[](const char *signature) { - return this->Find(signature); - } - - private: - VoidPtr m_Rsdp; // pointer to root descriptor. - SSizeT m_Entries; // number of entries, -1 tells that no invalid entries were - // found. -}; -} // namespace HCore - -#endif // !__ACPI_MANAGER__ diff --git a/Private/Drivers/ACPI/compile_flags.txt b/Private/Drivers/ACPI/compile_flags.txt deleted file mode 100644 index 1bc51142..00000000 --- a/Private/Drivers/ACPI/compile_flags.txt +++ /dev/null @@ -1,4 +0,0 @@ --I./ --I../ --I../../ --std=c++20 diff --git a/Private/Drivers/AHCI/.gitkeep b/Private/Drivers/AHCI/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/AHCI/Defines.hxx b/Private/Drivers/AHCI/Defines.hxx deleted file mode 100644 index c1d3c063..00000000 --- a/Private/Drivers/AHCI/Defines.hxx +++ /dev/null @@ -1,316 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - - File: Defines.hxx - Purpose: AHCI header. - - Revision History: - - 03/02/24: Added file (amlel) - -------------------------------------------- */ - -#pragma once - -#include - -// Forward declarations of structs. - -struct HbaPort; -struct FisData; -struct FisRegD2H; -struct FisRegH2D; - -// Enum types - -typedef enum { - FIS_TYPE_REG_H2D = 0x27, // Register FIS - host to device - FIS_TYPE_REG_D2H = 0x34, // Register FIS - device to host - FIS_TYPE_DMA_ACT = 0x39, // DMA activate FIS - device to host - FIS_TYPE_DMA_SETUP = 0x41, // DMA setup FIS - bidirectional - FIS_TYPE_DATA = 0x46, // Data FIS - bidirectional - FIS_TYPE_BIST = 0x58, // BIST activate FIS - bidirectional - FIS_TYPE_PIO_SETUP = 0x5F, // PIO setup FIS - device to host - FIS_TYPE_DEV_BITS = 0xA1, // Set device bits FIS - device to host -} AHCI_FIS_TYPE; - -typedef enum { - AHCI_ATA_CMD_IDENTIFY = 0xEC, - AHCI_ATA_CMD_READ_DMA = 0xC8, - AHCI_ATA_CMD_READ_DMA_EX = 0x25, - AHCI_ATA_CMD_WRITE_DMA = 0xCA, - AHCI_ATA_CMD_WRITE_DMA_EX = 0x35 -} AHCI_FIS_COMMAND; - -typedef struct FisRegH2D final { - // DWORD 0 - HCore::UInt8 fisType; // FIS_TYPE_REG_H2D - - HCore::UInt8 portMul : 4; // Port multiplier - HCore::UInt8 reserved0 : 3; // Reserved - HCore::UInt8 cmdOrCtrl : 1; // 1: Command, 0: Control - - HCore::UInt8 command; // Command register - HCore::UInt8 featurel; // Feature register, 7:0 - - // DWORD 1 - HCore::UInt8 lba0; // LBA low register, 7:0 - HCore::UInt8 lba1; // LBA mid register, 15:8 - HCore::UInt8 lba2; // LBA high register, 23:16 - HCore::UInt8 device; // Device register - - // DWORD 2 - HCore::UInt8 lba3; // LBA register, 31:24 - HCore::UInt8 lba4; // LBA register, 39:32 - HCore::UInt8 lba5; // LBA register, 47:40 - HCore::UInt8 featureHigh; // Feature register, 15:8 - - // DWORD 3 - HCore::UInt8 countLow; // Count register, 7:0 - HCore::UInt8 countHigh; // Count register, 15:8 - HCore::UInt8 icc; // Isochronous command completion - HCore::UInt8 control; // Control register - - // DWORD 4 - HCore::UInt8 reserved1[4]; // Reserved -} FisRegH2D; - -typedef struct FisRegD2H final { - // DWORD 0 - HCore::UInt8 fisType; // FIS_TYPE_REG_D2H - - HCore::UInt8 portMul : 4; // Port multiplier - HCore::UInt8 reserved0 : 2; // Reserved - HCore::UInt8 interruptBit : 1; // Interrupt bit - HCore::UInt8 reserved1 : 1; // Reserved - - HCore::UInt8 status; // Status register - HCore::UInt8 error; // Error register - - // DWORD 1 - HCore::UInt8 lba0; // LBA low register, 7:0 - HCore::UInt8 lba1; // LBA mid register, 15:8 - HCore::UInt8 lba2; // LBA high register, 23:16 - HCore::UInt8 device; // Device register - - // DWORD 2 - HCore::UInt8 lba3; // LBA register, 31:24 - HCore::UInt8 lba4; // LBA register, 39:32 - HCore::UInt8 lba5; // LBA register, 47:40 - HCore::UInt8 rsv2; // Reserved - - // DWORD 3 - HCore::UInt8 countLow; // Count register, 7:0 - HCore::UInt8 countHigh; // Count register, 15:8 - HCore::UInt8 rsv3[2]; // Reserved - - // DWORD 4 - HCore::UInt8 rsv4[4]; // Reserved -} FisRegD2H; - -typedef struct FisData final { - // DWORD 0 - HCore::UInt8 fisType; // FIS_TYPE_DATA - - HCore::UInt8 portMul : 4; // Port multiplier - HCore::UInt8 reserved0 : 4; // Reserved - - HCore::UInt8 reserved1[2]; // Reserved - - // DWORD 1 ~ N - HCore::UInt32 data[1]; // Payload -} FisData; - -typedef struct FisPioSetup final { - // DWORD 0 - HCore::UInt8 fisType; // FIS_TYPE_PIO_SETUP - - HCore::UInt8 portMul : 4; // Port multiplier - HCore::UInt8 reserved0 : 1; // Reserved - HCore::UInt8 d : 1; // Data transfer direction, 1 - device to host - HCore::UInt8 interruptBit : 1; // Interrupt bit - HCore::UInt8 reserved1 : 1; - - HCore::UInt8 status; // Status register - HCore::UInt8 error; // Error register - - // DWORD 1 - HCore::UInt8 lba0; // LBA low register, 7:0 - HCore::UInt8 lba1; // LBA mid register, 15:8 - HCore::UInt8 lba2; // LBA high register, 23:16 - HCore::UInt8 device; // Device register - - // DWORD 2 - HCore::UInt8 lba3; // LBA register, 31:24 - HCore::UInt8 lba4; // LBA register, 39:32 - HCore::UInt8 lba5; // LBA register, 47:40 - HCore::UInt8 rsv2; // Reserved - - // DWORD 3 - HCore::UInt8 countLow; // Count register, 7:0 - HCore::UInt8 countHigh; // Count register, 15:8 - HCore::UInt8 rsv3; // Reserved - HCore::UInt8 eStatus; // New value of status register - - // DWORD 4 - HCore::UInt16 tc; // Transfer count - HCore::UInt8 rsv4[2]; // Reserved -} FisPioSetup; - -typedef struct FisDmaSetup final { - // DWORD 0 - HCore::UInt8 fisType; // FIS_TYPE_DMA_SETUP - - HCore::UInt8 portMul : 4; // Port multiplier - HCore::UInt8 reserved0 : 1; // Reserved - HCore::UInt8 dtd : 1; // Data transfer direction, 1 - device to host - HCore::UInt8 interruptBit : 1; // Interrupt bit - HCore::UInt8 - autoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed - - HCore::UInt8 reserved1[2]; // Reserved - - // DWORD 1&2 - HCore::UInt64 dmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in - // host memory. SATA Spec says host specific and not in - // Spec. Trying AHCI spec might work. - - // DWORD 3 - HCore::UInt32 rsvd; // More reserved - - // DWORD 4 - HCore::UInt32 dmabufOffset; // Byte offset into buffer. First 2 bits must be 0 - - // DWORD 5 - HCore::UInt32 transferCount; // Number of bytes to transfer. Bit 0 must be 0 - - // DWORD 6 - HCore::UInt32 reserved3; // Reserved -} FisDmaSetup; - -typedef struct FisDevBits final { - // DWORD 0 - HCore::UInt8 fisType; // FIS_TYPE_DMA_SETUP (A1h) - - HCore::UInt8 reserved0 : 5; // Reserved - HCore::UInt8 r0 : 1; - HCore::UInt8 interruptBit : 1; - HCore::UInt8 n : 1; - - HCore::UInt8 statusLow : 3; - HCore::UInt8 r1 : 1; - HCore::UInt8 statusHigh : 3; - - HCore::UInt8 r2 : 1; - HCore::UInt8 error; - - // DWORD 1 - HCore::UInt32 act; -} FisDevBits; - -/// \brief Enable AHCI device bit in GHC register. -#ifndef kAhciGHC_AE -#define kAhciGHC_AE (31) -#endif //! ifndef kAhciGHC_AE - -typedef struct HbaPort final { - HCore::UInt32 clb; // 0x00, command list base address, 1K-byte aligned - HCore::UInt32 clbu; // 0x04, command list base address upper 32 bits - HCore::UInt32 fb; // 0x08, FIS base address, 256-byte aligned - HCore::UInt32 fbu; // 0x0C, FIS base address upper 32 bits - HCore::UInt32 is; // 0x10, interrupt status - HCore::UInt32 ie; // 0x14, interrupt enable - HCore::UInt32 cmd; // 0x18, command and status - HCore::UInt32 reserved0; // 0x1C, Reserved - HCore::UInt32 tfd; // 0x20, task file data - HCore::UInt32 sig; // 0x24, signature - HCore::UInt32 ssts; // 0x28, SATA status (SCR0:SStatus) - HCore::UInt32 sctl; // 0x2C, SATA control (SCR2:SControl) - HCore::UInt32 serr; // 0x30, SATA error (SCR1:SError) - HCore::UInt32 sact; // 0x34, SATA active (SCR3:SActive) - HCore::UInt32 ci; // 0x38, command issue - HCore::UInt32 sntf; // 0x20, SATA notification (SCR4:SNotification) - HCore::UInt32 fbs; // 0x40, FIS-based switch control - HCore::UInt32 reserved1[11]; // 0x44 ~ 0x6F, Reserved - HCore::UInt32 vendor[4]; // 0x70 ~ 0x7F, vendor specific -} HbaPort; - -typedef struct HbaMem final { - // 0x00 - 0x2B, Generic Host Control - HCore::UInt32 cap; // 0x00, Host capability - HCore::UInt32 ghc; // 0x04, Global host control - HCore::UInt32 is; // 0x08, Interrupt status - HCore::UInt32 pi; // 0x0C, Port implemented - HCore::UInt32 vs; // 0x10, Version - HCore::UInt32 ccc_ctl; // 0x14, Command completion coalescing control - HCore::UInt32 ccc_pts; // 0x18, Command completion coalescing ports - HCore::UInt32 em_loc; // 0x1C, Enclosure management location - HCore::UInt32 em_ctl; // 0x20, Enclosure management control - HCore::UInt32 cap2; // 0x24, Host capabilities extended - HCore::UInt32 bohc; // 0x28, BIOS/OS handoff control and status - - HCore::UInt16 rsv; - HCore::UInt32 resv2; - - HbaPort ports[1]; // 1 ~ 32 -} HbaMem; - -typedef struct HbaCmdHeader final { - // DW0 - HCore::UInt8 cfl : 5; // Command FIS length in DWORDS, 2 ~ 16 - HCore::UInt8 atapi : 1; // ATAPI - HCore::UInt8 write : 1; // Write, 1: H2D, 0: D2H - HCore::UInt8 prefetchable : 1; // Prefetchable - - HCore::UInt8 reset : 1; // Reset - HCore::UInt8 BIST : 1; // BIST - HCore::UInt8 clear : 1; // Clear busy upon R_OK - HCore::UInt8 reserved0 : 1; // Reserved - HCore::UInt8 pmp : 4; // Port multiplier port - - HCore::UInt16 prdtl; // Physical region descriptor table length in entries - volatile HCore::UInt32 prdbc; // Physical region descriptor byte count transferred - - HCore::UInt32 ctba; // Command table descriptor base address - HCore::UInt32 ctbau; // Command table descriptor base address upper 32 bits - - HCore::UInt32 reserved1[4]; // Reserved -} HbaCmdHeader; - -typedef struct HbaFis final { - // 0x00 - FisDmaSetup dsfis; // DMA Setup FIS - HCore::UInt8 pad0[4]; - // 0x20 - FisPioSetup psfis; // PIO Setup FIS - HCore::UInt8 pad1[12]; - // 0x40 - FisRegD2H rfis; // Register – Device to Host FIS - HCore::UInt8 pad2[4]; - // 0x58 - FisDevBits sdbfis; // Set Device Bit FIS - // 0x60 - HCore::UInt8 ufis[64]; - // 0xA0 - HCore::UInt8 rsv[0x100 - 0xA0]; -} HbaFis; - -typedef struct HbaPrdtEntry final { - HCore::UInt32 dba; // Data base address - HCore::UInt32 dbau; // Data base address upper 32 bits - HCore::UInt32 reserved0; // Reserved - // DW3 - HCore::UInt32 dbc : 22; // Byte count, 4M max - HCore::UInt32 reserved1 : 9; // Reserved - HCore::UInt32 interruptBit : 1; // Interrupt on completion -} HbaPrdtEntry; - -typedef struct HbaCmdTbl final { - HCore::UInt8 cfis[64]; // Command FIS - HCore::UInt8 acmd[16]; // ATAPI command, 12 or 16 bytes - HCore::UInt8 rsv[48]; // Reserved - HbaPrdtEntry prdtEntries[1]; // Physical region descriptor table entries, 0 ~ 65535 -} HbaCmdTbl; - -/* EOF */ diff --git a/Private/Drivers/AHCI/compile_flags.txt b/Private/Drivers/AHCI/compile_flags.txt deleted file mode 100644 index 1bc51142..00000000 --- a/Private/Drivers/AHCI/compile_flags.txt +++ /dev/null @@ -1,4 +0,0 @@ --I./ --I../ --I../../ --std=c++20 diff --git a/Private/Drivers/ATA/Defines.hxx b/Private/Drivers/ATA/Defines.hxx deleted file mode 100644 index f4a02467..00000000 --- a/Private/Drivers/ATA/Defines.hxx +++ /dev/null @@ -1,118 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - - File: Defines.hxx - Purpose: ATA header. - - Revision History: - - 03/02/24: Added file (amlel) - -------------------------------------------- */ - -#pragma once - -#include -#include - -using namespace HCore; - -// Status register -#define ATA_SR_BSY 0x80 -#define ATA_SR_DRDY 0x40 -#define ATA_SR_DF 0x20 -#define ATA_SR_DSC 0x10 -#define ATA_SR_DRQ 0x08 -#define ATA_SR_CORR 0x04 -#define ATA_SR_IDX 0x02 -#define ATA_SR_ERR 0x01 - -// Error register -#define ATA_ER_BBK 0x80 -#define ATA_ER_UNC 0x40 -#define ATA_ER_MC 0x20 -#define ATA_ER_IDNF 0x10 -#define ATA_ER_MCR 0x08 -#define ATA_ER_ABRT 0x04 -#define ATA_ER_TK0NF 0x02 -#define ATA_ER_AMNF 0x01 - -#define ATA_CMD_READ_PIO 0x20 -#define ATA_CMD_READ_PIO_EXT 0x24 -#define ATA_CMD_READ_DMA 0xC8 -#define ATA_CMD_READ_DMA_EXT 0x25 -#define ATA_CMD_WRITE_PIO 0x30 -#define ATA_CMD_WRITE_PIO_EXT 0x34 -#define ATA_CMD_WRITE_DMA 0xCA -#define ATA_CMD_WRITE_DMA_EXT 0x35 -#define ATA_CMD_CACHE_FLUSH 0xE7 -#define ATA_CMD_CACHE_FLUSH_EXT 0xEA -#define ATA_CMD_PACKET 0xA0 -#define ATA_CMD_IDENTIFY_PACKET 0xA1 -#define ATA_CMD_IDENTIFY 0xEC - -#define ATA_IDENT_DEVICE_TYPE 0 -#define ATA_IDENT_CYLINDERS 2 -#define ATA_IDENT_HEADS 6 -#define ATA_IDENT_SECTORS 12 -#define ATA_IDENT_SERIAL 20 -#define ATA_IDENT_MODEL 54 -#define ATA_IDENT_CAPABILITIES 98 -#define ATA_IDENT_FIELDVALID 106 -#define ATA_IDENT_MAX_LBA 120 -#define ATA_IDENT_COMMANDSETS 164 -#define ATA_IDENT_MAX_LBA_EXT 200 - -#define ATA_MASTER 0x00 -#define ATA_SLAVE 0x01 - -// Register -#define ATA_REG_DATA 0x00 -#define ATA_REG_ERROR 0x01 -#define ATA_REG_FEATURES 0x01 -#define ATA_REG_SEC_COUNT0 0x02 -#define ATA_REG_LBA0 0x03 -#define ATA_REG_LBA1 0x04 -#define ATA_REG_LBA2 0x05 -#define ATA_REG_HDDEVSEL 0x06 -#define ATA_REG_COMMAND 0x07 -#define ATA_REG_STATUS 0x07 -#define ATA_REG_SEC_COUNT1 0x08 -#define ATA_REG_LBA3 0x09 -#define ATA_REG_LBA4 0x0A -#define ATA_REG_LBA5 0x0B -#define ATA_REG_CONTROL 0x0C -#define ATA_REG_ALT_STATUS 0x0C -#define ATA_REG_DEV_ADDRESS 0x0D - -#define ATA_REG_NEIN 0x01 - -#define ATA_PRIMARY_IO 0x1F0 -#define ATA_SECONDARY_IO 0x170 -#define ATA_PRIMARY_DCR_AS 0x3F6 -#define ATA_SECONDARY_DCR_AS 0x376 - -// Irq -#define ATA_PRIMARY_IRQ 14 -#define ATA_SECONDARY_IRQ 15 - -// Channels -#define ATA_PRIMARY 0x00 -#define ATA_SECONDARY 0x01 - -#define ATA_CYL_LOW 4 -#define ATA_CYL_HIGH 5 - -// IO Direction -#define ATA_READ 0x00 -#define ATA_WRITE 0x013 - -#define ATA_PRIMARY_SEL 0xA0 -#define ATA_SECONDARY_SEL 0xB0 - -// ATA Helpers -#define ATA_ADDRESS1(x) (x + 3) -#define ATA_ADDRESS2(x) (x + 4) -#define ATA_ADDRESS3(x) (x + 5) -#define ATA_COMMAND(x) (x + 7) diff --git a/Private/Drivers/ATA/compile_flags.txt b/Private/Drivers/ATA/compile_flags.txt deleted file mode 100644 index 1bc51142..00000000 --- a/Private/Drivers/ATA/compile_flags.txt +++ /dev/null @@ -1,4 +0,0 @@ --I./ --I../ --I../../ --std=c++20 diff --git a/Private/Drivers/Ethernet/.gitkeep b/Private/Drivers/Ethernet/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/Ethernet/compile_flags.txt b/Private/Drivers/Ethernet/compile_flags.txt deleted file mode 100644 index 545816fc..00000000 --- a/Private/Drivers/Ethernet/compile_flags.txt +++ /dev/null @@ -1,4 +0,0 @@ --I./ --I../ --I../../Private --std=c++20 diff --git a/Private/Drivers/HPET/.gitkeep b/Private/Drivers/HPET/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/NVME/.gitkeep b/Private/Drivers/NVME/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/NVME/compile_flags.txt b/Private/Drivers/NVME/compile_flags.txt deleted file mode 100644 index 1bc51142..00000000 --- a/Private/Drivers/NVME/compile_flags.txt +++ /dev/null @@ -1,4 +0,0 @@ --I./ --I../ --I../../ --std=c++20 diff --git a/Private/Drivers/PS2/PS2KernelMouse.hxx b/Private/Drivers/PS2/PS2KernelMouse.hxx deleted file mode 100644 index e78bd97f..00000000 --- a/Private/Drivers/PS2/PS2KernelMouse.hxx +++ /dev/null @@ -1,109 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - - File: PS2KernelMouse.hxx - Purpose: PS/2 mouse. - - Revision History: - - 03/02/24: Added file (amlel) - -------------------------------------------- */ - -#pragma once - -#include -#include -#include - -namespace HCore { -/// @brief Enabled for kernel purposes, kernel mouse. -class PS2KernelMouse final { - public: - explicit PS2KernelMouse() = default; - ~PS2KernelMouse() = default; - - HCORE_COPY_DEFAULT(PS2KernelMouse); - - public: - Void Init() noexcept { - HCore::kcout << "HCoreKrnl.exe: Enabling PS/2 mouse...\r\n"; - - this->Write(0xFF); - - HAL::Out8(0x64, 0xA8); - - this->Wait(); - - HAL::Out8(0x64, 0x20); - - this->WaitInput(); - - UInt8 dataStatus = HAL::In8(0x60); - - dataStatus |= 0b10; - - this->Wait(); - - HAL::Out8(0x60, dataStatus); - - this->Write(0xF6); - auto f6Dat = this->Read(); - - this->Write(0xF4); - auto f4Dat = this->Read(); - - HCore::kcout << "HCoreKrnl.exe: PS/2 mouse is OK: " << hex_number(f6Dat); - HCore::kcout << ", " << hex_number(f4Dat) << end_line(); - } - - private: - Bool WaitInput() noexcept { - UInt64 timeout = 100000; - - while (timeout) { - if ((HAL::In8(0x64) & 0x1)) { - HCore::kcout << "HCoreKrnl.exe: Wait: OK\r\n"; - return true; - } - - --timeout; - } // wait until we can read - - HCore::kcout << "HCoreKrnl.exe: Wait: Timeout\r\n"; - // return the ack bit. - return false; - } - - Bool Wait() noexcept { - UInt64 timeout = 100000; - - while (timeout) { - if ((HAL::In8(0x64) & 0b10) == 0) { - HCore::kcout << "HCoreKrnl.exe: Wait: OK\r\n"; - return true; - } - - --timeout; - } // wait until we can read - - HCore::kcout << "HCoreKrnl.exe: Wait: Timeout\r\n"; - // return the ack bit. - return false; - } - - Void Write(UInt8 val) { - this->Wait(); - HAL::Out8(0x64, 0xD4); - this->Wait(); - - HAL::Out8(0x60, val); - } - - UInt8 Read() { - this->WaitInput(); - return HAL::In8(0x60); - } -}; -} // namespace HCore diff --git a/Private/Drivers/README.TXT b/Private/Drivers/README.TXT deleted file mode 100644 index e6af72bc..00000000 --- a/Private/Drivers/README.TXT +++ /dev/null @@ -1,21 +0,0 @@ -========================== -Basic Device Drivers (BDD) -========================== - -1 - Build them -2 - Place them inside Private/Root -3 - And continue your build. - -=============== -What are these? -=============== - -These are HCore device drivers. -Some of them are running in Ring-3, to let the driver restart in case of a crash. - -=========== -Maintainers -=========== - -ACPIManager: Amlal EL Mahrouss -AHCI: Amlal EL Mahrouss \ No newline at end of file diff --git a/Private/Drivers/WiFi/.gitkeep b/Private/Drivers/WiFi/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/WiFi/compile_flags.txt b/Private/Drivers/WiFi/compile_flags.txt deleted file mode 100644 index 1bc51142..00000000 --- a/Private/Drivers/WiFi/compile_flags.txt +++ /dev/null @@ -1,4 +0,0 @@ --I./ --I../ --I../../ --std=c++20 diff --git a/Private/Drivers/XHCI/.gitkeep b/Private/Drivers/XHCI/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/Private/Drivers/XHCI/Defines.hxx b/Private/Drivers/XHCI/Defines.hxx deleted file mode 100644 index d67809af..00000000 --- a/Private/Drivers/XHCI/Defines.hxx +++ /dev/null @@ -1,67 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - - File: Defines.hxx - Purpose: XHCI (and backwards) header. - - Revision History: - - 01/02/24: Added file (amlel) - 03/02/24: Update filename to Defines.hxx (amlel) - -------------------------------------------- */ - -#pragma once - -#include - -using namespace HCore; - -#define kUSBCommand (UInt16)0x0 -#define kUSBStatus (UInt16)0x2 -#define kUSBInterruptEnable (UInt16)0x4 -#define kUSBFrameNum (UInt16)0x6 -#define kUSBFrameListBaseAddress (UInt16)0x8 -#define kUSBFrameModifyStart (UInt16)0xC -#define kUSBPort1StatusCtrl (UInt16)0x10 -#define kUSBPort2StatusCtrl (UInt16)0x12 - -typedef struct USBCommandRegister final { - UInt8 mReserved[8]; // Reserved - UInt8 - mMaxPacket; // 0 = Max packet size 32 bits 1 = Max packet size 64 bits - UInt8 mConfigure; - UInt8 mSoftwareDebug; - UInt8 mGlobalResume; - UInt8 mGlobalSuspend; - UInt8 mHostCtrlReset; - UInt8 mRun; // 1 = Controller execute frame list entries -} USBCommandRegister; - -typedef struct USBStatusRegister final { - UInt8 mReserved[8]; // Reserved - UInt8 mHalted; // 1 = bit 0 in CMD is zero 0 = bit 0 in CMD is 1 - UInt8 mProcessError; - UInt8 mSystemError; - UInt8 mResumeDetected; - UInt8 mErrorInterrupt; - UInt8 mInterrupt; -} USBStatusRegister; - -typedef struct USBInterruptEnableRegister final { - UInt8 mReserved[4]; // Reserved - UInt8 mShortPacket; // 1=Enable interrupt 0=Disable interrupt - UInt8 mComplete; // 1=Enable interrupt 0=Disable interrupt - UInt8 mResume; // 1=Enable interrupt 0=Disable interrupt - UInt8 mTimeoutCRC; // 1=Enable interrupt 0=Disable interrupt -} USBInterruptEnableRegister; - -/* - Some terminology: - - Frame Number: Number of processed entry of Frame List. - Frame List Base Address: - 32-bit physical adress of Frame List. Remember that first 12 bytes are - always 0. The Frame List must contain 1024 entries. -*/ diff --git a/Private/Drivers/XHCI/compile_flags.txt b/Private/Drivers/XHCI/compile_flags.txt deleted file mode 100644 index 1bc51142..00000000 --- a/Private/Drivers/XHCI/compile_flags.txt +++ /dev/null @@ -1,4 +0,0 @@ --I./ --I../ --I../../ --std=c++20 diff --git a/Private/FSKit/Defines.hxx b/Private/FSKit/Defines.hxx index 73c422be..3d3ce2ec 100644 --- a/Private/FSKit/Defines.hxx +++ b/Private/FSKit/Defines.hxx @@ -8,4 +8,4 @@ #include -#define FSKIT_VERSION "1.0.0" +#define FSKIT_VERSION "1.00" diff --git a/Private/FSKit/NewFS.hxx b/Private/FSKit/NewFS.hxx index 63e4a017..8632e650 100644 --- a/Private/FSKit/NewFS.hxx +++ b/Private/FSKit/NewFS.hxx @@ -28,7 +28,7 @@ #define kNewFSInvalidCatalog -1 #define kNewFSNodeNameLen 256 -#define kNewFSMinimumSectorSz 2048 +#define kNewFSMinimumSectorSz 4096 #define kNewFSIdentLen 8 #define kNewFSIdent " NewFS" diff --git a/Private/FirmwareKit/Handover.hxx b/Private/FirmwareKit/Handover.hxx index e7d27020..cdf7d896 100644 --- a/Private/FirmwareKit/Handover.hxx +++ b/Private/FirmwareKit/Handover.hxx @@ -68,9 +68,7 @@ struct HandoverInformationHeader { WideChar f_FirmwareVendorName[32]; SizeT f_FirmwareVendorLen; struct { - VoidPtr f_AcpiTable; - VoidPtr f_SmBIOS; - VoidPtr f_RTC; + VoidPtr f_VendorTables; } f_HardwareTables; struct { UIntPtr f_The; diff --git a/Private/HALKit/AMD64/HalACPIManager.cpp b/Private/HALKit/AMD64/HalACPIManager.cpp index 945ae6d8..b73dd996 100644 --- a/Private/HALKit/AMD64/HalACPIManager.cpp +++ b/Private/HALKit/AMD64/HalACPIManager.cpp @@ -4,7 +4,7 @@ ------------------------------------------- */ -#include +#include #include #include diff --git a/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp b/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp index 0727aff0..edb821b9 100644 --- a/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp +++ b/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp @@ -4,7 +4,7 @@ ------------------------------------------- */ -#include +#include #include /////////////////////////////////////////////////////////////////////////////////////// diff --git a/Private/HALKit/AMD64/HalKernelMouse.cxx b/Private/HALKit/AMD64/HalKernelMouse.cxx index bce6272f..2427ff2d 100644 --- a/Private/HALKit/AMD64/HalKernelMouse.cxx +++ b/Private/HALKit/AMD64/HalKernelMouse.cxx @@ -1,139 +1,143 @@ -#include +/* ------------------------------------------- + + Copyright Mahrouss Logic + +------------------------------------------- */ + +#include +#include #include -#include +#include #include -#include STATIC HCore::Int32 kPrevX = 0; STATIC HCore::Int32 kPrevY = 0; STATIC HCore::Int32 kX = 0; STATIC HCore::Int32 kY = 0; STATIC HCore::Int32 kMouseCycle = 0; -STATIC HCore::PS2KernelMouse kMousePS2; +STATIC HCore::PS2MouseInterface kMousePS2; STATIC HCore::Int32 kMousePacket[4]; STATIC HCore::Boolean kMousePacketReady = false; -#define kPS2LeftButton 0b00000001 -#define kPS2MiddleButton 0b00000010 -#define kPS2RightButton 0b00000100 +#define kPS2LeftButton 0b00000001 +#define kPS2MiddleButton 0b00000010 +#define kPS2RightButton 0b00000100 + +#define kPS2XSign 0b00010000 +#define kPS2YSign 0b00100000 +#define kPS2XOverflow 0b01000000 +#define kPS2YOverflow 0b10000000 -#define kPS2XSign 0b00010000 -#define kPS2YSign 0b00100000 -#define kPS2XOverflow 0b01000000 -#define kPS2YOverflow 0b10000000 +using namespace HCore; -EXTERN_C void _hal_mouse_handler() -{ +/// @brief Interrupt handler for the mouse. +/// @return +EXTERN_C Void _hal_mouse_handler() { #ifdef __DEBUG__ - HCore::UInt8 data = HCore::HAL::In8(0x60); + HCore::UInt8 data = HCore::HAL::In8(0x60); - switch (kMouseCycle) - { - case 0: - { - if (kMousePacketReady) break; - if ((data & 0b00001000) == 0) break; + switch (kMouseCycle) { + case 0: { + if (kMousePacketReady) break; + if ((data & 0b00001000) == 0) break; - kMousePacket[0] = data; - ++kMouseCycle; + kMousePacket[0] = data; + ++kMouseCycle; - break; + break; } - case 1: - { - if (kMousePacketReady) break; + case 1: { + if (kMousePacketReady) break; - kMousePacket[1] = data; - ++kMouseCycle; + kMousePacket[1] = data; + ++kMouseCycle; - break; + break; } - case 2: - { - if (kMousePacketReady) break; + case 2: { + if (kMousePacketReady) break; - kMousePacket[2] = data; - ++kMouseCycle; - kMousePacketReady = true; - kMouseCycle = 0; + kMousePacket[2] = data; + ++kMouseCycle; + kMousePacketReady = true; + kMouseCycle = 0; - break; + break; } default: - break; - } + break; + } - // Notify PIC controller that we're done with it's interrupt. + // Notify PIC controller that we're done with it's interrupt. - HCore::HAL::Out8(0x20, 0x20); - HCore::HAL::Out8(0xA0, 0x20); + HCore::HAL::Out8(0x20, 0x20); + HCore::HAL::Out8(0xA0, 0x20); #endif } -EXTERN_C void _hal_mouse_draw() -{ +/// @brief Draws the kernel's mouse. +/// @return void +EXTERN_C Void _hal_mouse_draw() { #ifdef __DEBUG__ - if (!kMousePacketReady) return; - - bool xNeg, yNeg, xOvf, yOvf; + if (!kMousePacketReady) return; - xNeg = (kMousePacket[0] & kPS2XSign); - yNeg = (kMousePacket[0] & kPS2YSign); - - xOvf = (kMousePacket[0] & kPS2XOverflow); - yOvf = (kMousePacket[0] & kPS2YOverflow); + bool xNeg, yNeg, xOvf, yOvf; - kX += xNeg ? (256 - kMousePacket[1]) : (256 - (-kMousePacket[1])); - kY += yNeg ? (256 - kMousePacket[2]) : (256 - (-kMousePacket[2]));; + xNeg = (kMousePacket[0] & kPS2XSign); + yNeg = (kMousePacket[0] & kPS2YSign); - if (xOvf) { - kX += xNeg ? 255 : -255; - } + xOvf = (kMousePacket[0] & kPS2XOverflow); + yOvf = (kMousePacket[0] & kPS2YOverflow); - if (yOvf) { - kY += yNeg ? 255 : -255; - } + kX += xNeg ? (256 - kMousePacket[1]) : (256 - (-kMousePacket[1])); + kY += yNeg ? (256 - kMousePacket[2]) : (256 - (-kMousePacket[2])); + ; - if (kY > kHandoverHeader->f_GOP.f_Height) - { - return; - } + if (xOvf) { + kX += xNeg ? 255 : -255; + } - if (kX > kHandoverHeader->f_GOP.f_Width) - { - return; - } + if (yOvf) { + kY += yNeg ? 255 : -255; + } + + if (kY > kHandoverHeader->f_GOP.f_Height) { + return; + } + + if (kX > kHandoverHeader->f_GOP.f_Width) { + return; + } - KeClearZone(POINTER_HEIGHT, POINTER_WIDTH, kPrevX, kPrevY); + KeClearZone(POINTER_HEIGHT, POINTER_WIDTH, kPrevX, kPrevY); - KeInitRsrc(); - KeDrawRsrc(Pointer, POINTER_HEIGHT, POINTER_WIDTH, kX, kY); - KeClearRsrc(); + KeInitRsrc(); + KeDrawRsrc(Pointer, POINTER_HEIGHT, POINTER_WIDTH, kX, kY); + KeClearRsrc(); - kPrevX = kMousePacket[1]; - kPrevY = kMousePacket[2]; + kPrevX = kMousePacket[1]; + kPrevY = kMousePacket[2]; - kMousePacketReady = false; + kMousePacketReady = false; #endif } /// @brief Inital kernel mouse initializer -/// @param -EXTERN_C void _hal_init_mouse(void) -{ +/// @param +EXTERN_C Void _hal_init_mouse(void) { #ifdef __DEBUG__ - kMousePS2.Init(); + kMousePS2.Init(); - auto pic1Port = 0x20; - auto pic2Port = 0xA0; + auto pic1Port = 0x20; + auto pic2Port = 0xA0; - auto mask = 1 << 12; - auto currentMask = HCore::HAL::In8(pic1Port + 1); - auto newMask = currentMask & ~mask; - HCore::HAL::Out8(pic1Port + 1, newMask); + auto mask = 1 << 12; + auto currentMask = HCore::HAL::In8(pic1Port + 1); + auto newMask = currentMask & ~mask; + HCore::HAL::Out8(pic1Port + 1, newMask); - currentMask = HCore::HAL::In8(pic2Port + 1); - newMask = currentMask & ~mask; - HCore::HAL::Out8(pic2Port + 1, newMask); + currentMask = HCore::HAL::In8(pic2Port + 1); + newMask = currentMask & ~mask; + HCore::HAL::Out8(pic2Port + 1, newMask); #endif } \ No newline at end of file diff --git a/Private/KernelKit/Defines.hpp b/Private/KernelKit/Defines.hpp index b3fb8b8d..f89f66c1 100644 --- a/Private/KernelKit/Defines.hpp +++ b/Private/KernelKit/Defines.hpp @@ -8,5 +8,5 @@ #include -#define KERNELKIT_VERSION "1.0.1" +#define KERNELKIT_VERSION "1.01" #define KERNELKIT_RELEASE "Cairo" diff --git a/Private/KernelKit/FileManager.hpp b/Private/KernelKit/FileManager.hpp index a00476bd..7af1ab0d 100644 --- a/Private/KernelKit/FileManager.hpp +++ b/Private/KernelKit/FileManager.hpp @@ -30,8 +30,6 @@ #define kBinFolder "/Programs" #define kShLibsFolder "/Library" -#define kSectorSz 512 - /// refer to first enum. #define kFileOpsCount 4 diff --git a/Private/NewBoot/BootKit/Arch/ATA.hxx b/Private/NewBoot/BootKit/Arch/ATA.hxx index 15d36317..74bdc630 100644 --- a/Private/NewBoot/BootKit/Arch/ATA.hxx +++ b/Private/NewBoot/BootKit/Arch/ATA.hxx @@ -6,7 +6,7 @@ #pragma once -#include +#include class BDeviceATA final { public: @@ -48,4 +48,3 @@ enum { kATADeviceCount, }; -#define kATASectorSz 512 diff --git a/Private/NewBoot/BootKit/Arch/SATA.hxx b/Private/NewBoot/BootKit/Arch/SATA.hxx index 3e37be19..409601ec 100644 --- a/Private/NewBoot/BootKit/Arch/SATA.hxx +++ b/Private/NewBoot/BootKit/Arch/SATA.hxx @@ -7,7 +7,7 @@ #pragma once #include -#include +#include class BDeviceSATA final { public: @@ -35,4 +35,4 @@ class BDeviceSATA final { AHCITraits mTraits; }; -#define kAHCISectorSz 512 +#define kAHCISectorSz 4096 diff --git a/Private/NewBoot/NetBoot/EfiModule.cxx b/Private/NewBoot/NetBoot/EfiModule.cxx index 42415dc7..419a2be4 100644 --- a/Private/NewBoot/NetBoot/EfiModule.cxx +++ b/Private/NewBoot/NetBoot/EfiModule.cxx @@ -11,5 +11,11 @@ EXTERN_C Int32 EfiMain(EfiHandlePtr handle, EfiSystemTable* SystemTable) { + InitEFI(ST); + + /// - Find a network drive called ".\\HCoreWorkgroup" + /// - Download our image + /// - Boot from it. + return kEfiOk; } diff --git a/Private/NewBoot/Source/BootMain.cxx b/Private/NewBoot/Source/BootMain.cxx index 650196f6..c0412797 100644 --- a/Private/NewBoot/Source/BootMain.cxx +++ b/Private/NewBoot/Source/BootMain.cxx @@ -179,6 +179,8 @@ EFI_EXTERN_C EFI_API Int EfiMain(EfiHandlePtr ImageHandle, SystemTable->FirmwareVendor, handoverHdrPtr->f_FirmwareVendorLen); + handoverHdrPtr->f_HardwareTables.f_VendorTables = ST->ConfigurationTable->VendorTable; + EFI::ExitBootServices(MapKey, ImageHandle); bool isIniNotFound = (systemIni.Blob() == nullptr); diff --git a/Private/NewBoot/Source/HEL/AMD64/AMD64-ATA.cxx b/Private/NewBoot/Source/HEL/AMD64/AMD64-ATA.cxx index 145976c1..fc09a3a7 100644 --- a/Private/NewBoot/Source/HEL/AMD64/AMD64-ATA.cxx +++ b/Private/NewBoot/Source/HEL/AMD64/AMD64-ATA.cxx @@ -261,7 +261,7 @@ BDeviceATA& BDeviceATA::Write(CharacterType* Buf, const SizeT& SectorSz) { boot_ata_write(this->Leak().mBase + i, this->Leak().mBus, this->Leak().mMaster, Buf, Off); - Off += kATASectorSz; + Off += kATASectorSize; boot_ata_wait_io(this->Leak().mBus); } diff --git a/Private/NewKit/Defines.hpp b/Private/NewKit/Defines.hpp index 4527df91..bc41633f 100644 --- a/Private/NewKit/Defines.hpp +++ b/Private/NewKit/Defines.hpp @@ -8,7 +8,7 @@ #include -#define NEWKIT_VERSION "1.0.0" +#define NEWKIT_VERSION "1.00" #if !defined(_INC_NO_STDC_HEADERS) && defined(__GNUC__) #include diff --git a/Private/Source/Storage/AHCI.cxx b/Private/Source/Storage/AHCI.cxx deleted file mode 100644 index 31fbce67..00000000 --- a/Private/Source/Storage/AHCI.cxx +++ /dev/null @@ -1,29 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - -------------------------------------------- */ - -#include - -using namespace HCore; - -/// @brief Class constructor -/// @param Out Disk output -/// @param In Disk input -/// @param Cleanup Disk cleanup. -AHCIDeviceInterface::AHCIDeviceInterface(void (*Out)(AHCIPacket outpacket), - void (*In)(AHCIPacket inpacket), void (*Cleanup)(void)) - : DeviceInterface(Out, In), fCleanup(Cleanup) {} - -/// @brief Class desctructor -AHCIDeviceInterface::~AHCIDeviceInterface() { - MUST_PASS(fCleanup); - if (fCleanup) fCleanup(); -} - -/// @brief Returns the name of the device interface. -/// @return it's name as a string. -const char *AHCIDeviceInterface::Name() const { return "AHCIDeviceInterface"; } - - diff --git a/Private/Source/Storage/AHCIDeviceInterface.cxx b/Private/Source/Storage/AHCIDeviceInterface.cxx new file mode 100644 index 00000000..31fbce67 --- /dev/null +++ b/Private/Source/Storage/AHCIDeviceInterface.cxx @@ -0,0 +1,29 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + +------------------------------------------- */ + +#include + +using namespace HCore; + +/// @brief Class constructor +/// @param Out Disk output +/// @param In Disk input +/// @param Cleanup Disk cleanup. +AHCIDeviceInterface::AHCIDeviceInterface(void (*Out)(AHCIPacket outpacket), + void (*In)(AHCIPacket inpacket), void (*Cleanup)(void)) + : DeviceInterface(Out, In), fCleanup(Cleanup) {} + +/// @brief Class desctructor +AHCIDeviceInterface::~AHCIDeviceInterface() { + MUST_PASS(fCleanup); + if (fCleanup) fCleanup(); +} + +/// @brief Returns the name of the device interface. +/// @return it's name as a string. +const char *AHCIDeviceInterface::Name() const { return "AHCIDeviceInterface"; } + + diff --git a/Private/Source/Storage/ATA-Wrapper.cxx b/Private/Source/Storage/ATA-Wrapper.cxx new file mode 100644 index 00000000..407cd30f --- /dev/null +++ b/Private/Source/Storage/ATA-Wrapper.cxx @@ -0,0 +1,102 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + +------------------------------------------- */ + +#include +#include + +#define kBufferLen 512 + +//! @brief ATA DMA Driver +//! The idea is to let a driver do the transfer. + +/// bugs 0 + +#define kATAError 2 + +namespace HCore { +Ref kPrdt = nullptr; + +bool set_prdt_struct(Ref& refCtrl) { + if (!kPrdt) { + kPrdt = refCtrl; + kcout << "[set_prdt_struct] PRDT is set."; + + return true; + } + + kcout << "[set_prdt_struct] [WARNING] Trying to change PRDT.\n"; + return false; +} + +enum { + k28BitRead = 0xC8, + k48BitRead = 0x25, + k28BitWrite = 0xCA, + k48BitWrite = 0x35, +}; + +const char* ata_read_28(ULong lba) { + if (!kPrdt) return nullptr; + + char* buffer = reinterpret_cast(Alloca(sizeof(char) * kBufferLen)); + rt_set_memory(buffer, 0, kBufferLen); + + UIntPtr* packet = reinterpret_cast(kPrdt.Leak()->PhysicalAddress()); + + packet[0] = k28BitRead; + packet[1] = (UIntPtr)&buffer; + packet[4] = lba; + + rt_wait_400ns(); + + return buffer; +} + +const char* ata_read_48(ULong lba) { + if (!kPrdt) return nullptr; + + char* buffer = reinterpret_cast(Alloca(sizeof(char) * kBufferLen)); + rt_set_memory(buffer, 0, kBufferLen); + + UIntPtr* packet = reinterpret_cast(kPrdt.Leak()->PhysicalAddress()); + + packet[0] = k48BitRead; + packet[1] = (UIntPtr)buffer; + packet[4] = lba; + + rt_wait_400ns(); + + return buffer; +} + +Int32 ata_write_48(ULong lba, const char* buffer) { + if (!kPrdt) return kATAError; + + UIntPtr* packet = reinterpret_cast(kPrdt.Leak()->PhysicalAddress()); + + packet[0] = k48BitWrite; + packet[1] = (UIntPtr)buffer; + packet[2] = lba; + + rt_wait_400ns(); + + return packet[1] == 2 ? kATAError : 0; +} + +Int32 ata_write_28(ULong lba, const char* buffer) { + if (!kPrdt) return kATAError; + + UIntPtr* packet = (UIntPtr*)kPrdt.Leak()->PhysicalAddress(); + + packet[0] = k28BitWrite; + packet[1] = (UIntPtr)buffer; + packet[2] = lba; + + rt_wait_400ns(); + + return packet[1] == 2 ? kATAError : 0; +} +} // namespace HCore diff --git a/Private/Source/Storage/ATA.cxx b/Private/Source/Storage/ATA.cxx deleted file mode 100644 index 61a58fb1..00000000 --- a/Private/Source/Storage/ATA.cxx +++ /dev/null @@ -1,102 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - -------------------------------------------- */ - -#include -#include - -#define kBufferLen 512 - -//! @brief ATA DMA Driver -//! The idea is to let a driver do the transfer. - -/// bugs 0 - -#define kATAError 2 - -namespace HCore { -Ref kPrdt = nullptr; - -bool set_prdt_struct(Ref& refCtrl) { - if (!kPrdt) { - kPrdt = refCtrl; - kcout << "[set_prdt_struct] PRDT is set."; - - return true; - } - - kcout << "[set_prdt_struct] [WARNING] Tried to change PRDT.\n"; - return false; -} - -enum { - k28BitRead = 0xC8, - k48BitRead = 0x25, - k28BitWrite = 0xCA, - k48BitWrite = 0x35, -}; - -const char* ata_read_28(ULong lba) { - if (!kPrdt) return nullptr; - - char* buffer = reinterpret_cast(Alloca(sizeof(char) * kBufferLen)); - rt_set_memory(buffer, 0, kBufferLen); - - UIntPtr* packet = reinterpret_cast(kPrdt.Leak()->PhysicalAddress()); - - packet[0] = k28BitRead; - packet[1] = (UIntPtr)&buffer; - packet[4] = lba; - - rt_wait_400ns(); - - return buffer; -} - -const char* ata_read_48(ULong lba) { - if (!kPrdt) return nullptr; - - char* buffer = reinterpret_cast(Alloca(sizeof(char) * kBufferLen)); - rt_set_memory(buffer, 0, kBufferLen); - - UIntPtr* packet = reinterpret_cast(kPrdt.Leak()->PhysicalAddress()); - - packet[0] = k48BitRead; - packet[1] = (UIntPtr)&buffer; - packet[4] = lba; - - rt_wait_400ns(); - - return buffer; -} - -Int32 ata_write_48(ULong lba, const char* buffer) { - if (!kPrdt) return kATAError; - - UIntPtr* packet = reinterpret_cast(kPrdt.Leak()->PhysicalAddress()); - - packet[0] = k48BitWrite; - packet[1] = (UIntPtr)&buffer; - packet[2] = lba; - - rt_wait_400ns(); - - return packet[1] == 2 ? kATAError : 0; -} - -Int32 ata_write_28(ULong lba, const char* text) { - if (!kPrdt) return kATAError; - - UIntPtr* packet = (UIntPtr*)kPrdt.Leak()->PhysicalAddress(); - - packet[0] = k28BitWrite; - packet[1] = (UIntPtr)&text; - packet[2] = lba; - - rt_wait_400ns(); - - return packet[1] == 2 ? kATAError : 0; -} -} // namespace HCore diff --git a/Private/Source/Storage/NVME.cxx b/Private/Source/Storage/NVME.cxx deleted file mode 100644 index fc75604d..00000000 --- a/Private/Source/Storage/NVME.cxx +++ /dev/null @@ -1,11 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - -------------------------------------------- */ - -#include - -namespace HCore { -const char *NVMEDeviceInterface::Name() const { return ("NVMEDeviceInterface"); } -} // namespace HCore diff --git a/Private/Source/Storage/NVMEDeviceInterface.cxx b/Private/Source/Storage/NVMEDeviceInterface.cxx new file mode 100644 index 00000000..fc75604d --- /dev/null +++ b/Private/Source/Storage/NVMEDeviceInterface.cxx @@ -0,0 +1,11 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + +------------------------------------------- */ + +#include + +namespace HCore { +const char *NVMEDeviceInterface::Name() const { return ("NVMEDeviceInterface"); } +} // namespace HCore diff --git a/Private/Source/Storage/Storage.cxx b/Private/Source/Storage/Storage.cxx deleted file mode 100644 index bba4be1f..00000000 --- a/Private/Source/Storage/Storage.cxx +++ /dev/null @@ -1,11 +0,0 @@ -/* ------------------------------------------- - - Copyright Mahrouss Logic - -------------------------------------------- */ - -#include - -///! @brief ATAPI SCSI packet. -const SKScsiPacket kCDRomPacketTemplate = {0x43, 0, 1, 0, 0, 0, - 0, 12, 0x40, 0, 0}; diff --git a/Private/Source/Storage/StorageBase.cxx b/Private/Source/Storage/StorageBase.cxx new file mode 100644 index 00000000..bba4be1f --- /dev/null +++ b/Private/Source/Storage/StorageBase.cxx @@ -0,0 +1,11 @@ +/* ------------------------------------------- + + Copyright Mahrouss Logic + +------------------------------------------- */ + +#include + +///! @brief ATAPI SCSI packet. +const SKScsiPacket kCDRomPacketTemplate = {0x43, 0, 1, 0, 0, 0, + 0, 12, 0x40, 0, 0}; diff --git a/Private/StorageKit/Storage.hpp b/Private/StorageKit/Storage.hpp index 8e05f557..51b2fdd6 100644 --- a/Private/StorageKit/Storage.hpp +++ b/Private/StorageKit/Storage.hpp @@ -14,7 +14,11 @@ typedef HCore::UInt16 SKScsiPacket[12]; extern const SKScsiPacket kCDRomPacketTemplate; -#define f_kDriveSectorSize (512) +#define f_kDriveSectorSizeHDD (512) +#define f_kDriveSectorSizeSSD (4096) +#define f_kDriveSectorSizeCDROM (2048) + #define f_kDriveSize(LAST_LBA) ((LAST_LBA + 1) * f_kDriveSectorSize) #include + diff --git a/Public/Kits/System.Zip/Defines.hpp b/Public/Kits/System.Zip/Defines.hpp index f4620413..4f954a4e 100644 --- a/Public/Kits/System.Zip/Defines.hpp +++ b/Public/Kits/System.Zip/Defines.hpp @@ -11,4 +11,4 @@ #include -#define ZIPKIT_VERSION "1.0.1" +#define ZIPKIT_VERSION "1.01" diff --git a/SPECIFICATION.TXT b/SPECIFICATION.TXT index c2e30c6c..11ee62e3 100644 --- a/SPECIFICATION.TXT +++ b/SPECIFICATION.TXT @@ -15,11 +15,11 @@ - Separation of Files/Devices. - Networking. - Hardware Abstraction Layer. -- Native Filesystem support (NewFS). -- Program Loader. +- Native Filesystem support (NewFS, FAT32 and HCFS). +- Program Loaders. - Thread Local Storage. - Semaphore, Locks, Timers. -- Canary bird. +- Canary mechanisms. - Dynamic Libraries. - Cross Platform. - Permission Selectors. @@ -39,4 +39,15 @@ - Kernel -> ke_init_x - RunTime -> rt_copy_mem -- Hal -> hal_foo_bar \ No newline at end of file +- Hal -> hal_foo_bar + +=================================== +4: The HCore Bootloader +=================================== + +- Capable of booting from a network drive. +- Loads a PE file which is the kernel +- Sanity checks, based on the number of sections. +- Handover compliant. +- Does check for a valid invalid of HCore (useful in the case of recovering) + -- cgit v1.2.3