From fc55f0d69d24fb4908cbd811681f2c3fac53614d Mon Sep 17 00:00:00 2001 From: Amlal El Mahrouss Date: Wed, 31 Jan 2024 09:42:54 +0100 Subject: kernel: add GKit, improve AMD64 HAL. Signed-off-by: Amlal El Mahrouss --- Private/HALKit/AMD64/HalProcessor.cpp | 58 +++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Private/HALKit/AMD64/HalProcessor.cpp (limited to 'Private/HALKit/AMD64/HalProcessor.cpp') diff --git a/Private/HALKit/AMD64/HalProcessor.cpp b/Private/HALKit/AMD64/HalProcessor.cpp new file mode 100644 index 00000000..3d509f79 --- /dev/null +++ b/Private/HALKit/AMD64/HalProcessor.cpp @@ -0,0 +1,58 @@ +/* + * ======================================================== + * + * HCore + * Copyright 2024 Mahrouss Logic, all rights reserved. + * + * ======================================================== + */ + +#include + +/** + * @file Processor.cpp + * @brief This file is about processor specific functions (in/out...) + */ + +namespace HCore::HAL { +void out8(UInt16 port, UInt8 value) { + asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory"); +} + +void out16(UInt16 port, UInt16 value) { + asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory"); +} + +void out32(UInt16 port, UInt32 value) { + asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory"); +} + +UInt8 in8(UInt16 port) { + UInt8 value = 0UL; + asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory"); + + return value; +} + +UInt16 in16(UInt16 port) { + UInt16 value = 0UL; + asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory"); + + return value; +} + +UInt32 in32(UInt16 port) { + UInt32 value = 0UL; + asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory"); + + return value; +} + +void rt_halt() { asm volatile("hlt"); } + +void rt_cli() { asm volatile("cli"); } + +void rt_sti() { asm volatile("sti"); } + +void rt_cld() { asm volatile("cld"); } +} // namespace HCore::HAL -- cgit v1.2.3