From 610f91d87152cbe48d3054fcf437d8239da6ef35 Mon Sep 17 00:00:00 2001 From: Amlal Date: Sat, 21 Dec 2024 21:59:13 +0100 Subject: IMP: :boom: Breaking changes some checks are needed to be done. Signed-off-by: Amlal --- dev/Kernel/HALKit/POWER/HalVirtualMemory.cc | 49 +++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 dev/Kernel/HALKit/POWER/HalVirtualMemory.cc (limited to 'dev/Kernel/HALKit/POWER/HalVirtualMemory.cc') diff --git a/dev/Kernel/HALKit/POWER/HalVirtualMemory.cc b/dev/Kernel/HALKit/POWER/HalVirtualMemory.cc new file mode 100644 index 00000000..b5fefcfa --- /dev/null +++ b/dev/Kernel/HALKit/POWER/HalVirtualMemory.cc @@ -0,0 +1,49 @@ +/* ------------------------------------------- + + Copyright (C) 2024, TQ B.V, all rights reserved. + +------------------------------------------- */ + +#include +#include +#include + +/// @note Refer to SoC documentation. + +using namespace Kernel; + +EXTERN_C Void hal_write_tlb(UInt32 mas0, UInt32 mas1, UInt32 mas2, UInt32 mas3, UInt32 mas7) +{ + hal_mtspr(MAS0, mas0); + hal_mtspr(MAS1, mas1); + hal_mtspr(MAS2, mas2); + hal_mtspr(MAS3, mas3); + hal_mtspr(MAS7, mas7); + + hal_flush_tlb(); +} + +EXTERN_C Bool hal_set_tlb(UInt8 tlb, UInt32 epn, UInt64 rpn, UInt8 perms, UInt8 wimge, UInt8 ts, UInt8 esel, UInt8 tsize, UInt8 iprot) +{ + if ((hal_mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1)) + { + // this MMU does not allow odd tsize values + return false; + } + + UInt32 mas0 = FSL_BOOKE_MAS0(tlb, esel, 0); + UInt32 mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize); + UInt32 mas2 = FSL_BOOKE_MAS2(epn, wimge); + UInt32 mas3 = FSL_BOOKE_MAS3(rpn, 0, perms); + UInt32 mas7 = FSL_BOOKE_MAS7(rpn); + + hal_write_tlb(mas0, mas1, mas2, mas3, mas7); + + return true; +} + +/// @brief Flush TLB +EXTERN_C void hal_flush_tlb() +{ + asm volatile("isync;tlbwe;msync;isync"); +} -- cgit v1.2.3