From 610f91d87152cbe48d3054fcf437d8239da6ef35 Mon Sep 17 00:00:00 2001
From: Amlal <amlalelmahrouss@icloud.com>
Date: Sat, 21 Dec 2024 21:59:13 +0100
Subject: IMP: :boom: Breaking changes some checks are needed to be done.

Signed-off-by: Amlal <amlalelmahrouss@icloud.com>
---
 dev/Kernel/HALKit/RISCV/.keep            |  0
 dev/Kernel/HALKit/RISCV/AP.h             | 36 ++++++++++++++++++++++++++++
 dev/Kernel/HALKit/RISCV/APM/.gitkeep     |  0
 dev/Kernel/HALKit/RISCV/HalAP.cc         | 40 ++++++++++++++++++++++++++++++++
 dev/Kernel/HALKit/RISCV/ReadMe.md        |  4 ++++
 dev/Kernel/HALKit/RISCV/Storage/.gitkeep |  0
 6 files changed, 80 insertions(+)
 create mode 100644 dev/Kernel/HALKit/RISCV/.keep
 create mode 100644 dev/Kernel/HALKit/RISCV/AP.h
 create mode 100644 dev/Kernel/HALKit/RISCV/APM/.gitkeep
 create mode 100644 dev/Kernel/HALKit/RISCV/HalAP.cc
 create mode 100644 dev/Kernel/HALKit/RISCV/ReadMe.md
 create mode 100644 dev/Kernel/HALKit/RISCV/Storage/.gitkeep

(limited to 'dev/Kernel/HALKit/RISCV')

diff --git a/dev/Kernel/HALKit/RISCV/.keep b/dev/Kernel/HALKit/RISCV/.keep
new file mode 100644
index 00000000..e69de29b
diff --git a/dev/Kernel/HALKit/RISCV/AP.h b/dev/Kernel/HALKit/RISCV/AP.h
new file mode 100644
index 00000000..ba09e8ab
--- /dev/null
+++ b/dev/Kernel/HALKit/RISCV/AP.h
@@ -0,0 +1,36 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024, TQ B.V, all rights reserved.
+
+	File: AP.h
+	Purpose: RISC-V hardware threads.
+
+	Revision History:
+
+	30/01/24: Added file (amlel)
+
+------------------------------------------- */
+
+#pragma once
+
+#include <NewKit/Defines.h>
+
+namespace Kernel
+{
+	typedef Int64 hal_ap_kind;
+
+	typedef struct HAL_HARDWARE_THREAD
+	{
+		Kernel::UIntPtr fStartAddress;
+		Kernel::UInt8	fPrivleged : 1;
+		Kernel::UInt32	fPageMemoryFlags;
+		hal_ap_kind		fIdentNumber;
+	} HAL_HARDWARE_THREAD;
+
+	/// @brief Set PC to specific hart.
+	/// @param hart the hart
+	/// @param epc the pc.
+	/// @return
+	EXTERN_C Kernel::Void hal_set_pc_to_hart(HAL_HARDWARE_THREAD* hart, Kernel::VoidPtr epc);
+
+} // namespace Kernel
diff --git a/dev/Kernel/HALKit/RISCV/APM/.gitkeep b/dev/Kernel/HALKit/RISCV/APM/.gitkeep
new file mode 100644
index 00000000..e69de29b
diff --git a/dev/Kernel/HALKit/RISCV/HalAP.cc b/dev/Kernel/HALKit/RISCV/HalAP.cc
new file mode 100644
index 00000000..7b168e4c
--- /dev/null
+++ b/dev/Kernel/HALKit/RISCV/HalAP.cc
@@ -0,0 +1,40 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024, TQ B.V, all rights reserved.
+
+------------------------------------------- */
+
+#include <HALKit/RISCV/Processor.h>
+#include <KernelKit/DebugOutput.h>
+#include <HALKit/RISCV/AP.h>
+
+using namespace Kernel;
+
+namespace Kernel::Detail
+{
+	STATIC void mp_hang_fn(void)
+	{
+		while (YES)
+			;
+	}
+} // namespace Kernel::Detail
+
+/// @brief wakes up thread.
+/// wakes up thread from hang.
+void mp_wakeup_thread(HAL::StackFramePtr stack)
+{
+	if (!stack)
+		return;
+
+	hal_set_pc_to_hart(reinterpret_cast<HAL_HARDWARE_THREAD*>(stack->R15), reinterpret_cast<VoidPtr>(stack->BP));
+}
+
+/// @brief makes thread sleep.
+/// hooks and hangs thread to prevent code from executing.
+void mp_hang_thread(HAL::StackFramePtr stack)
+{
+	if (!stack)
+		return;
+
+	hal_set_pc_to_hart(reinterpret_cast<HAL_HARDWARE_THREAD*>(stack->R15), reinterpret_cast<VoidPtr>(Kernel::Detail::mp_hang_fn));
+}
diff --git a/dev/Kernel/HALKit/RISCV/ReadMe.md b/dev/Kernel/HALKit/RISCV/ReadMe.md
new file mode 100644
index 00000000..b099aa31
--- /dev/null
+++ b/dev/Kernel/HALKit/RISCV/ReadMe.md
@@ -0,0 +1,4 @@
+RISCV64 Hardware Abstraction Layer
+
+- Supported CPU: RISCV64
+- Supported Firmware: CoreBoot
\ No newline at end of file
diff --git a/dev/Kernel/HALKit/RISCV/Storage/.gitkeep b/dev/Kernel/HALKit/RISCV/Storage/.gitkeep
new file mode 100644
index 00000000..e69de29b
-- 
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