From 5b30cacacf0f0ca6fb06bb34389f04b05ceb2b15 Mon Sep 17 00:00:00 2001
From: Amlal El Mahrouss <amlal@nekernel.org>
Date: Sun, 25 May 2025 09:56:46 +0200
Subject: kernel!: lots of changes, see commit details.

refactor(hal): unify file naming and drop redundant architecture suffixes

feat(build): rename kernel and bootloader to 'ne_kernel' and 'ne_bootz'

refactor(memory): replace mm_get_phys_address with mm_get_page_addr

feat(bitmap): track bitmap allocator usage and add out-of-memory error

fix(heap): correct heap magic naming and alignment logic

chore(fs): downgrade HeFS disk size check to warning

chore(tools): clean up formatting in 'ping' and 'manual'

docs(design): update OS_DESIGN.drawio to reflect Hypr86 and new layout

Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>
---
 dev/kernel/HALKit/AMD64/HalProcessor.cc | 89 +++++++++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)
 create mode 100644 dev/kernel/HALKit/AMD64/HalProcessor.cc

(limited to 'dev/kernel/HALKit/AMD64/HalProcessor.cc')

diff --git a/dev/kernel/HALKit/AMD64/HalProcessor.cc b/dev/kernel/HALKit/AMD64/HalProcessor.cc
new file mode 100644
index 00000000..6ebbea08
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/HalProcessor.cc
@@ -0,0 +1,89 @@
+/* -------------------------------------------
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+
+  File: HalCPU.cc
+  Purpose: Platform processor routines.
+
+------------------------------------------- */
+
+#include <HALKit/AMD64/Paging.h>
+#include <HALKit/AMD64/Processor.h>
+
+/**
+ * @file HalCPU.cc
+ * @brief Common CPU API.
+ */
+
+namespace Kernel::HAL {
+inline Bool hal_has_msr() noexcept {
+  static UInt32 eax, unused, edx;  // eax, edx
+
+  __get_cpuid(1, &eax, &unused, &unused, &edx);
+
+  // edx returns the flag for MSR (which is 1 shifted to 5.)
+  return edx & (1 << 5);
+}
+
+Void hal_get_msr(UInt32 msr, UInt32* lo, UInt32* hi) noexcept {
+  if (!lo || !hi) return;
+  asm volatile("rdmsr" : "=a"(*lo), "=d"(*hi) : "c"(msr));
+}
+
+Void hal_set_msr(UInt32 msr, UInt32 lo, UInt32 hi) noexcept {
+  asm volatile("wrmsr" : : "a"(lo), "d"(hi), "c"(msr));
+}
+
+Void lrt_hal_out8(UInt16 port, UInt8 value) {
+  asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory");
+}
+
+Void lrt_hal_out16(UInt16 port, UInt16 value) {
+  asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory");
+}
+
+Void lrt_hal_out32(UInt16 port, UInt32 value) {
+  asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory");
+}
+
+UInt8 lrt_hal_in8(UInt16 port) {
+  UInt8 value = 0UL;
+  asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory");
+
+  return value;
+}
+
+UInt16 lrt_hal_in16(UInt16 port) {
+  UInt16 value = 0UL;
+  asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory");
+
+  return value;
+}
+
+UInt32 lrt_hal_in32(UInt16 port) {
+  UInt32 value = 0UL;
+  asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory");
+
+  return value;
+}
+
+Void rt_halt() {
+  asm volatile("hlt");
+}
+
+Void rt_cli() {
+  asm volatile("cli");
+}
+
+Void rt_sti() {
+  asm volatile("sti");
+}
+
+Void rt_cld() {
+  asm volatile("cld");
+}
+
+Void rt_std() {
+  asm volatile("std");
+}
+}  // namespace Kernel::HAL
-- 
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