From b7c6e7aef4c2c647623520f65d78921841bdffaa Mon Sep 17 00:00:00 2001 From: Amlal El Mahrouss Date: Fri, 16 May 2025 00:00:26 +0200 Subject: feat(kernel/sched): tweak HalApplicationProcessor.cc Signed-off-by: Amlal El Mahrouss --- dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'dev/kernel') diff --git a/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc b/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc index d049a74d..46b376c0 100644 --- a/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc +++ b/dev/kernel/HALKit/AMD64/HalApplicationProcessor.cc @@ -195,9 +195,9 @@ Void mp_init_cores(VoidPtr vendor_ptr) noexcept { return; } - auto hw_and_pow_int = PowerFactoryInterface(vendor_ptr); - kRawMADT = hw_and_pow_int.Find(APIC_Signature).Leak().Leak(); + PowerFactoryInterface hw_and_pow_int{vendor_ptr}; + kRawMADT = hw_and_pow_int.Find(APIC_Signature).Leak().Leak(); kMADTBlock = reinterpret_cast(kRawMADT); kSMPAware = NO; @@ -208,6 +208,7 @@ Void mp_init_cores(VoidPtr vendor_ptr) noexcept { kSMPCount = 0; UInt32 lo = 0, hi = 0; + hal_get_msr(0x1B, &lo, &hi); UInt64 apic_base = ((UInt64) hi << 32) | lo; @@ -228,17 +229,20 @@ Void mp_init_cores(VoidPtr vendor_ptr) noexcept { // LAPIC timer setup *(volatile UInt32*) (kApicBaseAddress + LAPIC_REG_TIMER_DIV) = 0b0011; // Divide by 16 + *(volatile UInt32*) (kApicBaseAddress + LAPIC_REG_TIMER_LVT) = 32 | (1 << 17); // Vector 32, periodic + *(volatile UInt32*) (kApicBaseAddress + LAPIC_REG_TIMER_INITCNT) = 1000000; // Init count (e.g., ~100Hz) constexpr const auto kSMPCountMax = kMaxAPInsideSched; while (Yes) { - /// @note Anything bigger than x2APIC type doesn't exist. + // @note Don't probe greater than what the APMgr expects. if (kSMPCount > kSMPCountMax) break; + /// @note Anything bigger than x2APIC type doesn't exist. if (kMADTBlock->List[index].Type > 9) { ++index; continue; -- cgit v1.2.3