From ba7b3ed69cd24970a28b72c54982735cd120e663 Mon Sep 17 00:00:00 2001 From: Amlal El Mahrouss Date: Fri, 28 Mar 2025 19:57:33 +0100 Subject: kernel: breaking: Change namespace from NeOS to Kernel. sched: Fix redundancy in NeKernel's user scheduler macros, refactored the other files using the redundant macros too. part one of a series of commit for NeKernel. Signed-off-by: Amlal El Mahrouss --- dev/modules/ACPI/ACPI.h | 6 +- dev/modules/ACPI/ACPIFactoryInterface.h | 6 +- dev/modules/AHCI/.gitkeep | 0 dev/modules/AHCI/AHCI.h | 316 ++++++++++++++++---------------- dev/modules/APM/APM.h | 4 +- dev/modules/ATA/ATA.h | 16 +- dev/modules/CoreGfx/AccessibilityMgr.h | 2 +- dev/modules/CoreGfx/FBMgr.h | 44 ++--- dev/modules/CoreGfx/TextMgr.h | 12 +- dev/modules/HPET/Defines.h | 32 ++-- dev/modules/LTE/LTE.h | 32 ++-- dev/modules/NVME/NVME.h | 6 +- dev/modules/Power/PowerFactory.h | 37 ++++ dev/modules/Pwr/PowerFactory.h | 37 ---- dev/modules/SCSI/SCSI.h | 2 +- dev/modules/XHCI/.gitkeep | 0 dev/modules/XHCI/Defines.h | 70 ------- dev/modules/XHCI/XHCI.h | 70 +++++++ 18 files changed, 346 insertions(+), 346 deletions(-) delete mode 100644 dev/modules/AHCI/.gitkeep create mode 100644 dev/modules/Power/PowerFactory.h delete mode 100644 dev/modules/Pwr/PowerFactory.h delete mode 100644 dev/modules/XHCI/.gitkeep delete mode 100644 dev/modules/XHCI/Defines.h create mode 100644 dev/modules/XHCI/XHCI.h (limited to 'dev/modules') diff --git a/dev/modules/ACPI/ACPI.h b/dev/modules/ACPI/ACPI.h index a4fe2b0e..75c2ad9a 100644 --- a/dev/modules/ACPI/ACPI.h +++ b/dev/modules/ACPI/ACPI.h @@ -13,9 +13,9 @@ #include -#define SDT_OBJECT : public NeOS::SDT +#define SDT_OBJECT : public Kernel::SDT -namespace NeOS +namespace Kernel { class PACKED SDT { @@ -85,6 +85,6 @@ namespace NeOS UInt32 CreatorRevision; UInt32 AddressArr[]; }; -} // namespace NeOS +} // namespace Kernel #endif // !__ACPI__ diff --git a/dev/modules/ACPI/ACPIFactoryInterface.h b/dev/modules/ACPI/ACPIFactoryInterface.h index 06a5c6e9..76819b4e 100644 --- a/dev/modules/ACPI/ACPIFactoryInterface.h +++ b/dev/modules/ACPI/ACPIFactoryInterface.h @@ -12,9 +12,9 @@ #include #include #include -#include +#include -namespace NeOS +namespace Kernel { class PowerFactory; class ACPIFactoryInterface; @@ -54,6 +54,6 @@ namespace NeOS SSizeT fEntries{0UL}; // number of entries, -1 tells that no invalid entries were // found. }; -} // namespace NeOS +} // namespace Kernel #endif // !__MOD_ACPI_H__ diff --git a/dev/modules/AHCI/.gitkeep b/dev/modules/AHCI/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/dev/modules/AHCI/AHCI.h b/dev/modules/AHCI/AHCI.h index 535045a3..35065561 100644 --- a/dev/modules/AHCI/AHCI.h +++ b/dev/modules/AHCI/AHCI.h @@ -51,172 +51,172 @@ enum typedef struct FisRegH2D final { // DWORD 0 - NeOS::UInt8 FisType; // FIS_TYPE_REG_H2D + Kernel::UInt8 FisType; // FIS_TYPE_REG_H2D - NeOS::UInt8 PortMul : 4; // Port multiplier - NeOS::UInt8 Reserved0 : 3; // Reserved - NeOS::UInt8 CmdOrCtrl : 1; // 1: Command, 0: Control + Kernel::UInt8 PortMul : 4; // Port multiplier + Kernel::UInt8 Reserved0 : 3; // Reserved + Kernel::UInt8 CmdOrCtrl : 1; // 1: Command, 0: Control - NeOS::UInt8 Command; // Command register - NeOS::UInt8 FeatureLow; // Feature register, 7:0 + Kernel::UInt8 Command; // Command register + Kernel::UInt8 FeatureLow; // Feature register, 7:0 // DWORD 1 - NeOS::UInt8 Lba0; // LBA low register, 7:0 - NeOS::UInt8 Lba1; // LBA mid register, 15:8 - NeOS::UInt8 Lba2; // LBA high register, 23:16 - NeOS::UInt8 Device; // Device register + Kernel::UInt8 Lba0; // LBA low register, 7:0 + Kernel::UInt8 Lba1; // LBA mid register, 15:8 + Kernel::UInt8 Lba2; // LBA high register, 23:16 + Kernel::UInt8 Device; // Device register // DWORD 2 - NeOS::UInt8 Lba3; // LBA register, 31:24 - NeOS::UInt8 Lba4; // LBA register, 39:32 - NeOS::UInt8 Lba5; // LBA register, 47:40 - NeOS::UInt8 FeatureHigh; // Feature register, 15:8 + Kernel::UInt8 Lba3; // LBA register, 31:24 + Kernel::UInt8 Lba4; // LBA register, 39:32 + Kernel::UInt8 Lba5; // LBA register, 47:40 + Kernel::UInt8 FeatureHigh; // Feature register, 15:8 // DWORD 3 - NeOS::UInt8 CountLow; // Count register, 7:0 - NeOS::UInt8 CountHigh; // Count register, 15:8 - NeOS::UInt8 Icc; // Isochronous command completion - NeOS::UInt8 Control; // Control register + Kernel::UInt8 CountLow; // Count register, 7:0 + Kernel::UInt8 CountHigh; // Count register, 15:8 + Kernel::UInt8 Icc; // Isochronous command completion + Kernel::UInt8 Control; // Control register // DWORD 4 - NeOS::UInt8 Reserved1[4]; // Reserved + Kernel::UInt8 Reserved1[4]; // Reserved } FisRegH2D; typedef struct FisRegD2H final { // DWORD 0 - NeOS::UInt8 FisType; // FIS_TYPE_REG_D2H + Kernel::UInt8 FisType; // FIS_TYPE_REG_D2H - NeOS::UInt8 PortMul : 4; // Port multiplier - NeOS::UInt8 Reserved0 : 2; // Reserved - NeOS::UInt8 IE : 1; // Interrupt bit - NeOS::UInt8 Reserved1 : 1; // Reserved + Kernel::UInt8 PortMul : 4; // Port multiplier + Kernel::UInt8 Reserved0 : 2; // Reserved + Kernel::UInt8 IE : 1; // Interrupt bit + Kernel::UInt8 Reserved1 : 1; // Reserved - NeOS::UInt8 Status; // Status register - NeOS::UInt8 Error; // Error register + Kernel::UInt8 Status; // Status register + Kernel::UInt8 Error; // Error register // DWORD 1 - NeOS::UInt8 Lba0; // LBA low register, 7:0 - NeOS::UInt8 Lba1; // LBA mid register, 15:8 - NeOS::UInt8 Lba2; // LBA high register, 23:16 - NeOS::UInt8 Device; // Device register + Kernel::UInt8 Lba0; // LBA low register, 7:0 + Kernel::UInt8 Lba1; // LBA mid register, 15:8 + Kernel::UInt8 Lba2; // LBA high register, 23:16 + Kernel::UInt8 Device; // Device register // DWORD 2 - NeOS::UInt8 Lba3; // LBA register, 31:24 - NeOS::UInt8 Lba4; // LBA register, 39:32 - NeOS::UInt8 Lba5; // LBA register, 47:40 - NeOS::UInt8 Rsv2; // Reserved + Kernel::UInt8 Lba3; // LBA register, 31:24 + Kernel::UInt8 Lba4; // LBA register, 39:32 + Kernel::UInt8 Lba5; // LBA register, 47:40 + Kernel::UInt8 Rsv2; // Reserved // DWORD 3 - NeOS::UInt8 CountLow; // Count register, 7:0 - NeOS::UInt8 CountHigh; // Count register, 15:8 - NeOS::UInt8 Rsv3[2]; // Reserved + Kernel::UInt8 CountLow; // Count register, 7:0 + Kernel::UInt8 CountHigh; // Count register, 15:8 + Kernel::UInt8 Rsv3[2]; // Reserved // DWORD 4 - NeOS::UInt8 Rsv4[4]; // Reserved + Kernel::UInt8 Rsv4[4]; // Reserved } FisRegD2H; typedef struct FisData final { // DWORD 0 - NeOS::UInt8 FisType; // FIS_TYPE_DATA + Kernel::UInt8 FisType; // FIS_TYPE_DATA - NeOS::UInt8 PortMul : 4; // Port multiplier - NeOS::UInt8 Reserved0 : 4; // Reserved + Kernel::UInt8 PortMul : 4; // Port multiplier + Kernel::UInt8 Reserved0 : 4; // Reserved - NeOS::UInt8 Reserved1[2]; // Reserved + Kernel::UInt8 Reserved1[2]; // Reserved // DWORD 1 ~ N - NeOS::UInt32 Data[1]; // Payload + Kernel::UInt32 Data[1]; // Payload } FisData; typedef struct FisPioSetup final { // DWORD 0 - NeOS::UInt8 FisType; // FIS_TYPE_PIO_SETUP + Kernel::UInt8 FisType; // FIS_TYPE_PIO_SETUP - NeOS::UInt8 PortMul : 4; // Port multiplier - NeOS::UInt8 Reserved0 : 1; // Reserved - NeOS::UInt8 DTD : 1; // Data transfer direction, 1 - device to host - NeOS::UInt8 IE : 1; // Interrupt bit - NeOS::UInt8 Reserved1 : 1; + Kernel::UInt8 PortMul : 4; // Port multiplier + Kernel::UInt8 Reserved0 : 1; // Reserved + Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host + Kernel::UInt8 IE : 1; // Interrupt bit + Kernel::UInt8 Reserved1 : 1; - NeOS::UInt8 Status; // Status register - NeOS::UInt8 Error; // Error register + Kernel::UInt8 Status; // Status register + Kernel::UInt8 Error; // Error register // DWORD 1 - NeOS::UInt8 Lba0; // LBA low register, 7:0 - NeOS::UInt8 Lba1; // LBA mid register, 15:8 - NeOS::UInt8 Lba2; // LBA high register, 23:16 - NeOS::UInt8 Device; // Device register + Kernel::UInt8 Lba0; // LBA low register, 7:0 + Kernel::UInt8 Lba1; // LBA mid register, 15:8 + Kernel::UInt8 Lba2; // LBA high register, 23:16 + Kernel::UInt8 Device; // Device register // DWORD 2 - NeOS::UInt8 Lba3; // LBA register, 31:24 - NeOS::UInt8 Lba4; // LBA register, 39:32 - NeOS::UInt8 Lba5; // LBA register, 47:40 - NeOS::UInt8 Rsv2; // Reserved + Kernel::UInt8 Lba3; // LBA register, 31:24 + Kernel::UInt8 Lba4; // LBA register, 39:32 + Kernel::UInt8 Lba5; // LBA register, 47:40 + Kernel::UInt8 Rsv2; // Reserved // DWORD 3 - NeOS::UInt8 CountLow; // Count register, 7:0 - NeOS::UInt8 CountHigh; // Count register, 15:8 - NeOS::UInt8 Rsv3; // Reserved - NeOS::UInt8 EStatus; // New value of status register + Kernel::UInt8 CountLow; // Count register, 7:0 + Kernel::UInt8 CountHigh; // Count register, 15:8 + Kernel::UInt8 Rsv3; // Reserved + Kernel::UInt8 EStatus; // New value of status register // DWORD 4 - NeOS::UInt16 TranferCount; // Transfer count - NeOS::UInt8 Rsv4[2]; // Reserved + Kernel::UInt16 TranferCount; // Transfer count + Kernel::UInt8 Rsv4[2]; // Reserved } FisPioSetup; typedef struct FisDmaSetup final { // DWORD 0 - NeOS::UInt8 FisType; // FIS_TYPE_DMA_SETUP + Kernel::UInt8 FisType; // FIS_TYPE_DMA_SETUP - NeOS::UInt8 PortMul : 4; // Port multiplier - NeOS::UInt8 Reserved0 : 1; // Reserved - NeOS::UInt8 DTD : 1; // Data transfer direction, 1 - device to host - NeOS::UInt8 IE : 1; // Interrupt bit - NeOS::UInt8 AutoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed + Kernel::UInt8 PortMul : 4; // Port multiplier + Kernel::UInt8 Reserved0 : 1; // Reserved + Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host + Kernel::UInt8 IE : 1; // Interrupt bit + Kernel::UInt8 AutoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed - NeOS::UInt8 Reserved1[2]; // Reserved + Kernel::UInt8 Reserved1[2]; // Reserved // DWORD 1&2 - volatile NeOS::UInt64 DmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in + volatile Kernel::UInt64 DmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in // host memory. SATA Spec says host specific and not in // Spec. Trying AHCI spec might work. // DWORD 3 - NeOS::UInt32 Rsvd; // More reserved + Kernel::UInt32 Rsvd; // More reserved // DWORD 4 - NeOS::UInt32 DmabufOffset; // Byte offset into buffer. First 2 bits must be 0 + Kernel::UInt32 DmabufOffset; // Byte offset into buffer. First 2 bits must be 0 // DWORD 5 - NeOS::UInt32 TransferCount; // Number of bytes to transfer. Bit 0 must be 0 + Kernel::UInt32 TransferCount; // Number of bytes to transfer. Bit 0 must be 0 // DWORD 6 - NeOS::UInt32 Reserved3; // Reserved + Kernel::UInt32 Reserved3; // Reserved } FisDmaSetup; typedef struct FisDevBits final { // DWORD 0 - NeOS::UInt8 FisType; // FIS_TYPE_DMA_SETUP (A1h) + Kernel::UInt8 FisType; // FIS_TYPE_DMA_SETUP (A1h) - NeOS::UInt8 Reserved0 : 5; // Reserved - NeOS::UInt8 R0 : 1; - NeOS::UInt8 IE : 1; - NeOS::UInt8 N : 1; + Kernel::UInt8 Reserved0 : 5; // Reserved + Kernel::UInt8 R0 : 1; + Kernel::UInt8 IE : 1; + Kernel::UInt8 N : 1; - NeOS::UInt8 StatusLow : 3; - NeOS::UInt8 R1 : 1; - NeOS::UInt8 StatusHigh : 3; + Kernel::UInt8 StatusLow : 3; + Kernel::UInt8 R1 : 1; + Kernel::UInt8 StatusHigh : 3; - NeOS::UInt8 R2 : 1; - NeOS::UInt8 Error; + Kernel::UInt8 R2 : 1; + Kernel::UInt8 Error; // DWORD 1 - NeOS::UInt32 Act; + Kernel::UInt32 Act; } FisDevBits; /// \brief Enable AHCI device bit in GHC register. @@ -226,44 +226,44 @@ typedef struct FisDevBits final typedef struct HbaPort final { - NeOS::UInt32 Clb; // 0x00, command list base address, 1K-byte aligned - NeOS::UInt32 Clbu; // 0x04, command list base address upper 32 bits - NeOS::UInt32 Fb; // 0x08, FIS base address, 256-byte aligned - NeOS::UInt32 Fbu; // 0x0C, FIS base address upper 32 bits - NeOS::UInt32 Is; // 0x10, interrupt status - NeOS::UInt32 Ie; // 0x14, interrupt enable - NeOS::UInt32 Cmd; // 0x18, command and status - NeOS::UInt32 Reserved0; // 0x1C, Reserved - NeOS::UInt32 Tfd; // 0x20, task file data - NeOS::UInt32 Sig; // 0x24, signature - NeOS::UInt32 Ssts; // 0x28, SATA status (SCR0:SStatus) - NeOS::UInt32 Sctl; // 0x2C, SATA control (SCR2:SControl) - NeOS::UInt32 Serr; // 0x30, SATA error (SCR1:SError) - NeOS::UInt32 Sact; // 0x34, SATA active (SCR3:SActive) - NeOS::UInt32 Ci; // 0x38, command issue - NeOS::UInt32 Sntf; // 0x3C, SATA notification (SCR4:SNotification) - NeOS::UInt32 Fbs; // 0x40, FIS-based switch control - NeOS::UInt32 Reserved1[11]; // 0x44 ~ 0x6F, Reserved - NeOS::UInt32 Vendor[4]; // 0x70 ~ 0x7F, vendor specific + Kernel::UInt32 Clb; // 0x00, command list base address, 1K-byte aligned + Kernel::UInt32 Clbu; // 0x04, command list base address upper 32 bits + Kernel::UInt32 Fb; // 0x08, FIS base address, 256-byte aligned + Kernel::UInt32 Fbu; // 0x0C, FIS base address upper 32 bits + Kernel::UInt32 Is; // 0x10, interrupt status + Kernel::UInt32 Ie; // 0x14, interrupt enable + Kernel::UInt32 Cmd; // 0x18, command and status + Kernel::UInt32 Reserved0; // 0x1C, Reserved + Kernel::UInt32 Tfd; // 0x20, task file data + Kernel::UInt32 Sig; // 0x24, signature + Kernel::UInt32 Ssts; // 0x28, SATA status (SCR0:SStatus) + Kernel::UInt32 Sctl; // 0x2C, SATA control (SCR2:SControl) + Kernel::UInt32 Serr; // 0x30, SATA error (SCR1:SError) + Kernel::UInt32 Sact; // 0x34, SATA active (SCR3:SActive) + Kernel::UInt32 Ci; // 0x38, command issue + Kernel::UInt32 Sntf; // 0x3C, SATA notification (SCR4:SNotification) + Kernel::UInt32 Fbs; // 0x40, FIS-based switch control + Kernel::UInt32 Reserved1[11]; // 0x44 ~ 0x6F, Reserved + Kernel::UInt32 Vendor[4]; // 0x70 ~ 0x7F, vendor specific } HbaPort; typedef struct HbaMem final { // 0x00 - 0x2B, Generic Host Control - NeOS::UInt32 Cap; // 0x00, Host capability - NeOS::UInt32 Ghc; // 0x04, Global host control - NeOS::UInt32 Is; // 0x08, Interrupt status - NeOS::UInt32 Pi; // 0x0C, Port implemented - NeOS::UInt32 Vs; // 0x10, Version - NeOS::UInt32 Ccc_ctl; // 0x14, Command completion coalescing control - NeOS::UInt32 Ccc_pts; // 0x18, Command completion coalescing ports - NeOS::UInt32 Em_loc; // 0x1C, Enclosure management location - NeOS::UInt32 Em_ctl; // 0x20, Enclosure management control - NeOS::UInt32 Cap2; // 0x24, Host capabilities extended - NeOS::UInt32 Bohc; // 0x28, BIOS/OS handoff control and status - - NeOS::UInt8 Resv0[0xA0 - 0x2C]; - NeOS::UInt8 Vendor[0x100 - 0xA0]; + Kernel::UInt32 Cap; // 0x00, Host capability + Kernel::UInt32 Ghc; // 0x04, Global host control + Kernel::UInt32 Is; // 0x08, Interrupt status + Kernel::UInt32 Pi; // 0x0C, Port implemented + Kernel::UInt32 Vs; // 0x10, Version + Kernel::UInt32 Ccc_ctl; // 0x14, Command completion coalescing control + Kernel::UInt32 Ccc_pts; // 0x18, Command completion coalescing ports + Kernel::UInt32 Em_loc; // 0x1C, Enclosure management location + Kernel::UInt32 Em_ctl; // 0x20, Enclosure management control + Kernel::UInt32 Cap2; // 0x24, Host capabilities extended + Kernel::UInt32 Bohc; // 0x28, BIOS/OS handoff control and status + + Kernel::UInt8 Resv0[0xA0 - 0x2C]; + Kernel::UInt8 Vendor[0x100 - 0xA0]; HbaPort Ports[1]; // 1 ~ 32, 32 is the max ahci devices per controller. } HbaMem; @@ -276,73 +276,73 @@ typedef struct HbaCmdHeader final union { struct { - NeOS::UInt8 Cfl : 5; // Command FIS length in DWORDS, 2 ~ 16 - NeOS::UInt8 Atapi : 1; // ATAPI - NeOS::UInt8 Write : 1; // Write, 1: H2D, 0: D2H - NeOS::UInt8 Prefetchable : 1; // Prefetchable - - NeOS::UInt8 Reset : 1; // Reset - NeOS::UInt8 BIST : 1; // BIST - NeOS::UInt8 Clear : 1; // Clear busy upon R_OK - NeOS::UInt8 Reserved0 : 1; // Reserved - NeOS::UInt8 Pmp : 4; // Port multiplier port + Kernel::UInt8 Cfl : 5; // Command FIS length in DWORDS, 2 ~ 16 + Kernel::UInt8 Atapi : 1; // ATAPI + Kernel::UInt8 Write : 1; // Write, 1: H2D, 0: D2H + Kernel::UInt8 Prefetchable : 1; // Prefetchable + + Kernel::UInt8 Reset : 1; // Reset + Kernel::UInt8 BIST : 1; // BIST + Kernel::UInt8 Clear : 1; // Clear busy upon R_OK + Kernel::UInt8 Reserved0 : 1; // Reserved + Kernel::UInt8 Pmp : 4; // Port multiplier port }; - NeOS::UInt16 Flags; + Kernel::UInt16 Flags; }; - NeOS::UInt16 Prdtl; // Physical region descriptor table length in entries - NeOS::UInt32 Prdbc; // Physical region descriptor byte count transferred + Kernel::UInt16 Prdtl; // Physical region descriptor table length in entries + Kernel::UInt32 Prdbc; // Physical region descriptor byte count transferred - NeOS::UInt32 Ctba; // Command table descriptor base address - NeOS::UInt32 Ctbau; // Command table descriptor base address upper 32 bits + Kernel::UInt32 Ctba; // Command table descriptor base address + Kernel::UInt32 Ctbau; // Command table descriptor base address upper 32 bits - NeOS::UInt32 Rsv[4]; + Kernel::UInt32 Rsv[4]; } ATTRIBUTE(packed, aligned(32)) HbaCmdHeader; typedef struct HbaFis final { // 0x00 FisDmaSetup Dsfis; // DMA Setup FIS - NeOS::UInt8 Pad0[4]; + Kernel::UInt8 Pad0[4]; // 0x20 FisPioSetup Psfis; // PIO Setup FIS - NeOS::UInt8 Pad1[12]; + Kernel::UInt8 Pad1[12]; // 0x40 FisRegD2H Rfis; // Register – Device to Host FIS - NeOS::UInt8 Pad2[4]; + Kernel::UInt8 Pad2[4]; // 0x58 FisDevBits Sdbfis; // Set Device Bit FIS // 0x60 - NeOS::UInt8 Ufis[64]; + Kernel::UInt8 Ufis[64]; // 0xA0 - NeOS::UInt8 Rsv[0x100 - 0xA0]; + Kernel::UInt8 Rsv[0x100 - 0xA0]; } HbaFis; typedef struct HbaPrdtEntry final { - NeOS::UInt32 Dba; // Data base address - NeOS::UInt32 Dbau; // Data base address upper 32 bits - NeOS::UInt32 Reserved0; // Reserved + Kernel::UInt32 Dba; // Data base address + Kernel::UInt32 Dbau; // Data base address upper 32 bits + Kernel::UInt32 Reserved0; // Reserved // DW3 - NeOS::UInt32 Dbc : 22; // Byte count, 4M max - NeOS::UInt32 Reserved1 : 9; // Reserved - NeOS::UInt32 Ie : 1; // Interrupt on completion + Kernel::UInt32 Dbc : 22; // Byte count, 4M max + Kernel::UInt32 Reserved1 : 9; // Reserved + Kernel::UInt32 Ie : 1; // Interrupt on completion } HbaPrdtEntry; typedef struct HbaCmdTbl final { - NeOS::UInt8 Cfis[64]; // Command FIS - NeOS::UInt8 Acmd[16]; // ATAPI command, 12 or 16 bytes - NeOS::UInt8 Rsv[48]; // Reserved + Kernel::UInt8 Cfis[64]; // Command FIS + Kernel::UInt8 Acmd[16]; // ATAPI command, 12 or 16 bytes + Kernel::UInt8 Rsv[48]; // Reserved struct HbaPrdtEntry Prdt[]; // Physical region descriptor table entries, 0 ~ 65535 } HbaCmdTbl; /// @brief Initializes an AHCI disk. /// @param PortsImplemented the amount of port that have been detected. /// @return -NeOS::Boolean drv_std_init(NeOS::UInt16& PortsImplemented); +Kernel::Boolean drv_std_init(Kernel::UInt16& PortsImplemented); -NeOS::Boolean drv_std_detected(NeOS::Void); +Kernel::Boolean drv_std_detected(Kernel::Void); /// @brief Read from AHCI disk. /// @param lba @@ -350,7 +350,7 @@ NeOS::Boolean drv_std_detected(NeOS::Void); /// @param sector_sz /// @param buf_sz /// @return -NeOS::Void drv_std_read(NeOS::UInt64 lba, NeOS::Char* buf, NeOS::SizeT sector_sz, NeOS::SizeT buf_sz); +Kernel::Void drv_std_read(Kernel::UInt64 lba, Kernel::Char* buf, Kernel::SizeT sector_sz, Kernel::SizeT buf_sz); /// @brief Write to AHCI disk. /// @param lba @@ -358,15 +358,15 @@ NeOS::Void drv_std_read(NeOS::UInt64 lba, NeOS::Char* buf, NeOS::SizeT sector_sz /// @param sector_sz /// @param buf_sz /// @return -NeOS::Void drv_std_write(NeOS::UInt64 lba, NeOS::Char* buf, NeOS::SizeT sector_sz, NeOS::SizeT buf_sz); +Kernel::Void drv_std_write(Kernel::UInt64 lba, Kernel::Char* buf, Kernel::SizeT sector_sz, Kernel::SizeT buf_sz); /// @brief Gets the sector count from AHCI disk. -NeOS::SizeT drv_get_sector_count(); +Kernel::SizeT drv_get_sector_count(); /// @brief Gets the AHCI disk size. -NeOS::SizeT drv_get_size(); +Kernel::SizeT drv_get_size(); /// @brief Checks if the drive has completed the command. -BOOL drv_is_ready(void); +Kernel::Bool drv_is_ready(void); /* EOF */ diff --git a/dev/modules/APM/APM.h b/dev/modules/APM/APM.h index 1cb55fdc..2e6bdccd 100644 --- a/dev/modules/APM/APM.h +++ b/dev/modules/APM/APM.h @@ -8,7 +8,7 @@ #include -namespace NeOS +namespace Kernel { typedef Int32 APMPowerCmd; @@ -34,4 +34,4 @@ namespace NeOS /// @param cmd the command. /// @return status code. EXTERN_C Int32 apm_send_io_command(UInt16 cmd, APMPowerCmd value); -} // namespace NeOS +} // namespace Kernel diff --git a/dev/modules/ATA/ATA.h b/dev/modules/ATA/ATA.h index 374b8b5d..8fdd3150 100644 --- a/dev/modules/ATA/ATA.h +++ b/dev/modules/ATA/ATA.h @@ -134,22 +134,22 @@ enum #if defined(__ATA_PIO__) || defined(__ATA_DMA__) -NeOS::Boolean drv_std_init(NeOS::UInt16 in_bus, NeOS::UInt8 drive, NeOS::UInt16& out_bus, NeOS::UInt8& out_master); +Kernel::Boolean drv_std_init(Kernel::UInt16 in_bus, Kernel::UInt8 drive, Kernel::UInt16& out_bus, Kernel::UInt8& out_master); -NeOS::Boolean drv_std_detected(NeOS::Void); +Kernel::Boolean drv_std_detected(Kernel::Void); -NeOS::Void drv_std_select(NeOS::UInt16 bus); +Kernel::Void drv_std_select(Kernel::UInt16 bus); -NeOS::Boolean drv_std_wait_io(NeOS::UInt16 io); +Kernel::Boolean drv_std_wait_io(Kernel::UInt16 io); -NeOS::Void drv_std_read(NeOS::UInt64 lba, NeOS::UInt16 io, NeOS::UInt8 is_master, NeOS::Char* buf, NeOS::SizeT sec_sz, NeOS::SizeT buf_sz); +Kernel::Void drv_std_read(Kernel::UInt64 lba, Kernel::UInt16 io, Kernel::UInt8 is_master, Kernel::Char* buf, Kernel::SizeT sec_sz, Kernel::SizeT buf_sz); -NeOS::Void drv_std_write(NeOS::UInt64 lba, NeOS::UInt16 io, NeOS::UInt8 is_master, NeOS::Char* buf, NeOS::SizeT sec_sz, NeOS::SizeT buf_sz); +Kernel::Void drv_std_write(Kernel::UInt64 lba, Kernel::UInt16 io, Kernel::UInt8 is_master, Kernel::Char* buf, Kernel::SizeT sec_sz, Kernel::SizeT buf_sz); /// @brief get sector count. -NeOS::SizeT drv_get_sector_count(); +Kernel::SizeT drv_get_sector_count(); /// @brief get device size. -NeOS::SizeT drv_get_size(); +Kernel::SizeT drv_get_size(); #endif // ifdef __NEOSKRNL__ \ No newline at end of file diff --git a/dev/modules/CoreGfx/AccessibilityMgr.h b/dev/modules/CoreGfx/AccessibilityMgr.h index a7cd24b5..d74059d0 100644 --- a/dev/modules/CoreGfx/AccessibilityMgr.h +++ b/dev/modules/CoreGfx/AccessibilityMgr.h @@ -15,7 +15,7 @@ namespace FB { - using namespace NeOS; + using namespace Kernel; /// @brief common User interface class. class UIAccessibilty final diff --git a/dev/modules/CoreGfx/FBMgr.h b/dev/modules/CoreGfx/FBMgr.h index 5600e4c7..6ac4df02 100644 --- a/dev/modules/CoreGfx/FBMgr.h +++ b/dev/modules/CoreGfx/FBMgr.h @@ -8,7 +8,7 @@ #include -#define fb_init() NeOS::SizeT kCGCursor = 0 +#define fb_init() Kernel::SizeT kCGCursor = 0 #define fb_color(R, G, B) RGB(R, G, B) @@ -19,11 +19,11 @@ #ifdef __NE_AMD64__ /// @brief Performs Alpha drawing on the framebuffer. #define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y) \ - for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \ + for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \ { \ - for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \ + for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \ { \ - *(((NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \ + *(((Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \ i + \ 4 * u))) |= (reg_ptr)[kCGCursor]; \ @@ -34,11 +34,11 @@ /// @brief Performs drawing on the framebuffer. #define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y) \ - for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \ + for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \ { \ - for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \ + for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \ { \ - *(((NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \ + *(((Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \ i + \ 4 * u))) = (reg_ptr)[kCGCursor]; \ @@ -48,11 +48,11 @@ } #define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y) \ - for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \ + for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \ { \ - for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \ + for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \ { \ - *(((NeOS::UInt32*)(_Rgn + \ + *(((Kernel::UInt32*)(_Rgn + \ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \ i + \ 4 * u))) = (reg_ptr)[kCGCursor]; \ @@ -63,11 +63,11 @@ /// @brief Cleans a resource. #define CGClearRegion(height, width, base_x, base_y) \ - for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \ + for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \ { \ - for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \ + for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \ { \ - *(((volatile NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \ + *(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \ i + \ 4 * u))) = fb_get_clear_clr(); \ @@ -76,11 +76,11 @@ /// @brief Draws inside a zone. #define FBDrawInRegion(_Clr, height, width, base_x, base_y) \ - for (NeOS::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \ + for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \ { \ - for (NeOS::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \ + for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \ { \ - *(((volatile NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \ + *(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \ x_base + \ 4 * y_base))) = _Clr; \ @@ -89,11 +89,11 @@ /// @brief Draws inside a zone. #define FBDrawInRegionToRgn(_Rgn, _Clr, height, width, base_x, base_y) \ - for (NeOS::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \ + for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \ { \ - for (NeOS::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \ + for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \ { \ - *(((volatile NeOS::UInt32*)(_Rgn + \ + *(((volatile Kernel::UInt32*)(_Rgn + \ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \ x_base + \ 4 * y_base))) = _Clr[kCGCursor]; \ @@ -102,11 +102,11 @@ } #define FBDrawInRegionA(_Clr, height, width, base_x, base_y) \ - for (NeOS::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \ + for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \ { \ - for (NeOS::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \ + for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \ { \ - *(((volatile NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \ + *(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \ x_base + \ 4 * y_base))) |= _Clr; \ diff --git a/dev/modules/CoreGfx/TextMgr.h b/dev/modules/CoreGfx/TextMgr.h index 843e8274..9c632e2e 100644 --- a/dev/modules/CoreGfx/TextMgr.h +++ b/dev/modules/CoreGfx/TextMgr.h @@ -13,7 +13,7 @@ #define kFontSizeY 8 #define kFontNOFChars 128 -inline const NeOS::UInt8 kFontBitmap[kFontNOFChars][kFontSizeX] = { +inline const Kernel::UInt8 kFontBitmap[kFontNOFChars][kFontSizeX] = { {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0000 (nul) {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0001 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0002 @@ -145,10 +145,10 @@ inline const NeOS::UInt8 kFontBitmap[kFontNOFChars][kFontSizeX] = { }; -inline NeOS::Void fb_render_string_for_bitmap(const NeOS::UInt8* bitmap, const NeOS::SizeT& x_sz, const NeOS::SizeT& y_sz, NeOS::Int32& x_dst, NeOS::Int32& y_dst, NeOS::Int32& color) +inline Kernel::Void fb_render_string_for_bitmap(const Kernel::UInt8* bitmap, const Kernel::SizeT& x_sz, const Kernel::SizeT& y_sz, Kernel::Int32& x_dst, Kernel::Int32& y_dst, Kernel::Int32& color) { - NeOS::Int32 x, y; - NeOS::Int32 set; + Kernel::Int32 x, y; + Kernel::Int32 set; x = 0; y = 0; @@ -168,9 +168,9 @@ inline NeOS::Void fb_render_string_for_bitmap(const NeOS::UInt8* bitmap, const N } } -inline NeOS::Void fb_render_string(const NeOS::Char* text, NeOS::Int32 x_dst, NeOS::Int32 y_dst, NeOS::Int32 color) +inline Kernel::Void fb_render_string(const Kernel::Char* text, Kernel::Int32 x_dst, Kernel::Int32 y_dst, Kernel::Int32 color) { - for (NeOS::SizeT i = 0; text[i] != 0; ++i) + for (Kernel::SizeT i = 0; text[i] != 0; ++i) { fb_render_string_for_bitmap(&kFontBitmap[text[i]][0], kFontSizeX, kFontSizeY, x_dst, y_dst, color); y_dst += kFontSizeY; diff --git a/dev/modules/HPET/Defines.h b/dev/modules/HPET/Defines.h index 36df3ebd..bb825495 100644 --- a/dev/modules/HPET/Defines.h +++ b/dev/modules/HPET/Defines.h @@ -14,29 +14,29 @@ #include #include -namespace NeOS +namespace Kernel { struct PACKED HPETAddressStructure final { - NeOS::UInt8 AddressSpaceId; // 0 - system memory, 1 - system I/O - NeOS::UInt8 RegisterBitWidth; - NeOS::UInt8 RegisterBitOffset; - NeOS::UInt8 Reserved; - NeOS::UInt64 Address; + Kernel::UInt8 AddressSpaceId; // 0 - system memory, 1 - system I/O + Kernel::UInt8 RegisterBitWidth; + Kernel::UInt8 RegisterBitOffset; + Kernel::UInt8 Reserved; + Kernel::UInt64 Address; }; struct PACKED HPETHeader final : public SDT { - NeOS::UInt8 HardwareRevId; - NeOS::UInt8 ComparatorCount : 5; - NeOS::UInt8 CounterSize : 1; - NeOS::UInt8 Reserved : 1; - NeOS::UInt8 LegacyReplacement : 1; - NeOS::UInt16 PciVendorId; + Kernel::UInt8 HardwareRevId; + Kernel::UInt8 ComparatorCount : 5; + Kernel::UInt8 CounterSize : 1; + Kernel::UInt8 Reserved : 1; + Kernel::UInt8 LegacyReplacement : 1; + Kernel::UInt16 PciVendorId; HPETAddressStructure Address; - NeOS::UInt8 HpetNumber; - NeOS::UInt16 MinimumTick; - NeOS::UInt8 PageProtection; + Kernel::UInt8 HpetNumber; + Kernel::UInt16 MinimumTick; + Kernel::UInt8 PageProtection; }; -} // namespace NeOS +} // namespace Kernel diff --git a/dev/modules/LTE/LTE.h b/dev/modules/LTE/LTE.h index ef7d49f3..cd3dd616 100644 --- a/dev/modules/LTE/LTE.h +++ b/dev/modules/LTE/LTE.h @@ -16,25 +16,25 @@ Purpose: LTE Standard Library. /// @brief Long Term Evolution I/O routines. /// @brief Turn on SIM slot. -NeOS::Boolean lte_turn_on_sim(NeOS::Int32 simSlot); +Kernel::Boolean lte_turn_on_sim(Kernel::Int32 simSlot); /// @brief Turn off SIM slot. -NeOS::Boolean lte_turn_off_sim(NeOS::Int32 simSlot); +Kernel::Boolean lte_turn_off_sim(Kernel::Int32 simSlot); /// @brief Send AT command. -NeOS::Boolean lte_send_at_command(NeOS::Char* buf, - NeOS::Size bufReadSz, - NeOS::Int32 simSlot); - -NeOS::Boolean lte_write_sim_file(NeOS::Char* file, - NeOS::VoidPtr buf, - NeOS::Size bufSz, - NeOS::Size offset, - NeOS::Int32 simSlot); - -NeOS::VoidPtr lte_read_sim_file(NeOS::Char* file, - NeOS::Size bufSz, - NeOS::Size offset, - NeOS::Int32 simSlot); +Kernel::Boolean lte_send_at_command(Kernel::Char* buf, + Kernel::Size bufReadSz, + Kernel::Int32 simSlot); + +Kernel::Boolean lte_write_sim_file(Kernel::Char* file, + Kernel::VoidPtr buf, + Kernel::Size bufSz, + Kernel::Size offset, + Kernel::Int32 simSlot); + +Kernel::VoidPtr lte_read_sim_file(Kernel::Char* file, + Kernel::Size bufSz, + Kernel::Size offset, + Kernel::Int32 simSlot); #endif // ifndef _INC_NETWORK_LTE_H_ diff --git a/dev/modules/NVME/NVME.h b/dev/modules/NVME/NVME.h index 5f8608f7..29b2907b 100644 --- a/dev/modules/NVME/NVME.h +++ b/dev/modules/NVME/NVME.h @@ -17,9 +17,9 @@ /// @file NVME.h /// @brief NVME driver. -#define NE_ALIGN_NVME ATTRIBUTE(aligned(sizeof(NeOS::UInt32))) +#define NE_ALIGN_NVME ATTRIBUTE(aligned(sizeof(Kernel::UInt32))) -namespace NeOS +namespace Kernel { struct NE_ALIGN_NVME HAL_NVME_BAR_0 final { @@ -108,6 +108,6 @@ namespace NeOS return true; } -} // namespace NeOS +} // namespace Kernel #endif // ifndef __MODULE_NVME_H__ diff --git a/dev/modules/Power/PowerFactory.h b/dev/modules/Power/PowerFactory.h new file mode 100644 index 00000000..2b47267e --- /dev/null +++ b/dev/modules/Power/PowerFactory.h @@ -0,0 +1,37 @@ +/* ------------------------------------------- + + Copyright (C) 2025, Amlal EL Mahrouss, all rights reserved. + +------------------------------------------- */ + +#pragma once + +#include +#include +#include +#include +#include + +#define NE_POWER_FACTORY : public PowerFactory + +namespace Kernel +{ + class PowerFactory; + + class PowerFactory + { + public: + explicit PowerFactory() = default; + virtual ~PowerFactory() = default; + + PowerFactory& operator=(const PowerFactory&) = default; + PowerFactory(const PowerFactory&) = default; + + public: + Bool Shutdown() + { + return NO; + }; // shutdown + Void Reboot(){}; // soft-reboot + }; +} // namespace Kernel \ No newline at end of file diff --git a/dev/modules/Pwr/PowerFactory.h b/dev/modules/Pwr/PowerFactory.h deleted file mode 100644 index 02d2e092..00000000 --- a/dev/modules/Pwr/PowerFactory.h +++ /dev/null @@ -1,37 +0,0 @@ -/* ------------------------------------------- - - Copyright (C) 2025, Amlal EL Mahrouss, all rights reserved. - -------------------------------------------- */ - -#pragma once - -#include -#include -#include -#include -#include - -#define NE_POWER_FACTORY : public PowerFactory - -namespace NeOS -{ - class PowerFactory; - - class PowerFactory - { - public: - explicit PowerFactory() = default; - virtual ~PowerFactory() = default; - - PowerFactory& operator=(const PowerFactory&) = default; - PowerFactory(const PowerFactory&) = default; - - public: - Bool Shutdown() - { - return NO; - }; // shutdown - Void Reboot(){}; // soft-reboot - }; -} // namespace NeOS \ No newline at end of file diff --git a/dev/modules/SCSI/SCSI.h b/dev/modules/SCSI/SCSI.h index 156bec90..1bcabc1e 100644 --- a/dev/modules/SCSI/SCSI.h +++ b/dev/modules/SCSI/SCSI.h @@ -12,4 +12,4 @@ /// @brief Serial SCSI driver. template -using scsi_packet_type = NeOS::UInt16[PacketBitLen]; +using scsi_packet_type = Kernel::UInt16[PacketBitLen]; diff --git a/dev/modules/XHCI/.gitkeep b/dev/modules/XHCI/.gitkeep deleted file mode 100644 index e69de29b..00000000 diff --git a/dev/modules/XHCI/Defines.h b/dev/modules/XHCI/Defines.h deleted file mode 100644 index e3fcce11..00000000 --- a/dev/modules/XHCI/Defines.h +++ /dev/null @@ -1,70 +0,0 @@ -/* ------------------------------------------- - - Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved. - - File: Defines.h - Purpose: XHCI (and backwards) header. - - Revision History: - - 01/02/24: Added file (amlel) - 03/02/24: Update filename to Defines.h (amlel) - -------------------------------------------- */ - -#pragma once - -#include - -using namespace NeOS; - -#define kUSBCommand (UInt16)0x0 -#define kUSBStatus (UInt16)0x2 -#define kUSBInterruptEnable (UInt16)0x4 -#define kUSBFrameNum (UInt16)0x6 -#define kUSBFrameListBaseAddress (UInt16)0x8 -#define kUSBFrameModifyStart (UInt16)0xC -#define kUSBPort1StatusCtrl (UInt16)0x10 -#define kUSBPort2StatusCtrl (UInt16)0x12 - -typedef struct USBCommandRegister final -{ - UInt8 mReserved[8]; // Reserved - UInt8 - mMaxPacket; // 0 = Max packet size 32 bits 1 = Max packet size 64 bits - UInt8 mConfigure; - UInt8 mSoftwareDebug; - UInt8 mGlobalResume; - UInt8 mGlobalSuspend; - UInt8 mHostCtrlReset; - UInt8 mRun; // 1 = Controller execute frame list entries -} USBCommandRegister; - -typedef struct USBStatusRegister final -{ - UInt8 mReserved[8]; // Reserved - UInt8 mHalted; // 1 = bit 0 in CMD is zero 0 = bit 0 in CMD is 1 - UInt8 mProcessError; - UInt8 mSystemError; - UInt8 mResumeDetected; - UInt8 mErrorInterrupt; - UInt8 mInterrupt; -} USBStatusRegister; - -typedef struct USBInterruptEnableRegister final -{ - UInt8 mReserved[4]; // Reserved - UInt8 mShortPacket; // 1=Enable interrupt 0=Disable interrupt - UInt8 mComplete; // 1=Enable interrupt 0=Disable interrupt - UInt8 mResume; // 1=Enable interrupt 0=Disable interrupt - UInt8 mTimeoutCRC; // 1=Enable interrupt 0=Disable interrupt -} USBInterruptEnableRegister; - -/* - Some terminology: - - Frame Number: Number of processed entry of the Frame List. - Frame List Base Address: - 32-bit physical adress of Frame List. Remember that first 12 bytes are - always 0. The Frame List must contain 1024 entries. -*/ diff --git a/dev/modules/XHCI/XHCI.h b/dev/modules/XHCI/XHCI.h new file mode 100644 index 00000000..345b5157 --- /dev/null +++ b/dev/modules/XHCI/XHCI.h @@ -0,0 +1,70 @@ +/* ------------------------------------------- + + Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved. + + File: Defines.h + Purpose: XHCI (and backwards) header. + + Revision History: + + 01/02/24: Added file (amlel) + 03/02/24: Update filename to Defines.h (amlel) + +------------------------------------------- */ + +#pragma once + +#include + +using namespace Kernel; + +#define kUSBCommand (UInt16)0x0 +#define kUSBStatus (UInt16)0x2 +#define kUSBInterruptEnable (UInt16)0x4 +#define kUSBFrameNum (UInt16)0x6 +#define kUSBFrameListBaseAddress (UInt16)0x8 +#define kUSBFrameModifyStart (UInt16)0xC +#define kUSBPort1StatusCtrl (UInt16)0x10 +#define kUSBPort2StatusCtrl (UInt16)0x12 + +typedef struct USBCommandRegister final +{ + UInt8 mReserved[8]; // Reserved + UInt8 + mMaxPacket; // 0 = Max packet size 32 bits 1 = Max packet size 64 bits + UInt8 mConfigure; + UInt8 mSoftwareDebug; + UInt8 mGlobalResume; + UInt8 mGlobalSuspend; + UInt8 mHostCtrlReset; + UInt8 mRun; // 1 = Controller execute frame list entries +} USBCommandRegister; + +typedef struct USBStatusRegister final +{ + UInt8 mReserved[8]; // Reserved + UInt8 mHalted; // 1 = bit 0 in CMD is zero 0 = bit 0 in CMD is 1 + UInt8 mProcessError; + UInt8 mSystemError; + UInt8 mResumeDetected; + UInt8 mErrorInterrupt; + UInt8 mInterrupt; +} USBStatusRegister; + +typedef struct USBInterruptEnableRegister final +{ + UInt8 mReserved[4]; // Reserved + UInt8 mShortPacket; // 1=Enable interrupt 0=Disable interrupt + UInt8 mComplete; // 1=Enable interrupt 0=Disable interrupt + UInt8 mResume; // 1=Enable interrupt 0=Disable interrupt + UInt8 mTimeoutCRC; // 1=Enable interrupt 0=Disable interrupt +} USBInterruptEnableRegister; + +/* + Some terminology: + + Frame Number: Number of processed entry of the Frame List. + Frame List Base Address: + 32-bit physical adress of Frame List. Remember that first 12 bytes are + always 0. The Frame List must contain 1024 entries. +*/ -- cgit v1.2.3