From f0acad6f3206079d804b2f59aace0dc32dbeb6dc Mon Sep 17 00:00:00 2001 From: Amlal El Mahrouss Date: Thu, 19 Feb 2026 08:14:48 +0100 Subject: kernel: lots of tweaks and improvements, WIP: ASN, FileMgr support for OpenHeFS. Signed-off-by: Amlal El Mahrouss --- src/kernel/HALKit/AMD64/PCI/DMA.cc | 70 ---------------- src/kernel/HALKit/AMD64/PCI/DMA.cpp | 70 ++++++++++++++++ src/kernel/HALKit/AMD64/PCI/Database.cc | 7 -- src/kernel/HALKit/AMD64/PCI/Database.cpp | 7 ++ src/kernel/HALKit/AMD64/PCI/Device.cc | 140 ------------------------------- src/kernel/HALKit/AMD64/PCI/Device.cpp | 140 +++++++++++++++++++++++++++++++ src/kernel/HALKit/AMD64/PCI/Express.cc | 7 -- src/kernel/HALKit/AMD64/PCI/Express.cpp | 7 ++ src/kernel/HALKit/AMD64/PCI/IO.cc | 5 -- src/kernel/HALKit/AMD64/PCI/IO.cpp | 5 ++ src/kernel/HALKit/AMD64/PCI/Iterator.cc | 28 ------- src/kernel/HALKit/AMD64/PCI/Iterator.cpp | 28 +++++++ src/kernel/HALKit/AMD64/PCI/PCI.cc | 5 -- src/kernel/HALKit/AMD64/PCI/PCI.cpp | 5 ++ 14 files changed, 262 insertions(+), 262 deletions(-) delete mode 100644 src/kernel/HALKit/AMD64/PCI/DMA.cc create mode 100644 src/kernel/HALKit/AMD64/PCI/DMA.cpp delete mode 100644 src/kernel/HALKit/AMD64/PCI/Database.cc create mode 100644 src/kernel/HALKit/AMD64/PCI/Database.cpp delete mode 100644 src/kernel/HALKit/AMD64/PCI/Device.cc create mode 100644 src/kernel/HALKit/AMD64/PCI/Device.cpp delete mode 100644 src/kernel/HALKit/AMD64/PCI/Express.cc create mode 100644 src/kernel/HALKit/AMD64/PCI/Express.cpp delete mode 100644 src/kernel/HALKit/AMD64/PCI/IO.cc create mode 100644 src/kernel/HALKit/AMD64/PCI/IO.cpp delete mode 100644 src/kernel/HALKit/AMD64/PCI/Iterator.cc create mode 100644 src/kernel/HALKit/AMD64/PCI/Iterator.cpp delete mode 100644 src/kernel/HALKit/AMD64/PCI/PCI.cc create mode 100644 src/kernel/HALKit/AMD64/PCI/PCI.cpp (limited to 'src/kernel/HALKit/AMD64/PCI') diff --git a/src/kernel/HALKit/AMD64/PCI/DMA.cc b/src/kernel/HALKit/AMD64/PCI/DMA.cc deleted file mode 100644 index 73e5e401..00000000 --- a/src/kernel/HALKit/AMD64/PCI/DMA.cc +++ /dev/null @@ -1,70 +0,0 @@ -// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) -// Licensed under the Apache License, Version 2.0 (see LICENSE file) -// Official repository: https://github.com/nekernel-org/nekernel - -#include -#include - -namespace Kernel { -DMAWrapper::operator bool() { - return this->fAddress; -} - -bool DMAWrapper::operator!() { - return !this->fAddress; -} - -Boolean DMAWrapper::Check(UIntPtr offset) const { - if (!this->fAddress) return false; - - if (offset == 0) return false; - - kout << "[DMAWrapper::IsIn] Checking offset...\r"; - return reinterpret_cast(this->fAddress) >= offset; -} - -bool DMAWrapper::Write(UIntPtr& bit, const UInt32& offset) { - kout << "[DMAWrapper::Read] Checking this->fAddress...\r"; - - if (!this->fAddress) return false; - - (Void)(kout << "[DMAWrapper::Write] Writing at address: " - << hex_number(reinterpret_cast(this->fAddress) + offset) << kendl); - - ke_dma_write(reinterpret_cast(this->fAddress), offset, bit); - - return true; -} - -UIntPtr DMAWrapper::Read(const UInt32& offset) { - kout << "[DMAWrapper::Read] Checking this->fAddress...\r"; - - if (!this->fAddress) return ~0; - - (Void)(kout << "[DMAWrapper::Write] Writing at address: " - << hex_number(reinterpret_cast(this->fAddress) + offset) << kendl); - - return (UIntPtr) ke_dma_read(reinterpret_cast(this->fAddress), offset); -} - -UIntPtr DMAWrapper::operator[](UIntPtr& offset) { - return this->Read(offset); -} - -OwnPtr> DMAFactory::Construct(OwnPtr& dma) { - if (!dma) return {}; - - OwnPtr> dmaOwnPtr = - make_ptr, char*>(reinterpret_cast(dma->fAddress)); - - if (!dmaOwnPtr) return {}; - - kout << "Returning the new OwnPtr>!\r"; - return dmaOwnPtr; -} - -DMAWrapper& DMAWrapper::operator=(voidPtr Ptr) { - this->fAddress = Ptr; - return *this; -} -} // namespace Kernel diff --git a/src/kernel/HALKit/AMD64/PCI/DMA.cpp b/src/kernel/HALKit/AMD64/PCI/DMA.cpp new file mode 100644 index 00000000..73e5e401 --- /dev/null +++ b/src/kernel/HALKit/AMD64/PCI/DMA.cpp @@ -0,0 +1,70 @@ +// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) +// Licensed under the Apache License, Version 2.0 (see LICENSE file) +// Official repository: https://github.com/nekernel-org/nekernel + +#include +#include + +namespace Kernel { +DMAWrapper::operator bool() { + return this->fAddress; +} + +bool DMAWrapper::operator!() { + return !this->fAddress; +} + +Boolean DMAWrapper::Check(UIntPtr offset) const { + if (!this->fAddress) return false; + + if (offset == 0) return false; + + kout << "[DMAWrapper::IsIn] Checking offset...\r"; + return reinterpret_cast(this->fAddress) >= offset; +} + +bool DMAWrapper::Write(UIntPtr& bit, const UInt32& offset) { + kout << "[DMAWrapper::Read] Checking this->fAddress...\r"; + + if (!this->fAddress) return false; + + (Void)(kout << "[DMAWrapper::Write] Writing at address: " + << hex_number(reinterpret_cast(this->fAddress) + offset) << kendl); + + ke_dma_write(reinterpret_cast(this->fAddress), offset, bit); + + return true; +} + +UIntPtr DMAWrapper::Read(const UInt32& offset) { + kout << "[DMAWrapper::Read] Checking this->fAddress...\r"; + + if (!this->fAddress) return ~0; + + (Void)(kout << "[DMAWrapper::Write] Writing at address: " + << hex_number(reinterpret_cast(this->fAddress) + offset) << kendl); + + return (UIntPtr) ke_dma_read(reinterpret_cast(this->fAddress), offset); +} + +UIntPtr DMAWrapper::operator[](UIntPtr& offset) { + return this->Read(offset); +} + +OwnPtr> DMAFactory::Construct(OwnPtr& dma) { + if (!dma) return {}; + + OwnPtr> dmaOwnPtr = + make_ptr, char*>(reinterpret_cast(dma->fAddress)); + + if (!dmaOwnPtr) return {}; + + kout << "Returning the new OwnPtr>!\r"; + return dmaOwnPtr; +} + +DMAWrapper& DMAWrapper::operator=(voidPtr Ptr) { + this->fAddress = Ptr; + return *this; +} +} // namespace Kernel diff --git a/src/kernel/HALKit/AMD64/PCI/Database.cc b/src/kernel/HALKit/AMD64/PCI/Database.cc deleted file mode 100644 index 7eb098da..00000000 --- a/src/kernel/HALKit/AMD64/PCI/Database.cc +++ /dev/null @@ -1,7 +0,0 @@ -// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) -// Licensed under the Apache License, Version 2.0 (see LICENSE file) -// Official repository: https://github.com/nekernel-org/nekernel - -#include - -namespace Kernel {} diff --git a/src/kernel/HALKit/AMD64/PCI/Database.cpp b/src/kernel/HALKit/AMD64/PCI/Database.cpp new file mode 100644 index 00000000..7eb098da --- /dev/null +++ b/src/kernel/HALKit/AMD64/PCI/Database.cpp @@ -0,0 +1,7 @@ +// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) +// Licensed under the Apache License, Version 2.0 (see LICENSE file) +// Official repository: https://github.com/nekernel-org/nekernel + +#include + +namespace Kernel {} diff --git a/src/kernel/HALKit/AMD64/PCI/Device.cc b/src/kernel/HALKit/AMD64/PCI/Device.cc deleted file mode 100644 index dcc16e6a..00000000 --- a/src/kernel/HALKit/AMD64/PCI/Device.cc +++ /dev/null @@ -1,140 +0,0 @@ -// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) -// Licensed under the Apache License, Version 2.0 (see LICENSE file) -// Official repository: https://github.com/nekernel-org/nekernel - -#include -#include - -#define PCI_BAR_IO (0x01) -#define PCI_BAR_LOWMEM (0x02) -#define PCI_BAR_64 (0x04) -#define PCI_BAR_PREFETCH (0x08) -#define PCI_ENABLE_BIT (0x80000000) - -static Kernel::UInt NE_PCIReadRaw(Kernel::UInt bar, Kernel::UShort bus, Kernel::UShort dev, - Kernel::UShort fun) { - Kernel::UInt target = PCI_ENABLE_BIT | ((Kernel::UInt) bus << 16) | ((Kernel::UInt) dev << 11) | - ((Kernel::UInt) fun << 8) | (bar & 0xFC); - - Kernel::HAL::rt_out32((Kernel::UShort) Kernel::PCI::PciConfigKind::ConfigAddress, target); - - Kernel::HAL::rt_wait_400ns(); - - return Kernel::HAL::rt_in32((Kernel::UShort) Kernel::PCI::PciConfigKind::ConfigData); -} - -static Kernel::Void NE_PCISetCfgTarget(Kernel::UInt bar, Kernel::UShort bus, Kernel::UShort dev, - Kernel::UShort fun) { - Kernel::UInt target = 0x80000000 | ((Kernel::UInt) bus << 16) | ((Kernel::UInt) dev << 11) | - ((Kernel::UInt) fun << 8) | (bar & 0xFC); - - Kernel::HAL::rt_out32((Kernel::UShort) Kernel::PCI::PciConfigKind::ConfigAddress, target); - - Kernel::HAL::rt_wait_400ns(); -} - -namespace Kernel::PCI { -Device::Device(UShort bus, UShort device, UShort func, UInt32 bar) - : fBus(bus), fDevice(device), fFunction(func), fBar(bar) {} - -Device::~Device() = default; - -UInt Device::Read(UInt bar, Size sz) { - // Ensure aligned access by masking to 4-byte boundary - NE_PCISetCfgTarget(bar & 0xFC, fBus, fDevice, fFunction); - - // Read 4 bytes and shift out the correct value - UInt data = HAL::rt_in32((UShort) PciConfigKind::ConfigData); - - if (sz == 4) return data; - if (sz == 2) return (data >> ((bar & 2) * 8)) & 0xFFFF; - if (sz == 1) return (data >> ((bar & 3) * 8)) & 0xFF; - - return (UShort) PciConfigKind::Invalid; -} - -void Device::Write(UInt bar, UIntPtr data, Size sz) { - NE_PCISetCfgTarget(bar & 0xFC, fBus, fDevice, fFunction); - - if (sz == 4) { - HAL::rt_out32((UShort) PciConfigKind::ConfigAddress, (UInt) data); - } else if (sz == 2) { - UInt temp = HAL::rt_in32((UShort) PciConfigKind::ConfigData); - - temp &= ~(0xFFFF << ((bar & 2) * 8)); - temp |= (data & 0xFFFF) << ((bar & 2) * 8); - - HAL::rt_out32((UShort) PciConfigKind::ConfigAddress, temp); - } else if (sz == 1) { - UInt temp = HAL::rt_in32((UShort) PciConfigKind::ConfigData); - - temp &= ~(0xFF << ((bar & 3) * 8)); - temp |= (data & 0xFF) << ((bar & 3) * 8); - - HAL::rt_out32((UShort) PciConfigKind::ConfigAddress, temp); - } -} - -UShort Device::DeviceId() { - return (UShort) (NE_PCIReadRaw(0x0, fBus, fDevice, fFunction) >> 16); -} - -UShort Device::VendorId() { - return (UShort) (NE_PCIReadRaw(0x0, fBus, fDevice, fFunction) & 0xFFFF); -} - -UShort Device::InterfaceId() { - return (UShort) (NE_PCIReadRaw(0x09, fBus, fDevice, fFunction) >> 16); -} - -UChar Device::Class() { - return (UChar) (NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 24); -} - -UChar Device::Subclass() { - return (UChar) (NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 16); -} - -UChar Device::ProgIf() { - return (UChar) (NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 8); -} - -UChar Device::HeaderType() { - return (UChar) (NE_PCIReadRaw(0xC, fBus, fDevice, fFunction) >> 16); -} - -void Device::EnableMmio() { - UInt32 command = Read(0x04, sizeof(UInt32)); - command |= (1 << 1); // Memory Space Enable (bit 1) - - Write(0x04, command, sizeof(UInt32)); -} - -void Device::BecomeBusMaster() { - UInt32 command = Read(0x04, sizeof(UInt32)); - command |= (1 << 2); // Bus Master Enable (bit 2) - Write(0x04, command, sizeof(UInt32)); -} - -UIntPtr Device::Bar(UInt32 bar_in) { - UInt32 bar = NE_PCIReadRaw(bar_in, fBus, fDevice, fFunction); - - if (bar & PCI_BAR_IO) return static_cast(bar & ~0x03); - - if (bar & PCI_BAR_64) { - UInt32 high = NE_PCIReadRaw((bar_in + 4) & ~0x03, fBus, fDevice, fFunction); - return (static_cast(high) << 32) | (bar & ~0x0F); - } - - return static_cast(bar & ~0x0F); -} - -UShort Device::Vendor() { - UShort vendor = this->VendorId(); - return vendor; -} - -Device::operator bool() { - return this->VendorId() != (UShort) PciConfigKind::Invalid; -} -} // namespace Kernel::PCI diff --git a/src/kernel/HALKit/AMD64/PCI/Device.cpp b/src/kernel/HALKit/AMD64/PCI/Device.cpp new file mode 100644 index 00000000..dcc16e6a --- /dev/null +++ b/src/kernel/HALKit/AMD64/PCI/Device.cpp @@ -0,0 +1,140 @@ +// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) +// Licensed under the Apache License, Version 2.0 (see LICENSE file) +// Official repository: https://github.com/nekernel-org/nekernel + +#include +#include + +#define PCI_BAR_IO (0x01) +#define PCI_BAR_LOWMEM (0x02) +#define PCI_BAR_64 (0x04) +#define PCI_BAR_PREFETCH (0x08) +#define PCI_ENABLE_BIT (0x80000000) + +static Kernel::UInt NE_PCIReadRaw(Kernel::UInt bar, Kernel::UShort bus, Kernel::UShort dev, + Kernel::UShort fun) { + Kernel::UInt target = PCI_ENABLE_BIT | ((Kernel::UInt) bus << 16) | ((Kernel::UInt) dev << 11) | + ((Kernel::UInt) fun << 8) | (bar & 0xFC); + + Kernel::HAL::rt_out32((Kernel::UShort) Kernel::PCI::PciConfigKind::ConfigAddress, target); + + Kernel::HAL::rt_wait_400ns(); + + return Kernel::HAL::rt_in32((Kernel::UShort) Kernel::PCI::PciConfigKind::ConfigData); +} + +static Kernel::Void NE_PCISetCfgTarget(Kernel::UInt bar, Kernel::UShort bus, Kernel::UShort dev, + Kernel::UShort fun) { + Kernel::UInt target = 0x80000000 | ((Kernel::UInt) bus << 16) | ((Kernel::UInt) dev << 11) | + ((Kernel::UInt) fun << 8) | (bar & 0xFC); + + Kernel::HAL::rt_out32((Kernel::UShort) Kernel::PCI::PciConfigKind::ConfigAddress, target); + + Kernel::HAL::rt_wait_400ns(); +} + +namespace Kernel::PCI { +Device::Device(UShort bus, UShort device, UShort func, UInt32 bar) + : fBus(bus), fDevice(device), fFunction(func), fBar(bar) {} + +Device::~Device() = default; + +UInt Device::Read(UInt bar, Size sz) { + // Ensure aligned access by masking to 4-byte boundary + NE_PCISetCfgTarget(bar & 0xFC, fBus, fDevice, fFunction); + + // Read 4 bytes and shift out the correct value + UInt data = HAL::rt_in32((UShort) PciConfigKind::ConfigData); + + if (sz == 4) return data; + if (sz == 2) return (data >> ((bar & 2) * 8)) & 0xFFFF; + if (sz == 1) return (data >> ((bar & 3) * 8)) & 0xFF; + + return (UShort) PciConfigKind::Invalid; +} + +void Device::Write(UInt bar, UIntPtr data, Size sz) { + NE_PCISetCfgTarget(bar & 0xFC, fBus, fDevice, fFunction); + + if (sz == 4) { + HAL::rt_out32((UShort) PciConfigKind::ConfigAddress, (UInt) data); + } else if (sz == 2) { + UInt temp = HAL::rt_in32((UShort) PciConfigKind::ConfigData); + + temp &= ~(0xFFFF << ((bar & 2) * 8)); + temp |= (data & 0xFFFF) << ((bar & 2) * 8); + + HAL::rt_out32((UShort) PciConfigKind::ConfigAddress, temp); + } else if (sz == 1) { + UInt temp = HAL::rt_in32((UShort) PciConfigKind::ConfigData); + + temp &= ~(0xFF << ((bar & 3) * 8)); + temp |= (data & 0xFF) << ((bar & 3) * 8); + + HAL::rt_out32((UShort) PciConfigKind::ConfigAddress, temp); + } +} + +UShort Device::DeviceId() { + return (UShort) (NE_PCIReadRaw(0x0, fBus, fDevice, fFunction) >> 16); +} + +UShort Device::VendorId() { + return (UShort) (NE_PCIReadRaw(0x0, fBus, fDevice, fFunction) & 0xFFFF); +} + +UShort Device::InterfaceId() { + return (UShort) (NE_PCIReadRaw(0x09, fBus, fDevice, fFunction) >> 16); +} + +UChar Device::Class() { + return (UChar) (NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 24); +} + +UChar Device::Subclass() { + return (UChar) (NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 16); +} + +UChar Device::ProgIf() { + return (UChar) (NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 8); +} + +UChar Device::HeaderType() { + return (UChar) (NE_PCIReadRaw(0xC, fBus, fDevice, fFunction) >> 16); +} + +void Device::EnableMmio() { + UInt32 command = Read(0x04, sizeof(UInt32)); + command |= (1 << 1); // Memory Space Enable (bit 1) + + Write(0x04, command, sizeof(UInt32)); +} + +void Device::BecomeBusMaster() { + UInt32 command = Read(0x04, sizeof(UInt32)); + command |= (1 << 2); // Bus Master Enable (bit 2) + Write(0x04, command, sizeof(UInt32)); +} + +UIntPtr Device::Bar(UInt32 bar_in) { + UInt32 bar = NE_PCIReadRaw(bar_in, fBus, fDevice, fFunction); + + if (bar & PCI_BAR_IO) return static_cast(bar & ~0x03); + + if (bar & PCI_BAR_64) { + UInt32 high = NE_PCIReadRaw((bar_in + 4) & ~0x03, fBus, fDevice, fFunction); + return (static_cast(high) << 32) | (bar & ~0x0F); + } + + return static_cast(bar & ~0x0F); +} + +UShort Device::Vendor() { + UShort vendor = this->VendorId(); + return vendor; +} + +Device::operator bool() { + return this->VendorId() != (UShort) PciConfigKind::Invalid; +} +} // namespace Kernel::PCI diff --git a/src/kernel/HALKit/AMD64/PCI/Express.cc b/src/kernel/HALKit/AMD64/PCI/Express.cc deleted file mode 100644 index e0264d9e..00000000 --- a/src/kernel/HALKit/AMD64/PCI/Express.cc +++ /dev/null @@ -1,7 +0,0 @@ -// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) -// Licensed under the Apache License, Version 2.0 (see LICENSE file) -// Official repository: https://github.com/nekernel-org/nekernel - -#include - -namespace Kernel {} diff --git a/src/kernel/HALKit/AMD64/PCI/Express.cpp b/src/kernel/HALKit/AMD64/PCI/Express.cpp new file mode 100644 index 00000000..e0264d9e --- /dev/null +++ b/src/kernel/HALKit/AMD64/PCI/Express.cpp @@ -0,0 +1,7 @@ +// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) +// Licensed under the Apache License, Version 2.0 (see LICENSE file) +// Official repository: https://github.com/nekernel-org/nekernel + +#include + +namespace Kernel {} diff --git a/src/kernel/HALKit/AMD64/PCI/IO.cc b/src/kernel/HALKit/AMD64/PCI/IO.cc deleted file mode 100644 index 8cc9c83a..00000000 --- a/src/kernel/HALKit/AMD64/PCI/IO.cc +++ /dev/null @@ -1,5 +0,0 @@ -// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) -// Licensed under the Apache License, Version 2.0 (see LICENSE file) -// Official repository: https://github.com/nekernel-org/nekernel - -#include diff --git a/src/kernel/HALKit/AMD64/PCI/IO.cpp b/src/kernel/HALKit/AMD64/PCI/IO.cpp new file mode 100644 index 00000000..8cc9c83a --- /dev/null +++ b/src/kernel/HALKit/AMD64/PCI/IO.cpp @@ -0,0 +1,5 @@ +// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) +// Licensed under the Apache License, Version 2.0 (see LICENSE file) +// Official repository: https://github.com/nekernel-org/nekernel + +#include diff --git a/src/kernel/HALKit/AMD64/PCI/Iterator.cc b/src/kernel/HALKit/AMD64/PCI/Iterator.cc deleted file mode 100644 index 8216befa..00000000 --- a/src/kernel/HALKit/AMD64/PCI/Iterator.cc +++ /dev/null @@ -1,28 +0,0 @@ -// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) -// Licensed under the Apache License, Version 2.0 (see LICENSE file) -// Official repository: https://github.com/nekernel-org/nekernel - -#include - -namespace Kernel::PCI { -Iterator::Iterator(const Types::PciDeviceKind type, UInt32 bar) { - // probe devices. - for (Int32 bus = 0; bus < NE_BUS_COUNT; ++bus) { - for (Int32 device = 0; device < NE_DEVICE_COUNT; ++device) { - for (Int32 function = 0; function < NE_FUNCTION_COUNT; ++function) { - Device dev(bus, device, function, bar); - - if (dev.Class() == type) { - fDevices[bus] = dev; - } - } - } - } -} - -Iterator::~Iterator() {} - -Ref Iterator::operator[](const Size& at) { - return fDevices[at]; -} -} // namespace Kernel::PCI diff --git a/src/kernel/HALKit/AMD64/PCI/Iterator.cpp b/src/kernel/HALKit/AMD64/PCI/Iterator.cpp new file mode 100644 index 00000000..8216befa --- /dev/null +++ b/src/kernel/HALKit/AMD64/PCI/Iterator.cpp @@ -0,0 +1,28 @@ +// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) +// Licensed under the Apache License, Version 2.0 (see LICENSE file) +// Official repository: https://github.com/nekernel-org/nekernel + +#include + +namespace Kernel::PCI { +Iterator::Iterator(const Types::PciDeviceKind type, UInt32 bar) { + // probe devices. + for (Int32 bus = 0; bus < NE_BUS_COUNT; ++bus) { + for (Int32 device = 0; device < NE_DEVICE_COUNT; ++device) { + for (Int32 function = 0; function < NE_FUNCTION_COUNT; ++function) { + Device dev(bus, device, function, bar); + + if (dev.Class() == type) { + fDevices[bus] = dev; + } + } + } + } +} + +Iterator::~Iterator() {} + +Ref Iterator::operator[](const Size& at) { + return fDevices[at]; +} +} // namespace Kernel::PCI diff --git a/src/kernel/HALKit/AMD64/PCI/PCI.cc b/src/kernel/HALKit/AMD64/PCI/PCI.cc deleted file mode 100644 index b8a1302d..00000000 --- a/src/kernel/HALKit/AMD64/PCI/PCI.cc +++ /dev/null @@ -1,5 +0,0 @@ -// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) -// Licensed under the Apache License, Version 2.0 (see LICENSE file) -// Official repository: https://github.com/nekernel-org/nekernel - -#include diff --git a/src/kernel/HALKit/AMD64/PCI/PCI.cpp b/src/kernel/HALKit/AMD64/PCI/PCI.cpp new file mode 100644 index 00000000..b8a1302d --- /dev/null +++ b/src/kernel/HALKit/AMD64/PCI/PCI.cpp @@ -0,0 +1,5 @@ +// Copyright 2024-2025, Amlal El Mahrouss (amlal@nekernel.org) +// Licensed under the Apache License, Version 2.0 (see LICENSE file) +// Official repository: https://github.com/nekernel-org/nekernel + +#include -- cgit v1.2.3