/* ------------------------------------------- Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved. ------------------------------------------- */ #pragma once #include #include #include #include #include namespace NeOS { enum class DmaKind { PCI, // Bus mastering is required to be turned on. Basiaclly a request // control system. 64-Bit access depends on the PAE bit and the device // (if Double Address Cycle is available) ISA, // Four DMA channels 0-3; 8 bit transfers and only a megabyte of RAM. Invalid, }; class DMAWrapper final { public: explicit DMAWrapper() = delete; public: explicit DMAWrapper(nullPtr) = delete; explicit DMAWrapper(voidPtr Ptr, DmaKind Kind = DmaKind::PCI) : fAddress(Ptr), fKind(Kind) { } public: DMAWrapper& operator=(voidPtr Ptr); public: DMAWrapper& operator=(const DMAWrapper&) = default; DMAWrapper(const DMAWrapper&) = default; public: ~DMAWrapper() = default; template T* operator->(); template T* Get(const UIntPtr off = 0); public: operator bool(); bool operator!(); public: bool Write(const UIntPtr& bit, const UInt32& offset); UIntPtr Read(const UInt32& offset); Boolean Check(UIntPtr offset) const; public: UIntPtr operator[](const UIntPtr& offset); private: voidPtr fAddress{nullptr}; DmaKind fKind{DmaKind::Invalid}; private: friend class DMAFactory; }; class DMAFactory final { public: static OwnPtr> Construct(OwnPtr& dma); }; } // namespace NeOS #include