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authorAmlal El Mahrouss <amlal@nekernel.org>2026-01-12 14:51:30 +0100
committerAmlal El Mahrouss <amlal@nekernel.org>2026-01-12 14:51:30 +0100
commit04abfb60bc52b7b4235202e0c409821cc63c585a (patch)
tree90a2fe910d10e4f550e423c6002935fefeab538f
parent4243516705e4a18cbab62a94975a0d992b21a51e (diff)
feat: Update 30-PIN specs and implementation. Breaking API changes in
NeBoot as well. Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>
-rw-r--r--doc/tex/30pin.tex16
-rw-r--r--doc/tex/epm.tex6
-rw-r--r--doc/tex/pci-tree.tex18
-rw-r--r--include/30pin.h9
-rw-r--r--include/boot.h28
-rw-r--r--include/fd.h4
-rw-r--r--include/mp-bit.h10
-rw-r--r--include/partition-map.h6
-rw-r--r--include/pci-tree.h34
-rw-r--r--libfdt/libfdt.h6
-rw-r--r--libfdt/libfdt_strerror.c6
-rw-r--r--src/arm64/arm64-30pin.c18
-rw-r--r--src/arm64/arm64-boot.S6
-rw-r--r--src/arm64/arm64-err.c8
-rw-r--r--src/arm64/arm64-start-context.S12
-rw-r--r--src/arm64/arm64-uart.c14
-rw-r--r--src/arm64/script.lds2
-rw-r--r--src/hal/neboot-ahci-driver.c10
-rw-r--r--src/neboot-cpu-api.c2
-rw-r--r--src/neboot-cxx-abi.cc14
-rw-r--r--src/neboot-partition-map-parse.c6
-rw-r--r--src/neboot-partition-map.c2
-rw-r--r--src/neboot-pci-tree.c76
-rw-r--r--src/neboot-print-name.c10
-rw-r--r--src/neboot-start.c66
-rw-r--r--src/ppc64/linkscript.ld4
-rw-r--r--src/ppc64/ppc64-boot.S22
-rw-r--r--src/ppc64/ppc64-err.c8
-rw-r--r--src/ppc64/ppc64-hal.c30
-rw-r--r--src/ppc64/ppc64-uart.c8
-rw-r--r--src/rv64/rv64-api.s4
-rw-r--r--src/rv64/rv64-boot.s58
-rw-r--r--src/rv64/rv64-err.c8
-rw-r--r--src/rv64/rv64-uart.c22
-rw-r--r--src/rv64/script.lds10
35 files changed, 301 insertions, 262 deletions
diff --git a/doc/tex/30pin.tex b/doc/tex/30pin.tex
index 386ddbe..11830fb 100644
--- a/doc/tex/30pin.tex
+++ b/doc/tex/30pin.tex
@@ -68,6 +68,22 @@ Defines the kinds of packets used in the 30pin recovery protocol:
\item \texttt{TPIN\_RECOVERY\_PACKET\_KIND\_EOP = 3}
\item \texttt{TPIN\_RECOVERY\_PACKET\_KIND\_EOP\_ACK = 4}
\item \texttt{TPIN\_RECOVERY\_PACKET\_KIND\_EOP\_NACK = 5}
+ \item \texttt{TPIN\_RECOVERY\_PACKET\_KIND\_EOP\_RESET = 6}
\end{itemize}
+\section{30PIN Extensions}
+
+\subsection{Validation Extension 1 (VE-1)}
+
+A valid 30pin recovery packet must have the magic number set to \texttt{"TP"}.
+Moreover, the packet should be validated based on the CRC32 algorithm.
+
+\begin{lstlisting}[language=C]
+void validate_entry(nb_tpin_crc_t crc, nb_tpin_recovery_packet_t* packet);
+\end{lstlisting} The `nb\_tpin\_crc\_t' type shall be of size 4 bytes to hold the CRC32 checksum.
+
+\begin{lstlisting}[language=C]
+typedef uint8_t nb_tpin_crc_t[sizeof(uint32_t)];
+\end{lstlisting} This ensures that the byte are indexable and compatible with CRC32 calculations. Such CRC32 shall be stored in big-endian order. As per networking protocols standard.
+
\end{document}
diff --git a/doc/tex/epm.tex b/doc/tex/epm.tex
index c8b1d7a..db610e7 100644
--- a/doc/tex/epm.tex
+++ b/doc/tex/epm.tex
@@ -114,13 +114,13 @@ struct __attribute__((packed)) part_block {
\subsection{\texttt{cb\_filesystem\_exists}}
\begin{lstlisting}[style=customc]
-boolean cb_filesystem_exists(caddr_t fs, size_t len);
+boolean nb_filesystem_exists(caddr_t fs, size_t len);
\end{lstlisting}
Checks if a filesystem name is supported.
\subsection{\texttt{cb\_parse\_partition\_block\_data\_at}}
\begin{lstlisting}[style=customc]
-bool cb_parse_partition_block_data_at(
+bool nb_parse_partition_block_data_at(
voidptr_t blob,
size_t blob_sz,
size_t index,
@@ -132,7 +132,7 @@ Parses an EPM partition block from a blob at the specified index and returns LBA
\subsection{\texttt{cb\_parse\_partition\_block\_at}}
\begin{lstlisting}[style=customc]
-part_block_t* cb_parse_partition_block_at(
+part_block_t* nb_parse_partition_block_at(
voidptr_t blob,
size_t blob_sz,
size_t index);
diff --git a/doc/tex/pci-tree.tex b/doc/tex/pci-tree.tex
index 5ca6dfd..37f3581 100644
--- a/doc/tex/pci-tree.tex
+++ b/doc/tex/pci-tree.tex
@@ -33,17 +33,17 @@ Language of implementation is the C programming language
\begin{lstlisting}
struct hw_nb_pci_tree {
- cb_pci_num_t d_magic;
- cb_pci_num_t d_version;
- cb_pci_num_t d_off_props;
- cb_pci_num_t d_off_struct;
- cb_pci_num_t d_sz_props;
- cb_pci_num_t d_sz_struct;
+ nb_pci_num_t d_magic;
+ nb_pci_num_t d_version;
+ nb_pci_num_t d_off_props;
+ nb_pci_num_t d_off_struct;
+ nb_pci_num_t d_sz_props;
+ nb_pci_num_t d_sz_struct;
- cb_pci_num_t d_first_node;
- cb_pci_num_t d_next_sibling;
+ nb_pci_num_t d_first_node;
+ nb_pci_num_t d_next_sibling;
- cb_pci_char_t d_name[NB_PCI_NAME_LEN];
+ nb_pci_char_t d_name[NB_PCI_NAME_LEN];
};
\end{lstlisting}
diff --git a/include/30pin.h b/include/30pin.h
index b7b0924..336f536 100644
--- a/include/30pin.h
+++ b/include/30pin.h
@@ -37,6 +37,13 @@ enum {
TPIN_RECOVERY_PACKET_KIND_EOP = 3,
TPIN_RECOVERY_PACKET_KIND_EOP_ACK = 4,
TPIN_RECOVERY_PACKET_KIND_EOP_NACK = 5,
+ TPIN_RECVOERY_PACKET_KIND_RESET = 6,
+ TPIN_RECOVERY_PACKET_KIND_COUNT = TPIN_RECVOERY_PACKET_KIND_RESET - TPIN_RECOVERY_PACKET_KIND_BOOT + 1
};
-typedef struct _nb_tpin_recovery_packet cb_tpin_recovery_packet_t; \ No newline at end of file
+/// @brief 30pin CRC type.
+typedef uint8_t nb_tpin_crc_t[sizeof(uint32_t)];
+
+typedef struct _nb_tpin_recovery_packet nb_tpin_recovery_packet_t;
+
+size_t nb_parse_30pin(voidptr_t blob, size_t* size, size_t* start_lba); \ No newline at end of file
diff --git a/include/boot.h b/include/boot.h
index 143714f..02f87c5 100644
--- a/include/boot.h
+++ b/include/boot.h
@@ -93,7 +93,7 @@ typedef struct nullptr_* nullptr_t;
#define NB_UART_BASE 0x10000000
#define NB_FLASH_BASE_ADDR 0x08000000
-#define cb_sync_synchronize() __sync_synchronize()
+#define nb_sync_synchronize() __sync_synchronize()
#elif defined(__COMPILE_POWERPC__)
#define NB_UART_BASE 0x10000000
#define NB_BOOT_ADDR 0x1030000
@@ -101,7 +101,7 @@ typedef struct nullptr_* nullptr_t;
#define NB_FRAMEBUFFER_ADDR 0x40000000L
#define NB_FLASH_BASE_ADDR 0x08000000
-#define cb_sync_synchronize() __sync_synchronize()
+#define nb_sync_synchronize() __sync_synchronize()
#elif defined(__COMPILE_ARM64__)
#define NB_UART_BASE 0x09000000
@@ -114,7 +114,7 @@ static inline void __sync_synchronize(void) {
/// leave it as is.
}
-#define cb_sync_synchronize() __sync_synchronize()
+#define nb_sync_synchronize() __sync_synchronize()
#endif // ifndef __COMPILE_POWERPC__
#define NB_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
@@ -131,7 +131,7 @@ static inline void __sync_synchronize(void) {
#endif // ifndef _Nonnull
#define NB_BOOT_CALL(struct, offset) \
- volatile cb_proc_t proc_##offset = (volatile cb_proc_t)(struct->offset); \
+ volatile nb_proc_t proc_##offset = (volatile nb_proc_t)(struct->offset); \
proc_##offset();
/// @brief Binary64 representation (IEE 7554) in a C structure
@@ -153,36 +153,36 @@ typedef char ascii_char_t;
/// @brief panic the entire system.
/// @param reason why text.
-void cb_panic(const char* reason);
+void nb_panic(const char* reason);
/// @brief update the power status of the machine.
-void cb_update_power_status(boolean restart);
+void nb_update_power_status(boolean restart);
/// @brief puts a string in serial
/// @param text
/// @return
-size_t cb_put_string(const ascii_char_t* _Nonnull text);
+size_t nb_put_string(const ascii_char_t* _Nonnull text);
/// @brief gets a char from serial
/// @param
/// @return
-utf_char_t cb_get_char(void);
+utf_char_t nb_get_char(void);
/// @brief puts a char in serial
/// @param ch
-void cb_put_char(utf_char_t ch);
+void nb_put_char(utf_char_t ch);
/// @brief Hangs the firmware.
/// @param void no args.
-void cb_restart_machine(void);
+void nb_restart_machine(void);
/// @brief Flushs the TLB.
/// @param void no args.
-void cb_flush_tlb(void);
+void nb_flush_tlb(void);
/// @brief Print current kernel name.
/// @param
-void cb_print_name(void);
+void nb_print_name(void);
/// @brief String length getter
/// @param str the string.
@@ -195,14 +195,14 @@ size_t strlen(_Nonnull caddr_t str);
/// @return
size_t strcmp(_Nonnull caddr_t src, _Nonnull caddr_t cmp);
-typedef void (*cb_proc_t)();
+typedef void (*nb_proc_t)();
/// \brief ASCII character.
typedef char ascii_char_t;
/// @brief Linear Executable Header
/// @author Amlal El Mahrouss (Amlal El Mahrouss)
-struct __attribute__((aligned(4))) cb_boot_header {
+struct __attribute__((aligned(4))) nb_boot_header {
const ascii_char_t h_mag[2]; // magic number
const ascii_char_t h_name[10]; // operating system name
const uint32_t h_revision; // firmware revision
diff --git a/include/fd.h b/include/fd.h
index c1dfff4..f0d99a3 100644
--- a/include/fd.h
+++ b/include/fd.h
@@ -22,9 +22,9 @@ typedef struct _nb_file_descriptor {
int (*f_rewind)(struct _nb_file_descriptor* self);
int (*f_eof)(struct _nb_file_descriptor* self);
int (*f_close)(struct _nb_file_descriptor* self);
-} cb_file_descriptor_t;
+} nb_file_descriptor_t;
/// @brief Grabs a new device reference.
/// @param path the device path.
/// @return
-cb_file_descriptor_t* cb_grab_fd(const char* path);
+nb_file_descriptor_t* nb_grab_fd(const char* path);
diff --git a/include/mp-bit.h b/include/mp-bit.h
index 58111a3..8298084 100644
--- a/include/mp-bit.h
+++ b/include/mp-bit.h
@@ -9,10 +9,10 @@
/// Name: NeBoot Bits API.
/// Purpose: Bit manip helpers.
-#define cb_set_bit(X, O) X = (1 << O) | X
-#define cb_clear_bit(X, O) X = ~(1 << O) & X
-#define cb_toogle(X, O) X = (1 << O) ^ X
-#define cb_lsb(X) X = X & -X
-#define cb_msb(X) X = -(cb_lsb(X)) & X
+#define nb_set_bit(X, O) X = (1 << O) | X
+#define nb_clear_bit(X, O) X = ~(1 << O) & X
+#define nb_toogle(X, O) X = (1 << O) ^ X
+#define nb_lsb(X) X = X & -X
+#define nb_msb(X) X = -(nb_lsb(X)) & X
#endif // ifndef __BITMANIP_H__
diff --git a/include/partition-map.h b/include/partition-map.h
index c3088fe..e12181b 100644
--- a/include/partition-map.h
+++ b/include/partition-map.h
@@ -91,14 +91,14 @@ enum {
};
/// @brief check for supported filesystem.
-boolean cb_filesystem_exists(caddr_t fs, size_t len);
+boolean nb_filesystem_exists(caddr_t fs, size_t len);
/// @brief Parse EPM block from blob.
-bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba,
+bool nb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba,
size_t* start_lba, size_t* sector_sz);
/// @brief Parse Partition block info at index.
/// @param index the partition block to parse.
-part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index);
+part_block_t* nb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index);
#endif // ifndef __PARTITION_MAP_H__
diff --git a/include/pci-tree.h b/include/pci-tree.h
index 574cd1d..b4fd500 100644
--- a/include/pci-tree.h
+++ b/include/pci-tree.h
@@ -22,7 +22,7 @@
#define NB_PCI_VERSION (0x0100)
#define NB_PCI_DEV_MAGIC (0xfeedd00d)
-#define NB_PCI_INT_SZ sizeof(cb_pci_num_t)
+#define NB_PCI_INT_SZ sizeof(nb_pci_num_t)
#define NB_PCI_NAME_LEN (255U)
@@ -32,37 +32,37 @@
#define PCI_DEV_MAX (32U)
#define PCI_FN_MAX (8U
-typedef char cb_pci_char_t;
-typedef uintptr_t cb_pci_num_t;
+typedef char nb_pci_char_t;
+typedef uintptr_t nb_pci_num_t;
-typedef uint8_t cb_pci_fn_t;
-typedef uint8_t cb_pci_bus_t;
-typedef uint8_t cb_pci_device_t;
+typedef uint8_t nb_pci_fn_t;
+typedef uint8_t nb_pci_bus_t;
+typedef uint8_t nb_pci_device_t;
/// @brief hardware tree header
/// used by guest to resolve hardware peripherals.
struct hw_nb_pci_tree {
- cb_pci_num_t d_magic;
- cb_pci_num_t d_version;
- cb_pci_num_t d_off_props;
- cb_pci_num_t d_off_struct;
- cb_pci_num_t d_sz_props;
- cb_pci_num_t d_sz_struct;
+ nb_pci_num_t d_magic;
+ nb_pci_num_t d_version;
+ nb_pci_num_t d_off_props;
+ nb_pci_num_t d_off_struct;
+ nb_pci_num_t d_sz_props;
+ nb_pci_num_t d_sz_struct;
- cb_pci_num_t d_first_node;
- cb_pci_num_t d_next_sibling;
+ nb_pci_num_t d_first_node;
+ nb_pci_num_t d_next_sibling;
- cb_pci_char_t d_name[NB_PCI_NAME_LEN];
+ nb_pci_char_t d_name[NB_PCI_NAME_LEN];
};
/// @brief Init PCI tree.
/// @param void
/// @return if it's successful or not.
-boolean cb_pci_init_tree(void);
+boolean nb_pci_init_tree(void);
/// @brief Adds a new tree into the internal data structure.
/// @param name device name
/// @param struct_ptr device structure
/// @param struct_sz the structure size of the device.
/// @return if it was successful or not.
-boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz);
+boolean nb_pci_append_tree(const caddr_t name, nb_pci_num_t struct_ptr, nb_pci_num_t struct_sz);
diff --git a/libfdt/libfdt.h b/libfdt/libfdt.h
index 1e53e1d..a48e4bf 100644
--- a/libfdt/libfdt.h
+++ b/libfdt/libfdt.h
@@ -45,7 +45,7 @@ struct fdt_header {
fdt32_t off_dt_strings; /* offset to strings */
fdt32_t off_mem_rsvmap; /* offset to memory reserve map */
fdt32_t version; /* format version */
- fdt32_t last_cocb_version; /* last compatible version */
+ fdt32_t last_conb_version; /* last compatible version */
/* version 2 fields below */
fdt32_t boot_cpuid_phys; /* Which physical CPU id we're
@@ -154,7 +154,7 @@ int fdt_next_subnode(const void* fdt, int offset);
#define fdt_off_dt_strings(fdt) (fdt_get_header(fdt, off_dt_strings))
#define fdt_off_mem_rsvmap(fdt) (fdt_get_header(fdt, off_mem_rsvmap))
#define fdt_version(fdt) (fdt_get_header(fdt, version))
-#define fdt_last_cocb_version(fdt) (fdt_get_header(fdt, last_cocb_version))
+#define fdt_last_conb_version(fdt) (fdt_get_header(fdt, last_conb_version))
#define fdt_boot_cpuid_phys(fdt) (fdt_get_header(fdt, boot_cpuid_phys))
#define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings))
#define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct))
@@ -171,7 +171,7 @@ fdt_set_hdr_(off_dt_struct);
fdt_set_hdr_(off_dt_strings);
fdt_set_hdr_(off_mem_rsvmap);
fdt_set_hdr_(version);
-fdt_set_hdr_(last_cocb_version);
+fdt_set_hdr_(last_conb_version);
fdt_set_hdr_(boot_cpuid_phys);
fdt_set_hdr_(size_dt_strings);
fdt_set_hdr_(size_dt_struct);
diff --git a/libfdt/libfdt_strerror.c b/libfdt/libfdt_strerror.c
index e9a56b3..5c067b5 100644
--- a/libfdt/libfdt_strerror.c
+++ b/libfdt/libfdt_strerror.c
@@ -20,7 +20,7 @@ struct fdt_err {
.e_str = #VAL, \
}
-static struct fdt_err cb_fdtErrTbl[] = {
+static struct fdt_err nb_fdtErrTbl[] = {
fdt_error(FDT_ERR_NOTFOUND), fdt_error(FDT_ERR_EXISTS), fdt_error(FDT_ERR_NOSPACE),
fdt_error(FDT_ERR_BADOFFSET), fdt_error(FDT_ERR_BADPATH), fdt_error(FDT_ERR_BADPHANDLE),
@@ -32,7 +32,7 @@ static struct fdt_err cb_fdtErrTbl[] = {
fdt_error(FDT_ERR_NOPHANDLES), fdt_error(FDT_ERR_BADFLAGS), fdt_error(FDT_ERR_ALIGNMENT),
};
-#define fdt_error_length() mpux_array_size(cb_fdtErrTbl)
+#define fdt_error_length() mpux_array_size(nb_fdtErrTbl)
/// @brief Returns the error value as a string.
/// @param errval
@@ -43,7 +43,7 @@ const char* fdt_strerror(int32_t errval) {
} else if (errval == 0) {
return ("<no error>");
} else if (-errval < fdt_error_length()) {
- const char* serr = cb_fdtErrTbl[errval].e_str;
+ const char* serr = nb_fdtErrTbl[errval].e_str;
if (serr != null) {
return serr;
diff --git a/src/arm64/arm64-30pin.c b/src/arm64/arm64-30pin.c
index 1ab6bc4..c9cbef8 100644
--- a/src/arm64/arm64-30pin.c
+++ b/src/arm64/arm64-30pin.c
@@ -6,4 +6,20 @@
#include <include/30pin.h>
#include <include/partition-map.h>
-extern size_t cb_read_30pin(voidptr_t blob, size_t* size, size_t* start_lba);
+size_t nb_parse_30pin(voidptr_t blob, size_t* size, size_t* start_lba)
+{
+ struct _nb_tpin_recovery_packet* pckt = (struct _nb_tpin_recovery_packet*)blob;
+
+ if (pckt == nil) {
+ return 0;
+ }
+
+ if (pckt->mag[0] != NB_30PIN_MAG[0] || pckt->mag[1] != NB_30PIN_MAG[1]) {
+ return 0;
+ }
+
+ *size = NB_30PIN_BUFFER_LEN;
+ *start_lba = 0;
+
+ return *size;
+} \ No newline at end of file
diff --git a/src/arm64/arm64-boot.S b/src/arm64/arm64-boot.S
index 087aeb8..8327b52 100644
--- a/src/arm64/arm64-boot.S
+++ b/src/arm64/arm64-boot.S
@@ -5,10 +5,10 @@
------------------------------------------- */
.section .text
-.global cb_reset_vector
-cb_reset_vector:
+.global nb_reset_vector
+nb_reset_vector:
ldr x0, =0x40080000
mov sp, x0
- b cb_start_exec
+ b nb_start_exec
diff --git a/src/arm64/arm64-err.c b/src/arm64/arm64-err.c
index dd28eb5..5a7c801 100644
--- a/src/arm64/arm64-err.c
+++ b/src/arm64/arm64-err.c
@@ -9,10 +9,10 @@
/// @brief Goes into a panic state.
/// @param reason why?
-void cb_panic(const char* reason) {
- cb_put_string("panic: ");
- cb_put_string(reason);
- cb_put_char('\n');
+void nb_panic(const char* reason) {
+ nb_put_string("panic: ");
+ nb_put_string(reason);
+ nb_put_char('\n');
while (yes) {
asm volatile("hlt #0");
diff --git a/src/arm64/arm64-start-context.S b/src/arm64/arm64-start-context.S
index 8ffae5f..1e2c3e1 100644
--- a/src/arm64/arm64-start-context.S
+++ b/src/arm64/arm64-start-context.S
@@ -6,11 +6,11 @@
.text
.balign 4
-.global cb_start_context
-.global cb_boot_processor_ready
+.global nb_start_context
+.global nb_boot_processor_ready
-cb_start_context:
- bl cb_start_context
+nb_start_context:
+ bl nb_start_context
-cb_boot_processor_ready:
- bl cb_boot_processor_ready
+nb_boot_processor_ready:
+ bl nb_boot_processor_ready
diff --git a/src/arm64/arm64-uart.c b/src/arm64/arm64-uart.c
index d0fe333..461a9ce 100644
--- a/src/arm64/arm64-uart.c
+++ b/src/arm64/arm64-uart.c
@@ -8,21 +8,21 @@
/// BUGS: 0
-#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*) (cb_uart_ptr + addr))
+#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*) (nb_uart_ptr + addr))
/* this file handles the UART */
-static uint32_t* cb_uart_ptr = (uint32_t*) NB_UART_BASE;
+static uint32_t* nb_uart_ptr = (uint32_t*) NB_UART_BASE;
-/// @brief Retrieve character from cb_uart_ptr
-utf_char_t cb_get_char(void) {
+/// @brief Retrieve character from nb_uart_ptr
+utf_char_t nb_get_char(void) {
while ((ARM64_MMIO_REG(0x018) & (1 << 4))) {
}
return (utf_char_t) ARM64_MMIO_REG(0x0) & 0xFF;
}
-void cb_put_char(utf_char_t ch) {
+void nb_put_char(utf_char_t ch) {
while ((ARM64_MMIO_REG(0x018) & (1 << 5))) {
}
@@ -31,13 +31,13 @@ void cb_put_char(utf_char_t ch) {
/// @brief UART put string
/// @param text the input text.
-size_t cb_put_string(const char* text) {
+size_t nb_put_string(const char* text) {
if (text == nil) return 0;
size_t i = 0;
for (; i < strlen(text); i++) {
- cb_put_char(text[i]);
+ nb_put_char(text[i]);
}
return i;
diff --git a/src/arm64/script.lds b/src/arm64/script.lds
index 6daad64..1200f6d 100644
--- a/src/arm64/script.lds
+++ b/src/arm64/script.lds
@@ -1,4 +1,4 @@
-ENTRY(cb_reset_vector)
+ENTRY(nb_reset_vector)
SECTIONS
{
diff --git a/src/hal/neboot-ahci-driver.c b/src/hal/neboot-ahci-driver.c
index ff5f630..c18a4fc 100644
--- a/src/hal/neboot-ahci-driver.c
+++ b/src/hal/neboot-ahci-driver.c
@@ -23,7 +23,7 @@
/// @brief Generic AHCI support.
/// @brief AHCI HBA port.
-typedef struct cb_hba_port {
+typedef struct nb_hba_port {
uint32_t clb; // 0x00, command list base address, 1K-byte aligned
uint32_t clbu; // 0x04, command list base address upper 32 bits
uint32_t fb; // 0x08, FIS base address, 256-byte aligned
@@ -43,12 +43,12 @@ typedef struct cb_hba_port {
uint32_t fbs; // 0x40, FIS-based switch control
uint32_t reserved1[11]; // 0x44 ~ 0x6F, Reserved
uint32_t vendor[4]; // 0x70 ~ 0x7F, vendor specific
-} cb_hba_port_t;
+} nb_hba_port_t;
/// @brief Check if port is active.
/// @param port host bus address port.
/// @return whether sact is active or not.
-static boolean cb_hba_port_active(volatile cb_hba_port_t* port) {
+static boolean nb_hba_port_active(volatile nb_hba_port_t* port) {
if (!port) return false;
return port->sact;
@@ -57,7 +57,7 @@ static boolean cb_hba_port_active(volatile cb_hba_port_t* port) {
/// @brief Start HBA command processor.
/// @param port host bus address port.
/// @return whether it was successful or not.
-static boolean cb_hba_start_cmd(volatile cb_hba_port_t* port) {
+static boolean nb_hba_start_cmd(volatile nb_hba_port_t* port) {
if (!port) return false;
size_t timeout = 1000000;
@@ -77,7 +77,7 @@ static boolean cb_hba_start_cmd(volatile cb_hba_port_t* port) {
/// @brief Stop HBA command from processing.
/// @param port host bus address port.
/// @return whether it was successful or not.
-static boolean cb_hba_stop_cmd(volatile cb_hba_port_t* port) {
+static boolean nb_hba_stop_cmd(volatile nb_hba_port_t* port) {
if (!port) return false;
port->cmd &= ~0x0001;
diff --git a/src/neboot-cpu-api.c b/src/neboot-cpu-api.c
index 3746163..a3209aa 100644
--- a/src/neboot-cpu-api.c
+++ b/src/neboot-cpu-api.c
@@ -7,7 +7,7 @@
/// @brief Restarts the computer.
/// @param none.
-void cb_restart_machine(void) {
+void nb_restart_machine(void) {
#ifdef __COMPILE_RISCV__
volatile uint32_t* brd_pwr = (volatile uint32_t*) 0x100000;
*brd_pwr = 0x7777; // send reboot signal from DMA.
diff --git a/src/neboot-cxx-abi.cc b/src/neboot-cxx-abi.cc
index b4d74e3..1482487 100644
--- a/src/neboot-cxx-abi.cc
+++ b/src/neboot-cxx-abi.cc
@@ -7,24 +7,24 @@
/// BUGS: 0
-extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
-extern "C" void cb_panic(const char* reason);
+extern "C" __SIZE_TYPE__ nb_put_string(const char* text);
+extern "C" void nb_panic(const char* reason);
extern "C" void __stack_chk_fail() {
- cb_put_string("[stack-canary] Buffer overflow detected, halting...\n");
- cb_panic("stack_canary_fail");
+ nb_put_string("[stack-canary] Buffer overflow detected, halting...\n");
+ nb_panic("stack_canary_fail");
}
void* __dso_handle;
-extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
-extern "C" void cb_panic(const char* reason);
+extern "C" __SIZE_TYPE__ nb_put_string(const char* text);
+extern "C" void nb_panic(const char* reason);
atexit_func_entry_t __atexit_funcs[DSO_MAX_OBJECTS];
uarch_t __atexit_func_count;
extern "C" void __cxa_pure_virtual() {
- cb_put_string("[__cxa_pure_virtual] Placeholder\n");
+ nb_put_string("[__cxa_pure_virtual] Placeholder\n");
}
extern "C" int __cxa_atexit(void (*f)(void*), void* arg, void* dso) {
diff --git a/src/neboot-partition-map-parse.c b/src/neboot-partition-map-parse.c
index 4ec9a30..e59fcde 100644
--- a/src/neboot-partition-map-parse.c
+++ b/src/neboot-partition-map-parse.c
@@ -5,7 +5,7 @@
#include <include/partition-map.h>
-bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba,
+bool nb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba,
size_t* start_lba, size_t* sector_sz) {
if (!start_lba || !end_lba || !blob || !blob_sz || !sector_sz ||
(sizeof(part_block_t) * index) > blob_sz)
@@ -25,12 +25,12 @@ bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t ind
return true;
}
-part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index) {
+part_block_t* nb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index) {
if (!blob || !blob_sz || (sizeof(part_block_t) * index) > blob_sz) return nil;
part_block_t* block = (part_block_t*) (blob + (sizeof(part_block_t) * index));
- cb_put_string(block->magic);
+ nb_put_string(block->magic);
if (block->version != EPM_REVISION || block->num_blocks < 1 || block->num_blocks > EPM_MAX_BLKS ||
strcmp(block->magic, EPM_MAGIC) > 0 || block->lba_end == 0 || block->lba_start == 0) {
diff --git a/src/neboot-partition-map.c b/src/neboot-partition-map.c
index 5f5a59e..4b2c332 100644
--- a/src/neboot-partition-map.c
+++ b/src/neboot-partition-map.c
@@ -13,7 +13,7 @@
/// @brief check if filesystem is supported by NeBoot.
/// @param fs the filesystem magic, as provided by EPM.
-boolean cb_filesystem_exists(caddr_t fs, size_t len) {
+boolean nb_filesystem_exists(caddr_t fs, size_t len) {
if (fs == nil || *fs == 0) return no;
char* fs_list[] = NB_FILESYSTEM_LIST;
diff --git a/src/neboot-pci-tree.c b/src/neboot-pci-tree.c
index 6c2d0cc..47012f1 100644
--- a/src/neboot-pci-tree.c
+++ b/src/neboot-pci-tree.c
@@ -22,36 +22,36 @@
/// Standard Root table (Mahrouss Table)
#define NB_PCI_ROOT_NAME "/pci-tree/@/"
-static struct hw_nb_pci_tree* cb_base_tree = nil;
-static struct hw_nb_pci_tree* cb_latest_tree = nil;
-static struct hw_nb_pci_tree* cb_last_tree = nil;
+static struct hw_nb_pci_tree* nb_base_tree = nil;
+static struct hw_nb_pci_tree* nb_latest_tree = nil;
+static struct hw_nb_pci_tree* nb_last_tree = nil;
/// \brief Init the PCI device tree structure.
/// \return if it already exists -> false
/// Otherwise true.
-boolean cb_pci_init_tree(void) {
- cb_base_tree = (struct hw_nb_pci_tree*) (NB_PCI_TREE_BASE);
+boolean nb_pci_init_tree(void) {
+ nb_base_tree = (struct hw_nb_pci_tree*) (NB_PCI_TREE_BASE);
// huh? anyway let's ignore it then.
- if (cb_base_tree->d_magic != NB_PCI_DEV_MAGIC) {
- cb_base_tree->d_magic = NB_PCI_DEV_MAGIC;
+ if (nb_base_tree->d_magic != NB_PCI_DEV_MAGIC) {
+ nb_base_tree->d_magic = NB_PCI_DEV_MAGIC;
- memncpy(cb_base_tree->d_name, NB_PCI_ROOT_NAME, strlen(NB_PCI_ROOT_NAME));
+ memncpy(nb_base_tree->d_name, NB_PCI_ROOT_NAME, strlen(NB_PCI_ROOT_NAME));
- cb_base_tree->d_next_sibling = 0;
- cb_base_tree->d_off_props = 0;
- cb_base_tree->d_sz_struct = 0;
- cb_base_tree->d_sz_props = 0;
- cb_base_tree->d_off_struct = 0;
- cb_base_tree->d_version = NB_PCI_VERSION;
+ nb_base_tree->d_next_sibling = 0;
+ nb_base_tree->d_off_props = 0;
+ nb_base_tree->d_sz_struct = 0;
+ nb_base_tree->d_sz_props = 0;
+ nb_base_tree->d_off_struct = 0;
+ nb_base_tree->d_version = NB_PCI_VERSION;
- cb_base_tree->d_next_sibling = (cb_pci_num_t) (cb_base_tree + sizeof(struct hw_nb_pci_tree));
- cb_base_tree->d_first_node = (cb_pci_num_t) cb_base_tree;
+ nb_base_tree->d_next_sibling = (nb_pci_num_t) (nb_base_tree + sizeof(struct hw_nb_pci_tree));
+ nb_base_tree->d_first_node = (nb_pci_num_t) nb_base_tree;
- cb_put_string(">> Append root device: " NB_PCI_ROOT_NAME "\r\n");
+ nb_put_string(">> Append root device: " NB_PCI_ROOT_NAME "\r\n");
}
- cb_latest_tree = cb_base_tree;
+ nb_latest_tree = nb_base_tree;
return yes;
}
@@ -60,36 +60,36 @@ boolean cb_pci_init_tree(void) {
/// \param name the device name.
/// \param struct_ptr the struct containing the device.
/// \param struct_sz the structure size.
-boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz) {
- if (!name || *name == 0 || cb_latest_tree == nil) return no;
+boolean nb_pci_append_tree(const caddr_t name, nb_pci_num_t struct_ptr, nb_pci_num_t struct_sz) {
+ if (!name || *name == 0 || nb_latest_tree == nil) return no;
- struct hw_nb_pci_tree* cb_pci_tree = (struct hw_nb_pci_tree*) (cb_latest_tree);
+ struct hw_nb_pci_tree* nb_pci_tree = (struct hw_nb_pci_tree*) (nb_latest_tree);
- while (cb_pci_tree->d_magic == NB_PCI_DEV_MAGIC) {
- if (strcmp(cb_pci_tree->d_name, name) == 0) return no;
+ while (nb_pci_tree->d_magic == NB_PCI_DEV_MAGIC) {
+ if (strcmp(nb_pci_tree->d_name, name) == 0) return no;
- cb_pci_tree = (struct hw_nb_pci_tree*) (cb_pci_tree + sizeof(struct hw_nb_pci_tree));
+ nb_pci_tree = (struct hw_nb_pci_tree*) (nb_pci_tree + sizeof(struct hw_nb_pci_tree));
}
- cb_pci_tree->d_magic = NB_PCI_DEV_MAGIC;
+ nb_pci_tree->d_magic = NB_PCI_DEV_MAGIC;
- memncpy(cb_pci_tree->d_name, name, strlen(name));
+ memncpy(nb_pci_tree->d_name, name, strlen(name));
- cb_pci_tree->d_off_struct = struct_ptr;
- cb_pci_tree->d_sz_struct = struct_sz;
- cb_pci_tree->d_off_props = 0;
- cb_pci_tree->d_sz_props = 0;
- cb_pci_tree->d_version = NB_PCI_VERSION;
+ nb_pci_tree->d_off_struct = struct_ptr;
+ nb_pci_tree->d_sz_struct = struct_sz;
+ nb_pci_tree->d_off_props = 0;
+ nb_pci_tree->d_sz_props = 0;
+ nb_pci_tree->d_version = NB_PCI_VERSION;
- cb_pci_tree->d_next_sibling = (cb_pci_num_t) (cb_pci_tree + sizeof(struct hw_nb_pci_tree));
- cb_pci_tree->d_first_node = (cb_pci_num_t) cb_latest_tree;
+ nb_pci_tree->d_next_sibling = (nb_pci_num_t) (nb_pci_tree + sizeof(struct hw_nb_pci_tree));
+ nb_pci_tree->d_first_node = (nb_pci_num_t) nb_latest_tree;
- cb_latest_tree = cb_pci_tree;
- cb_last_tree = cb_pci_tree;
+ nb_latest_tree = nb_pci_tree;
+ nb_last_tree = nb_pci_tree;
- cb_put_string(">> Append device: ");
- cb_put_string(name);
- cb_put_string("\r\n");
+ nb_put_string(">> Append device: ");
+ nb_put_string(name);
+ nb_put_string("\r\n");
return yes;
}
diff --git a/src/neboot-print-name.c b/src/neboot-print-name.c
index bf27ead..6e4ee92 100644
--- a/src/neboot-print-name.c
+++ b/src/neboot-print-name.c
@@ -7,20 +7,20 @@
/// @brief Print firmware name.
/// @param
-void cb_print_name(void) {
+void nb_print_name(void) {
#ifdef __COMPILE_POWERPC__
- cb_put_string(">> NeBoot for POWERPC.\r\n");
+ nb_put_string(">> NeBoot for POWERPC.\r\n");
#endif // __COMPILE_POWERPC__
#ifdef __COMPILE_ARM64__
- cb_put_string(">> NeBoot for ARM64.\r\n");
+ nb_put_string(">> NeBoot for ARM64.\r\n");
#endif // __COMPILE_POWERPC__
#ifdef __COMPILE_AMD64__
- cb_put_string(">> NeBoot for AMD64.\r\n");
+ nb_put_string(">> NeBoot for AMD64.\r\n");
#endif // __COMPILE_POWERPC__
#ifdef __COMPILE_RISCV__
- cb_put_string(">> NeBoot for RISC-V.\r\n");
+ nb_put_string(">> NeBoot for RISC-V.\r\n");
#endif // __COMPILE_POWERPC__
}
diff --git a/src/neboot-start.c b/src/neboot-start.c
index 8199723..4fef132 100644
--- a/src/neboot-start.c
+++ b/src/neboot-start.c
@@ -21,10 +21,10 @@
/////////////////////////////////////////////////////////////////////////////////////////
-extern void cb_start_context(uintptr_t);
-extern void cb_start_rom(void);
+extern void nb_start_context(uintptr_t);
+extern void nb_start_rom(void);
-extern int cb_boot_processor_ready;
+extern int nb_boot_processor_ready;
/// @brief hardware thread counter (rv64 only)
#ifdef __COMPILE_RISCV__
@@ -33,7 +33,7 @@ uint64_t __nb_hart_counter = 0UL;
/// @brief Start executing the firmware.
/// @param
-void cb_start_exec(void) {
+void nb_start_exec(void) {
#ifndef __COMPILE_RISCV__
static uint64_t __nb_hart_counter = 0UL;
#endif
@@ -44,34 +44,34 @@ void cb_start_exec(void) {
// let the hart 0 init our stuff.
if (hart == 0) {
- cb_put_string("NB> Welcome to NeBoot, (c) Amlal El Mahrouss. Built the ");
- cb_put_string(__DATE__);
- cb_put_string("\r\r\n");
+ nb_put_string("NB> Welcome to NeBoot, (c) Amlal El Mahrouss. Built the ");
+ nb_put_string(__DATE__);
+ nb_put_string("\r\r\n");
#ifdef __COMPILE_POWERPC__
- cb_put_string("NB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
+ nb_put_string("NB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
#endif // __COMPILE_POWERPC__
#ifdef __COMPILE_AMD64__
- cb_put_string("NB> CPU: x64 Based SoC.\r\r\n");
+ nb_put_string("NB> CPU: x64 Based SoC.\r\r\n");
#endif // __COMPILE_AMD64__
#ifdef __COMPILE_ARM64__
- cb_put_string("NB> CPU: AArch64 Based SoC.\r\r\n");
+ nb_put_string("NB> CPU: AArch64 Based SoC.\r\r\n");
#endif // __COMPILE_ARM64__
#ifdef __COMPILE_ARM32__
- cb_put_string("NB> CPU: AArch32 Based SoC.\r\r\n");
+ nb_put_string("NB> CPU: AArch32 Based SoC.\r\r\n");
#endif // __COMPILE_ARM64__
#ifdef __COMPILE_RISCV__
- cb_put_string("NB> CPU: RV64 Based SoC.\r\r\n");
+ nb_put_string("NB> CPU: RV64 Based SoC.\r\r\n");
#endif // __COMPILE_RISCV__
}
/// @brief Boots here if LX header matches what we except.
- volatile struct cb_boot_header* boot_hdr = (volatile struct cb_boot_header*) (NB_FLASH_BASE_ADDR);
+ volatile struct nb_boot_header* boot_hdr = (volatile struct nb_boot_header*) (NB_FLASH_BASE_ADDR);
/**
boot if:
@@ -88,59 +88,59 @@ void cb_start_exec(void) {
if (rev != NB_BOOT_VER) {
if (hart == 0) {
- cb_put_string("NB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
+ nb_put_string("NB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
}
} else {
if (hart == 0) {
- cb_pci_append_tree("@stage2-lx", (cb_pci_num_t) boot_hdr, sizeof(struct cb_boot_header));
+ nb_pci_append_tree("@stage2-lx", (nb_pci_num_t) boot_hdr, sizeof(struct nb_boot_header));
- cb_put_string("NB> Executing StageTwo: ");
- cb_put_string((const char*) boot_hdr->h_name);
- cb_put_char('\r');
- cb_put_char('\n');
+ nb_put_string("NB> Executing StageTwo: ");
+ nb_put_string((const char*) boot_hdr->h_name);
+ nb_put_char('\r');
+ nb_put_char('\n');
// printf("NB> address: %x\n", boot_hdr->h_start_address);
}
if (boot_hdr->h_start_address != 0) {
- cb_boot_processor_ready = 1;
- cb_start_context(boot_hdr->h_start_address);
- cb_boot_processor_ready = 0;
+ nb_boot_processor_ready = 1;
+ nb_start_context(boot_hdr->h_start_address);
+ nb_boot_processor_ready = 0;
}
- cb_put_string("NB> StageTwo has returned? (CB0002)\r\n");
+ nb_put_string("NB> StageTwo has returned? (CB0002)\r\n");
}
} else {
- cb_put_string("NB> Trying EPM partition...\r\n");
+ nb_put_string("NB> Trying EPM partition...\r\n");
part_block_t* blk =
- cb_parse_partition_block_at((voidptr_t) NB_FLASH_BASE_ADDR, EPM_PART_BLK_SZ, 0);
+ nb_parse_partition_block_at((voidptr_t) NB_FLASH_BASE_ADDR, EPM_PART_BLK_SZ, 0);
if (blk) {
- cb_pci_append_tree("@stage2-epm", (cb_pci_num_t) blk, sizeof(part_block_t) * blk->num_blocks);
+ nb_pci_append_tree("@stage2-epm", (nb_pci_num_t) blk, sizeof(part_block_t) * blk->num_blocks);
size_t indx = 0;
size_t end_lba, start_lba, sector_sz;
while (indx < blk->num_blocks) {
- if (cb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba,
+ if (nb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba,
&start_lba, &sector_sz) == no) {
++indx;
continue;
}
- cb_boot_processor_ready = 1;
- cb_start_context((uintptr_t) (voidptr_t) blk + start_lba);
- cb_boot_processor_ready = 0;
+ nb_boot_processor_ready = 1;
+ nb_start_context((uintptr_t) (voidptr_t) blk + start_lba);
+ nb_boot_processor_ready = 0;
if (hart == 1) {
- cb_put_string("NB> Can't boot to StageTwo. (CB0001)\r\n");
+ nb_put_string("NB> Can't boot to StageTwo. (CB0001)\r\n");
}
}
}
if (hart == 1) {
- cb_put_string(
+ nb_put_string(
"NB> Can't boot to StageTwo via EPM, no bootable partition blocks found. (CB0001)\r\n");
}
}
@@ -149,7 +149,7 @@ void cb_start_exec(void) {
while (yes) {
if (__nb_hart_counter == 0) {
- cb_restart_machine();
+ nb_restart_machine();
}
}
}
diff --git a/src/ppc64/linkscript.ld b/src/ppc64/linkscript.ld
index 660ed07..e23df04 100644
--- a/src/ppc64/linkscript.ld
+++ b/src/ppc64/linkscript.ld
@@ -1,4 +1,4 @@
-ENTRY(cb_reset_vector)
+ENTRY(nb_reset_vector)
SECTIONS
{
. = 0xf00000;
@@ -11,5 +11,5 @@ SECTIONS
. = . + 0x1000; /* 4kB of stack memory */
stack_top = .;
- PROVIDE(cb_memory_end = .);
+ PROVIDE(nb_memory_end = .);
}
diff --git a/src/ppc64/ppc64-boot.S b/src/ppc64/ppc64-boot.S
index 6fb2a79..33cbd01 100644
--- a/src/ppc64/ppc64-boot.S
+++ b/src/ppc64/ppc64-boot.S
@@ -6,9 +6,9 @@
.balign 4
.section .text
-.global cb_reset_vector
+.global nb_reset_vector
-cb_reset_vector:
+nb_reset_vector:
bl .Laddr /* get current address */
.Laddr:
mflr 4 /* real address of .Laddr */
@@ -22,27 +22,27 @@ cb_reset_vector:
/* Let her rip */
- bl cb_init_hw
+ bl nb_init_hw
/* finally execute the firmware */
- bl cb_start_exec
+ bl nb_start_exec
/* return value from main is argument to exit */
- bl cb_reset_vector
+ bl nb_reset_vector
trap
-.global cb_start_rom
-.global cb_start_context
-.global cb_boot_processor_ready
+.global nb_start_rom
+.global nb_start_context
+.global nb_boot_processor_ready
.equ NB_BOOT_ADDR, 0x1030000
-cb_start_rom:
+nb_start_rom:
lis 3, NB_BOOT_ADDR@h
addi 3, 3, NB_BOOT_ADDR@l
blr
-cb_start_context:
+nb_start_context:
li 4, 0
cmp 0, 0, 4, 3
blt run_context
@@ -57,5 +57,5 @@ run_context:
.data
-cb_boot_processor_ready:
+nb_boot_processor_ready:
.word 0
diff --git a/src/ppc64/ppc64-err.c b/src/ppc64/ppc64-err.c
index 91588a7..6ade80a 100644
--- a/src/ppc64/ppc64-err.c
+++ b/src/ppc64/ppc64-err.c
@@ -9,10 +9,10 @@
/// @brief Goes into a panic state.
/// @param reason why?
-void cb_panic(const char* reason) {
- cb_put_string("Error: ");
- cb_put_string(reason);
- cb_put_char('\n');
+void nb_panic(const char* reason) {
+ nb_put_string("Error: ");
+ nb_put_string(reason);
+ nb_put_char('\n');
while (yes) {
(void) 0;
diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
index b476ddb..07d397b 100644
--- a/src/ppc64/ppc64-hal.c
+++ b/src/ppc64/ppc64-hal.c
@@ -9,17 +9,17 @@
#include <include/boot.h>
#include <include/pci-tree.h>
-void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7) {
+void nb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7) {
mtspr(MAS0, mas0);
mtspr(MAS1, mas1);
mtspr(MAS2, mas2);
mtspr(MAS3, mas3);
mtspr(MAS7, mas7);
- cb_flush_tlb();
+ nb_flush_tlb();
}
-void cb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts,
+void nb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts,
uint8_t esel, uint8_t tsize, uint8_t iprot) {
if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1)) {
// this mmu-version does not allow odd tsize values
@@ -32,15 +32,15 @@ void cb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t
uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
uint32_t mas7 = FSL_BOOKE_MAS7(rpn);
- cb_write_tlb(mas0, mas1, mas2, mas3, mas7);
+ nb_write_tlb(mas0, mas1, mas2, mas3, mas7);
}
/// @brief Init hardware before jumping to kernel.
/// @param
-void cb_init_hw(void) {
+void nb_init_hw(void) {
/// amlal:
/// map VGA framebuffer
- cb_set_tlb(0, NB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
+ nb_set_tlb(0, NB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
0x0000A000, /* p_addr. 0x0000A0000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -51,7 +51,7 @@ void cb_init_hw(void) {
// map ccsrbar and uart.
// at start we execute from esel = 0, so chose something else..
- cb_set_tlb(1, NB_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
+ nb_set_tlb(1, NB_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
0xfe0000000, /* p_addr. 0xfe0000000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -62,7 +62,7 @@ void cb_init_hw(void) {
/// amlal:
/// map pci base for kernel
- cb_set_tlb(0, NB_BASE_ADDRESS, /* v_addr, 0xFE008000 */
+ nb_set_tlb(0, NB_BASE_ADDRESS, /* v_addr, 0xFE008000 */
0xFE0008000, /* p_addr. 0xfe0000000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -71,16 +71,16 @@ void cb_init_hw(void) {
BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
1);
- cb_pci_init_tree();
+ nb_pci_init_tree();
- cb_pci_append_tree("@fb", NB_FRAMEBUFFER_ADDR, 0x0);
- cb_pci_append_tree("@mbci", 0x0, 0x0); // did not found a MBCI base for now...
- cb_pci_append_tree("@serial", NB_UART_BASE, 0);
- cb_pci_append_tree("@pci", NB_BASE_ADDRESS, 0x0);
+ nb_pci_append_tree("@fb", NB_FRAMEBUFFER_ADDR, 0x0);
+ nb_pci_append_tree("@mbci", 0x0, 0x0); // did not found a MBCI base for now...
+ nb_pci_append_tree("@serial", NB_UART_BASE, 0);
+ nb_pci_append_tree("@pci", NB_BASE_ADDRESS, 0x0);
- cb_flush_tlb();
+ nb_flush_tlb();
}
-void cb_flush_tlb(void) {
+void nb_flush_tlb(void) {
asm volatile("isync;tlbwe;msync;isync");
};
diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c
index af9c5b3..c081ac7 100644
--- a/src/ppc64/ppc64-uart.c
+++ b/src/ppc64/ppc64-uart.c
@@ -18,23 +18,23 @@ volatile ascii_char_t* const UART0DR = (ascii_char_t*) NB_NS16550_COM1;
/// @brief Get character from UART.
/// @param
/// @return
-utf_char_t cb_get_char(void) {
+utf_char_t nb_get_char(void) {
while (!(*(((volatile uint8_t*) UART0DR) + 0x05) & 0x01));
return (utf_char_t) *UART0DR;
}
/// @brief Put character into UART.
/// @param ch
-void cb_put_char(utf_char_t ch) {
+void nb_put_char(utf_char_t ch) {
*UART0DR = (ascii_char_t) (ch);
}
/// @brief Put string in UART.
/// @param text the input text.
-size_t cb_put_string(const char* text) {
+size_t nb_put_string(const char* text) {
while (*text != '\0') { /* Loop until end of string */
- cb_put_char(*text); /* Transmit char */
+ nb_put_char(*text); /* Transmit char */
text++; /* Next char */
}
diff --git a/src/rv64/rv64-api.s b/src/rv64/rv64-api.s
index 36ea838..0fbf770 100644
--- a/src/rv64/rv64-api.s
+++ b/src/rv64/rv64-api.s
@@ -4,9 +4,9 @@
# // Official repository: https://github.com/nekernel-org/neboot
.balign 4
-.global cb_flush_tlb
+.global nb_flush_tlb
-cb_flush_tlb:
+nb_flush_tlb:
sfence.vma
ret
diff --git a/src/rv64/rv64-boot.s b/src/rv64/rv64-boot.s
index 1c48033..3742eea 100644
--- a/src/rv64/rv64-boot.s
+++ b/src/rv64/rv64-boot.s
@@ -8,27 +8,27 @@
.option norvc
-.extern cb_start_exec
+.extern nb_start_exec
-.global cb_reset_vector
-.global cb_hart_present
+.global nb_reset_vector
+.global nb_hart_present
.section .init
.align 4
-cb_reset_vector:
+nb_reset_vector:
.cfi_startproc
csrr t0, mhartid
- beqz t0, cb_start_exec_asm
+ beqz t0, nb_start_exec_asm
- j cb_start_other
+ j nb_start_other
.cfi_endproc
-cb_start_exec_asm:
+nb_start_exec_asm:
lw t0, __nb_hart_counter
- lw t1, cb_boot_processor_ready
+ lw t1, nb_boot_processor_ready
not t0, t0
@@ -37,11 +37,11 @@ cb_start_exec_asm:
.option push
.option norelax
- la gp, cb_global_pointer
+ la gp, nb_global_pointer
.option pop
- la sp, cb_stack_end
+ la sp, nb_stack_end
la t5, _bss_start
la t6, _bss_end
@@ -52,39 +52,39 @@ crt0_bss_clear:
bgeu t5, t6, crt0_bss_clear
- j cb_start_exec
- j cb_hang
+ j nb_start_exec
+ j nb_hang
-cb_start_other:
- lw t1, cb_boot_processor_ready
+nb_start_other:
+ lw t1, nb_boot_processor_ready
-cb_start_other_wait:
- beq t1, zero, cb_start_other_wait
+nb_start_other_wait:
+ beq t1, zero, nb_start_other_wait
- la t0, cb_stack_list
- ld t1, cb_stack_align
+ la t0, nb_stack_list
+ ld t1, nb_stack_align
mv sp, t0
add t0, zero, t1
- j cb_hang
+ j nb_hang
-.global cb_start_rom
-.global cb_start_context
+.global nb_start_rom
+.global nb_start_context
-cb_start_context:
+nb_start_context:
mv ra, zero
add ra, zero, a1
mret
.equ NB_BOOT_ADDR, 0x80020000
-cb_start_rom:
+nb_start_rom:
li x5, NB_BOOT_ADDR
mv ra, zero
add ra, zero, t0
mret
-cb_hang:
- j cb_start_exec
+nb_hang:
+ j nb_start_exec
L0:
wfi
j L0
@@ -92,16 +92,16 @@ L0:
.bss
.align 4
-cb_hart_present:
+nb_hart_present:
.long 0
.data
.align 4
-cb_stack_list:
- .long cb_memory_end
+nb_stack_list:
+ .long nb_memory_end
-cb_stack_align:
+nb_stack_align:
.word 0x8000
__nb_max_harts:
diff --git a/src/rv64/rv64-err.c b/src/rv64/rv64-err.c
index e1b1ff0..7cdb7ab 100644
--- a/src/rv64/rv64-err.c
+++ b/src/rv64/rv64-err.c
@@ -9,10 +9,10 @@
/// @brief Goes into a panic state.
/// @param reason why?
-void cb_panic(const char* reason) {
- cb_put_string("Error: ");
- cb_put_string(reason);
- cb_put_char('\n');
+void nb_panic(const char* reason) {
+ nb_put_string("Error: ");
+ nb_put_string(reason);
+ nb_put_char('\n');
while (yes) {
asm volatile("wfi");
diff --git a/src/rv64/rv64-uart.c b/src/rv64/rv64-uart.c
index 18e7d89..cbbcb6f 100644
--- a/src/rv64/rv64-uart.c
+++ b/src/rv64/rv64-uart.c
@@ -10,42 +10,42 @@
/* this file handles the UART */
-static uint8_t* cb_uart_ptr = (uint8_t*) NB_UART_BASE;
+static uint8_t* nb_uart_ptr = (uint8_t*) NB_UART_BASE;
-utf_char_t cb_get_char(void) {
+utf_char_t nb_get_char(void) {
uintptr_t ptr = NB_UART_BASE;
while (!(*(((volatile uint8_t*) ptr) + 0x05) & 0x01));
- return (utf_char_t) *cb_uart_ptr;
+ return (utf_char_t) *nb_uart_ptr;
}
// we need that one, to avoid sending mutliple chars to UART.
-static boolean cb_locked_put_char = no;
+static boolean nb_locked_put_char = no;
-void cb_put_char(utf_char_t ch) {
+void nb_put_char(utf_char_t ch) {
int32_t timeout = 0;
- while (cb_locked_put_char) {
+ while (nb_locked_put_char) {
++timeout;
if (timeout > 1000000) break;
}
- cb_locked_put_char = yes;
- *cb_uart_ptr = ch;
- cb_locked_put_char = no;
+ nb_locked_put_char = yes;
+ *nb_uart_ptr = ch;
+ nb_locked_put_char = no;
}
/// @brief UART put string
/// @param text the input text.
-size_t cb_put_string(const char* text) {
+size_t nb_put_string(const char* text) {
if (text == nil) return 0;
size_t i = 0;
for (; i < strlen(text); i++) {
- cb_put_char(text[i]);
+ nb_put_char(text[i]);
}
return i;
diff --git a/src/rv64/script.lds b/src/rv64/script.lds
index ca4e8dc..39decab 100644
--- a/src/rv64/script.lds
+++ b/src/rv64/script.lds
@@ -1,4 +1,4 @@
-ENTRY(cb_reset_vector);
+ENTRY(nb_reset_vector);
. = 0x80000000;
@@ -12,7 +12,7 @@ SECTIONS {
PROVIDE(_text_end = .);
}
- PROVIDE(cb_global_pointer = .);
+ PROVIDE(nb_global_pointer = .);
.bss : ALIGN(4K) {
PROVIDE(_bss_start = .);
@@ -39,8 +39,8 @@ SECTIONS {
PROVIDE(_data_end = .);
}
- PROVIDE(cb_stack_end = . + 0x1000);
+ PROVIDE(nb_stack_end = . + 0x1000);
- PROVIDE(cb_memory_end = .);
- PROVIDE(cb_boot_processor_ready = . + 0x4);
+ PROVIDE(nb_memory_end = .);
+ PROVIDE(nb_boot_processor_ready = . + 0x4);
}