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authorAmlal El Mahrouss <amlal@nekernel.org>2025-07-31 08:57:14 +0100
committerAmlal El Mahrouss <amlal@nekernel.org>2025-07-31 08:57:14 +0100
commit1891d7343a9ac25ab157c4495581a0fcbd7fbcbf (patch)
treec6da72fdf5db30c67c28e968883f869ee57600d0 /lib
parent18d33e155d2f56e59eb49dadbb30ab2f7ac3e852 (diff)
feat! refactor NeBoot for NeKernel.org v1.0.0
Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>
Diffstat (limited to 'lib')
-rw-r--r--lib/30pin.h10
-rw-r--r--lib/boot.h48
-rw-r--r--lib/fd.h2
-rw-r--r--lib/mp-bit.h2
-rw-r--r--lib/pci-tree.h14
-rw-r--r--lib/ppc64/processor.h16
-rw-r--r--lib/xcoff.h2
7 files changed, 47 insertions, 47 deletions
diff --git a/lib/30pin.h b/lib/30pin.h
index 68691b9..7128c3f 100644
--- a/lib/30pin.h
+++ b/lib/30pin.h
@@ -12,11 +12,11 @@
/// @brief 30pin recovery protocol.
/// @details This file contains the definitions and structures used for the 30pin recovery protocol.
-#define CB_30PIN_MAG "TP"
+#define NB_30PIN_MAG "TP"
#define CP_30PIN_MAG_LEN (2)
-#define CB_30PIN_BUFFER_LEN (498)
-#define CB_30PIN_EOP_LEN (11)
+#define NB_30PIN_BUFFER_LEN (498)
+#define NB_30PIN_EOP_LEN (11)
/// @brief 30pin recovery header.
/// @param mag magic number.
@@ -26,8 +26,8 @@
struct _cb_tpin_recovery_packet {
uint8_t mag[CP_30PIN_MAG_LEN];
uint8_t kind;
- uint8_t buffer[CB_30PIN_BUFFER_LEN];
- uint8_t eop[CB_30PIN_EOP_LEN];
+ uint8_t buffer[NB_30PIN_BUFFER_LEN];
+ uint8_t eop[NB_30PIN_EOP_LEN];
};
/// @brief 30pin recovery packet kinds.
diff --git a/lib/boot.h b/lib/boot.h
index cf90766..5aab52b 100644
--- a/lib/boot.h
+++ b/lib/boot.h
@@ -8,7 +8,7 @@
///
/// @file boot.h
-/// @brief CoreBoot types, data structures, and standard library.
+/// @brief NeBoot types, data structures, and standard library.
///
typedef __UINTPTR_TYPE__ uintptr_t;
@@ -66,34 +66,34 @@ typedef ptrtype_t size_t;
#define true yes
#endif //!_cplusplus
-#define CB_RESTART 0
-#define CB_SHUTDOWN 1
+#define NB_RESTART 0
+#define NB_SHUTDOWN 1
#define __COPYRIGHT(s) /* unused */
#ifdef __COMPILE_RISCV__
-#define CB_BOOT_ADDR (0x80020000)
-#define CB_BOOT_ADDR_STR "0x80020000"
-#define CB_FRAMEBUFFER_ADDR 0x40000000L
-#define CB_UART_BASE 0x10000000
-#define CB_FLASH_BASE_ADDR 0x08000000
+#define NB_BOOT_ADDR (0x80020000)
+#define NB_BOOT_ADDR_STR "0x80020000"
+#define NB_FRAMEBUFFER_ADDR 0x40000000L
+#define NB_UART_BASE 0x10000000
+#define NB_FLASH_BASE_ADDR 0x08000000
#define cb_sync_synchronize() __sync_synchronize()
#elif defined(__COMPILE_POWERPC__)
-#define CB_UART_BASE 0x10000000
-#define CB_BOOT_ADDR 0x1030000
-#define CB_BOOT_ADDR_STR "0x1030000"
-#define CB_FRAMEBUFFER_ADDR 0x40000000L
-#define CB_FLASH_BASE_ADDR 0x08000000
+#define NB_UART_BASE 0x10000000
+#define NB_BOOT_ADDR 0x1030000
+#define NB_BOOT_ADDR_STR "0x1030000"
+#define NB_FRAMEBUFFER_ADDR 0x40000000L
+#define NB_FLASH_BASE_ADDR 0x08000000
#define cb_sync_synchronize() __sync_synchronize()
#elif defined(__COMPILE_ARM64__)
-#define CB_UART_BASE 0x09000000
-#define CB_BOOT_ADDR 0x1030000
-#define CB_BOOT_ADDR_STR "0x1030000"
-#define CB_FRAMEBUFFER_ADDR 0x40000000L
-#define CB_FLASH_BASE_ADDR 0x60000000
+#define NB_UART_BASE 0x09000000
+#define NB_BOOT_ADDR 0x1030000
+#define NB_BOOT_ADDR_STR "0x1030000"
+#define NB_FRAMEBUFFER_ADDR 0x40000000L
+#define NB_FLASH_BASE_ADDR 0x60000000
static inline void __sync_synchronize(void) {
/// leave it as is.
@@ -102,17 +102,17 @@ static inline void __sync_synchronize(void) {
#define cb_sync_synchronize() __sync_synchronize()
#endif // ifndef __COMPILE_POWERPC__
-#define CB_BAUDRATE_TABLE \
+#define NB_BAUDRATE_TABLE \
{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 }
-#define CB_STRING(s) #s
+#define NB_STRING(s) #s
-#define CB_BOOT_MAG_0 'C'
-#define CB_BOOT_MAG_1 'B'
+#define NB_BOOT_MAG_0 'C'
+#define NB_BOOT_MAG_1 'B'
-#define CB_BOOT_VER 0x101
+#define NB_BOOT_VER 0x101
-#define CB_BOOT_CALL(struct, offset) \
+#define NB_BOOT_CALL(struct, offset) \
volatile cb_proc_t proc_##offset = (volatile cb_proc_t)(struct->offset); \
proc_##offset();
diff --git a/lib/fd.h b/lib/fd.h
index 23a107d..1949c48 100644
--- a/lib/fd.h
+++ b/lib/fd.h
@@ -10,7 +10,7 @@
struct _cb_file_descriptor;
-/// @brief CoreBoot file/device descriptor.
+/// @brief NeBoot file/device descriptor.
/// @version 1
typedef struct _cb_file_descriptor {
int32_t f_kind;
diff --git a/lib/mp-bit.h b/lib/mp-bit.h
index 869c7c3..924fcdf 100644
--- a/lib/mp-bit.h
+++ b/lib/mp-bit.h
@@ -7,7 +7,7 @@
#ifndef __BITMANIP_H__
#define __BITMANIP_H__
-/// Name: CoreBoot Bits API.
+/// Name: NeBoot Bits API.
/// Purpose: Bit manip helpers.
#define cb_set_bit(X, O) X = (1 << O) | X
diff --git a/lib/pci-tree.h b/lib/pci-tree.h
index 2c4ca1f..a68fd4c 100644
--- a/lib/pci-tree.h
+++ b/lib/pci-tree.h
@@ -16,16 +16,16 @@
#define PCI_INVALID_DATA_U16 ((uint16_t) ~0)
#define PCI_INVALID_DATA_U32 ((uint32_t) ~0)
-#define CB_BASE_ADDRESS (0x20008000) /* PCI base mapped in virtual memory. */
-#define CB_PCI_TREE_BASE (0x802000) /* The PCI tree base address. */
+#define NB_BASE_ADDRESS (0x20008000) /* PCI base mapped in virtual memory. */
+#define NB_PCI_TREE_BASE (0x802000) /* The PCI tree base address. */
/* version 1.0 */
-#define CB_PCI_VERSION (0x0100)
+#define NB_PCI_VERSION (0x0100)
-#define CB_PCI_DEV_MAGIC (0xfeedd00d)
-#define CB_PCI_INT_SZ sizeof(cb_pci_num_t)
+#define NB_PCI_DEV_MAGIC (0xfeedd00d)
+#define NB_PCI_INT_SZ sizeof(cb_pci_num_t)
-#define CB_PCI_NAME_LEN (255U)
+#define NB_PCI_NAME_LEN (255U)
#define PCI_CONFIG_SPACE (4096U)
@@ -53,7 +53,7 @@ struct hw_cb_pci_tree {
cb_pci_num_t d_first_node;
cb_pci_num_t d_next_sibling;
- cb_pci_char_t d_name[CB_PCI_NAME_LEN];
+ cb_pci_char_t d_name[NB_PCI_NAME_LEN];
};
/// @brief Init PCI tree.
diff --git a/lib/ppc64/processor.h b/lib/ppc64/processor.h
index bbeb0c9..3e6e04d 100644
--- a/lib/ppc64/processor.h
+++ b/lib/ppc64/processor.h
@@ -1023,29 +1023,29 @@ struct pt_regs {
/*
* 405EX/EXr CHIP_21 Errata
*/
-#ifdef CONFIG_CB_4xx_CHIP_21_405EX_SECURITY
-#define CONFIG_CB_4xx_CHIP_21_ERRATA
+#ifdef CONFIG_NB_4xx_CHIP_21_405EX_SECURITY
+#define CONFIG_NB_4xx_CHIP_21_ERRATA
#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EX1_RC
#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EX1_RD
#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x0
#endif
-#ifdef CONFIG_CB_4xx_CHIP_21_405EX_NO_SECURITY
-#define CONFIG_CB_4xx_CHIP_21_ERRATA
+#ifdef CONFIG_NB_4xx_CHIP_21_405EX_NO_SECURITY
+#define CONFIG_NB_4xx_CHIP_21_ERRATA
#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EX2_RC
#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EX2_RD
#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x1
#endif
-#ifdef CONFIG_CB_4xx_CHIP_21_405EXr_SECURITY
-#define CONFIG_CB_4xx_CHIP_21_ERRATA
+#ifdef CONFIG_NB_4xx_CHIP_21_405EXr_SECURITY
+#define CONFIG_NB_4xx_CHIP_21_ERRATA
#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EXR1_RC
#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EXR1_RD
#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x2
#endif
-#ifdef CONFIG_CB_4xx_CHIP_21_405EXr_NO_SECURITY
-#define CONFIG_CB_4xx_CHIP_21_ERRATA
+#ifdef CONFIG_NB_4xx_CHIP_21_405EXr_NO_SECURITY
+#define CONFIG_NB_4xx_CHIP_21_ERRATA
#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EXR2_RC
#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EXR2_RD
#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x3
diff --git a/lib/xcoff.h b/lib/xcoff.h
index abfa35a..689c570 100644
--- a/lib/xcoff.h
+++ b/lib/xcoff.h
@@ -3,7 +3,7 @@
Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
File: xcoff.h
- Purpose: XCOFF for CoreBoot.
+ Purpose: XCOFF for NeBoot.
Revision History: