arm64: fix: a fully arm64 firmware + important fixes and patches.

Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>

1 files changed, 41 insertions, 14 deletions

diff --git a/src/coreboot-start.c b/src/coreboot-start.c
index 21ee5b0..07606fc 100644
--- a/src/coreboot-start.c
+++ b/src/coreboot-start.c
@@ -22,29 +22,25 @@
 
 /////////////////////////////////////////////////////////////////////////////////////////
 
-extern void cb_append_scsi_tree(void);
-extern void cb_append_video_tree(void);
-
 extern void cb_start_context(uintptr_t);
 extern void cb_start_rom(void);
 
 extern int cb_boot_processor_ready;
 
 /// @brief hardware thread counter.
-uint64_t __cb_hart_counter = 0UL;
 
 /// @brief Start executing the firmware.
 /// @param
 void cb_start_exec(void)
 {
+	static uint64_t __cb_hart_counter = 0UL;
+
 	++__cb_hart_counter;
 
 	uintptr_t hart = __cb_hart_counter;
 
-	cb_sync_synchronize();
-
 	// let the hart 0 init our stuff.
-	if (hart == 1)
+	if (hart == 0)
 	{
 		cb_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
 		cb_put_string(__DATE__);
@@ -87,16 +83,18 @@ void cb_start_exec(void)
 	{
 		if (boot_hdr->h_revision != CB_BOOT_VER)
 		{
-			if (hart == 1)
+			if (hart == 0)
 			{
-				cb_put_string("CB> Can't Boot the Stage2, invalid signature. (CB0003)\r\n");
+				cb_put_string("CB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
 			}
 		}
 		else
 		{
-			if (hart == 1)
+			if (hart == 0)
 			{
-				cb_put_string("CB> Executing Stage2: ");
+				cb_pci_append_tree("@stage2-lx", (cb_pci_num_t)boot_hdr, sizeof(struct cb_boot_header));
+
+				cb_put_string("CB> Executing StageTwo: ");
 				cb_put_string((const char*)boot_hdr->h_name);
 				cb_put_char('\r');
 				cb_put_char('\n');
@@ -110,14 +108,43 @@ void cb_start_exec(void)
 				cb_start_context(boot_hdr->h_start_address);
 			}
 
-			cb_put_string("CB> Stage2 has returned? (CB0002)\r\n");
+			cb_put_string("CB> StageTwo has returned? (CB0002)\r\n");
 		}
 	}
 	else
 	{
+		cb_put_string("CB> Trying EPM partition...\r\n");
+
+		part_block_t* blk = cb_parse_partition_block_at((voidptr_t)CB_FLASH_BASE_ADDR, EPM_PART_BLK_SZ, 0);
+
+		if (blk)
+		{
+			cb_pci_append_tree("@stage2-epm", (cb_pci_num_t)blk, sizeof(part_block_t) * blk->num_blocks);
+
+			size_t indx = 0;
+			size_t end_lba, start_lba, sector_sz;
+
+			while (indx < blk->num_blocks)
+			{
+				if (cb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba, &start_lba, &sector_sz) == no)
+				{
+					++indx;
+					continue;
+				}
+
+				cb_boot_processor_ready = 1;
+				cb_start_context((uintptr_t)(voidptr_t)blk + start_lba);
+
+				if (hart == 1)
+				{
+					cb_put_string("CB> Can't boot to StageTwo. (CB0001)\r\n");
+				}
+			}
+		}
+
 		if (hart == 1)
 		{
-			cb_put_string("CB> Can't boot to Stage2. (CB0001)\r\n");
+			cb_put_string("CB> Can't boot to StageTwo via EPM, no bootable partition blocks found. (CB0001)\r\n");
 		}
 	}
 
@@ -125,7 +152,7 @@ void cb_start_exec(void)
 
 	if (hart > 1)
 	{
-		while (1)
+		while (yes)
 		{
 			if (__cb_hart_counter == 0)
 			{