summaryrefslogtreecommitdiffhomepage
path: root/src/ppc64
diff options
context:
space:
mode:
authorAmlal El Mahrouss <amlal@nekernel.org>2025-07-31 08:57:14 +0100
committerAmlal El Mahrouss <amlal@nekernel.org>2025-07-31 08:57:14 +0100
commit1891d7343a9ac25ab157c4495581a0fcbd7fbcbf (patch)
treec6da72fdf5db30c67c28e968883f869ee57600d0 /src/ppc64
parent18d33e155d2f56e59eb49dadbb30ab2f7ac3e852 (diff)
feat! refactor NeBoot for NeKernel.org v1.0.0
Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>
Diffstat (limited to 'src/ppc64')
-rw-r--r--src/ppc64/makefile4
-rw-r--r--src/ppc64/ppc64-boot.S6
-rw-r--r--src/ppc64/ppc64-hal.c12
-rw-r--r--src/ppc64/ppc64-uart.c6
4 files changed, 14 insertions, 14 deletions
diff --git a/src/ppc64/makefile b/src/ppc64/makefile
index 8adb03f..d046098 100644
--- a/src/ppc64/makefile
+++ b/src/ppc64/makefile
@@ -1,7 +1,7 @@
#
# ========================================================
#
- # CoreBoot
+ # NeBoot
# Date Added: 08/11/2023
# Copyright 2024, Amlal El Mahrouss, all rights reserved.
#
@@ -35,7 +35,7 @@ IMG_CMD=qemu-img create -f qcow2 epm.img 256M
.PHONY: all
all: firmware-link
- @echo "[CoreBoot] build done."
+ @echo "[NeBoot] build done."
.PHONY: firmware-link
firmware-link: firmware-compile
diff --git a/src/ppc64/ppc64-boot.S b/src/ppc64/ppc64-boot.S
index 28d1865..de366fc 100644
--- a/src/ppc64/ppc64-boot.S
+++ b/src/ppc64/ppc64-boot.S
@@ -29,11 +29,11 @@ cb_reset_vector:
.global cb_start_context
.global cb_boot_processor_ready
-.equ CB_BOOT_ADDR, 0x1030000
+.equ NB_BOOT_ADDR, 0x1030000
cb_start_rom:
- lis 3, CB_BOOT_ADDR@h
- addi 3, 3, CB_BOOT_ADDR@l
+ lis 3, NB_BOOT_ADDR@h
+ addi 3, 3, NB_BOOT_ADDR@l
blr
diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
index 74d18c4..993e5be 100644
--- a/src/ppc64/ppc64-hal.c
+++ b/src/ppc64/ppc64-hal.c
@@ -41,7 +41,7 @@ void cb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t
void cb_init_hw(void) {
/// amlal:
/// map VGA framebuffer
- cb_set_tlb(0, CB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
+ cb_set_tlb(0, NB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
0x0000A000, /* p_addr. 0x0000A0000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -52,7 +52,7 @@ void cb_init_hw(void) {
// map ccsrbar and uart.
// at start we execute from esel = 0, so chose something else..
- cb_set_tlb(1, CB_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
+ cb_set_tlb(1, NB_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
0xfe0000000, /* p_addr. 0xfe0000000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -63,7 +63,7 @@ void cb_init_hw(void) {
/// amlal:
/// map pci base for kernel
- cb_set_tlb(0, CB_BASE_ADDRESS, /* v_addr, 0xFE008000 */
+ cb_set_tlb(0, NB_BASE_ADDRESS, /* v_addr, 0xFE008000 */
0xFE0008000, /* p_addr. 0xfe0000000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -74,10 +74,10 @@ void cb_init_hw(void) {
cb_pci_init_tree();
- cb_pci_append_tree("@fb", CB_FRAMEBUFFER_ADDR, 0x0);
+ cb_pci_append_tree("@fb", NB_FRAMEBUFFER_ADDR, 0x0);
cb_pci_append_tree("@mbci", 0x0, 0x0); // did not found a MBCI base for now...
- cb_pci_append_tree("@serial", CB_UART_BASE, 0);
- cb_pci_append_tree("@pci", CB_BASE_ADDRESS, 0x0);
+ cb_pci_append_tree("@serial", NB_UART_BASE, 0);
+ cb_pci_append_tree("@pci", NB_BASE_ADDRESS, 0x0);
cb_flush_tlb();
}
diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c
index b3b5717..9830342 100644
--- a/src/ppc64/ppc64-uart.c
+++ b/src/ppc64/ppc64-uart.c
@@ -9,10 +9,10 @@
/// BUGS: 0
-#define CB_NS16550_COM1 (CB_UART_BASE + 0x4500)
-#define CB_NS16550_COM2 (CB_UART_BASE + 0x4600)
+#define NB_NS16550_COM1 (NB_UART_BASE + 0x4500)
+#define NB_NS16550_COM2 (NB_UART_BASE + 0x4600)
-volatile ascii_char_t* const UART0DR = (ascii_char_t*) CB_NS16550_COM1;
+volatile ascii_char_t* const UART0DR = (ascii_char_t*) NB_NS16550_COM1;
/* this file handles the UART */