dev: refactor codebase.

Signed-off-by: Amlal <amlal@nekernel.org>

19 files changed, 523 insertions, 676 deletions

diff --git a/src/arm64/arm64-30pin.c b/src/arm64/arm64-30pin.c
index f347f0d..eb89c67 100644
--- a/src/arm64/arm64-30pin.c
+++ b/src/arm64/arm64-30pin.c
@@ -1,10 +1,10 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
-#include <lib/partition-map.h>
 #include <lib/30pin.h>
+#include <lib/partition-map.h>
 
 extern size_t cb_read_30pin(voidptr_t blob, size_t* size, size_t* start_lba);
diff --git a/src/arm64/arm64-err.c b/src/arm64/arm64-err.c
index 052b302..c734ada 100644
--- a/src/arm64/arm64-err.c
+++ b/src/arm64/arm64-err.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -10,14 +10,12 @@
 
 /// @brief Goes into a panic state.
 /// @param reason why?
-void cb_panic(const char* reason)
-{
-	cb_put_string("panic: ");
-	cb_put_string(reason);
-	cb_put_char('\n');
+void cb_panic(const char* reason) {
+  cb_put_string("panic: ");
+  cb_put_string(reason);
+  cb_put_char('\n');
 
-	while (yes)
-	{
-		asm volatile("hlt #0");
-	}
+  while (yes) {
+    asm volatile("hlt #0");
+  }
 }
diff --git a/src/arm64/arm64-uart.c b/src/arm64/arm64-uart.c
index 7455626..d587346 100644
--- a/src/arm64/arm64-uart.c
+++ b/src/arm64/arm64-uart.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -9,47 +9,40 @@
 
 /// BUGS: 0
 
-#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*)(cb_uart_ptr + addr))
+#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*) (cb_uart_ptr + addr))
 
 /* this file handles the UART */
 
-static uint32_t* cb_uart_ptr = (uint32_t*)CB_UART_BASE;
+static uint32_t* cb_uart_ptr = (uint32_t*) CB_UART_BASE;
 
 // we need that one, to avoid sending mutliple chars to UART.
 static boolean cb_locked_put_char = no;
 
 /// @brief Retrieve character from cb_uart_ptr
-utf_char_t cb_get_char(void)
-{
-	while ((ARM64_MMIO_REG(0x018) & (1 << 4)))
-	{
-	}
+utf_char_t cb_get_char(void) {
+  while ((ARM64_MMIO_REG(0x018) & (1 << 4))) {
+  }
 
-	return (utf_char_t)ARM64_MMIO_REG(0x0) & 0xFF;
+  return (utf_char_t) ARM64_MMIO_REG(0x0) & 0xFF;
 }
 
-void cb_put_char(utf_char_t ch)
-{
-	while ((ARM64_MMIO_REG(0x018) & (1 << 5)))
-	{
-	}
+void cb_put_char(utf_char_t ch) {
+  while ((ARM64_MMIO_REG(0x018) & (1 << 5))) {
+  }
 
-	ARM64_MMIO_REG(0x0) = ch;
+  ARM64_MMIO_REG(0x0) = ch;
 }
 
 /// @brief UART put string
 /// @param text the input text.
-size_t cb_put_string(const char* text)
-{
-	if (text == nil)
-		return 0;
+size_t cb_put_string(const char* text) {
+  if (text == nil) return 0;
 
-	size_t i = 0;
+  size_t i = 0;
 
-	for (; i < strlen(text); i++)
-	{
-		cb_put_char(text[i]);
-	}
+  for (; i < strlen(text); i++) {
+    cb_put_char(text[i]);
+  }
 
-	return i;
+  return i;
 }
diff --git a/src/coreboot-bootnet.c b/src/coreboot-bootnet.c
index 687edd9..a547b35 100644
--- a/src/coreboot-bootnet.c
+++ b/src/coreboot-bootnet.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2025, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2025, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
diff --git a/src/coreboot-cpu-api.c b/src/coreboot-cpu-api.c
index c118192..2491f15 100644
--- a/src/coreboot-cpu-api.c
+++ b/src/coreboot-cpu-api.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -8,15 +8,13 @@
 
 /// @brief Restarts the computer.
 /// @param none.
-void cb_restart_machine(void)
-{
+void cb_restart_machine(void) {
 #ifdef __COMPILE_RISCV__
-	volatile uint32_t* brd_pwr = (volatile uint32_t*)0x100000;
-	*brd_pwr				   = 0x7777; // send reboot signal from DMA.
+  volatile uint32_t* brd_pwr = (volatile uint32_t*) 0x100000;
+  *brd_pwr                   = 0x7777;  // send reboot signal from DMA.
 
-	while (1)
-	{
-		asm volatile("wfi");
-	}
+  while (1) {
+    asm volatile("wfi");
+  }
 #endif
 }
diff --git a/src/coreboot-cxx-abi.cc b/src/coreboot-cxx-abi.cc
index 858ba5e..70d9e62 100644
--- a/src/coreboot-cxx-abi.cc
+++ b/src/coreboot-cxx-abi.cc
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -9,83 +9,69 @@
 /// BUGS: 0
 
 extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
-extern "C" void			 cb_panic(const char* reason);
+extern "C" void          cb_panic(const char* reason);
 
-extern "C" void __stack_chk_fail()
-{
-	cb_put_string("[stack-canary] Buffer overflow detected, halting...\n");
-	cb_panic("stack_canary_fail");
+extern "C" void __stack_chk_fail() {
+  cb_put_string("[stack-canary] Buffer overflow detected, halting...\n");
+  cb_panic("stack_canary_fail");
 }
 
 void* __dso_handle;
 
 extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
-extern "C" void			 cb_panic(const char* reason);
+extern "C" void          cb_panic(const char* reason);
 
 atexit_func_entry_t __atexit_funcs[DSO_MAX_OBJECTS];
-uarch_t				__atexit_func_count;
+uarch_t             __atexit_func_count;
 
-extern "C" void __cxa_pure_virtual()
-{
-	cb_put_string("[__cxa_pure_virtual] Placeholder\n");
+extern "C" void __cxa_pure_virtual() {
+  cb_put_string("[__cxa_pure_virtual] Placeholder\n");
 }
 
-extern "C" int __cxa_atexit(void (*f)(void*), void* arg, void* dso)
-{
-	if (__atexit_func_count >= DSO_MAX_OBJECTS)
-		return -1;
+extern "C" int __cxa_atexit(void (*f)(void*), void* arg, void* dso) {
+  if (__atexit_func_count >= DSO_MAX_OBJECTS) return -1;
 
-	__atexit_funcs[__atexit_func_count].destructor_func = f;
-	__atexit_funcs[__atexit_func_count].obj_ptr			= arg;
-	__atexit_funcs[__atexit_func_count].dso_handle		= dso;
+  __atexit_funcs[__atexit_func_count].destructor_func = f;
+  __atexit_funcs[__atexit_func_count].obj_ptr         = arg;
+  __atexit_funcs[__atexit_func_count].dso_handle      = dso;
 
-	__atexit_func_count++;
+  __atexit_func_count++;
 
-	return 0;
+  return 0;
 }
 
-extern "C" void __cxa_finalize(void* f)
-{
-	uarch_t i = __atexit_func_count;
-	if (!f)
-	{
-		while (i--)
-		{
-			if (__atexit_funcs[i].destructor_func)
-			{
-				(*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
-			};
-		}
-
-		return;
-	}
-
-	while (i--)
-	{
-		if (__atexit_funcs[i].destructor_func)
-		{
-			(*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
-			__atexit_funcs[i].destructor_func = 0;
-		};
-	}
+extern "C" void __cxa_finalize(void* f) {
+  uarch_t i = __atexit_func_count;
+  if (!f) {
+    while (i--) {
+      if (__atexit_funcs[i].destructor_func) {
+        (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
+      };
+    }
+
+    return;
+  }
+
+  while (i--) {
+    if (__atexit_funcs[i].destructor_func) {
+      (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
+      __atexit_funcs[i].destructor_func = 0;
+    };
+  }
 }
 
-namespace cxxabiv1
-{
-	extern "C" int __cxa_guard_acquire(__guard* g)
-	{
-		(void)g;
-		return 0;
-	}
-
-	extern "C" int __cxa_guard_release(__guard* g)
-	{
-		*(char*)g = 1;
-		return 0;
-	}
-
-	extern "C" void __cxa_guard_abort(__guard* g)
-	{
-		(void)g;
-	}
-} // namespace cxxabiv1
+namespace cxxabiv1 {
+extern "C" int __cxa_guard_acquire(__guard* g) {
+  (void) g;
+  return 0;
+}
+
+extern "C" int __cxa_guard_release(__guard* g) {
+  *(char*) g = 1;
+  return 0;
+}
+
+extern "C" void __cxa_guard_abort(__guard* g) {
+  (void) g;
+}
+}  // namespace cxxabiv1
diff --git a/src/coreboot-partition-map-parse.c b/src/coreboot-partition-map-parse.c
index 85ccf1b..7d8f80f 100644
--- a/src/coreboot-partition-map-parse.c
+++ b/src/coreboot-partition-map-parse.c
@@ -1,60 +1,42 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
 #include <lib/partition-map.h>
 
-bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz)
-{
-	if (!start_lba ||
-		!end_lba ||
-		!blob ||
-		!blob_sz ||
-		!sector_sz ||
-		(sizeof(part_block_t) * index) > blob_sz)
-		return false;
-
-	part_block_t* block = (part_block_t*)(blob + (sizeof(part_block_t) * index));
-
-	if (block->version != EPM_REVISION ||
-		block->num_blocks < 1 ||
-		block->num_blocks > EPM_MAX_BLKS ||
-		strcmp(block->magic, EPM_MAGIC) > 0 ||
-		block->lba_end == 0 ||
-		block->lba_start == 0)
-	{
-		return false;
-	}
-
-	*end_lba   = block->lba_end;
-	*start_lba = block->lba_start;
-	*sector_sz = block->sector_sz;
-
-	return true;
+bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba,
+                                      size_t* start_lba, size_t* sector_sz) {
+  if (!start_lba || !end_lba || !blob || !blob_sz || !sector_sz ||
+      (sizeof(part_block_t) * index) > blob_sz)
+    return false;
+
+  part_block_t* block = (part_block_t*) (blob + (sizeof(part_block_t) * index));
+
+  if (block->version != EPM_REVISION || block->num_blocks < 1 || block->num_blocks > EPM_MAX_BLKS ||
+      strcmp(block->magic, EPM_MAGIC) > 0 || block->lba_end == 0 || block->lba_start == 0) {
+    return false;
+  }
+
+  *end_lba   = block->lba_end;
+  *start_lba = block->lba_start;
+  *sector_sz = block->sector_sz;
+
+  return true;
 }
 
-part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index)
-{
-	if (!blob ||
-		!blob_sz ||
-		(sizeof(part_block_t) * index) > blob_sz)
-		return nil;
+part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index) {
+  if (!blob || !blob_sz || (sizeof(part_block_t) * index) > blob_sz) return nil;
 
-	part_block_t* block = (part_block_t*)(blob + (sizeof(part_block_t) * index));
+  part_block_t* block = (part_block_t*) (blob + (sizeof(part_block_t) * index));
 
-	cb_put_string(block->magic);
+  cb_put_string(block->magic);
 
-	if (block->version != EPM_REVISION ||
-		block->num_blocks < 1 ||
-		block->num_blocks > EPM_MAX_BLKS ||
-		strcmp(block->magic, EPM_MAGIC) > 0 ||
-		block->lba_end == 0 ||
-		block->lba_start == 0)
-	{
-		return nil;
-	}
+  if (block->version != EPM_REVISION || block->num_blocks < 1 || block->num_blocks > EPM_MAX_BLKS ||
+      strcmp(block->magic, EPM_MAGIC) > 0 || block->lba_end == 0 || block->lba_start == 0) {
+    return nil;
+  }
 
-	return block;
+  return block;
 }
\ No newline at end of file
diff --git a/src/coreboot-partition-map.c b/src/coreboot-partition-map.c
index 69bcddd..f5d937b 100644
--- a/src/coreboot-partition-map.c
+++ b/src/coreboot-partition-map.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -10,28 +10,21 @@
 // include this for documentation.
 
 #define CB_FILESYSTEM_COUNT 4
-#define CB_FILESYSTEM_LIST              \
-	{                                   \
-		"NeFS", "HeFS", "FAT32", "ext4" \
-	}
+#define CB_FILESYSTEM_LIST \
+  { "NeFS", "HeFS", "FAT32", "ext4" }
 
 /// @brief check if filesystem is supported by CoreBoot.
 /// @param fs the filesystem magic, as provided by EPM.
-boolean cb_filesystem_exists(caddr_t fs, size_t len)
-{
-	if (fs == nil ||
-		*fs == 0)
-		return no;
-
-	char* fs_list[] = CB_FILESYSTEM_LIST;
-
-	for (size_t fs_index = 0; fs_index < CB_FILESYSTEM_COUNT; fs_index++)
-	{
-		if (strncmp(fs_list[fs_index], fs, strlen(fs_list[fs_index])) == 0)
-		{
-			return yes;
-		}
-	}
-
-	return no;
+boolean cb_filesystem_exists(caddr_t fs, size_t len) {
+  if (fs == nil || *fs == 0) return no;
+
+  char* fs_list[] = CB_FILESYSTEM_LIST;
+
+  for (size_t fs_index = 0; fs_index < CB_FILESYSTEM_COUNT; fs_index++) {
+    if (strncmp(fs_list[fs_index], fs, strlen(fs_list[fs_index])) == 0) {
+      return yes;
+    }
+  }
+
+  return no;
 }
diff --git a/src/coreboot-pci-tree.c b/src/coreboot-pci-tree.c
index b39c024..ce168fd 100644
--- a/src/coreboot-pci-tree.c
+++ b/src/coreboot-pci-tree.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -23,84 +23,74 @@
 /// Standard Root table (Mahrouss Table)
 #define CB_PCI_ROOT_NAME "/pci-tree/@/"
 
-static struct hw_cb_pci_tree* cb_base_tree	 = nil;
+static struct hw_cb_pci_tree* cb_base_tree   = nil;
 static struct hw_cb_pci_tree* cb_latest_tree = nil;
-static struct hw_cb_pci_tree* cb_last_tree	 = nil;
+static struct hw_cb_pci_tree* cb_last_tree   = nil;
 
 /// \brief Init the PCI device tree structure.
 /// \return if it already exists -> false
 /// Otherwise true.
-boolean cb_pci_init_tree(void)
-{
-	cb_base_tree = (struct hw_cb_pci_tree*)(CB_PCI_TREE_BASE);
+boolean cb_pci_init_tree(void) {
+  cb_base_tree = (struct hw_cb_pci_tree*) (CB_PCI_TREE_BASE);
 
-	// huh? anyway let's ignore it then.
-	if (cb_base_tree->d_magic != CB_PCI_DEV_MAGIC)
-	{
-		cb_base_tree->d_magic = CB_PCI_DEV_MAGIC;
+  // huh? anyway let's ignore it then.
+  if (cb_base_tree->d_magic != CB_PCI_DEV_MAGIC) {
+    cb_base_tree->d_magic = CB_PCI_DEV_MAGIC;
 
-		memncpy(cb_base_tree->d_name, CB_PCI_ROOT_NAME, strlen(CB_PCI_ROOT_NAME));
+    memncpy(cb_base_tree->d_name, CB_PCI_ROOT_NAME, strlen(CB_PCI_ROOT_NAME));
 
-		cb_base_tree->d_next_sibling = 0;
-		cb_base_tree->d_off_props	 = 0;
-		cb_base_tree->d_sz_struct	 = 0;
-		cb_base_tree->d_sz_props	 = 0;
-		cb_base_tree->d_off_struct	 = 0;
-		cb_base_tree->d_version		 = CB_PCI_VERSION;
+    cb_base_tree->d_next_sibling = 0;
+    cb_base_tree->d_off_props    = 0;
+    cb_base_tree->d_sz_struct    = 0;
+    cb_base_tree->d_sz_props     = 0;
+    cb_base_tree->d_off_struct   = 0;
+    cb_base_tree->d_version      = CB_PCI_VERSION;
 
-		cb_base_tree->d_next_sibling =
-			(cb_pci_num_t)(cb_base_tree + sizeof(struct hw_cb_pci_tree));
-		cb_base_tree->d_first_node = (cb_pci_num_t)cb_base_tree;
+    cb_base_tree->d_next_sibling = (cb_pci_num_t) (cb_base_tree + sizeof(struct hw_cb_pci_tree));
+    cb_base_tree->d_first_node   = (cb_pci_num_t) cb_base_tree;
 
-		cb_put_string(">> Append root device: " CB_PCI_ROOT_NAME "\r\n");
-	}
+    cb_put_string(">> Append root device: " CB_PCI_ROOT_NAME "\r\n");
+  }
 
-	cb_latest_tree = cb_base_tree;
+  cb_latest_tree = cb_base_tree;
 
-	return yes;
+  return yes;
 }
 
 /// \brief Adds a new device to the tree.
 /// \param name the device name.
 /// \param struct_ptr the struct containing the device.
 /// \param struct_sz the structure size.
-boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz)
-{
-	if (!name || *name == 0 || cb_latest_tree == nil)
-		return no;
+boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz) {
+  if (!name || *name == 0 || cb_latest_tree == nil) return no;
 
-	struct hw_cb_pci_tree* cb_pci_tree = (struct hw_cb_pci_tree*)(cb_latest_tree);
+  struct hw_cb_pci_tree* cb_pci_tree = (struct hw_cb_pci_tree*) (cb_latest_tree);
 
-	while (cb_pci_tree->d_magic == CB_PCI_DEV_MAGIC)
-	{
-		if (strcmp(cb_pci_tree->d_name, name) == 0)
-			return no;
+  while (cb_pci_tree->d_magic == CB_PCI_DEV_MAGIC) {
+    if (strcmp(cb_pci_tree->d_name, name) == 0) return no;
 
-		cb_pci_tree =
-			(struct hw_cb_pci_tree*)(cb_pci_tree +
-									 sizeof(struct hw_cb_pci_tree));
-	}
+    cb_pci_tree = (struct hw_cb_pci_tree*) (cb_pci_tree + sizeof(struct hw_cb_pci_tree));
+  }
 
-	cb_pci_tree->d_magic = CB_PCI_DEV_MAGIC;
+  cb_pci_tree->d_magic = CB_PCI_DEV_MAGIC;
 
-	memncpy(cb_pci_tree->d_name, name, strlen(name));
+  memncpy(cb_pci_tree->d_name, name, strlen(name));
 
-	cb_pci_tree->d_off_struct = struct_ptr;
-	cb_pci_tree->d_sz_struct  = struct_sz;
-	cb_pci_tree->d_off_props  = 0;
-	cb_pci_tree->d_sz_props	  = 0;
-	cb_pci_tree->d_version	  = CB_PCI_VERSION;
+  cb_pci_tree->d_off_struct = struct_ptr;
+  cb_pci_tree->d_sz_struct  = struct_sz;
+  cb_pci_tree->d_off_props  = 0;
+  cb_pci_tree->d_sz_props   = 0;
+  cb_pci_tree->d_version    = CB_PCI_VERSION;
 
-	cb_pci_tree->d_next_sibling =
-		(cb_pci_num_t)(cb_pci_tree + sizeof(struct hw_cb_pci_tree));
-	cb_pci_tree->d_first_node = (cb_pci_num_t)cb_latest_tree;
+  cb_pci_tree->d_next_sibling = (cb_pci_num_t) (cb_pci_tree + sizeof(struct hw_cb_pci_tree));
+  cb_pci_tree->d_first_node   = (cb_pci_num_t) cb_latest_tree;
 
-	cb_latest_tree = cb_pci_tree;
-	cb_last_tree   = cb_pci_tree;
+  cb_latest_tree = cb_pci_tree;
+  cb_last_tree   = cb_pci_tree;
 
-	cb_put_string(">> Append device: ");
-	cb_put_string(name);
-	cb_put_string("\r\n");
+  cb_put_string(">> Append device: ");
+  cb_put_string(name);
+  cb_put_string("\r\n");
 
-	return yes;
+  return yes;
 }
diff --git a/src/coreboot-print-name.c b/src/coreboot-print-name.c
index e2ad8c4..6adb099 100644
--- a/src/coreboot-print-name.c
+++ b/src/coreboot-print-name.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -8,21 +8,20 @@
 
 /// @brief Print firmware name.
 /// @param
-void cb_print_name(void)
-{
+void cb_print_name(void) {
 #ifdef __COMPILE_POWERPC__
-	cb_put_string(">> CoreBoot for POWERPC.\r\n");
-#endif // __COMPILE_POWERPC__
+  cb_put_string(">> CoreBoot for POWERPC.\r\n");
+#endif  // __COMPILE_POWERPC__
 
 #ifdef __COMPILE_ARM64__
-	cb_put_string(">> CoreBoot for ARM64.\r\n");
-#endif // __COMPILE_POWERPC__
+  cb_put_string(">> CoreBoot for ARM64.\r\n");
+#endif  // __COMPILE_POWERPC__
 
 #ifdef __COMPILE_AMD64__
-	cb_put_string(">> CoreBoot for AMD64.\r\n");
-#endif // __COMPILE_POWERPC__
+  cb_put_string(">> CoreBoot for AMD64.\r\n");
+#endif  // __COMPILE_POWERPC__
 
 #ifdef __COMPILE_RISCV__
-	cb_put_string(">> CoreBoot for RISC-V.\r\n");
-#endif // __COMPILE_POWERPC__
+  cb_put_string(">> CoreBoot for RISC-V.\r\n");
+#endif  // __COMPILE_POWERPC__
 }
diff --git a/src/coreboot-start.c b/src/coreboot-start.c
index cfcc668..da6da23 100644
--- a/src/coreboot-start.c
+++ b/src/coreboot-start.c
@@ -1,13 +1,13 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
+#include <lib/boot.h>
 #include <lib/mp-bit.h>
 #include <lib/partition-map.h>
 #include <lib/pci-tree.h>
-#include <lib/boot.h>
 
 /// BUGS: 0
 
@@ -34,135 +34,117 @@ uint64_t __cb_hart_counter = 0UL;
 
 /// @brief Start executing the firmware.
 /// @param
-void cb_start_exec(void)
-{
+void cb_start_exec(void) {
 #ifndef __COMPILE_RISCV__
-	static uint64_t __cb_hart_counter = 0UL;
+  static uint64_t __cb_hart_counter = 0UL;
 #endif
 
-	++__cb_hart_counter;
+  ++__cb_hart_counter;
 
-	uintptr_t hart = __cb_hart_counter;
+  uintptr_t hart = __cb_hart_counter;
 
-	// let the hart 0 init our stuff.
-	if (hart == 0)
-	{
-		cb_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
-		cb_put_string(__DATE__);
-		cb_put_string("\r\r\n");
+  // let the hart 0 init our stuff.
+  if (hart == 0) {
+    cb_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
+    cb_put_string(__DATE__);
+    cb_put_string("\r\r\n");
 
 #ifdef __COMPILE_POWERPC__
-		cb_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
-#endif // __COMPILE_POWERPC__
+    cb_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
+#endif  // __COMPILE_POWERPC__
 
 #ifdef __COMPILE_AMD64__
-		cb_put_string("CB> CPU: x64 Based SoC.\r\r\n");
-#endif // __COMPILE_AMD64__
+    cb_put_string("CB> CPU: x64 Based SoC.\r\r\n");
+#endif  // __COMPILE_AMD64__
 
 #ifdef __COMPILE_ARM64__
-		cb_put_string("CB> CPU: AArch64 Based SoC.\r\r\n");
-#endif // __COMPILE_ARM64__
+    cb_put_string("CB> CPU: AArch64 Based SoC.\r\r\n");
+#endif  // __COMPILE_ARM64__
 
 #ifdef __COMPILE_ARM32__
-		cb_put_string("CB> CPU: AArch32 Based SoC.\r\r\n");
-#endif // __COMPILE_ARM64__
+    cb_put_string("CB> CPU: AArch32 Based SoC.\r\r\n");
+#endif  // __COMPILE_ARM64__
 
 #ifdef __COMPILE_RISCV__
-		cb_put_string("CB> CPU: RV64 Based SoC.\r\r\n");
-#endif // __COMPILE_RISCV__
-	}
+    cb_put_string("CB> CPU: RV64 Based SoC.\r\r\n");
+#endif  // __COMPILE_RISCV__
+  }
 
-	/// @brief Boots here if LX header matches what we except.
+  /// @brief Boots here if LX header matches what we except.
 
-	volatile struct cb_boot_header* boot_hdr =
-		(volatile struct cb_boot_header*)(CB_FLASH_BASE_ADDR);
+  volatile struct cb_boot_header* boot_hdr = (volatile struct cb_boot_header*) (CB_FLASH_BASE_ADDR);
 
-	/**
-	  boot if:
-		  - ident matches.
-		  - version matches.
+  /**
+    boot if:
+      - ident matches.
+      - version matches.
   */
 
-	if (boot_hdr->h_mag[0] == CB_BOOT_MAG_0 &&
-		boot_hdr->h_mag[1] == CB_BOOT_MAG_1)
-	{
-		if (boot_hdr->h_revision != CB_BOOT_VER)
-		{
-			if (hart == 0)
-			{
-				cb_put_string("CB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
-			}
-		}
-		else
-		{
-			if (hart == 0)
-			{
-				cb_pci_append_tree("@stage2-lx", (cb_pci_num_t)boot_hdr, sizeof(struct cb_boot_header));
-
-				cb_put_string("CB> Executing StageTwo: ");
-				cb_put_string((const char*)boot_hdr->h_name);
-				cb_put_char('\r');
-				cb_put_char('\n');
-
-				// printf("CB> address: %x\n", boot_hdr->h_start_address);
-			}
-
-			if (boot_hdr->h_start_address != 0)
-			{
-				cb_boot_processor_ready = 1;
-				cb_start_context(boot_hdr->h_start_address);
-			}
-
-			cb_put_string("CB> StageTwo has returned? (CB0002)\r\n");
-		}
-	}
-	else
-	{
-		cb_put_string("CB> Trying EPM partition...\r\n");
-
-		part_block_t* blk = cb_parse_partition_block_at((voidptr_t)CB_FLASH_BASE_ADDR, EPM_PART_BLK_SZ, 0);
-
-		if (blk)
-		{
-			cb_pci_append_tree("@stage2-epm", (cb_pci_num_t)blk, sizeof(part_block_t) * blk->num_blocks);
-
-			size_t indx = 0;
-			size_t end_lba, start_lba, sector_sz;
-
-			while (indx < blk->num_blocks)
-			{
-				if (cb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba, &start_lba, &sector_sz) == no)
-				{
-					++indx;
-					continue;
-				}
-
-				cb_boot_processor_ready = 1;
-				cb_start_context((uintptr_t)(voidptr_t)blk + start_lba);
-
-				if (hart == 1)
-				{
-					cb_put_string("CB> Can't boot to StageTwo. (CB0001)\r\n");
-				}
-			}
-		}
-
-		if (hart == 1)
-		{
-			cb_put_string("CB> Can't boot to StageTwo via EPM, no bootable partition blocks found. (CB0001)\r\n");
-		}
-	}
-
-	/// end of TODO
-
-	if (hart > 1)
-	{
-		while (yes)
-		{
-			if (__cb_hart_counter == 0)
-			{
-				cb_restart_machine();
-			}
-		}
-	}
+  if (boot_hdr->h_mag[0] == CB_BOOT_MAG_0 && boot_hdr->h_mag[1] == CB_BOOT_MAG_1) {
+    if (boot_hdr->h_revision != CB_BOOT_VER) {
+      if (hart == 0) {
+        cb_put_string("CB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
+      }
+    } else {
+      if (hart == 0) {
+        cb_pci_append_tree("@stage2-lx", (cb_pci_num_t) boot_hdr, sizeof(struct cb_boot_header));
+
+        cb_put_string("CB> Executing StageTwo: ");
+        cb_put_string((const char*) boot_hdr->h_name);
+        cb_put_char('\r');
+        cb_put_char('\n');
+
+        // printf("CB> address: %x\n", boot_hdr->h_start_address);
+      }
+
+      if (boot_hdr->h_start_address != 0) {
+        cb_boot_processor_ready = 1;
+        cb_start_context(boot_hdr->h_start_address);
+      }
+
+      cb_put_string("CB> StageTwo has returned? (CB0002)\r\n");
+    }
+  } else {
+    cb_put_string("CB> Trying EPM partition...\r\n");
+
+    part_block_t* blk =
+        cb_parse_partition_block_at((voidptr_t) CB_FLASH_BASE_ADDR, EPM_PART_BLK_SZ, 0);
+
+    if (blk) {
+      cb_pci_append_tree("@stage2-epm", (cb_pci_num_t) blk, sizeof(part_block_t) * blk->num_blocks);
+
+      size_t indx = 0;
+      size_t end_lba, start_lba, sector_sz;
+
+      while (indx < blk->num_blocks) {
+        if (cb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba,
+                                             &start_lba, &sector_sz) == no) {
+          ++indx;
+          continue;
+        }
+
+        cb_boot_processor_ready = 1;
+        cb_start_context((uintptr_t) (voidptr_t) blk + start_lba);
+
+        if (hart == 1) {
+          cb_put_string("CB> Can't boot to StageTwo. (CB0001)\r\n");
+        }
+      }
+    }
+
+    if (hart == 1) {
+      cb_put_string(
+          "CB> Can't boot to StageTwo via EPM, no bootable partition blocks found. (CB0001)\r\n");
+    }
+  }
+
+  /// end of TODO
+
+  if (hart > 1) {
+    while (yes) {
+      if (__cb_hart_counter == 0) {
+        cb_restart_machine();
+      }
+    }
+  }
 }
diff --git a/src/coreboot-string.c b/src/coreboot-string.c
index 491095d..355e734 100644
--- a/src/coreboot-string.c
+++ b/src/coreboot-string.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -19,167 +19,135 @@
 
 /// BUGS: 0
 
-size_t strncmp(const char* src, const char* cmp, size_t size)
-{
-	if (src == nil)
-		return 0;
+size_t strncmp(const char* src, const char* cmp, size_t size) {
+  if (src == nil) return 0;
 
-	int32_t counter = 0;
+  int32_t counter = 0;
 
-	for (size_t index = 0; index < size; ++index)
-	{
-		if (src[index] != cmp[index])
-			++counter;
-	}
+  for (size_t index = 0; index < size; ++index) {
+    if (src[index] != cmp[index]) ++counter;
+  }
 
-	return counter;
+  return counter;
 }
 
-void* memset(void* ptr, const char value, size_t len)
-{
-	if (ptr == nil)
-		return nil;
+void* memset(void* ptr, const char value, size_t len) {
+  if (ptr == nil) return nil;
 
-	char* start = ptr;
+  char* start = ptr;
 
-	while (len)
-	{
-		*start = value;
-		++start;
+  while (len) {
+    *start = value;
+    ++start;
 
-		--len;
-	}
+    --len;
+  }
 
-	return (void*)start;
+  return (void*) start;
 }
 
-void* memmove(void* dest, const void* src, size_t len)
-{
-	memncpy(dest, src, len);
-	return dest;
+void* memmove(void* dest, const void* src, size_t len) {
+  memncpy(dest, src, len);
+  return dest;
 }
 
-size_t memcpy(void* dst, const void* src)
-{
-	if (src == nil || dst == nil)
-		return 0;
+size_t memcpy(void* dst, const void* src) {
+  if (src == nil || dst == nil) return 0;
 
-	const char* src_chr = src;
-	char*		dst_chr = dst;
-	size_t		index	= 0;
-	size_t		len		= strlen(src);
+  const char* src_chr = src;
+  char*       dst_chr = dst;
+  size_t      index   = 0;
+  size_t      len     = strlen(src);
 
-	while (index < len)
-	{
-		dst_chr[index] = src_chr[index];
-		++index;
-	}
+  while (index < len) {
+    dst_chr[index] = src_chr[index];
+    ++index;
+  }
 
-	return 0;
+  return 0;
 }
 
 /* @brief unoptimized memcpy, TODO: use isa specific memcpy. */
-size_t memncpy(void* dst, const void* src, size_t len)
-{
+size_t memncpy(void* dst, const void* src, size_t len) {
 #if __OL == 3 && defined(__riscv)
-	riscv_memncpy(dst, src, len);
+  riscv_memncpy(dst, src, len);
 #else
 
-	if (src == nil || dst == nil)
-		return 0;
+  if (src == nil || dst == nil) return 0;
 
-	const char* src_chr = src;
-	char*		dst_chr = dst;
-	size_t		index	= 0;
+  const char* src_chr = src;
+  char*       dst_chr = dst;
+  size_t      index   = 0;
 
-	while (index < len)
-	{
-		dst_chr[index] = src_chr[index];
-		++index;
-	}
+  while (index < len) {
+    dst_chr[index] = src_chr[index];
+    ++index;
+  }
 
-	return 0;
+  return 0;
 #endif
 }
 
-size_t strlen(const char* str)
-{
-	if (*str == 0)
-		return 0;
+size_t strlen(const char* str) {
+  if (*str == 0) return 0;
 
-	size_t len = 0;
-	while (str[len] != '\0')
-		++len;
+  size_t len = 0;
+  while (str[len] != '\0') ++len;
 
-	return len;
+  return len;
 }
 
-size_t strnlen(const char* str, size_t len)
-{
-	size_t cnt = 0;
+size_t strnlen(const char* str, size_t len) {
+  size_t cnt = 0;
 
-	while (len > cnt)
-	{
-		++cnt;
+  while (len > cnt) {
+    ++cnt;
 
-		if (str[cnt] == '\0')
-			return (size_t)-1;
-	}
+    if (str[cnt] == '\0') return (size_t) -1;
+  }
 
-	return len;
+  return len;
 }
 
-void strreverse(char* s)
-{
-	if (s == nil)
-		return;
-	if (*s == '\0')
-		return;
+void strreverse(char* s) {
+  if (s == nil) return;
+  if (*s == '\0') return;
 
-	char *first, *last, temp;
+  char *first, *last, temp;
 
-	first = s;
-	last  = s + strlen(s) - 1;
+  first = s;
+  last  = s + strlen(s) - 1;
 
-	while (first != last)
-	{
-		temp	   = *first;
-		*(first++) = *last;
-		*(last--)  = temp;
-	}
+  while (first != last) {
+    temp       = *first;
+    *(first++) = *last;
+    *(last--)  = temp;
+  }
 }
 
-char* strchr(char* str, const char chr)
-{
-	while (*str != chr)
-	{
-		++str;
+char* strchr(char* str, const char chr) {
+  while (*str != chr) {
+    ++str;
 
-		if (*str == 0)
-			return nil;
-	}
+    if (*str == 0) return nil;
+  }
 
-	return str;
+  return str;
 }
 
 /// @brief Compare two strings.
 /// @param src source string
 /// @param cmp string to compare.
 /// @return
-size_t strcmp(caddr_t src, caddr_t cmp)
-{
-	if (src == null || *src == 0)
-		return 1;
-	if (cmp == null || *cmp == 0)
-		return 1;
-
-	int32_t counter = 0;
-
-	for (size_t index = 0; src[index] != 0; ++index)
-	{
-		if (cmp[index] != src[index])
-			++counter;
-	}
-
-	return counter;
+size_t strcmp(caddr_t src, caddr_t cmp) {
+  if (src == null || *src == 0) return 1;
+  if (cmp == null || *cmp == 0) return 1;
+
+  int32_t counter = 0;
+
+  for (size_t index = 0; src[index] != 0; ++index) {
+    if (cmp[index] != src[index]) ++counter;
+  }
+
+  return counter;
 }
diff --git a/src/hal/coreboot-ahci-driver.c b/src/hal/coreboot-ahci-driver.c
index 2ef2098..26a8907 100644
--- a/src/hal/coreboot-ahci-driver.c
+++ b/src/hal/coreboot-ahci-driver.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -15,8 +15,8 @@
  *
  */
 
-#include <lib/pci-tree.h>
 #include <lib/boot.h>
+#include <lib/pci-tree.h>
 
 #define CB_AHCI_DRIVER_NAME ("@sata")
 
@@ -24,85 +24,73 @@
 /// @brief AHCI support for PowerPC.
 
 /// @brief AHCI HBA port.
-typedef struct cb_hba_port
-{
-	uint32_t clb;			// 0x00, command list base address, 1K-byte aligned
-	uint32_t clbu;			// 0x04, command list base address upper 32 bits
-	uint32_t fb;			// 0x08, FIS base address, 256-byte aligned
-	uint32_t fbu;			// 0x0C, FIS base address upper 32 bits
-	uint32_t is;			// 0x10, interrupt status
-	uint32_t ie;			// 0x14, interrupt enable
-	uint32_t cmd;			// 0x18, command and status
-	uint32_t reserved0;		// 0x1C, Reserved
-	uint32_t tfd;			// 0x20, task file data
-	uint32_t sig;			// 0x24, signature
-	uint32_t ssts;			// 0x28, SATA status (SCR0:SStatus)
-	uint32_t sctl;			// 0x2C, SATA control (SCR2:SControl)
-	uint32_t serr;			// 0x30, SATA error (SCR1:SError)
-	uint32_t sact;			// 0x34, SATA active (SCR3:SActive)
-	uint32_t ci;			// 0x38, command issue
-	uint32_t sntf;			// 0x20, SATA notification (SCR4:SNotification)
-	uint32_t fbs;			// 0x40, FIS-based switch control
-	uint32_t reserved1[11]; // 0x44 ~ 0x6F, Reserved
-	uint32_t vendor[4];		// 0x70 ~ 0x7F, vendor specific
+typedef struct cb_hba_port {
+  uint32_t clb;            // 0x00, command list base address, 1K-byte aligned
+  uint32_t clbu;           // 0x04, command list base address upper 32 bits
+  uint32_t fb;             // 0x08, FIS base address, 256-byte aligned
+  uint32_t fbu;            // 0x0C, FIS base address upper 32 bits
+  uint32_t is;             // 0x10, interrupt status
+  uint32_t ie;             // 0x14, interrupt enable
+  uint32_t cmd;            // 0x18, command and status
+  uint32_t reserved0;      // 0x1C, Reserved
+  uint32_t tfd;            // 0x20, task file data
+  uint32_t sig;            // 0x24, signature
+  uint32_t ssts;           // 0x28, SATA status (SCR0:SStatus)
+  uint32_t sctl;           // 0x2C, SATA control (SCR2:SControl)
+  uint32_t serr;           // 0x30, SATA error (SCR1:SError)
+  uint32_t sact;           // 0x34, SATA active (SCR3:SActive)
+  uint32_t ci;             // 0x38, command issue
+  uint32_t sntf;           // 0x20, SATA notification (SCR4:SNotification)
+  uint32_t fbs;            // 0x40, FIS-based switch control
+  uint32_t reserved1[11];  // 0x44 ~ 0x6F, Reserved
+  uint32_t vendor[4];      // 0x70 ~ 0x7F, vendor specific
 } cb_hba_port_t;
 
 /// @brief Check if port is active.
 /// @param port host bus address port.
 /// @return whether sact is active or not.
-static boolean cb_hba_port_active(volatile cb_hba_port_t* port)
-{
-	if (!port)
-		return false;
+static boolean cb_hba_port_active(volatile cb_hba_port_t* port) {
+  if (!port) return false;
 
-	return port->sact;
+  return port->sact;
 }
 
 /// @brief Start HBA command processor.
 /// @param port host bus address port.
 /// @return whether it was successful or not.
-static boolean cb_hba_start_cmd(volatile cb_hba_port_t* port)
-{
-	if (!port)
-		return false;
+static boolean cb_hba_start_cmd(volatile cb_hba_port_t* port) {
+  if (!port) return false;
 
-	size_t timeout = 1000000;
+  size_t timeout = 1000000;
 
-	while ((port->cmd & 0x8000))
-	{
-		if (!timeout)
-			return false;
+  while ((port->cmd & 0x8000)) {
+    if (!timeout) return false;
 
-		--timeout;
-	}
+    --timeout;
+  }
 
-	port->cmd |= 0x0001;
-	port->cmd |= 0x0010;
+  port->cmd |= 0x0001;
+  port->cmd |= 0x0010;
 
-	return true;
+  return true;
 }
 
 /// @brief Stop HBA command from processing.
 /// @param port host bus address port.
 /// @return whether it was successful or not.
-static boolean cb_hba_stop_cmd(volatile cb_hba_port_t* port)
-{
-	if (!port)
-		return false;
+static boolean cb_hba_stop_cmd(volatile cb_hba_port_t* port) {
+  if (!port) return false;
 
-	port->cmd &= ~0x0001;
-	port->cmd &= ~0x0010;
+  port->cmd &= ~0x0001;
+  port->cmd &= ~0x0010;
 
-	while (yes)
-	{
-		if ((port->cmd & 0x8000))
-			continue;
+  while (yes) {
+    if ((port->cmd & 0x8000)) continue;
 
-		if ((port->cmd & 0x4000))
-			continue;
+    if ((port->cmd & 0x4000)) continue;
 
-		break;
-	}
+    break;
+  }
 
-	return true;
+  return true;
 }
diff --git a/src/hal/coreboot-flash.c b/src/hal/coreboot-flash.c
index 1416bc3..d1b0907 100644
--- a/src/hal/coreboot-flash.c
+++ b/src/hal/coreboot-flash.c
@@ -4,7 +4,7 @@ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
+#include <lib/boot.h>
 #include <lib/mp-bit.h>
 #include <lib/partition-map.h>
 #include <lib/pci-tree.h>
-#include <lib/boot.h>
diff --git a/src/ppc64/ppc64-err.c b/src/ppc64/ppc64-err.c
index 13d944c..1ef0089 100644
--- a/src/ppc64/ppc64-err.c
+++ b/src/ppc64/ppc64-err.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------

 

-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.

+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.

 

 ------------------------------------------- */

 

@@ -10,14 +10,12 @@
 

 /// @brief Goes into a panic state.

 /// @param reason why?

-void cb_panic(const char* reason)

-{

-	cb_put_string("Error: ");

-	cb_put_string(reason);

-	cb_put_char('\n');

+void cb_panic(const char* reason) {

+  cb_put_string("Error: ");

+  cb_put_string(reason);

+  cb_put_char('\n');

 

-	while (yes)

-	{

-		(void)0;

-	}

+  while (yes) {

+    (void) 0;

+  }

 }

diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
index f47f0b3..74d18c4 100644
--- a/src/ppc64/ppc64-hal.c
+++ b/src/ppc64/ppc64-hal.c
@@ -1,100 +1,87 @@
 /* -------------------------------------------

 

-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.

+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.

 

 ------------------------------------------- */

 

 #include <lib/ppc64/mmu.h>

 #include <lib/ppc64/processor.h>

 

-#include <lib/pci-tree.h>

 #include <lib/boot.h>

+#include <lib/pci-tree.h>

 

-void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)

-{

-	mtspr(MAS0, mas0);

-	mtspr(MAS1, mas1);

-	mtspr(MAS2, mas2);

-	mtspr(MAS3, mas3);

-	mtspr(MAS7, mas7);

+void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7) {

+  mtspr(MAS0, mas0);

+  mtspr(MAS1, mas1);

+  mtspr(MAS2, mas2);

+  mtspr(MAS3, mas3);

+  mtspr(MAS7, mas7);

 

-	cb_flush_tlb();

+  cb_flush_tlb();

 }

 

-void cb_set_tlb(uint8_t	 tlb,

-				uint32_t epn,

-				uint64_t rpn,

-				uint8_t	 perms,

-				uint8_t	 wimge,

-				uint8_t	 ts,

-				uint8_t	 esel,

-				uint8_t	 tsize,

-				uint8_t	 iprot)

-{

-	if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1))

-	{

-		// this mmu-version does not allow odd tsize values

-		return;

-	}

-

-	uint32_t mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);

-	uint32_t mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);

-	uint32_t mas2 = FSL_BOOKE_MAS2(epn, wimge);

-	uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);

-	uint32_t mas7 = FSL_BOOKE_MAS7(rpn);

-

-	cb_write_tlb(mas0, mas1, mas2, mas3, mas7);

+void cb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts,

+                uint8_t esel, uint8_t tsize, uint8_t iprot) {

+  if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1)) {

+    // this mmu-version does not allow odd tsize values

+    return;

+  }

+

+  uint32_t mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);

+  uint32_t mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);

+  uint32_t mas2 = FSL_BOOKE_MAS2(epn, wimge);

+  uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);

+  uint32_t mas7 = FSL_BOOKE_MAS7(rpn);

+

+  cb_write_tlb(mas0, mas1, mas2, mas3, mas7);

 }

 

 /// @brief Init hardware before jumping to kernel.

 /// @param

-void cb_init_hw(void)

-{

-

-	/// amlal:

-	/// map VGA framebuffer

-	cb_set_tlb(0, CB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */

-			   0x0000A000,			   /* p_addr. 0x0000A0000  */

-			   MAS3_SW | MAS3_SR,	   /* perm  type=TLB_MAP_IO */

-			   MAS2_I | MAS2_G,		   /* wimge type=TLB_MAP_IO */

-			   0,					   /* ts i.e AS=0 */

-			   1,					   /* esel (a.k.a tlb_index*/

-			   BOOKE_PAGESZ_64K,	   /* tsize  ie 2^10kB ie 1MB */

-			   1);

-

-	// map ccsrbar and uart.

-	// at start we execute from esel = 0, so chose something else..

-	cb_set_tlb(1, CB_UART_BASE,	  /* v_addr   0xe0000000 see  qemu-ppce500.h */

-			   0xfe0000000,		  /* p_addr. 0xfe0000000  */

-			   MAS3_SW | MAS3_SR, /* perm  type=TLB_MAP_IO */

-			   MAS2_I | MAS2_G,	  /* wimge type=TLB_MAP_IO */

-			   0,				  /* ts i.e AS=0 */

-			   2,				  /* esel (a.k.a tlb_index*/

-			   BOOKE_PAGESZ_1M,	  /* tsize  ie 2^10kB ie 1MB */

-			   1);

-

-	/// amlal:

-	/// map pci base for kernel

-	cb_set_tlb(0, CB_BASE_ADDRESS, /* v_addr, 0xFE008000 */

-			   0xFE0008000,		   /* p_addr. 0xfe0000000  */

-			   MAS3_SW | MAS3_SR,  /* perm  type=TLB_MAP_IO */

-			   MAS2_I | MAS2_G,	   /* wimge type=TLB_MAP_IO */

-			   0,				   /* ts i.e AS=0 */

-			   3,				   /* esel (a.k.a tlb_index*/

-			   BOOKE_PAGESZ_1M,	   /* tsize  ie 2^10kB ie 1MB */

-			   1);

-

-	cb_pci_init_tree();

-

-	cb_pci_append_tree("@fb", CB_FRAMEBUFFER_ADDR, 0x0);

-	cb_pci_append_tree("@mbci", 0x0, 0x0); // did not found a MBCI base for now...

-	cb_pci_append_tree("@serial", CB_UART_BASE, 0);

-	cb_pci_append_tree("@pci", CB_BASE_ADDRESS, 0x0);

-

-	cb_flush_tlb();

+void cb_init_hw(void) {

+  /// amlal:

+  /// map VGA framebuffer

+  cb_set_tlb(0, CB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */

+             0x0000A000,             /* p_addr. 0x0000A0000  */

+             MAS3_SW | MAS3_SR,      /* perm  type=TLB_MAP_IO */

+             MAS2_I | MAS2_G,        /* wimge type=TLB_MAP_IO */

+             0,                      /* ts i.e AS=0 */

+             1,                      /* esel (a.k.a tlb_index*/

+             BOOKE_PAGESZ_64K,       /* tsize  ie 2^10kB ie 1MB */

+             1);

+

+  // map ccsrbar and uart.

+  // at start we execute from esel = 0, so chose something else..

+  cb_set_tlb(1, CB_UART_BASE,   /* v_addr   0xe0000000 see  qemu-ppce500.h */

+             0xfe0000000,       /* p_addr. 0xfe0000000  */

+             MAS3_SW | MAS3_SR, /* perm  type=TLB_MAP_IO */

+             MAS2_I | MAS2_G,   /* wimge type=TLB_MAP_IO */

+             0,                 /* ts i.e AS=0 */

+             2,                 /* esel (a.k.a tlb_index*/

+             BOOKE_PAGESZ_1M,   /* tsize  ie 2^10kB ie 1MB */

+             1);

+

+  /// amlal:

+  /// map pci base for kernel

+  cb_set_tlb(0, CB_BASE_ADDRESS, /* v_addr, 0xFE008000 */

+             0xFE0008000,        /* p_addr. 0xfe0000000  */

+             MAS3_SW | MAS3_SR,  /* perm  type=TLB_MAP_IO */

+             MAS2_I | MAS2_G,    /* wimge type=TLB_MAP_IO */

+             0,                  /* ts i.e AS=0 */

+             3,                  /* esel (a.k.a tlb_index*/

+             BOOKE_PAGESZ_1M,    /* tsize  ie 2^10kB ie 1MB */

+             1);

+

+  cb_pci_init_tree();

+

+  cb_pci_append_tree("@fb", CB_FRAMEBUFFER_ADDR, 0x0);

+  cb_pci_append_tree("@mbci", 0x0, 0x0);  // did not found a MBCI base for now...

+  cb_pci_append_tree("@serial", CB_UART_BASE, 0);

+  cb_pci_append_tree("@pci", CB_BASE_ADDRESS, 0x0);

+

+  cb_flush_tlb();

 }

 

-void cb_flush_tlb(void)

-{

-	asm volatile("isync;tlbwe;msync;isync");

+void cb_flush_tlb(void) {

+  asm volatile("isync;tlbwe;msync;isync");

 };

diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c
index c908eae..c16657d 100644
--- a/src/ppc64/ppc64-uart.c
+++ b/src/ppc64/ppc64-uart.c
@@ -1,48 +1,43 @@
 /* -------------------------------------------

 

-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.

+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.

 

 ------------------------------------------- */

 

-#include <lib/string.h>

 #include <lib/boot.h>

+#include <lib/string.h>

 

 /// BUGS: 0

 

 #define CB_NS16550_COM1 (CB_UART_BASE + 0x4500)

 #define CB_NS16550_COM2 (CB_UART_BASE + 0x4600)

 

-volatile ascii_char_t* const UART0DR = (ascii_char_t*)CB_NS16550_COM1;

+volatile ascii_char_t* const UART0DR = (ascii_char_t*) CB_NS16550_COM1;

 

 /* this file handles the UART */

 

 /// @brief Get character from UART.

 /// @param

 /// @return

-utf_char_t cb_get_char(void)

-{

-	while (!(*(((volatile uint8_t*)UART0DR) + 0x05) & 0x01))

-		;

-	return (utf_char_t)*UART0DR;

+utf_char_t cb_get_char(void) {

+  while (!(*(((volatile uint8_t*) UART0DR) + 0x05) & 0x01));

+  return (utf_char_t) *UART0DR;

 }

 

 /// @brief Put character into UART.

 /// @param ch

-void cb_put_char(utf_char_t ch)

-{

-	*UART0DR = (ascii_char_t)(ch);

+void cb_put_char(utf_char_t ch) {

+  *UART0DR = (ascii_char_t) (ch);

 }

 

 /// @brief Put string in UART.

 /// @param text the input text.

-size_t cb_put_string(const char* text)

-{

-	while (*text != '\0')

-	{ /* Loop until end of string */

+size_t cb_put_string(const char* text) {

+  while (*text != '\0') { /* Loop until end of string */

 

-		cb_put_char(*text); /* Transmit char */

+    cb_put_char(*text); /* Transmit char */

 

-		text++; /* Next char */

-	}

-	return 0;

+    text++; /* Next char */

+  }

+  return 0;

 }

diff --git a/src/rv64/rv64-err.c b/src/rv64/rv64-err.c
index 19d0f3c..a616d83 100644
--- a/src/rv64/rv64-err.c
+++ b/src/rv64/rv64-err.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -10,14 +10,12 @@
 
 /// @brief Goes into a panic state.
 /// @param reason why?
-void cb_panic(const char* reason)
-{
-	cb_put_string("Error: ");
-	cb_put_string(reason);
-	cb_put_char('\n');
+void cb_panic(const char* reason) {
+  cb_put_string("Error: ");
+  cb_put_string(reason);
+  cb_put_char('\n');
 
-	while (yes)
-	{
-		asm volatile("wfi");
-	}
+  while (yes) {
+    asm volatile("wfi");
+  }
 }
diff --git a/src/rv64/rv64-uart.c b/src/rv64/rv64-uart.c
index 0bc6517..a859add 100644
--- a/src/rv64/rv64-uart.c
+++ b/src/rv64/rv64-uart.c
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+  Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -11,51 +11,43 @@
 
 /* this file handles the UART */
 
-static uint8_t* cb_uart_ptr = (uint8_t*)CB_UART_BASE;
+static uint8_t* cb_uart_ptr = (uint8_t*) CB_UART_BASE;
 
-utf_char_t cb_get_char(void)
-{
-	uintptr_t ptr = CB_UART_BASE;
+utf_char_t cb_get_char(void) {
+  uintptr_t ptr = CB_UART_BASE;
 
-	while (!(*(((volatile uint8_t*)ptr) + 0x05) & 0x01))
-		;
+  while (!(*(((volatile uint8_t*) ptr) + 0x05) & 0x01));
 
-	return (utf_char_t)*cb_uart_ptr;
+  return (utf_char_t) *cb_uart_ptr;
 }
 
 // we need that one, to avoid sending mutliple chars to UART.
 static boolean cb_locked_put_char = no;
 
-void cb_put_char(utf_char_t ch)
-{
-	int32_t timeout = 0;
+void cb_put_char(utf_char_t ch) {
+  int32_t timeout = 0;
 
-	while (cb_locked_put_char)
-	{
-		++timeout;
+  while (cb_locked_put_char) {
+    ++timeout;
 
-		if (timeout > 1000000)
-			break;
-	}
+    if (timeout > 1000000) break;
+  }
 
-	cb_locked_put_char = yes;
-	*cb_uart_ptr	   = ch;
-	cb_locked_put_char = no;
+  cb_locked_put_char = yes;
+  *cb_uart_ptr       = ch;
+  cb_locked_put_char = no;
 }
 
 /// @brief UART put string
 /// @param text the input text.
-size_t cb_put_string(const char* text)
-{
-	if (text == nil)
-		return 0;
+size_t cb_put_string(const char* text) {
+  if (text == nil) return 0;
 
-	size_t i = 0;
+  size_t i = 0;
 
-	for (; i < strlen(text); i++)
-	{
-		cb_put_char(text[i]);
-	}
+  for (; i < strlen(text); i++) {
+    cb_put_char(text[i]);
+  }
 
-	return i;
+  return i;
 }