ADD: tweaks.

Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>

5 files changed, 24 insertions, 16 deletions

diff --git a/src/arm64/arm64-30pin.c b/src/arm64/arm64-30pin.c
index aca7628..ed6b4db 100644
--- a/src/arm64/arm64-30pin.c
+++ b/src/arm64/arm64-30pin.c
@@ -10,4 +10,10 @@ extern size_t mp_send_read_30pin(voidptr_t blob, size_t* size, size_t* start_lba
 
 /// @note This version is for the 30-pin recovery system.
 
-struct TRB_PACKET;
\ No newline at end of file
+struct TRB_PACKET
+{
+    char mag[2];
+    char kind;
+    char buffer[498];
+    char eop[11];
+};
\ No newline at end of file
diff --git a/src/coreboot-pci-tree.c b/src/coreboot-pci-tree.c
index e5082d2..4e3469c 100644
--- a/src/coreboot-pci-tree.c
+++ b/src/coreboot-pci-tree.c
@@ -21,7 +21,7 @@
 /// BUGS: 0
 
 /// Standard Root table (Mahrouss Table)
-#define SYS_PCI_ROOT_NAME "/elmh/@/"
+#define SYS_PCI_ROOT_NAME "/swirl/@/"
 
 static struct hw_mp_pci_tree* mp_base_tree	 = nil;
 static struct hw_mp_pci_tree* mp_latest_tree = nil;
diff --git a/src/coreboot-start.c b/src/coreboot-start.c
index 295ffee..46453ca 100644
--- a/src/coreboot-start.c
+++ b/src/coreboot-start.c
@@ -46,28 +46,28 @@ void mp_start_exec(void)
 	// let the hart 0 init our stuff.
 	if (hart == 1)
 	{
-		mp_put_string("TQ> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
+		mp_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
 		mp_put_string(__DATE__);
 		mp_put_string("\r\r\n");
 
 #ifdef __COMPILE_POWERPC__
-		mp_put_string("TQ> CPU: PowerPC 64-bit Based SoC.\r\r\n");
+		mp_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
 #endif // __COMPILE_POWERPC__
 
 #ifdef __COMPILE_AMD64__
-		mp_put_string("TQ> CPU: x64 Based SoC.\r\r\n");
+		mp_put_string("CB> CPU: x64 Based SoC.\r\r\n");
 #endif // __COMPILE_AMD64__
 
 #ifdef __COMPILE_ARM64__
-		mp_put_string("TQ> CPU: AArch64 Based SoC.\r\r\n");
+		mp_put_string("CB> CPU: AArch64 Based SoC.\r\r\n");
 #endif // __COMPILE_ARM64__
 
 #ifdef __COMPILE_ARM32__
-		mp_put_string("TQ> CPU: AArch32 Based SoC.\r\r\n");
+		mp_put_string("CB> CPU: AArch32 Based SoC.\r\r\n");
 #endif // __COMPILE_ARM64__
 
 #ifdef __COMPILE_RISCV__
-		mp_put_string("TQ> CPU: RV64 Based SoC.\r\r\n");
+		mp_put_string("CB> CPU: RV64 Based SoC.\r\r\n");
 #endif // __COMPILE_RISCV__
 	}
 
@@ -89,19 +89,19 @@ void mp_start_exec(void)
 		{
 			if (hart == 1)
 			{
-				mp_put_string("TQ> Can't Boot the Stage2, invalid signature. (CB0003)\r\n");
+				mp_put_string("CB> Can't Boot the Stage2, invalid signature. (CB0003)\r\n");
 			}
 		}
 		else
 		{
 			if (hart == 1)
 			{
-				mp_put_string("TQ> Executing Stage2: ");
+				mp_put_string("CB> Executing Stage2: ");
 				mp_put_string((const char*)boot_hdr->h_name);
 				mp_put_char('\r');
 				mp_put_char('\n');
 
-				// printf("TQ> address: %x\n", boot_hdr->h_start_address);
+				// printf("CB> address: %x\n", boot_hdr->h_start_address);
 			}
 
 			if (boot_hdr->h_start_address != 0)
@@ -110,14 +110,14 @@ void mp_start_exec(void)
 				mp_start_context(boot_hdr->h_start_address);
 			}
 
-			mp_put_string("TQ> Stage2 has returned? (CB0002)\r\n");
+			mp_put_string("CB> Stage2 has returned? (CB0002)\r\n");
 		}
 	}
 	else
 	{
 		if (hart == 1)
 		{
-			mp_put_string("TQ> Can't boot to Stage2. (CB0001)\r\n");
+			mp_put_string("CB> Can't boot to Stage2. (CB0001)\r\n");
 		}
 	}
 
diff --git a/src/ppc64/makefile b/src/ppc64/makefile
index 9098a05..03d524f 100644
--- a/src/ppc64/makefile
+++ b/src/ppc64/makefile
@@ -8,8 +8,8 @@
  # 	========================================================

  #

 

-CC=powerpc-linux-gnu-gcc

-AS=powerpc-linux-gnu-as

+CC=ppc-elf-gcc

+AS=ppc-elf-as

 

 FIRMWARE=boot.rom

 

@@ -20,7 +20,7 @@ C_SRC=$(wildcard *.c) $(wildcard ../*.c) -c
 

 AS_FLAGS= -c -I../../

 

-LD=powerpc-linux-gnu-ld

+LD=ppc-elf-ld

 OBJ=*.o

 FLAGS_LD= --script=linkscript.ld -o core-boot.elf -nostdlib

 

diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
index 827471b..336c0e9 100644
--- a/src/ppc64/ppc64-hal.c
+++ b/src/ppc64/ppc64-hal.c
@@ -89,6 +89,8 @@ void mp_init_hw(void)
 	mp_pci_append_tree("@mbci", 0x0, 0x0);

 	mp_pci_append_tree("@serial", SYS_UART_BASE, 0);

 	mp_pci_append_tree("@pci", SYS_BASE_ADDRESS, 0x0);

+

+	mp_flush_tlb();

 }

 

 void mp_flush_tlb(void)