summaryrefslogtreecommitdiffhomepage
path: root/src/coreboot-start.c
blob: 46453cae40aeef44850c555c615707267207d208 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
/* -------------------------------------------

    Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.

------------------------------------------- */

#include <lib/mp-bit.h>
#include <lib/partition-map.h>
#include <lib/pci-tree.h>
#include <lib/boot.h>

/// BUGS: 0

/////////////////////////////////////////////////////////////////////////////////////////

// @name start.c //

// @brief Start file // This is where the firmware starts it's initialization //
// code. //

// @author Amlal EL Mahrouss //

/////////////////////////////////////////////////////////////////////////////////////////

extern void mp_append_scsi_tree(void);
extern void mp_append_video_tree(void);

extern void mp_start_context(uintptr_t);
extern void mp_start_rom(void);

extern int mp_boot_processor_ready;

/// @brief hardware thread counter.
uint64_t __mp_hart_counter = 0UL;

/// @brief Start executing the firmware.
/// @param
void mp_start_exec(void)
{
	++__mp_hart_counter;

	uintptr_t hart = __mp_hart_counter;

	mp_sync_synchronize();

	// let the hart 0 init our stuff.
	if (hart == 1)
	{
		mp_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
		mp_put_string(__DATE__);
		mp_put_string("\r\r\n");

#ifdef __COMPILE_POWERPC__
		mp_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
#endif // __COMPILE_POWERPC__

#ifdef __COMPILE_AMD64__
		mp_put_string("CB> CPU: x64 Based SoC.\r\r\n");
#endif // __COMPILE_AMD64__

#ifdef __COMPILE_ARM64__
		mp_put_string("CB> CPU: AArch64 Based SoC.\r\r\n");
#endif // __COMPILE_ARM64__

#ifdef __COMPILE_ARM32__
		mp_put_string("CB> CPU: AArch32 Based SoC.\r\r\n");
#endif // __COMPILE_ARM64__

#ifdef __COMPILE_RISCV__
		mp_put_string("CB> CPU: RV64 Based SoC.\r\r\n");
#endif // __COMPILE_RISCV__
	}

	/// @brief Boots here if LX header matches what we except.

	volatile struct mp_boot_header* boot_hdr =
		(volatile struct mp_boot_header*)(SYS_FLASH_BASE_ADDR);

	/**
      boot if:
          - ident matches.
          - version matches.
  */

	if (boot_hdr->h_mag[0] == SYS_BOOT_MAG_0 &&
		boot_hdr->h_mag[1] == SYS_BOOT_MAG_1)
	{
		if (boot_hdr->h_revision != SYS_BOOT_VER)
		{
			if (hart == 1)
			{
				mp_put_string("CB> Can't Boot the Stage2, invalid signature. (CB0003)\r\n");
			}
		}
		else
		{
			if (hart == 1)
			{
				mp_put_string("CB> Executing Stage2: ");
				mp_put_string((const char*)boot_hdr->h_name);
				mp_put_char('\r');
				mp_put_char('\n');

				// printf("CB> address: %x\n", boot_hdr->h_start_address);
			}

			if (boot_hdr->h_start_address != 0)
			{
				mp_boot_processor_ready = 1;
				mp_start_context(boot_hdr->h_start_address);
			}

			mp_put_string("CB> Stage2 has returned? (CB0002)\r\n");
		}
	}
	else
	{
		if (hart == 1)
		{
			mp_put_string("CB> Can't boot to Stage2. (CB0001)\r\n");
		}
	}

	/// end of TODO

	if (hart > 1)
	{
		while (1)
		{
			if (__mp_hart_counter == 0)
			{
				mp_restart_machine();
			}
		}
	}
}