MHR-36: Expose POWER64 VMS and common StackFrame across platforms. And code refactors.

Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>

1 files changed, 14 insertions, 17 deletions

diff --git a/Kernel/HALKit/POWER/HalVirtualMemory.cxx b/Kernel/HALKit/POWER/HalVirtualMemory.cxx
index eb04a43d..d068a374 100644
--- a/Kernel/HALKit/POWER/HalVirtualMemory.cxx
+++ b/Kernel/HALKit/POWER/HalVirtualMemory.cxx
@@ -7,20 +7,14 @@
 #include <HALKit/POWER/ppc-cpu.h>
 #include <HALKit/POWER/ppc-mmu.h>
 
-#include <HALKit/POWER/Processor.hpp>
+#include <HALKit/POWER/Processor.hxx>
 #include <KernelKit/DebugOutput.hpp>
 
-/// @note refer to our SoC documentation.
+/// @note refer to the SoC documentation.
 
 using namespace Kernel;
 
-/// @brief Write directly to the specific TLB.
-/// @param mas0
-/// @param mas1
-/// @param mas2
-/// @param mas3
-/// @param mas7
-static void hal_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)
+Void hal_write_tlb(UInt32 mas0, UInt32 mas1, UInt32 mas2, UInt32 mas3, UInt32 mas7)
 {
 	mtspr(MAS0, mas0);
 	mtspr(MAS1, mas1);
@@ -31,23 +25,26 @@ static void hal_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t
 	hal_flush_tlb();
 }
 
-void hal_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts, uint8_t esel, uint8_t tsize, uint8_t iprot)
+Bool hal_set_tlb(UInt8 tlb, UInt32 epn, UInt64 rpn, UInt8 perms, UInt8 wimge, UInt8 ts, UInt8 esel, UInt8 tsize, UInt8 iprot)
 {
 	if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1))
 	{
 		// this mmu-version does not allow odd tsize values
-		return;
+		return false;
 	}
-	uint32_t mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
-	uint32_t mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
-	uint32_t mas2 = FSL_BOOKE_MAS2(epn, wimge);
-	uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
-	uint32_t mas7 = FSL_BOOKE_MAS7(rpn);
+
+	UInt32 mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
+	UInt32 mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
+	UInt32 mas2 = FSL_BOOKE_MAS2(epn, wimge);
+	UInt32 mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
+	UInt32 mas7 = FSL_BOOKE_MAS7(rpn);
 
 	hal_write_tlb(mas0, mas1, mas2, mas3, mas7);
+
+	return true;
 }
 
-/// @brief Flush system TLB.
+/// @brief Flush TLB
 EXTERN_C void hal_flush_tlb()
 {
 	asm volatile("isync;tlbwe;msync;isync");