diff options
| author | Amlal El Mahrouss <amlal.elmahrouss@icloud.com> | 2024-01-29 18:17:47 +0100 |
|---|---|---|
| committer | Amlal El Mahrouss <amlal.elmahrouss@icloud.com> | 2024-01-29 18:18:59 +0100 |
| commit | 65254486efff0fd1bb78a48ff90b7713a5ce539f (patch) | |
| tree | 20ce02c12a74ba9e6cd382bf9c1f09a0c611cb4d /Private/HALKit | |
| parent | f03986937db0b927da4b10554801e18e4dc7c43f (diff) | |
Kernel: Update TODO.
Src: Refactorings according to clang-format.
Meta: Update specification.
Public: Remove useless UIKit.
Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>
Diffstat (limited to 'Private/HALKit')
34 files changed, 798 insertions, 981 deletions
diff --git a/Private/HALKit/AMD64/ACPI/ACPI.hpp b/Private/HALKit/AMD64/ACPI/ACPI.hpp index 590358ff..aa408c6f 100644 --- a/Private/HALKit/AMD64/ACPI/ACPI.hpp +++ b/Private/HALKit/AMD64/ACPI/ACPI.hpp @@ -13,60 +13,53 @@ #include <NewKit/Defines.hpp> namespace hCore { - class SDT { - public: - Char Signature[4]; - UInt32 Length; - UInt8 Revision; - Char Checksum; - Char OemId[6]; - Char OemTableId[8]; - UInt32 OemRev; - UInt32 CreatorID; - UInt32 CreatorRevision; - }; +class SDT { + public: + Char Signature[4]; + UInt32 Length; + UInt8 Revision; + Char Checksum; + Char OemId[6]; + Char OemTableId[8]; + UInt32 OemRev; + UInt32 CreatorID; + UInt32 CreatorRevision; +}; - class RSDP : public SDT - { - public: - UInt32 RsdtAddress; - UIntPtr XsdtAddress; - UInt8 ExtendedChecksum; - UInt8 Reserved0[3]; +class RSDP : public SDT { + public: + UInt32 RsdtAddress; + UIntPtr XsdtAddress; + UInt8 ExtendedChecksum; + UInt8 Reserved0[3]; +}; - }; +class ConfigHeader { + public: + UInt64 BaseAddress; + UInt16 PciSegGroup; + UInt8 StartBus; + UInt8 EndBus; + UInt32 Reserved; +}; - class ConfigHeader - { - public: - UInt64 BaseAddress; - UInt16 PciSegGroup; - UInt8 StartBus; - UInt8 EndBus; - UInt32 Reserved; +enum class AddressSpace : UInt8 { + SystemMemory = 0, + SystemIO = 1, + Pci = 2, + Controller = 3, + SmBus = 4, + Invalid = 0xFF, +}; - }; +class Address { + public: + AddressSpace AddressSpaceId; + UInt8 RegisterBitWidth; + UInt8 RegisterBitOffset; + UInt8 Reserved; + UIntPtr Address; +}; +} // namespace hCore - enum class AddressSpace : UInt8 - { - SystemMemory = 0, - SystemIO = 1, - Pci = 2, - Controller = 3, - SmBus = 4, - Invalid = 0xFF, - }; - - class Address - { - public: - AddressSpace AddressSpaceId; - UInt8 RegisterBitWidth; - UInt8 RegisterBitOffset; - UInt8 Reserved; - UIntPtr Address; - - }; -} // namespace hCore - -#endif // !_INC_ACPI_MANAGER_H +#endif // !_INC_ACPI_MANAGER_H diff --git a/Private/HALKit/AMD64/ACPI/ACPIManager.hpp b/Private/HALKit/AMD64/ACPI/ACPIManager.hpp index 63afe972..385ea854 100644 --- a/Private/HALKit/AMD64/ACPI/ACPIManager.hpp +++ b/Private/HALKit/AMD64/ACPI/ACPIManager.hpp @@ -15,38 +15,36 @@ #include <NewKit/Defines.hpp> #include <NewKit/Ref.hpp> -namespace hCore -{ - class ACPIManager - { - public: - ACPIManager(voidPtr rsdptr); +namespace hCore { +class ACPIManager { + public: + ACPIManager(voidPtr rsdptr); - public: - ~ACPIManager() = default; + public: + ~ACPIManager() = default; - ACPIManager &operator=(const ACPIManager &) = default; + ACPIManager &operator=(const ACPIManager &) = default; - ACPIManager(const ACPIManager &) = default; + ACPIManager(const ACPIManager &) = default; - public: - void Shutdown(); // shutdown - void Reset(); // soft-reboot + public: + void Shutdown(); // shutdown + void Reset(); // soft-reboot - ErrorOr <voidPtr> Find(const char *signature); + ErrorOr<voidPtr> Find(const char *signature); - bool Checksum(const char *checksum, SSizeT len); // watch for collides! + bool Checksum(const char *checksum, SSizeT len); // watch for collides! - public: - ErrorOr <voidPtr> operator[](const char *signature) { - return this->Find(signature); - } + public: + ErrorOr<voidPtr> operator[](const char *signature) { + return this->Find(signature); + } - private: - VoidPtr m_Rsdp; // pointer to root descriptor. - SSizeT m_Entries; // number of entries, -1 tells that no invalid entries were found. + private: + VoidPtr m_Rsdp; // pointer to root descriptor. + SSizeT m_Entries; // number of entries, -1 tells that no invalid entries were + // found. +}; +} // namespace hCore - }; -} // namespace hCore - -#endif // !_INC_ACPI_H +#endif // !_INC_ACPI_H diff --git a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp index 0f5e6f68..0ca172a9 100644 --- a/Private/HALKit/AMD64/ACPIManagerAMD64.cpp +++ b/Private/HALKit/AMD64/ACPIManagerAMD64.cpp @@ -8,85 +8,62 @@ */ #include <HALKit/AMD64/ACPI/ACPIManager.hpp> -#include <NewKit/String.hpp> - #include <HALKit/AMD64/Processor.hpp> +#include <NewKit/String.hpp> -namespace hCore -{ -ACPIManager::ACPIManager(voidPtr rsdPtr) : m_Rsdp(rsdPtr), m_Entries(0) -{ - RSDP *_rsdPtr = reinterpret_cast<RSDP *>(this->m_Rsdp); +namespace hCore { +ACPIManager::ACPIManager(voidPtr rsdPtr) : m_Rsdp(rsdPtr), m_Entries(0) { + RSDP *_rsdPtr = reinterpret_cast<RSDP *>(this->m_Rsdp); - MUST_PASS(_rsdPtr); - MUST_PASS(_rsdPtr->Revision >= 2); + MUST_PASS(_rsdPtr); + MUST_PASS(_rsdPtr->Revision >= 2); } -void ACPIManager::Shutdown() -{ -} -void ACPIManager::Reset() -{ -} +void ACPIManager::Shutdown() {} +void ACPIManager::Reset() {} -ErrorOr<voidPtr> ACPIManager::Find(const char *signature) -{ - MUST_PASS(m_Rsdp); +ErrorOr<voidPtr> ACPIManager::Find(const char *signature) { + MUST_PASS(m_Rsdp); - if (!signature) - return ErrorOr<voidPtr>{-2}; + if (!signature) return ErrorOr<voidPtr>{-2}; - if (*signature == 0) - return ErrorOr<voidPtr>{-3}; + if (*signature == 0) return ErrorOr<voidPtr>{-3}; - RSDP *rsdPtr = reinterpret_cast<RSDP *>(this->m_Rsdp); + RSDP *rsdPtr = reinterpret_cast<RSDP *>(this->m_Rsdp); - auto xsdt = rsdPtr->XsdtAddress; - SizeT num = (rsdPtr->Length + sizeof(SDT)) / 8; + auto xsdt = rsdPtr->XsdtAddress; + SizeT num = (rsdPtr->Length + sizeof(SDT)) / 8; - for (Size index = 0; index < num; ++index) - { - SDT *sdt = reinterpret_cast<SDT *>(xsdt + sizeof(SDT) + index * 8); + for (Size index = 0; index < num; ++index) { + SDT *sdt = reinterpret_cast<SDT *>(xsdt + sizeof(SDT) + index * 8); - if (!Checksum(sdt->Signature, 4)) - panic(RUNTIME_CHECK_ACPI); + if (!Checksum(sdt->Signature, 4)) panic(RUNTIME_CHECK_ACPI); - if (StringBuilder::Equals(const_cast<const char *>(sdt->Signature), signature)) - return ErrorOr<voidPtr>(reinterpret_cast<voidPtr>(sdt)); - } + if (StringBuilder::Equals(const_cast<const char *>(sdt->Signature), + signature)) + return ErrorOr<voidPtr>(reinterpret_cast<voidPtr>(sdt)); + } - return ErrorOr<voidPtr>{-1}; + return ErrorOr<voidPtr>{-1}; } -bool ACPIManager::Checksum(const char *checksum, SSizeT len) -{ - if (len == 0) - return -1; +bool ACPIManager::Checksum(const char *checksum, SSizeT len) { + if (len == 0) return -1; - char chr = 0; + char chr = 0; - for (int index = 0; index < len; ++index) - { - chr += checksum[index]; - } + for (int index = 0; index < len; ++index) { + chr += checksum[index]; + } - return chr == 0; + return chr == 0; } -void rt_shutdown_acpi_qemu_20(void) -{ - HAL::out16(0xb004, 0x2000); -} +void rt_shutdown_acpi_qemu_20(void) { HAL::out16(0xb004, 0x2000); } -void rt_shutdown_acpi_qemu_30_plus(void) -{ - HAL::out16(0x604, 0x2000); -} +void rt_shutdown_acpi_qemu_30_plus(void) { HAL::out16(0x604, 0x2000); } -void rt_shutdown_acpi_virtualbox(void) -{ - HAL::out16(0x4004, 0x3400); -} +void rt_shutdown_acpi_virtualbox(void) { HAL::out16(0x4004, 0x3400); } /// you'll have to parse the MADT otherwise! -} // namespace hCore +} // namespace hCore diff --git a/Private/HALKit/AMD64/CoreInterruptHandlerAMD64.cpp b/Private/HALKit/AMD64/CoreInterruptHandlerAMD64.cpp index fd037c5f..23262109 100644 --- a/Private/HALKit/AMD64/CoreInterruptHandlerAMD64.cpp +++ b/Private/HALKit/AMD64/CoreInterruptHandlerAMD64.cpp @@ -8,75 +8,74 @@ */ #include <ArchKit/Arch.hpp> -#include <NewKit/String.hpp> #include <KernelKit/ProcessManager.hpp> +#include <NewKit/String.hpp> -extern "C" void idt_handle_system_call(hCore::UIntPtr rsp) -{ - hCore::HAL::StackFrame *sf = reinterpret_cast<hCore::HAL::StackFrame*>(rsp); - rt_syscall_handle(sf); +extern "C" void idt_handle_system_call(hCore::UIntPtr rsp) { + hCore::HAL::StackFrame *sf = reinterpret_cast<hCore::HAL::StackFrame *>(rsp); + rt_syscall_handle(sf); - hCore::kcout << "System Call with ID: " << hCore::StringBuilder::FromInt("syscall{%}", sf->SID); + hCore::kcout << "System Call with ID: " + << hCore::StringBuilder::FromInt("syscall{%}", sf->SID); } -extern "C" void idt_handle_gpf(hCore::UIntPtr rsp) -{ - MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); +extern "C" void idt_handle_gpf(hCore::UIntPtr rsp) { + MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); - hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); + hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); - hCore::kcout << "General Protection Fault, Caused by " - << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); + hCore::kcout + << "General Protection Fault, Caused by " + << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); - hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); + hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); } -extern "C" void idt_handle_scheduler(hCore::UIntPtr rsp) -{ - hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); +extern "C" void idt_handle_scheduler(hCore::UIntPtr rsp) { + hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); - hCore::kcout << "Will be scheduled back later " - << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); + hCore::kcout + << "Will be scheduled back later " + << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); - /// schedule another process. - if (!hCore::ProcessHelper::StartScheduling()) - { - hCore::kcout << "Let's continue schedule this process...\r\n"; - } + /// schedule another process. + if (!hCore::ProcessHelper::StartScheduling()) { + hCore::kcout << "Let's continue schedule this process...\r\n"; + } } -extern "C" void idt_handle_pf(hCore::UIntPtr rsp) -{ - hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); +extern "C" void idt_handle_pf(hCore::UIntPtr rsp) { + hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); - MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); + MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); - hCore::kcout << "Segmentation Fault, Caused by " - << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); + hCore::kcout + << "Segmentation Fault, Caused by " + << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); - hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); + hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); } -extern "C" void idt_handle_math(hCore::UIntPtr rsp) -{ - hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); +extern "C" void idt_handle_math(hCore::UIntPtr rsp) { + hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); - MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); + MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); - hCore::kcout << "Math error, Caused by " - << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); + hCore::kcout + << "Math error, Caused by " + << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); - hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); + hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); } -extern "C" void idt_handle_generic(hCore::UIntPtr rsp) -{ - hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); +extern "C" void idt_handle_generic(hCore::UIntPtr rsp) { + hCore::kcout << hCore::StringBuilder::FromInt("sp{%}", rsp); - MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); + MUST_PASS(hCore::ProcessManager::Shared().Leak().GetCurrent()); - hCore::kcout << "Processor error, Caused by " - << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); + hCore::kcout + << "Processor error, Caused by " + << hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().GetName(); - hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); + hCore::ProcessManager::Shared().Leak().GetCurrent().Leak().Crash(); } diff --git a/Private/HALKit/AMD64/CoreMultiProcessingAMD64.cpp b/Private/HALKit/AMD64/CoreMultiProcessingAMD64.cpp index 14a7a06b..330a90e6 100644 --- a/Private/HALKit/AMD64/CoreMultiProcessingAMD64.cpp +++ b/Private/HALKit/AMD64/CoreMultiProcessingAMD64.cpp @@ -7,128 +7,121 @@ * ======================================================== */ -#include <HALKit/AMD64/Processor.hpp> #include <HALKit/AMD64/ACPI/ACPIManager.hpp> +#include <HALKit/AMD64/Processor.hpp> /////////////////////////////////////////////////////////////////////////////////////// //! NOTE: fGSI stands 'Field Global System Interrupt' -namespace hCore::HAL -{ - constexpr Int32 kThreadAPIC = 0; - constexpr Int32 kThreadLAPIC = 1; - constexpr Int32 kThreadIOAPIC = 2; - constexpr Int32 kThreadAPIC64 = 3; - constexpr Int32 kThreadBoot = 4; - - /* - * - * this is used to store info about the current running thread - * we use this struct to determine if we can use it, or mark it as used or on sleep. - * - */ - - struct ProcessorInfoAMD64 final - { - Int32 ThreadType; - UIntPtr JumpAddress; - - struct - { - UInt32 Code; - UInt32 Data; - UInt32 BSS; - } Selector; - }; - - static voidPtr kApicMadt = nullptr; - static const char* kApicSignature = "APIC"; - - struct Madt final - { - char fMag[4]; - Int32 fLength; - char fRev; - - struct MadtAddress final - { - UInt32 fPhysicalAddress; - UInt32 fFlags; // 1 = Dual Legacy PICs installed - - Char fType; - Char fRecLen; // record length - }; - }; - - struct MadtProcessorLocalApic final - { - Char fProcessorId; - Char fApicId; - UInt32 fFlags; - }; - - struct MadtIOApic final - { - Char fApicId; - Char fReserved; - UInt32 fAddress; - UInt32 fSystemInterruptBase; - }; - - struct MadtInterruptSource final - { - Char fBusSource; - Char fIrqSource; - UInt32 fGSI; - UInt16 fFlags; - }; - - struct MadtInterruptNmi final - { - Char fNmiSource; - Char fReserved; - UInt16 fFlags; - UInt32 fGSI; - }; - - struct MadtLocalApicAddressOverride final { UInt16 fResvered; UIntPtr fAddress; }; +namespace hCore::HAL { +constexpr Int32 kThreadAPIC = 0; +constexpr Int32 kThreadLAPIC = 1; +constexpr Int32 kThreadIOAPIC = 2; +constexpr Int32 kThreadAPIC64 = 3; +constexpr Int32 kThreadBoot = 4; + +/* + * + * this is used to store info about the current running thread + * we use this struct to determine if we can use it, or mark it as used or on + * sleep. + * + */ + +struct ProcessorInfoAMD64 final { + Int32 ThreadType; + UIntPtr JumpAddress; + + struct { + UInt32 Code; + UInt32 Data; + UInt32 BSS; + } Selector; +}; + +static voidPtr kApicMadt = nullptr; +static const char* kApicSignature = "APIC"; + +struct Madt final { + char fMag[4]; + Int32 fLength; + char fRev; + + struct MadtAddress final { + UInt32 fPhysicalAddress; + UInt32 fFlags; // 1 = Dual Legacy PICs installed + + Char fType; + Char fRecLen; // record length + }; +}; + +struct MadtProcessorLocalApic final { + Char fProcessorId; + Char fApicId; + UInt32 fFlags; +}; + +struct MadtIOApic final { + Char fApicId; + Char fReserved; + UInt32 fAddress; + UInt32 fSystemInterruptBase; +}; + +struct MadtInterruptSource final { + Char fBusSource; + Char fIrqSource; + UInt32 fGSI; + UInt16 fFlags; +}; + +struct MadtInterruptNmi final { + Char fNmiSource; + Char fReserved; + UInt16 fFlags; + UInt32 fGSI; +}; + +struct MadtLocalApicAddressOverride final { + UInt16 fResvered; + UIntPtr fAddress; +}; /////////////////////////////////////////////////////////////////////////////////////// - static Madt kApicMadtList[256]; +static Madt kApicMadtList[256]; - Madt* system_find_core(Madt* madt) - { - madt = madt + sizeof(Madt); +Madt* system_find_core(Madt* madt) { + madt = madt + sizeof(Madt); - if (string_compare(madt->fMag, kApicSignature, string_length(kApicSignature)) == 0) - return madt; + if (string_compare(madt->fMag, kApicSignature, + string_length(kApicSignature)) == 0) + return madt; - return nullptr; - } + return nullptr; +} /////////////////////////////////////////////////////////////////////////////////////// - void system_get_cores(voidPtr rsdPtr) - { - auto acpi = ACPIManager(rsdPtr); - kApicMadt = acpi.Find(kApicSignature).Leak().Leak(); - - MUST_PASS(kApicMadt); // MADT must exist. - - SizeT counter = 0UL; - Madt* offset = system_find_core((Madt*)kApicMadt); - //! now find core addresses. - while (offset != nullptr) - { - // calls rt_copy_memory in NewC++ - kApicMadtList[counter] = *offset; - offset = system_find_core(offset); - - ++counter; - } - } +void system_get_cores(voidPtr rsdPtr) { + auto acpi = ACPIManager(rsdPtr); + kApicMadt = acpi.Find(kApicSignature).Leak().Leak(); + + MUST_PASS(kApicMadt); // MADT must exist. + + SizeT counter = 0UL; + Madt* offset = system_find_core((Madt*)kApicMadt); + //! now find core addresses. + while (offset != nullptr) { + // calls rt_copy_memory in NewC++ + kApicMadtList[counter] = *offset; + offset = system_find_core(offset); + + ++counter; + } } +} // namespace hCore::HAL /////////////////////////////////////////////////////////////////////////////////////// diff --git a/Private/HALKit/AMD64/CoreSyscallHandlerAMD64.cpp b/Private/HALKit/AMD64/CoreSyscallHandlerAMD64.cpp index 3e8544e7..ccd81b9a 100644 --- a/Private/HALKit/AMD64/CoreSyscallHandlerAMD64.cpp +++ b/Private/HALKit/AMD64/CoreSyscallHandlerAMD64.cpp @@ -7,19 +7,17 @@ * ======================================================== */ -#include <KernelKit/PermissionSelector.hxx> -#include <HALKit/AMD64/Processor.hpp> - #include <ArchKit/Arch.hpp> +#include <HALKit/AMD64/Processor.hpp> +#include <KernelKit/PermissionSelector.hxx> -hCore::Array<void (*)(hCore::Int32 id, hCore::HAL::StackFrame *), kMaxSyscalls> kSyscalls; +hCore::Array<void (*)(hCore::Int32 id, hCore::HAL::StackFrame *), kMaxSyscalls> + kSyscalls; // IDT System Call Handler. // NOTE: don't trust the user. -extern "C" void rt_syscall_handle(hCore::HAL::StackFrame *stack) -{ - for (hCore::SizeT index = 0UL; index < kMaxSyscalls; ++index) - { - (kSyscalls[index].Leak().Leak())(stack->SID, stack); - } +extern "C" void rt_syscall_handle(hCore::HAL::StackFrame *stack) { + for (hCore::SizeT index = 0UL; index < kMaxSyscalls; ++index) { + (kSyscalls[index].Leak().Leak())(stack->SID, stack); + } } diff --git a/Private/HALKit/AMD64/DebugManager.asm b/Private/HALKit/AMD64/DebugManager.asm index 0c717039..96c7e2f3 100644 --- a/Private/HALKit/AMD64/DebugManager.asm +++ b/Private/HALKit/AMD64/DebugManager.asm @@ -30,4 +30,4 @@ rt_debug_fence: pop rsi ret -;; //////////////////////////////////////////////////// ;;
\ No newline at end of file +;; //////////////////////////////////////////////////// ;; diff --git a/Private/HALKit/AMD64/DebugOutput.cxx b/Private/HALKit/AMD64/DebugOutput.cxx index 8a8705cf..43ab2538 100644 --- a/Private/HALKit/AMD64/DebugOutput.cxx +++ b/Private/HALKit/AMD64/DebugOutput.cxx @@ -7,62 +7,54 @@ * ======================================================== */ -#include <KernelKit/DebugOutput.hpp> - #include <ArchKit/Arch.hpp> +#include <KernelKit/DebugOutput.hpp> #include <NewKit/Utils.hpp> -namespace hCore -{ - namespace Detail - { - constexpr short PORT = 0x3F8; - - bool serial_init() - { - HAL::out8(PORT + 1, 0x00); // Disable all interrupts - HAL::out8(PORT + 3, 0x80); // Enable DLAB (set baud rate divisor) - HAL::out8(PORT + 0, 0x03); // Set divisor to 3 (lo byte) 38400 baud - HAL::out8(PORT + 1, 0x00); // (hi byte) - HAL::out8(PORT + 3, 0x03); // 8 bits, no parity, one stop bit - HAL::out8(PORT + 2, 0xC7); // Enable FIFO, clear them, with 14-byte threshold - HAL::out8(PORT + 4, 0x0B); // IRQs enabled, RTS/DSR set - HAL::out8(PORT + 4, 0x1E); // Set in loopback mode, test the serial chip - HAL::out8(PORT + 0, 0xAE); // Test serial chip (send byte 0xAE and check if - // serial returns same byte) - - // Check if serial is faulty (i.e: not same byte as sent) - if (HAL::in8(PORT) != 0xAE) - { +namespace hCore { +namespace Detail { +constexpr short PORT = 0x3F8; + +bool serial_init() { + HAL::out8(PORT + 1, 0x00); // Disable all interrupts + HAL::out8(PORT + 3, 0x80); // Enable DLAB (set baud rate divisor) + HAL::out8(PORT + 0, 0x03); // Set divisor to 3 (lo byte) 38400 baud + HAL::out8(PORT + 1, 0x00); // (hi byte) + HAL::out8(PORT + 3, 0x03); // 8 bits, no parity, one stop bit + HAL::out8(PORT + 2, 0xC7); // Enable FIFO, clear them, with 14-byte threshold + HAL::out8(PORT + 4, 0x0B); // IRQs enabled, RTS/DSR set + HAL::out8(PORT + 4, 0x1E); // Set in loopback mode, test the serial chip + HAL::out8(PORT + 0, 0xAE); // Test serial chip (send byte 0xAE and check if + // serial returns same byte) + + // Check if serial is faulty (i.e: not same byte as sent) + if (HAL::in8(PORT) != 0xAE) { #ifdef __DEBUG__ - panic(RUNTIME_CHECK_HANDSHAKE); + panic(RUNTIME_CHECK_HANDSHAKE); #else - return false; + return false; #endif - } + } - // If serial is not faulty set it in normal operation mode - // (not-loopback with IRQs enabled and OUT#1 and OUT#2 bits enabled) - HAL::out8(Detail::PORT + 4, 0x0F); + // If serial is not faulty set it in normal operation mode + // (not-loopback with IRQs enabled and OUT#1 and OUT#2 bits enabled) + HAL::out8(Detail::PORT + 4, 0x0F); - return true; - } - } + return true; +} +} // namespace Detail - void system_io_print(const char *bytes) - { - if (!bytes) - return; +void system_io_print(const char *bytes) { + if (!bytes) return; - SizeT index = 0; - SizeT len = string_length(bytes, 256); + SizeT index = 0; + SizeT len = string_length(bytes, 256); - while (index < len) - { - HAL::out8(Detail::PORT, bytes[index]); - ++index; - } - } + while (index < len) { + HAL::out8(Detail::PORT, bytes[index]); + ++index; + } +} - TerminalDevice kcout(hCore::system_io_print, nullptr); -} // namespace hCore +TerminalDevice kcout(hCore::system_io_print, nullptr); +} // namespace hCore diff --git a/Private/HALKit/AMD64/DebugPort.cxx b/Private/HALKit/AMD64/DebugPort.cxx index 28e3f5e3..764aab0a 100644 --- a/Private/HALKit/AMD64/DebugPort.cxx +++ b/Private/HALKit/AMD64/DebugPort.cxx @@ -13,7 +13,7 @@ #include <ArchKit/Arch.hpp> #define kDebugMaxPorts 16 - + #define kDebugUnboundPort 0xFFFF #define kDebugMag0 'X' @@ -22,45 +22,38 @@ #define kDebugMag3 'G' #define kDebugSourceFile 0 -#define kDebugLine 33 -#define kDebugTeam 43 -#define kDebugEOP 49 +#define kDebugLine 33 +#define kDebugTeam 43 +#define kDebugEOP 49 // after that we have start of additional data. -namespace hCore -{ - typedef Char rt_debug_type[255]; - - class DebuggerPorts final - { - public: - Int16 fPort[kDebugMaxPorts]; - Int16 fBoundCnt; - - }; - - void rt_debug_listen(DebuggerPorts* theHook) noexcept - { - if (theHook == nullptr) - return; - - for (UInt32 i = 0U; i < kDebugMaxPorts; ++i) - { - HAL::out16(theHook->fPort[i], kDebugMag0); - HAL::rt_wait_for_io(); - - HAL::out16(theHook->fPort[i], kDebugMag1); - HAL::rt_wait_for_io(); - - HAL::out16(theHook->fPort[i], kDebugMag2); - HAL::rt_wait_for_io(); - - HAL::out16(theHook->fPort[i], kDebugMag3); - HAL::rt_wait_for_io(); - - if (HAL::in16(theHook->fPort[i] != kDebugUnboundPort)) - theHook->fBoundCnt++; - } - } +namespace hCore { +typedef Char rt_debug_type[255]; + +class DebuggerPorts final { + public: + Int16 fPort[kDebugMaxPorts]; + Int16 fBoundCnt; +}; + +void rt_debug_listen(DebuggerPorts* theHook) noexcept { + if (theHook == nullptr) return; + + for (UInt32 i = 0U; i < kDebugMaxPorts; ++i) { + HAL::out16(theHook->fPort[i], kDebugMag0); + HAL::rt_wait_for_io(); + + HAL::out16(theHook->fPort[i], kDebugMag1); + HAL::rt_wait_for_io(); + + HAL::out16(theHook->fPort[i], kDebugMag2); + HAL::rt_wait_for_io(); + + HAL::out16(theHook->fPort[i], kDebugMag3); + HAL::rt_wait_for_io(); + + if (HAL::in16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++; + } } +} // namespace hCore diff --git a/Private/HALKit/AMD64/HalPageAlloc.cpp b/Private/HALKit/AMD64/HalPageAlloc.cpp index 07cfbecf..25757942 100644 --- a/Private/HALKit/AMD64/HalPageAlloc.cpp +++ b/Private/HALKit/AMD64/HalPageAlloc.cpp @@ -16,46 +16,41 @@ static hCore::UIntPtr kPagePtr = kPagePtrAddress; static hCore::SizeT kPageCnt = 0UL; -namespace hCore -{ - namespace HAL - { - static auto hal_try_alloc_new_page(SizeT sz, Boolean rw, Boolean user) -> PageTable64* - { - char *ptr = &(reinterpret_cast<char*>(kPagePtr))[kPageCnt + 1]; - - PageTable64 *pte = reinterpret_cast<PageTable64*>(ptr); - pte->Rw = rw; - pte->User = user; - pte->Present = true; - - return pte; - } - - auto hal_alloc_page(SizeT sz, Boolean rw, Boolean user) -> PageTable64* - { - for (SizeT i = 0; i < kPageCnt; ++i) - { - PageTable64 *pte = (reinterpret_cast<PageTable64*>(&kPagePtr) + i); - - if (!pte->Present) { - pte->User = user; - pte->Rw = rw; - pte->Present = true; - - return pte; - } - } - - return hal_try_alloc_new_page(sz, rw, user); - } - - auto hal_create_page(Boolean rw, Boolean user) -> UIntPtr - { - PageTable64 *new_pte = hal_alloc_page(sizeof(PageTable64), rw, user); - MUST_PASS(new_pte); - - return reinterpret_cast<UIntPtr>(new_pte); - } - } // namespace HAL -} // namespace hCore +namespace hCore { +namespace HAL { +static auto hal_try_alloc_new_page(SizeT sz, Boolean rw, Boolean user) + -> PageTable64 * { + char *ptr = &(reinterpret_cast<char *>(kPagePtr))[kPageCnt + 1]; + + PageTable64 *pte = reinterpret_cast<PageTable64 *>(ptr); + pte->Rw = rw; + pte->User = user; + pte->Present = true; + + return pte; +} + +auto hal_alloc_page(SizeT sz, Boolean rw, Boolean user) -> PageTable64 * { + for (SizeT i = 0; i < kPageCnt; ++i) { + PageTable64 *pte = (reinterpret_cast<PageTable64 *>(&kPagePtr) + i); + + if (!pte->Present) { + pte->User = user; + pte->Rw = rw; + pte->Present = true; + + return pte; + } + } + + return hal_try_alloc_new_page(sz, rw, user); +} + +auto hal_create_page(Boolean rw, Boolean user) -> UIntPtr { + PageTable64 *new_pte = hal_alloc_page(sizeof(PageTable64), rw, user); + MUST_PASS(new_pte); + + return reinterpret_cast<UIntPtr>(new_pte); +} +} // namespace HAL +} // namespace hCore diff --git a/Private/HALKit/AMD64/HalPageAlloc.hpp b/Private/HALKit/AMD64/HalPageAlloc.hpp index 06a883bf..dc954153 100644 --- a/Private/HALKit/AMD64/HalPageAlloc.hpp +++ b/Private/HALKit/AMD64/HalPageAlloc.hpp @@ -13,11 +13,11 @@ #ifndef PTE_MAX #define PTE_MAX (512) -#endif //! PTE_MAX +#endif //! PTE_MAX #ifndef PTE_ALIGN #define PTE_ALIGN (4096) -#endif //! PTE_ALIGN +#endif //! PTE_ALIGN #define kPagePtrAddress 0x0900000 @@ -29,24 +29,21 @@ extern "C" hCore::UIntPtr read_cr0(); extern "C" hCore::UIntPtr read_cr2(); extern "C" hCore::UIntPtr read_cr3(); -namespace hCore::HAL -{ - struct PageTable64 - { - bool Present: 1; - bool Rw: 1; - bool User: 1; - bool Wt: 1; - bool Cache: 1; - bool Accessed: 1; - hCore::Int32 Reserved: 6; - hCore::UIntPtr PhysicalAddress: 36; - hCore::Int32 Reserved1: 15; - bool ExecDisable: 1; - - }; - - PageTable64 *hal_alloc_page(SizeT sz, Boolean rw, Boolean user); - - UIntPtr hal_create_page(Boolean rw, Boolean user); -} // namespace hCore::HAL +namespace hCore::HAL { +struct PageTable64 { + bool Present : 1; + bool Rw : 1; + bool User : 1; + bool Wt : 1; + bool Cache : 1; + bool Accessed : 1; + hCore::Int32 Reserved : 6; + hCore::UIntPtr PhysicalAddress : 36; + hCore::Int32 Reserved1 : 15; + bool ExecDisable : 1; +}; + +PageTable64 *hal_alloc_page(SizeT sz, Boolean rw, Boolean user); + +UIntPtr hal_create_page(Boolean rw, Boolean user); +} // namespace hCore::HAL diff --git a/Private/HALKit/AMD64/HalRoutines.s b/Private/HALKit/AMD64/HalRoutines.s index ed15418a..78b9e503 100644 --- a/Private/HALKit/AMD64/HalRoutines.s +++ b/Private/HALKit/AMD64/HalRoutines.s @@ -24,4 +24,3 @@ rt_wait_for_io: rt_get_current_context: mov %rbp, %rax ret - diff --git a/Private/HALKit/AMD64/HardwareAPIC.cpp b/Private/HALKit/AMD64/HardwareAPIC.cpp index f78cfe3b..9a058eae 100644 --- a/Private/HALKit/AMD64/HardwareAPIC.cpp +++ b/Private/HALKit/AMD64/HardwareAPIC.cpp @@ -11,36 +11,32 @@ // bugs = 0 -namespace hCore -{ - // @brief wakes up thread. - // wakes up thread from hang. - void rt_wakeup_thread(HAL::StackFrame* stack) - { - __asm__ volatile ("cli"); - - stack->Rbp = stack->R15; - stack->Rsi = stack->Rbp; - - __asm__ volatile ("sti"); - } - - static void __rt_hang_proc(void) - { - while (1) - ; - } - - // @brief makes thread sleep. - // hooks and hangs thread to prevent code from executing. - void rt_hang_thread(HAL::StackFrame* stack) - { - __asm__ volatile ("cli"); - - stack->R15 = stack->Rbp; - stack->Rbp = (HAL::Reg)&__rt_hang_proc; - stack->Rsp = stack->Rbp; - - __asm__ volatile ("sti"); - } -}
\ No newline at end of file +namespace hCore { +// @brief wakes up thread. +// wakes up thread from hang. +void rt_wakeup_thread(HAL::StackFrame* stack) { + __asm__ volatile("cli"); + + stack->Rbp = stack->R15; + stack->Rsi = stack->Rbp; + + __asm__ volatile("sti"); +} + +static void __rt_hang_proc(void) { + while (1) + ; +} + +// @brief makes thread sleep. +// hooks and hangs thread to prevent code from executing. +void rt_hang_thread(HAL::StackFrame* stack) { + __asm__ volatile("cli"); + + stack->R15 = stack->Rbp; + stack->Rbp = (HAL::Reg)&__rt_hang_proc; + stack->Rsp = stack->Rbp; + + __asm__ volatile("sti"); +} +} // namespace hCore diff --git a/Private/HALKit/AMD64/HardwareInit.cpp b/Private/HALKit/AMD64/HardwareInit.cpp index 367f083b..7d769bfa 100644 --- a/Private/HALKit/AMD64/HardwareInit.cpp +++ b/Private/HALKit/AMD64/HardwareInit.cpp @@ -11,12 +11,10 @@ // bugs = 0 -namespace hCore -{ - bool init_hal() - { - // TODO: Hardware Specific stuff. +namespace hCore { +bool init_hal() { + // TODO: Hardware Specific stuff. - return true; - } -}
\ No newline at end of file + return true; +} +} // namespace hCore diff --git a/Private/HALKit/AMD64/Hypervisor.hpp b/Private/HALKit/AMD64/Hypervisor.hpp index 5c321f23..c830ef00 100644 --- a/Private/HALKit/AMD64/Hypervisor.hpp +++ b/Private/HALKit/AMD64/Hypervisor.hpp @@ -12,27 +12,17 @@ #include <NewKit/Defines.hpp> namespace hCore { - MAKE_STRING_ENUM(HYPERVISOR) - ENUM_STRING(Qemu, - "TCGTCGTCGTCG"); - ENUM_STRING(KVM, - " KVMKVMKVM "); - ENUM_STRING(VMWare, - "VMwareVMware"); - ENUM_STRING(VirtualBox, - "VBoxVBoxVBox"); - ENUM_STRING(Xen, - "XenVMMXenVMM"); - ENUM_STRING(Microsoft, - "Microsoft Hv"); - ENUM_STRING(Parallels, - " prl hyperv "); - ENUM_STRING(ParallelsAlt, - " lrpepyh vr "); - ENUM_STRING(Bhyve, - "bhyve bhyve "); - ENUM_STRING(Qnx, - " QNXQVMBSQG "); +MAKE_STRING_ENUM(HYPERVISOR) +ENUM_STRING(Qemu, "TCGTCGTCGTCG"); +ENUM_STRING(KVM, " KVMKVMKVM "); +ENUM_STRING(VMWare, "VMwareVMware"); +ENUM_STRING(VirtualBox, "VBoxVBoxVBox"); +ENUM_STRING(Xen, "XenVMMXenVMM"); +ENUM_STRING(Microsoft, "Microsoft Hv"); +ENUM_STRING(Parallels, " prl hyperv "); +ENUM_STRING(ParallelsAlt, " lrpepyh vr "); +ENUM_STRING(Bhyve, "bhyve bhyve "); +ENUM_STRING(Qnx, " QNXQVMBSQG "); - END_STRING_ENUM() -} // namespace hCore +END_STRING_ENUM() +} // namespace hCore diff --git a/Private/HALKit/AMD64/TIBInstall.asm b/Private/HALKit/AMD64/InstallTIB.asm index 69aa7503..6957e1a6 100644 --- a/Private/HALKit/AMD64/TIBInstall.asm +++ b/Private/HALKit/AMD64/InstallTIB.asm @@ -15,4 +15,4 @@ rt_install_tib: mov rsi, gs ret -;; //////////////////////////////////////////////////// ;;
\ No newline at end of file +;; //////////////////////////////////////////////////// ;; diff --git a/Private/HALKit/AMD64/PCI/Database.cpp b/Private/HALKit/AMD64/PCI/Database.cpp index b3a1961c..daf4bc61 100644 --- a/Private/HALKit/AMD64/PCI/Database.cpp +++ b/Private/HALKit/AMD64/PCI/Database.cpp @@ -9,6 +9,4 @@ #include <KernelKit/PCI/Database.hpp> -namespace hCore -{ -} +namespace hCore {} diff --git a/Private/HALKit/AMD64/PCI/Device.cpp b/Private/HALKit/AMD64/PCI/Device.cpp index f8b5f629..597e936b 100644 --- a/Private/HALKit/AMD64/PCI/Device.cpp +++ b/Private/HALKit/AMD64/PCI/Device.cpp @@ -10,118 +10,103 @@ #include <ArchKit/Arch.hpp> #include <KernelKit/PCI/Device.hpp> +hCore::UInt LumiaPCIReadRaw(hCore::UInt bar, hCore::UShort bus, + hCore::UShort dev, hCore::UShort fun) { + hCore::UInt target = 0x80000000 | ((hCore::UInt)bus << 16) | + ((hCore::UInt)dev << 11) | ((hCore::UInt)fun << 8) | + (bar & 0xFC); -hCore::UInt LumiaPCIReadRaw(hCore::UInt bar, hCore::UShort bus, hCore::UShort dev, hCore::UShort fun) -{ - hCore::UInt target = 0x80000000 | ((hCore::UInt) bus << 16) | ((hCore::UInt) dev << 11) | ((hCore::UInt) fun << 8) | - (bar & 0xFC); + hCore::HAL::out32((hCore::UShort)hCore::PCI::PciConfigKind::ConfigAddress, + target); - hCore::HAL::out32((hCore::UShort) hCore::PCI::PciConfigKind::ConfigAddress, target); + return hCore::HAL::in32((hCore::UShort)hCore::PCI::PciConfigKind::ConfigData); +} + +void LumiaPCISetCfgTarget(hCore::UInt bar, hCore::UShort bus, hCore::UShort dev, + hCore::UShort fun) { + hCore::UInt target = 0x80000000 | ((hCore::UInt)bus << 16) | + ((hCore::UInt)dev << 11) | ((hCore::UInt)fun << 8) | + (bar & ~3); + + hCore::HAL::out32((hCore::UShort)hCore::PCI::PciConfigKind::ConfigAddress, + target); +} + +namespace hCore::PCI { +Device::Device(UShort bus, UShort device, UShort func, UShort bar) + : m_Bus(bus), m_Device(device), m_Function(func), m_Bar(bar) {} + +Device::~Device() {} + +UInt Device::Read(UInt bar, Size sz) { + LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function); + + if (sz == 4) + return HAL::in32((UShort)PciConfigKind::ConfigData + (m_Bar & 3)); + if (sz == 2) + return HAL::in16((UShort)PciConfigKind::ConfigData + (m_Bar & 3)); + if (sz == 1) return HAL::in8((UShort)PciConfigKind::ConfigData + (m_Bar & 3)); + + return 0xFFFF; +} + +void Device::Write(UInt bar, UIntPtr data, Size sz) { + LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function); + + if (sz == 4) + HAL::out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data); + if (sz == 2) + HAL::out16((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UShort)data); + if (sz == 1) + HAL::out8((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UChar)data); +} + +UShort Device::DeviceId() { + return (UShort)(LumiaPCIReadRaw(0x0 >> 16, m_Bus, m_Device, m_Function)); +} - return hCore::HAL::in32((hCore::UShort) hCore::PCI::PciConfigKind::ConfigData); +UShort Device::VendorId() { + return (UShort)(LumiaPCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16); } -void LumiaPCISetCfgTarget(hCore::UInt bar, hCore::UShort bus, hCore::UShort dev, hCore::UShort fun) -{ - hCore::UInt target = - 0x80000000 | ((hCore::UInt) bus << 16) | ((hCore::UInt) dev << 11) | ((hCore::UInt) fun << 8) | (bar & ~3); +UShort Device::InterfaceId() { + return (UShort)(LumiaPCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16); +} + +UChar Device::Class() { + return (UChar)(LumiaPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 24); +} + +UChar Device::Subclass() { + return (UChar)(LumiaPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 16); +} + +UChar Device::ProgIf() { + return (UChar)(LumiaPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 8); +} + +UChar Device::HeaderType() { + return (UChar)(LumiaPCIReadRaw(0xC, m_Bus, m_Device, m_Function) >> 16); +} + +void Device::EnableMmio() { + bool enable = Read(0x04, sizeof(UChar)) | (1 << 1); + Write(0x04, enable, sizeof(UShort)); +} + +void Device::BecomeBusMaster() { + bool enable = Read(0x04, sizeof(UShort)) | (1 << 2); + Write(0x04, enable, sizeof(UShort)); +} + +UShort Device::Vendor() { + UShort vendor = VendorId(); + + if (vendor != (UShort)PciConfigKind::Invalid) + m_Device = (UShort)Read(0x0, sizeof(UShort)); - hCore::HAL::out32((hCore::UShort) hCore::PCI::PciConfigKind::ConfigAddress, target); + return m_Device; } -namespace hCore::PCI -{ - Device::Device(UShort bus, UShort device, UShort func, UShort bar) - : m_Bus(bus), m_Device(device), m_Function(func), m_Bar(bar) - {} - - Device::~Device() {} - - UInt Device::Read(UInt bar, Size sz) - { - LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function); - - if (sz == 4) - return HAL::in32((UShort) PciConfigKind::ConfigData + (m_Bar & 3)); - if (sz == 2) - return HAL::in16((UShort) PciConfigKind::ConfigData + (m_Bar & 3)); - if (sz == 1) - return HAL::in8((UShort) PciConfigKind::ConfigData + (m_Bar & 3)); - - return 0xFFFF; - } - - void Device::Write(UInt bar, UIntPtr data, Size sz) - { - LumiaPCISetCfgTarget(bar, m_Bus, m_Device, m_Function); - - if (sz == 4) - HAL::out32((UShort) PciConfigKind::ConfigData + (m_Bar & 3), (UInt) data); - if (sz == 2) - HAL::out16((UShort) PciConfigKind::ConfigData + (m_Bar & 3), (UShort) data); - if (sz == 1) - HAL::out8((UShort) PciConfigKind::ConfigData + (m_Bar & 3), (UChar) data); - } - - UShort Device::DeviceId() - { - return (UShort)(LumiaPCIReadRaw(0x0 >> 16, m_Bus, m_Device, m_Function)); - } - - UShort Device::VendorId() - { - return (UShort) (LumiaPCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16); - } - - UShort Device::InterfaceId() - { - return (UShort)(LumiaPCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16); - } - - UChar Device::Class() - { - return (UChar)(LumiaPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 24); - } - - UChar Device::Subclass() - { - return (UChar)(LumiaPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 16); - } - - UChar Device::ProgIf() - { - return (UChar)(LumiaPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 8); - } - - UChar Device::HeaderType() - { - return (UChar)(LumiaPCIReadRaw(0xC, m_Bus, m_Device, m_Function) >> 16); - } - - void Device::EnableMmio() - { - bool enable = Read(0x04, sizeof(UChar)) | (1 << 1); - Write(0x04, enable, sizeof(UShort)); - } - - void Device::BecomeBusMaster() - { - bool enable = Read(0x04, sizeof(UShort)) | (1 << 2); - Write(0x04, enable, sizeof(UShort)); - } - - UShort Device::Vendor() - { - UShort vendor = VendorId(); - - if (vendor != (UShort) PciConfigKind::Invalid) - m_Device = (UShort) Read(0x0, sizeof(UShort)); - - return m_Device; - } - - Device::operator bool() - { - return VendorId() != (UShort) PciConfigKind::Invalid; - } -} // namespace hCore::PCI +Device::operator bool() { return VendorId() != (UShort)PciConfigKind::Invalid; } +} // namespace hCore::PCI diff --git a/Private/HALKit/AMD64/PCI/Dma.cpp b/Private/HALKit/AMD64/PCI/Dma.cpp index 0b75776b..e52ef743 100644 --- a/Private/HALKit/AMD64/PCI/Dma.cpp +++ b/Private/HALKit/AMD64/PCI/Dma.cpp @@ -10,66 +10,57 @@ #include <KernelKit/PCI/Dma.hpp> namespace hCore { - DMAWrapper::operator bool() { - return m_Address; - } +DMAWrapper::operator bool() { return m_Address; } - bool DMAWrapper::operator!() { - return !m_Address; - } +bool DMAWrapper::operator!() { return !m_Address; } - Boolean DMAWrapper::Check(UIntPtr offset) const { - if (!m_Address) - return false; - if (offset == 0) - return true; +Boolean DMAWrapper::Check(UIntPtr offset) const { + if (!m_Address) return false; + if (offset == 0) return true; - kcout << "[DMAWrapper::IsIn] Checking offset..\n"; - return reinterpret_cast<UIntPtr>(m_Address) >= offset; - } + kcout << "[DMAWrapper::IsIn] Checking offset..\n"; + return reinterpret_cast<UIntPtr>(m_Address) >= offset; +} - bool DMAWrapper::Write(const UIntPtr &bit, const UIntPtr &offset) { - if (!m_Address) - return false; +bool DMAWrapper::Write(const UIntPtr &bit, const UIntPtr &offset) { + if (!m_Address) return false; - kcout << "[DMAWrapper::Write] Writing at address..\n"; + kcout << "[DMAWrapper::Write] Writing at address..\n"; - auto addr = (volatile UIntPtr *) (reinterpret_cast<UIntPtr>(m_Address) + offset); - *addr = bit; + auto addr = + (volatile UIntPtr *)(reinterpret_cast<UIntPtr>(m_Address) + offset); + *addr = bit; - return true; - } + return true; +} - UIntPtr DMAWrapper::Read(const UIntPtr &offset) { - kcout << "[DMAWrapper::Read] checking m_Address..\n"; - if (!m_Address) - return 0; +UIntPtr DMAWrapper::Read(const UIntPtr &offset) { + kcout << "[DMAWrapper::Read] checking m_Address..\n"; + if (!m_Address) return 0; - kcout << "[DMAWrapper::Read] Reading m_Address..\n"; - return *(volatile UIntPtr *) (reinterpret_cast<UIntPtr>(m_Address) + offset);; - } + kcout << "[DMAWrapper::Read] Reading m_Address..\n"; + return *(volatile UIntPtr *)(reinterpret_cast<UIntPtr>(m_Address) + offset); + ; +} - UIntPtr DMAWrapper::operator[](const UIntPtr &offset) { - return this->Read(offset); - } +UIntPtr DMAWrapper::operator[](const UIntPtr &offset) { + return this->Read(offset); +} - OwnPtr <IOBuf<Char *>> DMAFactory::Construct(OwnPtr <DMAWrapper> &dma) { - if (!dma) - return {}; +OwnPtr<IOBuf<Char *>> DMAFactory::Construct(OwnPtr<DMAWrapper> &dma) { + if (!dma) return {}; - OwnPtr < IOBuf < Char * >> dmaOwnPtr = make_ptr < IOBuf < Char * >, char * > - (reinterpret_cast<char*>(dma->m_Address)); + OwnPtr<IOBuf<Char *>> dmaOwnPtr = + make_ptr<IOBuf<Char *>, char *>(reinterpret_cast<char *>(dma->m_Address)); - if (!dmaOwnPtr) - return {}; + if (!dmaOwnPtr) return {}; - kcout << "Returning the new OwnPtr<IOBuf<Char*>>!\r\n"; - return dmaOwnPtr; - } + kcout << "Returning the new OwnPtr<IOBuf<Char*>>!\r\n"; + return dmaOwnPtr; +} - DMAWrapper& DMAWrapper::operator=(voidPtr Ptr) - { - m_Address = Ptr; - return *this; - } -} // namespace hCore +DMAWrapper &DMAWrapper::operator=(voidPtr Ptr) { + m_Address = Ptr; + return *this; +} +} // namespace hCore diff --git a/Private/HALKit/AMD64/PCI/Express.cpp b/Private/HALKit/AMD64/PCI/Express.cpp index dca3f37b..eaf886b7 100644 --- a/Private/HALKit/AMD64/PCI/Express.cpp +++ b/Private/HALKit/AMD64/PCI/Express.cpp @@ -9,5 +9,4 @@ #include <KernelKit/PCI/Express.hpp> -namespace hCore { -}
\ No newline at end of file +namespace hCore {} diff --git a/Private/HALKit/AMD64/PCI/Iterator.cpp b/Private/HALKit/AMD64/PCI/Iterator.cpp index 6f80d496..3d357901 100644 --- a/Private/HALKit/AMD64/PCI/Iterator.cpp +++ b/Private/HALKit/AMD64/PCI/Iterator.cpp @@ -9,31 +9,29 @@ #include <KernelKit/PCI/Iterator.hpp> -#define PCI_ITERATOR_FIND_AND_UNWRAP(DEV, SZ) \ - if (DEV.Leak()) \ - return DEV.Leak(); +#define PCI_ITERATOR_FIND_AND_UNWRAP(DEV, SZ) \ + if (DEV.Leak()) return DEV.Leak(); namespace hCore::PCI { - Iterator::Iterator(const Types::PciDeviceKind &type) { - // probe devices. - for (int bus = 0; bus < ME_BUS_COUNT; ++bus) { - for (int device = 0; device < ME_DEVICE_COUNT; ++device) { - for (int function = 0; function < ME_FUNCTION_COUNT; ++function) { - Device dev(bus, device, function, 0); +Iterator::Iterator(const Types::PciDeviceKind &type) { + // probe devices. + for (int bus = 0; bus < ME_BUS_COUNT; ++bus) { + for (int device = 0; device < ME_DEVICE_COUNT; ++device) { + for (int function = 0; function < ME_FUNCTION_COUNT; ++function) { + Device dev(bus, device, function, 0); - if (dev.Class() == (UChar) type) { - m_Devices[bus].Leak().Leak() = dev; - } - } - } + if (dev.Class() == (UChar)type) { + m_Devices[bus].Leak().Leak() = dev; } + } } + } +} - Iterator::~Iterator() { - } +Iterator::~Iterator() {} - Ref<PCI::Device> Iterator::operator[](const Size &sz) { - PCI_ITERATOR_FIND_AND_UNWRAP(m_Devices[sz], sz); - return {}; - } -} // namespace hCore::PCI +Ref<PCI::Device> Iterator::operator[](const Size &sz) { + PCI_ITERATOR_FIND_AND_UNWRAP(m_Devices[sz], sz); + return {}; +} +} // namespace hCore::PCI diff --git a/Private/HALKit/AMD64/PCI/PCI.cpp b/Private/HALKit/AMD64/PCI/PCI.cpp index 66770939..833bce22 100644 --- a/Private/HALKit/AMD64/PCI/PCI.cpp +++ b/Private/HALKit/AMD64/PCI/PCI.cpp @@ -7,4 +7,4 @@ * ======================================================== */ -#include <KernelKit/PCI/PCI.hpp>
\ No newline at end of file +#include <KernelKit/PCI/PCI.hpp> diff --git a/Private/HALKit/AMD64/PlatformAMD64.cpp b/Private/HALKit/AMD64/PlatformAMD64.cpp index 0bade8dc..3005cc07 100644 --- a/Private/HALKit/AMD64/PlatformAMD64.cpp +++ b/Private/HALKit/AMD64/PlatformAMD64.cpp @@ -9,50 +9,39 @@ #include <ArchKit/Arch.hpp> -namespace hCore::HAL -{ -namespace Detail -{ -struct RegisterAMD64 final -{ - UIntPtr base; - UShort limit; +namespace hCore::HAL { +namespace Detail { +struct RegisterAMD64 final { + UIntPtr base; + UShort limit; }; -} // namespace Detail +} // namespace Detail -void GDTLoader::Load(Register64 &gdt) -{ - Detail::RegisterAMD64 *reg = new Detail::RegisterAMD64(); - MUST_PASS(reg); +void GDTLoader::Load(Register64 &gdt) { + Detail::RegisterAMD64 *reg = new Detail::RegisterAMD64(); + MUST_PASS(reg); - reg->base = gdt.Base; - reg->limit = gdt.Limit; + reg->base = gdt.Base; + reg->limit = gdt.Limit; - rt_cli(); - load_gdt(reg); - rt_sti(); + rt_cli(); + load_gdt(reg); + rt_sti(); } -void IDTLoader::Load(Register64 &idt) -{ - Detail::RegisterAMD64 *reg = new Detail::RegisterAMD64(); - MUST_PASS(reg); +void IDTLoader::Load(Register64 &idt) { + Detail::RegisterAMD64 *reg = new Detail::RegisterAMD64(); + MUST_PASS(reg); - reg->base = idt.Base; - reg->limit = idt.Limit; + reg->base = idt.Base; + reg->limit = idt.Limit; - rt_cli(); - load_idt(reg); - rt_sti(); + rt_cli(); + load_idt(reg); + rt_sti(); } -void GDTLoader::Load(Ref<Register64> &gdt) -{ - GDTLoader::Load(gdt.Leak()); -} +void GDTLoader::Load(Ref<Register64> &gdt) { GDTLoader::Load(gdt.Leak()); } -void IDTLoader::Load(Ref<Register64> &idt) -{ - IDTLoader::Load(idt.Leak()); -} -} // namespace hCore::HAL +void IDTLoader::Load(Ref<Register64> &idt) { IDTLoader::Load(idt.Leak()); } +} // namespace hCore::HAL diff --git a/Private/HALKit/AMD64/ProcessPrimitives.cxx b/Private/HALKit/AMD64/ProcessPrimitives.cxx index f5b19861..557eb7f0 100644 --- a/Private/HALKit/AMD64/ProcessPrimitives.cxx +++ b/Private/HALKit/AMD64/ProcessPrimitives.cxx @@ -7,20 +7,19 @@ * ======================================================== */ -#include "NewKit/Defines.hpp" #include <KernelKit/ProcessManager.hpp> +#include "NewKit/Defines.hpp" + using namespace hCore; -Void Process::AssignStart(UIntPtr &imageStart) noexcept -{ - if (imageStart == 0) - this->Crash(); +Void Process::AssignStart(UIntPtr &imageStart) noexcept { + if (imageStart == 0) this->Crash(); #ifdef __x86_64__ - this->StackFrame->Rbp = imageStart; + this->StackFrame->Rbp = imageStart; #elif defined(__powerpc) - // link return register towards the __start symbol. - this->StackFrame->R3 = imageStart; + // link return register towards the __start symbol. + this->StackFrame->R3 = imageStart; #endif } diff --git a/Private/HALKit/AMD64/Processor.cpp b/Private/HALKit/AMD64/Processor.cpp index 4e1216e6..893f4a58 100644 --- a/Private/HALKit/AMD64/Processor.cpp +++ b/Private/HALKit/AMD64/Processor.cpp @@ -14,64 +14,45 @@ * @brief This file is about processor specific functions (in/out...) */ -namespace hCore::HAL -{ -void out8(UInt16 port, UInt8 value) -{ - asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory"); +namespace hCore::HAL { +void out8(UInt16 port, UInt8 value) { + asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory"); } -void out16(UInt16 port, UInt16 value) -{ - asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory"); +void out16(UInt16 port, UInt16 value) { + asm volatile("outw %%ax, %1" : : "a"(value), "Nd"(port) : "memory"); } -void out32(UInt16 port, UInt32 value) -{ - asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory"); +void out32(UInt16 port, UInt32 value) { + asm volatile("outl %%eax, %1" : : "a"(value), "Nd"(port) : "memory"); } -UInt8 in8(UInt16 port) -{ - UInt8 value = 0UL; - asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory"); +UInt8 in8(UInt16 port) { + UInt8 value = 0UL; + asm volatile("inb %1, %%al" : "=a"(value) : "Nd"(port) : "memory"); - return value; + return value; } -UInt16 in16(UInt16 port) -{ - UInt16 value = 0UL; - asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory"); +UInt16 in16(UInt16 port) { + UInt16 value = 0UL; + asm volatile("inw %1, %%ax" : "=a"(value) : "Nd"(port) : "memory"); - return value; + return value; } -UInt32 in32(UInt16 port) -{ - UInt32 value = 0UL; - asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory"); +UInt32 in32(UInt16 port) { + UInt32 value = 0UL; + asm volatile("inl %1, %%eax" : "=a"(value) : "Nd"(port) : "memory"); - return value; + return value; } -void rt_halt() -{ - asm volatile("hlt"); -} +void rt_halt() { asm volatile("hlt"); } -void rt_cli() -{ - asm volatile("cli"); -} +void rt_cli() { asm volatile("cli"); } -void rt_sti() -{ - asm volatile("sti"); -} +void rt_sti() { asm volatile("sti"); } -void rt_cld() -{ - asm volatile("cld"); -} -} // namespace hCore::HAL +void rt_cld() { asm volatile("cld"); } +} // namespace hCore::HAL diff --git a/Private/HALKit/AMD64/Processor.hpp b/Private/HALKit/AMD64/Processor.hpp index ca5db0ed..82eed130 100644 --- a/Private/HALKit/AMD64/Processor.hpp +++ b/Private/HALKit/AMD64/Processor.hpp @@ -9,122 +9,110 @@ #pragma once -#include <NewKit/Defines.hpp> #include <NewKit/Array.hpp> +#include <NewKit/Defines.hpp> #include <NewKit/Utils.hpp> #define IsActiveLow(flag) (flag & 2) #define IsLevelTriggered(flag) (flag & 8) -namespace hCore::HAL -{ - extern "C" UChar in8(UInt16 port); - extern "C" UShort in16(UInt16 port); - extern "C" UInt in32(UInt16 port); - - extern "C" void out16(UShort port, UShort byte); - extern "C" void out8(UShort port, UChar byte); - extern "C" void out32(UShort port, UInt byte); - - extern "C" void rt_wait_for_io(); - extern "C" void rt_halt(); - extern "C" void rt_cli(); - extern "C" void rt_sti(); - extern "C" void rt_cld(); - - class Register64 - { - public: - UIntPtr Base; - UShort Limit; - - operator bool() { return Base > Limit; } - - }; - - using RawRegister = UInt64; - - using InterruptId = UShort; /* For each element in the IVT */ - using interruptTrap = UIntPtr(UIntPtr sp); - - typedef UIntPtr Reg; - - struct __attribute__((packed)) StackFrame - { - Reg Rax; - Reg Rbx; - Reg Rcx; - Reg Rdx; - Reg Rsi; - Reg Rdi; - Reg Rbp; - Reg Rsp; - Reg R8; - Reg R9; - Reg R10; - Reg R11; - Reg R12; - Reg R13; - Reg R14; - Reg R15; // Reserved: Multi Processor manager (Hal) - Reg SID; // Reserved: system call id (Hal) - }; - - typedef StackFrame* StackFramePtr; - - class InterruptDescriptor final - { - public: - UShort Offset; - UShort Selector; - UChar Ist; - UChar Atrributes; - - UShort SecondOffset; - UInt ThirdOffset; - UInt Zero; - - operator bool() { return Offset != 0xFFFF; } - - }; - - using InterruptDescriptorArray = Array<InterruptDescriptor, 256>; - - class SegmentDescriptor final - { - public: - UIntPtr Base; - UIntPtr BaseMiddle; - UIntPtr BaseHigh; - - UShort Limit; - UChar Gran; - UChar AB; - - operator bool() { return Base > Limit; } - - }; - - using SegmentArray = Array<SegmentDescriptor, 6>; - - class GDTLoader final - { - public: - static void Load(Register64 &gdt); - static void Load(Ref<Register64> &gdt); - - }; - - class IDTLoader final - { - public: - static void Load(Register64 &idt); - static void Load(Ref<Register64> &idt); - - }; - - void system_get_cores(voidPtr rsdPtr); -} // namespace hCore::HAL +namespace hCore::HAL { +extern "C" UChar in8(UInt16 port); +extern "C" UShort in16(UInt16 port); +extern "C" UInt in32(UInt16 port); + +extern "C" void out16(UShort port, UShort byte); +extern "C" void out8(UShort port, UChar byte); +extern "C" void out32(UShort port, UInt byte); + +extern "C" void rt_wait_for_io(); +extern "C" void rt_halt(); +extern "C" void rt_cli(); +extern "C" void rt_sti(); +extern "C" void rt_cld(); + +class Register64 { + public: + UIntPtr Base; + UShort Limit; + + operator bool() { return Base > Limit; } +}; + +using RawRegister = UInt64; + +using InterruptId = UShort; /* For each element in the IVT */ +using interruptTrap = UIntPtr(UIntPtr sp); + +typedef UIntPtr Reg; + +struct __attribute__((packed)) StackFrame { + Reg Rax; + Reg Rbx; + Reg Rcx; + Reg Rdx; + Reg Rsi; + Reg Rdi; + Reg Rbp; + Reg Rsp; + Reg R8; + Reg R9; + Reg R10; + Reg R11; + Reg R12; + Reg R13; + Reg R14; + Reg R15; // Reserved: Multi Processor manager (Hal) + Reg SID; // Reserved: system call id (Hal) +}; + +typedef StackFrame *StackFramePtr; + +class InterruptDescriptor final { + public: + UShort Offset; + UShort Selector; + UChar Ist; + UChar Atrributes; + + UShort SecondOffset; + UInt ThirdOffset; + UInt Zero; + + operator bool() { return Offset != 0xFFFF; } +}; + +using InterruptDescriptorArray = Array<InterruptDescriptor, 256>; + +class SegmentDescriptor final { + public: + UIntPtr Base; + UIntPtr BaseMiddle; + UIntPtr BaseHigh; + + UShort Limit; + UChar Gran; + UChar AB; + + operator bool() { return Base > Limit; } +}; + +using SegmentArray = Array<SegmentDescriptor, 6>; + +class GDTLoader final { + public: + static void Load(Register64 &gdt); + static void Load(Ref<Register64> &gdt); +}; + +class IDTLoader final { + public: + static void Load(Register64 &idt); + static void Load(Ref<Register64> &idt); +}; + +void system_get_cores(voidPtr rsdPtr); +} // namespace hCore::HAL extern "C" void idt_handle_system_call(hCore::UIntPtr rsp); extern "C" void idt_handle_generic(hCore::UIntPtr rsp); diff --git a/Private/HALKit/AMD64/SMPCoreManager.asm b/Private/HALKit/AMD64/SMPCoreManager.asm index ed56d7db..40664a7e 100644 --- a/Private/HALKit/AMD64/SMPCoreManager.asm +++ b/Private/HALKit/AMD64/SMPCoreManager.asm @@ -22,4 +22,4 @@ rt_do_context_switch_unprotected: mov [rdi+0], rax mov [rdi+8], rbx mov [rdi+16], rcx - ret
\ No newline at end of file + ret diff --git a/Private/HALKit/AMD64/crti.s b/Private/HALKit/AMD64/crti.s index 5856b9e9..a85782ea 100644 --- a/Private/HALKit/AMD64/crti.s +++ b/Private/HALKit/AMD64/crti.s @@ -14,5 +14,3 @@ _fini: push %rbp movq %rsp, %rbp /* gcc will nicely put the contents of crtbegin.o's .fini section here. */ - - diff --git a/Private/HALKit/AMD64/crtn.s b/Private/HALKit/AMD64/crtn.s index acc8faa5..b446d9f3 100644 --- a/Private/HALKit/AMD64/crtn.s +++ b/Private/HALKit/AMD64/crtn.s @@ -8,4 +8,3 @@ /* gcc will nicely put the contents of crtend.o's .fini section here. */ popq %rbp ret - diff --git a/Private/HALKit/PowerPC/CoreSyscallHandlerPowerPC.cpp b/Private/HALKit/PowerPC/CoreSyscallHandlerPowerPC.cpp index 6a723cba..ee300501 100644 --- a/Private/HALKit/PowerPC/CoreSyscallHandlerPowerPC.cpp +++ b/Private/HALKit/PowerPC/CoreSyscallHandlerPowerPC.cpp @@ -10,12 +10,11 @@ #include <ArchKit/Arch.hpp> #include <NewKit/Array.hpp> -hCore::Array<void (*)(hCore::Int32 id, hCore::HAL::StackFrame *), kMaxSyscalls> kSyscalls; +hCore::Array<void (*)(hCore::Int32 id, hCore::HAL::StackFrame *), kMaxSyscalls> + kSyscalls; -extern "C" void rt_syscall_handle(hCore::HAL::StackFrame *stack) -{ - for (hCore::SizeT index = 0UL; index < kMaxSyscalls; ++index) - { - (kSyscalls[index].Leak().Leak())(stack->ID, stack); - } +extern "C" void rt_syscall_handle(hCore::HAL::StackFrame *stack) { + for (hCore::SizeT index = 0UL; index < kMaxSyscalls; ++index) { + (kSyscalls[index].Leak().Leak())(stack->ID, stack); + } } diff --git a/Private/HALKit/PowerPC/PCI/Device.cxx b/Private/HALKit/PowerPC/PCI/Device.cxx index e69de29b..8b137891 100644 --- a/Private/HALKit/PowerPC/PCI/Device.cxx +++ b/Private/HALKit/PowerPC/PCI/Device.cxx @@ -0,0 +1 @@ + diff --git a/Private/HALKit/PowerPC/Processor.cpp b/Private/HALKit/PowerPC/Processor.cpp index dc614fa9..e3b207c6 100644 --- a/Private/HALKit/PowerPC/Processor.cpp +++ b/Private/HALKit/PowerPC/Processor.cpp @@ -1,68 +1,48 @@ /* -* ======================================================== -* -* hCore -* Copyright 2024 Mahrouss Logic, all rights reserved. -* -* ======================================================== -*/ + * ======================================================== + * + * hCore + * Copyright 2024 Mahrouss Logic, all rights reserved. + * + * ======================================================== + */ #include <HALKit/PowerPC/Processor.hpp> #include <KernelKit/DebugOutput.hpp> extern "C" void flush_tlb() {} extern "C" void rt_wait_for_io() {} -extern "C" hCore::HAL::StackFrame* rt_get_current_context() { } +extern "C" hCore::HAL::StackFrame* rt_get_current_context() {} -namespace hCore -{ -namespace HAL -{ - UIntPtr hal_create_page(bool rw, bool user) - { - return 0; - } +namespace hCore { +namespace HAL { +UIntPtr hal_create_page(bool rw, bool user) { return 0; } - UIntPtr hal_alloc_page(UIntPtr offset, bool rw, bool user) - { - return 0; - } -} +UIntPtr hal_alloc_page(UIntPtr offset, bool rw, bool user) { return 0; } +} // namespace HAL // @brief wakes up thread. // wakes up thread from hang. -void rt_wakeup_thread(HAL::StackFrame* stack) -{ - -} +void rt_wakeup_thread(HAL::StackFrame* stack) {} // @brief makes thread sleep. // hooks and hangs thread to prevent code from executing. -void rt_hang_thread(HAL::StackFrame* stack) -{ - -} +void rt_hang_thread(HAL::StackFrame* stack) {} // @brief main HAL entrypoint -void init_hal() -{ - -} +void init_hal() {} -void system_io_print(const char *bytes) -{ - if (!bytes) - return; +void system_io_print(const char* bytes) { + if (!bytes) return; - SizeT index = 0; - SizeT len = string_length(bytes, 256); + SizeT index = 0; + SizeT len = string_length(bytes, 256); - while (index < len) - { - // TODO - ++index; - } + while (index < len) { + // TODO + ++index; + } } TerminalDevice kcout(hCore::system_io_print, nullptr); -}
\ No newline at end of file +} // namespace hCore diff --git a/Private/HALKit/PowerPC/Processor.hpp b/Private/HALKit/PowerPC/Processor.hpp index 58de1aa6..5fc0dcb2 100644 --- a/Private/HALKit/PowerPC/Processor.hpp +++ b/Private/HALKit/PowerPC/Processor.hpp @@ -14,37 +14,31 @@ #define __aligned __attribute__((aligned(4))) -namespace hCore::HAL -{ - typedef UIntPtr Reg; - - struct __aligned StackFrame - { - Reg R0; - Reg R1; - Reg R2; - Reg R3; - Reg R4; - Reg R5; - Reg R6; - Reg R7; - Reg ID; // R8 - }; - - typedef StackFrame* StackFramePtr; - - inline void rt_halt() - { - while (1) - {} - } - - inline void rt_cli() - { - - } +namespace hCore::HAL { +typedef UIntPtr Reg; + +struct __aligned StackFrame { + Reg R0; + Reg R1; + Reg R2; + Reg R3; + Reg R4; + Reg R5; + Reg R6; + Reg R7; + Reg ID; // R8 +}; + +typedef StackFrame* StackFramePtr; + +inline void rt_halt() { + while (1) { + } } +inline void rt_cli() {} +} // namespace hCore::HAL + extern "C" void int_handle_math(hCore::UIntPtr sp); extern "C" void int_handle_pf(hCore::UIntPtr sp); -extern "C" void* __ppc_alloca(size_t sz);
\ No newline at end of file +extern "C" void* __ppc_alloca(size_t sz); diff --git a/Private/HALKit/PowerPC/CorePowerPCStart.s b/Private/HALKit/PowerPC/StartSequence.s index f0c5ae2b..0b9807d0 100644 --- a/Private/HALKit/PowerPC/CorePowerPCStart.s +++ b/Private/HALKit/PowerPC/StartSequence.s @@ -3,4 +3,4 @@ .text __AssemblerStart: - b __AssemblerStart
\ No newline at end of file + b __AssemblerStart |
