Kernel: :boom: breaking changes, Update API and the HCORE based

macros, rename HCore to NewOS.

Signed-off-by: Amlal El Mahrouss <amlal@el-mahrouss-logic.com>

30 files changed, 166 insertions, 166 deletions

diff --git a/Private/HALKit/AMD64/HalACPIFactoryInterface.cxx b/Private/HALKit/AMD64/HalACPIFactoryInterface.cxx
index 204274b9..83642206 100644
--- a/Private/HALKit/AMD64/HalACPIFactoryInterface.cxx
+++ b/Private/HALKit/AMD64/HalACPIFactoryInterface.cxx
@@ -8,7 +8,7 @@
 #include <HALKit/AMD64/Processor.hpp>
 #include <NewKit/String.hpp>
 
-namespace HCore {
+namespace NewOS {
 ACPIFactoryInterface::ACPIFactoryInterface(voidPtr rsdPtr) : m_Rsdp(rsdPtr), m_Entries(0) {
   volatile RSDP *_rsdPtr = reinterpret_cast<volatile RSDP *>(this->m_Rsdp);
 
@@ -73,4 +73,4 @@ void rt_shutdown_acpi_qemu_30_plus(void) { HAL::Out16(0x604, 0x2000); }
 void rt_shutdown_acpi_virtualbox(void) { HAL::Out16(0x4004, 0x3400); }
 
 /// You have to parse the MADT!
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cpp b/Private/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cpp
index c55b9857..9ac3f3e1 100644
--- a/Private/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cpp
+++ b/Private/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cpp
@@ -8,65 +8,65 @@
 #include <KernelKit/ProcessScheduler.hpp>
 #include <NewKit/String.hpp>
 
-EXTERN_C void idt_handle_gpf(HCore::UIntPtr rsp) {
-  MUST_PASS(HCore::ProcessScheduler::Shared().Leak().GetCurrent());
+EXTERN_C void idt_handle_gpf(NewOS::UIntPtr rsp) {
+  MUST_PASS(NewOS::ProcessScheduler::Shared().Leak().GetCurrent());
 
-  HCore::kcout << "NewKernel.exe: Stack Pointer: "
-               << HCore::StringBuilder::FromInt("rsp{%}", rsp);
+  NewOS::kcout << "NewKernel.exe: Stack Pointer: "
+               << NewOS::StringBuilder::FromInt("rsp{%}", rsp);
 
-  HCore::kcout
+  NewOS::kcout
       << "NewKernel.exe: General Protection Fault, caused by "
-      << HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
+      << NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
 
-  HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
+  NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
 }
 
-EXTERN_C void idt_handle_scheduler(HCore::UIntPtr rsp) {
-  HCore::kcout << HCore::StringBuilder::FromInt("rsp{%}", rsp);
+EXTERN_C void idt_handle_scheduler(NewOS::UIntPtr rsp) {
+  NewOS::kcout << NewOS::StringBuilder::FromInt("rsp{%}", rsp);
 
-  HCore::kcout
+  NewOS::kcout
       << "NewKernel.exe: Will be scheduled back later "
-      << HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName()
-      << HCore::end_line();
+      << NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName()
+      << NewOS::end_line();
 
   /// schedule another process.
-  if (!HCore::ProcessHelper::StartScheduling()) {
-    HCore::kcout << "NewKernel.exe: Continue schedule this process...\r\n";
+  if (!NewOS::ProcessHelper::StartScheduling()) {
+    NewOS::kcout << "NewKernel.exe: Continue schedule this process...\r\n";
   }
 }
 
-EXTERN_C void idt_handle_pf(HCore::UIntPtr rsp) {
-  HCore::kcout << HCore::StringBuilder::FromInt("rsp{%}", rsp);
+EXTERN_C void idt_handle_pf(NewOS::UIntPtr rsp) {
+  NewOS::kcout << NewOS::StringBuilder::FromInt("rsp{%}", rsp);
 
-  MUST_PASS(HCore::ProcessScheduler::Shared().Leak().GetCurrent());
+  MUST_PASS(NewOS::ProcessScheduler::Shared().Leak().GetCurrent());
 
-  HCore::kcout
+  NewOS::kcout
       << "NewKernel.exe: Segmentation Fault, caused by "
-      << HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
+      << NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
 
-  HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
+  NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
 }
 
-EXTERN_C void idt_handle_math(HCore::UIntPtr rsp) {
-  HCore::kcout << HCore::StringBuilder::FromInt("rsp{%}", rsp);
+EXTERN_C void idt_handle_math(NewOS::UIntPtr rsp) {
+  NewOS::kcout << NewOS::StringBuilder::FromInt("rsp{%}", rsp);
 
-  MUST_PASS(HCore::ProcessScheduler::Shared().Leak().GetCurrent());
+  MUST_PASS(NewOS::ProcessScheduler::Shared().Leak().GetCurrent());
 
-  HCore::kcout
+  NewOS::kcout
       << "NewKernel.exe: Math error, caused by "
-      << HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
+      << NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
 
-  HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
+  NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
 }
 
-EXTERN_C void idt_handle_generic(HCore::UIntPtr rsp) {
-  HCore::kcout << HCore::StringBuilder::FromInt("sp{%}", rsp);
+EXTERN_C void idt_handle_generic(NewOS::UIntPtr rsp) {
+  NewOS::kcout << NewOS::StringBuilder::FromInt("sp{%}", rsp);
 
-  MUST_PASS(HCore::ProcessScheduler::Shared().Leak().GetCurrent());
+  MUST_PASS(NewOS::ProcessScheduler::Shared().Leak().GetCurrent());
 
-  HCore::kcout
+  NewOS::kcout
       << "NewKernel.exe: Execution error, caused by "
-      << HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
+      << NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().GetName();
 
-  HCore::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
+  NewOS::ProcessScheduler::Shared().Leak().GetCurrent().Leak().Crash();
 }
diff --git a/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp b/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp
index fe38189e..bbd3c6ea 100644
--- a/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp
+++ b/Private/HALKit/AMD64/HalCoreMultiProcessingAMD64.cpp
@@ -13,7 +13,7 @@
 
 ///////////////////////////////////////////////////////////////////////////////////////
 
-namespace HCore::HAL {
+namespace NewOS::HAL {
 constexpr Int32 kThreadAPIC = 0;
 constexpr Int32 kThreadLAPIC = 1;
 constexpr Int32 kThreadIOAPIC = 2;
@@ -122,6 +122,6 @@ void hal_system_get_cores(voidPtr rsdPtr) {
     ++counter;
   }
 }
-}  // namespace HCore::HAL
+}  // namespace NewOS::HAL
 
 ///////////////////////////////////////////////////////////////////////////////////////
diff --git a/Private/HALKit/AMD64/HalDebugOutput.cxx b/Private/HALKit/AMD64/HalDebugOutput.cxx
index 7eeae914..da40f5af 100644
--- a/Private/HALKit/AMD64/HalDebugOutput.cxx
+++ b/Private/HALKit/AMD64/HalDebugOutput.cxx
@@ -9,7 +9,7 @@
 #include <KernelKit/Framebuffer.hpp>
 #include <NewKit/Utils.hpp>
 
-namespace HCore {
+namespace NewOS {
 enum CommStatus {
   kStateInvalid,
   kStateReady = 0xCF,
@@ -113,9 +113,9 @@ EXTERN_C void ke_io_read(const char* bytes) {
 }
 
 TerminalDevice TerminalDevice::Shared() noexcept {
-  TerminalDevice out(HCore::ke_io_write, HCore::ke_io_read);
+  TerminalDevice out(NewOS::ke_io_write, NewOS::ke_io_read);
 
   return out;
 }
 
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/HalDebugPort.cxx b/Private/HALKit/AMD64/HalDebugPort.cxx
index df3fc6e9..996ef4e9 100644
--- a/Private/HALKit/AMD64/HalDebugPort.cxx
+++ b/Private/HALKit/AMD64/HalDebugPort.cxx
@@ -12,7 +12,7 @@
 
 // after that we have start of additional data.
 
-namespace HCore {
+namespace NewOS {
 void rt_debug_listen(DebuggerPortHeader* theHook) noexcept {
   if (theHook == nullptr) return;
 
@@ -32,4 +32,4 @@ void rt_debug_listen(DebuggerPortHeader* theHook) noexcept {
     if (HAL::In16(theHook->fPort[i] != kDebugUnboundPort)) theHook->fBoundCnt++;
   }
 }
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/HalDescriptorLoader.cpp b/Private/HALKit/AMD64/HalDescriptorLoader.cpp
index df6caf7a..53bcd621 100644
--- a/Private/HALKit/AMD64/HalDescriptorLoader.cpp
+++ b/Private/HALKit/AMD64/HalDescriptorLoader.cpp
@@ -6,12 +6,12 @@
 
 #include <ArchKit/ArchKit.hpp>
 
-namespace HCore::HAL {
+namespace NewOS::HAL {
 namespace Detail {
 STATIC RegisterGDT kRegGdt;
 STATIC HAL::Register64 kRegIdt;
 
-STATIC ::HCore::Detail::AMD64::InterruptDescriptorAMD64
+STATIC ::NewOS::Detail::AMD64::InterruptDescriptorAMD64
     kInterruptVectorTable[kKernelIdtSize];
 
 STATIC Void RemapPIC(Void) noexcept {
@@ -46,7 +46,7 @@ Void GDTLoader::Load(RegisterGDT &gdt) {
 }
 
 Void IDTLoader::Load(Register64 &idt) {
-  volatile ::HCore::UIntPtr **baseIdt = (volatile ::HCore::UIntPtr **)idt.Base;
+  volatile ::NewOS::UIntPtr **baseIdt = (volatile ::NewOS::UIntPtr **)idt.Base;
 
   MUST_PASS(baseIdt);
 
@@ -66,7 +66,7 @@ Void IDTLoader::Load(Register64 &idt) {
   }
 
   Detail::kRegIdt.Base = reinterpret_cast<UIntPtr>(Detail::kInterruptVectorTable);
-  Detail::kRegIdt.Limit = sizeof(::HCore::Detail::AMD64::InterruptDescriptorAMD64) *
+  Detail::kRegIdt.Limit = sizeof(::NewOS::Detail::AMD64::InterruptDescriptorAMD64) *
                   (kKernelIdtSize - 1);
 
   hal_load_idt(Detail::kRegIdt);
@@ -75,4 +75,4 @@ Void IDTLoader::Load(Register64 &idt) {
 void GDTLoader::Load(Ref<RegisterGDT> &gdt) { GDTLoader::Load(gdt.Leak()); }
 
 void IDTLoader::Load(Ref<Register64> &idt) { IDTLoader::Load(idt.Leak()); }
-}  // namespace HCore::HAL
+}  // namespace NewOS::HAL
diff --git a/Private/HALKit/AMD64/HalHardwareAPIC.cpp b/Private/HALKit/AMD64/HalHardwareAPIC.cpp
index d2b99ed3..0c65ed5d 100644
--- a/Private/HALKit/AMD64/HalHardwareAPIC.cpp
+++ b/Private/HALKit/AMD64/HalHardwareAPIC.cpp
@@ -8,7 +8,7 @@
 
 // bugs = 0
 
-namespace HCore {
+namespace NewOS {
 // @brief wakes up thread.
 // wakes up thread from hang.
 void rt_wakeup_thread(HAL::StackFrame* stack) {
@@ -34,4 +34,4 @@ void rt_hang_thread(HAL::StackFrame* stack) {
 
   HAL::rt_sti();
 }
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/HalInstallTIB.asm b/Private/HALKit/AMD64/HalInstallTIB.asm
index 2346b19c..ae3ead27 100644
--- a/Private/HALKit/AMD64/HalInstallTIB.asm
+++ b/Private/HALKit/AMD64/HalInstallTIB.asm
@@ -1,7 +1,7 @@
 ;; /*
 ;; *	========================================================
 ;; *
-;; *	HCore
+;; *	NewOS
 ;; * 	Copyright Mahrouss Logic, all rights reserved.
 ;; *
 ;; * 	========================================================
diff --git a/Private/HALKit/AMD64/HalKernelMain.cxx b/Private/HALKit/AMD64/HalKernelMain.cxx
index 29cbdff2..029bca3c 100644
--- a/Private/HALKit/AMD64/HalKernelMain.cxx
+++ b/Private/HALKit/AMD64/HalKernelMain.cxx
@@ -16,23 +16,23 @@
 #include <KernelKit/UserHeap.hpp>
 #include <NewKit/Json.hpp>
 
-EXTERN_C HCore::VoidPtr kInterruptVectorTable[];
+EXTERN_C NewOS::VoidPtr kInterruptVectorTable[];
 EXTERN_C void RuntimeMain();
 
 EXTERN_C void hal_init_platform(
-    HCore::HEL::HandoverInformationHeader* HandoverHeader) {
+    NewOS::HEL::HandoverInformationHeader* HandoverHeader) {
   kHandoverHeader = HandoverHeader;
 
   /// Setup kernel globals.
   kKernelVirtualSize = HandoverHeader->f_VirtualSize;
-  kKernelVirtualStart = reinterpret_cast<HCore::VoidPtr>(
-      reinterpret_cast<HCore::UIntPtr>(HandoverHeader->f_VirtualStart) +
+  kKernelVirtualStart = reinterpret_cast<NewOS::VoidPtr>(
+      reinterpret_cast<NewOS::UIntPtr>(HandoverHeader->f_VirtualStart) +
       kVirtualAddressStartOffset);
 
   kKernelPhysicalSize = HandoverHeader->f_PhysicalSize;
   kKernelPhysicalStart = HandoverHeader->f_PhysicalStart;
 
-  STATIC HCore::HAL::Detail::HCoreGDT GDT = {
+  STATIC NewOS::HAL::Detail::NewOSGDT GDT = {
       {0, 0, 0, 0x00, 0x00, 0},  // null entry
       {0, 0, 0, 0x9a, 0xaf, 0},  // kernel code
       {0, 0, 0, 0x92, 0xaf, 0},  // kernel data
@@ -41,28 +41,28 @@ EXTERN_C void hal_init_platform(
       {0, 0, 0, 0x92, 0xaf, 0},  // user data
   };
 
-  HCore::HAL::RegisterGDT gdtBase;
+  NewOS::HAL::RegisterGDT gdtBase;
 
-  gdtBase.Base = reinterpret_cast<HCore::UIntPtr>(&GDT);
-  gdtBase.Limit = sizeof(HCore::HAL::Detail::HCoreGDT) - 1;
+  gdtBase.Base = reinterpret_cast<NewOS::UIntPtr>(&GDT);
+  gdtBase.Limit = sizeof(NewOS::HAL::Detail::NewOSGDT) - 1;
 
   /// Load GDT.
 
-  HCore::HAL::GDTLoader gdt;
+  NewOS::HAL::GDTLoader gdt;
   gdt.Load(gdtBase);
 
   /// Load IDT.
 
-  HCore::HAL::Register64 idtBase;
-  idtBase.Base = (HCore::UIntPtr)kInterruptVectorTable;
+  NewOS::HAL::Register64 idtBase;
+  idtBase.Base = (NewOS::UIntPtr)kInterruptVectorTable;
   idtBase.Limit = 0;
 
-  HCore::HAL::IDTLoader idt;
+  NewOS::HAL::IDTLoader idt;
   idt.Load(idtBase);
 
   /// START POST
 
-  HCore::HAL::Detail::_ke_power_on_self_test();
+  NewOS::HAL::Detail::_ke_power_on_self_test();
 
   /// END POST
 
@@ -77,5 +77,5 @@ EXTERN_C void hal_init_platform(
 
   RuntimeMain();
 
-  HCore::ke_stop(RUNTIME_CHECK_BOOTSTRAP);
+  NewOS::ke_stop(RUNTIME_CHECK_BOOTSTRAP);
 }
diff --git a/Private/HALKit/AMD64/HalKernelMouse.cxx b/Private/HALKit/AMD64/HalKernelMouse.cxx
index 0cbf47dc..468a595f 100644
--- a/Private/HALKit/AMD64/HalKernelMouse.cxx
+++ b/Private/HALKit/AMD64/HalKernelMouse.cxx
@@ -10,17 +10,17 @@
 #include <NewKit/Defines.hpp>
 
 // forward decl.
-EXTERN_C HCore::Boolean _hal_draw_mouse();
-EXTERN_C HCore::Void _hal_init_mouse();
-
-STATIC HCore::Int32 kPrevX = 10;
-STATIC HCore::Int32 kPrevY = 10;
-STATIC HCore::Int32 kX = 10;
-STATIC HCore::Int32 kY = 10;
-STATIC HCore::Int32 kMouseCycle = 0;
-STATIC HCore::PS2MouseInterface kMousePS2;
-STATIC HCore::Char kMousePacket[4] = {};
-STATIC HCore::Boolean kMousePacketReady = false;
+EXTERN_C NewOS::Boolean _hal_draw_mouse();
+EXTERN_C NewOS::Void _hal_init_mouse();
+
+STATIC NewOS::Int32 kPrevX = 10;
+STATIC NewOS::Int32 kPrevY = 10;
+STATIC NewOS::Int32 kX = 10;
+STATIC NewOS::Int32 kY = 10;
+STATIC NewOS::Int32 kMouseCycle = 0;
+STATIC NewOS::PS2MouseInterface kMousePS2;
+STATIC NewOS::Char kMousePacket[4] = {};
+STATIC NewOS::Boolean kMousePacketReady = false;
 
 #define kPS2Leftbutton 0b00000001
 #define kPS2Middlebutton 0b00000010
@@ -30,10 +30,10 @@ STATIC HCore::Boolean kMousePacketReady = false;
 #define kPS2XOverflow 0b01000000
 #define kPS2YOverflow 0b10000000
 
-using namespace HCore;
+using namespace NewOS;
 
 Void hal_handle_mouse() {
-  HCore::UInt8 data = HAL::In8(0x60);
+  NewOS::UInt8 data = HAL::In8(0x60);
 
   switch (kMouseCycle) {
     case 0:
@@ -57,8 +57,8 @@ Void hal_handle_mouse() {
 
   // Notify PIC controller that we're done with it's interrupt.
 
-  HCore::HAL::Out8(0x20, 0x20);
-  HCore::HAL::Out8(0xA0, 0x20);
+  NewOS::HAL::Out8(0x20, 0x20);
+  NewOS::HAL::Out8(0xA0, 0x20);
 }
 
 /// @brief Interrupt handler for the mouse.
diff --git a/Private/HALKit/AMD64/HalNewBoot.asm b/Private/HALKit/AMD64/HalNewBoot.asm
index 54d05f2f..995a848c 100644
--- a/Private/HALKit/AMD64/HalNewBoot.asm
+++ b/Private/HALKit/AMD64/HalNewBoot.asm
@@ -1,7 +1,7 @@
 ;; /*
 ;; *	========================================================
 ;; *
-;; *	HCore
+;; *	NewOS
 ;; * 	Copyright Mahrouss Logic, all rights reserved.
 ;; *
 ;; * 	========================================================
diff --git a/Private/HALKit/AMD64/HalPageAlloc.cpp b/Private/HALKit/AMD64/HalPageAlloc.cpp
index 5f6564c0..53680668 100644
--- a/Private/HALKit/AMD64/HalPageAlloc.cpp
+++ b/Private/HALKit/AMD64/HalPageAlloc.cpp
@@ -9,8 +9,8 @@
 #include <NewKit/Defines.hpp>
 #include <NewKit/KernelCheck.hpp>
 
-STATIC HCore::Boolean kAllocationInProgress = false;
-namespace HCore {
+STATIC NewOS::Boolean kAllocationInProgress = false;
+namespace NewOS {
 namespace HAL {
 /// @brief Allocates a new page of memory.
 /// @param sz the size of it.
@@ -46,4 +46,4 @@ auto hal_alloc_page(Boolean rw, Boolean user) -> VoidPtr {
   return hal_try_alloc_new_page(rw, user);
 }
 }  // namespace HAL
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/HalPageAlloc.hpp b/Private/HALKit/AMD64/HalPageAlloc.hpp
index 5fe55992..9cd10213 100644
--- a/Private/HALKit/AMD64/HalPageAlloc.hpp
+++ b/Private/HALKit/AMD64/HalPageAlloc.hpp
@@ -26,15 +26,15 @@
 #define kPTESize (0x1000)
 #endif  // !kPTESize
 
-EXTERN_C void hal_flush_tlb(HCore::UIntPtr pde);
-EXTERN_C void hal_write_cr3(HCore::UIntPtr pde);
-EXTERN_C void hal_write_cr0(HCore::UIntPtr bit);
+EXTERN_C void hal_flush_tlb(NewOS::UIntPtr pde);
+EXTERN_C void hal_write_cr3(NewOS::UIntPtr pde);
+EXTERN_C void hal_write_cr0(NewOS::UIntPtr bit);
 
-EXTERN_C HCore::UIntPtr hal_read_cr0();  // @brief CPU control register.
-EXTERN_C HCore::UIntPtr hal_read_cr2();  // @brief Fault address.
-EXTERN_C HCore::UIntPtr hal_read_cr3();  // @brief Page table.
+EXTERN_C NewOS::UIntPtr hal_read_cr0();  // @brief CPU control register.
+EXTERN_C NewOS::UIntPtr hal_read_cr2();  // @brief Fault address.
+EXTERN_C NewOS::UIntPtr hal_read_cr3();  // @brief Page table.
 
-namespace HCore::HAL {
+namespace NewOS::HAL {
 struct PACKED PageTable64 final {
   bool Present : 1;
   bool Rw : 1;
@@ -42,9 +42,9 @@ struct PACKED PageTable64 final {
   bool Wt : 1;
   bool Cache : 1;
   bool Accessed : 1;
-  HCore::Int32 Reserved : 6;
-  HCore::UIntPtr PhysicalAddress : 36;
-  HCore::Int32 Reserved1 : 15;
+  NewOS::Int32 Reserved : 6;
+  NewOS::UIntPtr PhysicalAddress : 36;
+  NewOS::Int32 Reserved1 : 15;
   bool ExecDisable : 1;
 };
 
@@ -73,9 +73,9 @@ struct PageDirectory64 final {
 };
 
 VoidPtr hal_alloc_page(Boolean rw, Boolean user);
-}  // namespace HCore::HAL
+}  // namespace NewOS::HAL
 
-namespace HCore {
+namespace NewOS {
 typedef HAL::PageTable64 PTE;
 typedef HAL::PageDirectory64 PDE;
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/HalProcessor.cpp b/Private/HALKit/AMD64/HalProcessor.cpp
index 9596a82b..4fea4e7e 100644
--- a/Private/HALKit/AMD64/HalProcessor.cpp
+++ b/Private/HALKit/AMD64/HalProcessor.cpp
@@ -11,7 +11,7 @@
  * @brief This file is about processor specific functions (in/out...)
  */
 
-namespace HCore::HAL {
+namespace NewOS::HAL {
 void Out8(UInt16 port, UInt8 value) {
   asm volatile("outb %%al, %1" : : "a"(value), "Nd"(port) : "memory");
 }
@@ -54,4 +54,4 @@ void rt_sti() { asm volatile("sti"); }
 void rt_cld() { asm volatile("cld"); }
 
 void rt_std() { asm volatile("std"); }
-}  // namespace HCore::HAL
+}  // namespace NewOS::HAL
diff --git a/Private/HALKit/AMD64/HalSMPCore.cxx b/Private/HALKit/AMD64/HalSMPCore.cxx
index 3be9c0c7..a48806e1 100644
--- a/Private/HALKit/AMD64/HalSMPCore.cxx
+++ b/Private/HALKit/AMD64/HalSMPCore.cxx
@@ -6,7 +6,7 @@
 
 #include <KernelKit/ProcessScheduler.hpp>
 
-using namespace HCore;
+using namespace NewOS;
 Void ProcessHeader::SetEntrypoint(UIntPtr &imageStart) noexcept {
   if (imageStart == 0) this->Crash();
 
@@ -14,11 +14,11 @@ Void ProcessHeader::SetEntrypoint(UIntPtr &imageStart) noexcept {
   this->StackFrame->Rsp = this->StackFrame->Rbp;
 }
 
-namespace HCore {
+namespace NewOS {
 bool rt_check_stack(HAL::StackFramePtr stackPtr) {
   if (!stackPtr) return false;
   if (stackPtr->Rbp == 0 || stackPtr->Rsp == 0) return false;
 
   return true;
 }
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/HalSMPCoreManager.asm b/Private/HALKit/AMD64/HalSMPCoreManager.asm
index d896a66c..e34b7440 100644
--- a/Private/HALKit/AMD64/HalSMPCoreManager.asm
+++ b/Private/HALKit/AMD64/HalSMPCoreManager.asm
@@ -1,7 +1,7 @@
 ;; /*
 ;; *	========================================================
 ;; *
-;; *	HCore
+;; *	NewOS
 ;; * 	Copyright Mahrouss Logic, all rights reserved.
 ;; *
 ;; * 	========================================================
diff --git a/Private/HALKit/AMD64/Hypervisor.hpp b/Private/HALKit/AMD64/Hypervisor.hpp
index 07d69e02..82f80ecc 100644
--- a/Private/HALKit/AMD64/Hypervisor.hpp
+++ b/Private/HALKit/AMD64/Hypervisor.hpp
@@ -8,7 +8,7 @@
 
 #include <NewKit/Defines.hpp>
 
-namespace HCore {
+namespace NewOS {
 MAKE_STRING_ENUM(HYPERVISOR)
 ENUM_STRING(Qemu, "TCGTCGTCGTCG");
 ENUM_STRING(KVM, " KVMKVMKVM  ");
@@ -22,4 +22,4 @@ ENUM_STRING(Bhyve, "bhyve bhyve ");
 ENUM_STRING(Qnx, " QNXQVMBSQG ");
 
 END_STRING_ENUM()
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/PCI/Database.cxx b/Private/HALKit/AMD64/PCI/Database.cxx
index 7b78079d..646b2d75 100644
--- a/Private/HALKit/AMD64/PCI/Database.cxx
+++ b/Private/HALKit/AMD64/PCI/Database.cxx
@@ -6,4 +6,4 @@
 
 #include <KernelKit/PCI/Database.hpp>
 
-namespace HCore {}
+namespace NewOS {}
diff --git a/Private/HALKit/AMD64/PCI/Device.cxx b/Private/HALKit/AMD64/PCI/Device.cxx
index 2b1ec3a5..f5f1d602 100644
--- a/Private/HALKit/AMD64/PCI/Device.cxx
+++ b/Private/HALKit/AMD64/PCI/Device.cxx
@@ -7,36 +7,36 @@
 #include <ArchKit/ArchKit.hpp>
 #include <KernelKit/PCI/Device.hpp>
 
-HCore::UInt HCorePCIReadRaw(HCore::UInt bar, HCore::UShort bus,
-                            HCore::UShort dev, HCore::UShort fun) {
-  HCore::UInt target = 0x80000000 | ((HCore::UInt)bus << 16) |
-                       ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
+NewOS::UInt NewOSPCIReadRaw(NewOS::UInt bar, NewOS::UShort bus,
+                            NewOS::UShort dev, NewOS::UShort fun) {
+  NewOS::UInt target = 0x80000000 | ((NewOS::UInt)bus << 16) |
+                       ((NewOS::UInt)dev << 11) | ((NewOS::UInt)fun << 8) |
                        (bar & 0xFC);
 
-  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  NewOS::HAL::Out32((NewOS::UShort)NewOS::PCI::PciConfigKind::ConfigAddress,
                     target);
 
-  return HCore::HAL::In32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigData);
+  return NewOS::HAL::In32((NewOS::UShort)NewOS::PCI::PciConfigKind::ConfigData);
 }
 
-void HCorePCISetCfgTarget(HCore::UInt bar, HCore::UShort bus, HCore::UShort dev,
-                          HCore::UShort fun) {
-  HCore::UInt target = 0x80000000 | ((HCore::UInt)bus << 16) |
-                       ((HCore::UInt)dev << 11) | ((HCore::UInt)fun << 8) |
+void NewOSPCISetCfgTarget(NewOS::UInt bar, NewOS::UShort bus, NewOS::UShort dev,
+                          NewOS::UShort fun) {
+  NewOS::UInt target = 0x80000000 | ((NewOS::UInt)bus << 16) |
+                       ((NewOS::UInt)dev << 11) | ((NewOS::UInt)fun << 8) |
                        (bar & ~3);
 
-  HCore::HAL::Out32((HCore::UShort)HCore::PCI::PciConfigKind::ConfigAddress,
+  NewOS::HAL::Out32((NewOS::UShort)NewOS::PCI::PciConfigKind::ConfigAddress,
                     target);
 }
 
-namespace HCore::PCI {
+namespace NewOS::PCI {
 Device::Device(UShort bus, UShort device, UShort func, UShort bar)
     : m_Bus(bus), m_Device(device), m_Function(func), m_Bar(bar) {}
 
 Device::~Device() {}
 
 UInt Device::Read(UInt bar, Size sz) {
-  HCorePCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
+  NewOSPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
     return HAL::In32((UShort)PciConfigKind::ConfigData + (m_Bar & 3));
@@ -48,7 +48,7 @@ UInt Device::Read(UInt bar, Size sz) {
 }
 
 void Device::Write(UInt bar, UIntPtr data, Size sz) {
-  HCorePCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
+  NewOSPCISetCfgTarget(bar, m_Bus, m_Device, m_Function);
 
   if (sz == 4)
     HAL::Out32((UShort)PciConfigKind::ConfigData + (m_Bar & 3), (UInt)data);
@@ -59,31 +59,31 @@ void Device::Write(UInt bar, UIntPtr data, Size sz) {
 }
 
 UShort Device::DeviceId() {
-  return (UShort)(HCorePCIReadRaw(0x0 >> 16, m_Bus, m_Device, m_Function));
+  return (UShort)(NewOSPCIReadRaw(0x0 >> 16, m_Bus, m_Device, m_Function));
 }
 
 UShort Device::VendorId() {
-  return (UShort)(HCorePCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16);
+  return (UShort)(NewOSPCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16);
 }
 
 UShort Device::InterfaceId() {
-  return (UShort)(HCorePCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16);
+  return (UShort)(NewOSPCIReadRaw(0x0, m_Bus, m_Device, m_Function) >> 16);
 }
 
 UChar Device::Class() {
-  return (UChar)(HCorePCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 24);
+  return (UChar)(NewOSPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 24);
 }
 
 UChar Device::Subclass() {
-  return (UChar)(HCorePCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 16);
+  return (UChar)(NewOSPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 16);
 }
 
 UChar Device::ProgIf() {
-  return (UChar)(HCorePCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 8);
+  return (UChar)(NewOSPCIReadRaw(0x08, m_Bus, m_Device, m_Function) >> 8);
 }
 
 UChar Device::HeaderType() {
-  return (UChar)(HCorePCIReadRaw(0xC, m_Bus, m_Device, m_Function) >> 16);
+  return (UChar)(NewOSPCIReadRaw(0xC, m_Bus, m_Device, m_Function) >> 16);
 }
 
 void Device::EnableMmio() {
@@ -106,4 +106,4 @@ UShort Device::Vendor() {
 }
 
 Device::operator bool() { return VendorId() != (UShort)PciConfigKind::Invalid; }
-}  // namespace HCore::PCI
+}  // namespace NewOS::PCI
diff --git a/Private/HALKit/AMD64/PCI/Dma.cxx b/Private/HALKit/AMD64/PCI/Dma.cxx
index 5b754ea4..1efef53b 100644
--- a/Private/HALKit/AMD64/PCI/Dma.cxx
+++ b/Private/HALKit/AMD64/PCI/Dma.cxx
@@ -6,7 +6,7 @@
 
 #include <KernelKit/PCI/Dma.hpp>
 
-namespace HCore {
+namespace NewOS {
 DMAWrapper::operator bool() { return m_Address; }
 
 bool DMAWrapper::operator!() { return !m_Address; }
@@ -60,4 +60,4 @@ DMAWrapper &DMAWrapper::operator=(voidPtr Ptr) {
   m_Address = Ptr;
   return *this;
 }
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/AMD64/PCI/Express.cxx b/Private/HALKit/AMD64/PCI/Express.cxx
index 9633711e..c5be5786 100644
--- a/Private/HALKit/AMD64/PCI/Express.cxx
+++ b/Private/HALKit/AMD64/PCI/Express.cxx
@@ -6,4 +6,4 @@
 
 #include <KernelKit/PCI/Express.hpp>
 
-namespace HCore {}
+namespace NewOS {}
diff --git a/Private/HALKit/AMD64/PCI/Iterator.cxx b/Private/HALKit/AMD64/PCI/Iterator.cxx
index 98cb8016..eb3f7b13 100644
--- a/Private/HALKit/AMD64/PCI/Iterator.cxx
+++ b/Private/HALKit/AMD64/PCI/Iterator.cxx
@@ -9,7 +9,7 @@
 #define PCI_ITERATOR_FIND_AND_UNWRAP(DEV, SZ) \
   if (DEV.Leak()) return DEV.Leak();
 
-namespace HCore::PCI {
+namespace NewOS::PCI {
 Iterator::Iterator(const Types::PciDeviceKind &type) {
   // probe devices.
   for (int bus = 0; bus < ME_BUS_COUNT; ++bus) {
@@ -31,4 +31,4 @@ Ref<PCI::Device> Iterator::operator[](const Size &sz) {
   PCI_ITERATOR_FIND_AND_UNWRAP(m_Devices[sz], sz);
   return {};
 }
-}  // namespace HCore::PCI
+}  // namespace NewOS::PCI
diff --git a/Private/HALKit/AMD64/Processor.hpp b/Private/HALKit/AMD64/Processor.hpp
index 4e104b40..78d45c2e 100644
--- a/Private/HALKit/AMD64/Processor.hpp
+++ b/Private/HALKit/AMD64/Processor.hpp
@@ -32,7 +32,7 @@
 #define kGdtCodeSelector 0x08
 #define kVirtualAddressStartOffset 0x100
 
-namespace HCore {
+namespace NewOS {
 namespace Detail::AMD64 {
 struct PACKED InterruptDescriptorAMD64 final {
   UInt16 OffsetLow;  // offset bits 0..15
@@ -45,9 +45,9 @@ struct PACKED InterruptDescriptorAMD64 final {
   UInt32 Zero;           // reserved
 };
 }  // namespace Detail::AMD64
-}  // namespace HCore
+}  // namespace NewOS
 
-namespace HCore::HAL {
+namespace NewOS::HAL {
 EXTERN_C UChar In8(UInt16 port);
 EXTERN_C UShort In16(UInt16 port);
 EXTERN_C UInt In32(UInt16 port);
@@ -152,7 +152,7 @@ EXTERN_C void _ke_power_on_self_test(void);
     @brief Global descriptor table entry, either null, code or data.
 */
 
-struct PACKED HCoreGDTRecord final {
+struct PACKED NewOSGDTRecord final {
   UInt16 Limit0;
   UInt16 Base0;
   UInt8 Base1;
@@ -161,25 +161,25 @@ struct PACKED HCoreGDTRecord final {
   UInt8 Base2;
 };
 
-struct PACKED ALIGN(0x1000) HCoreGDT final {
-  HCoreGDTRecord Null;
-  HCoreGDTRecord KernCode;
-  HCoreGDTRecord KernData;
-  HCoreGDTRecord UserNull;
-  HCoreGDTRecord UserCode;
-  HCoreGDTRecord UserData;
+struct PACKED ALIGN(0x1000) NewOSGDT final {
+  NewOSGDTRecord Null;
+  NewOSGDTRecord KernCode;
+  NewOSGDTRecord KernData;
+  NewOSGDTRecord UserNull;
+  NewOSGDTRecord UserCode;
+  NewOSGDTRecord UserData;
 };
 }  // namespace Detail
-}  // namespace HCore::HAL
+}  // namespace NewOS::HAL
 
-EXTERN_C void idt_handle_system_call(HCore::UIntPtr rsp);
-EXTERN_C void idt_handle_generic(HCore::UIntPtr rsp);
-EXTERN_C void idt_handle_gpf(HCore::UIntPtr rsp);
-EXTERN_C void idt_handle_math(HCore::UIntPtr rsp);
-EXTERN_C void idt_handle_pf(HCore::UIntPtr rsp);
+EXTERN_C void idt_handle_system_call(NewOS::UIntPtr rsp);
+EXTERN_C void idt_handle_generic(NewOS::UIntPtr rsp);
+EXTERN_C void idt_handle_gpf(NewOS::UIntPtr rsp);
+EXTERN_C void idt_handle_math(NewOS::UIntPtr rsp);
+EXTERN_C void idt_handle_pf(NewOS::UIntPtr rsp);
 
-EXTERN_C void hal_load_idt(HCore::HAL::Register64 ptr);
-EXTERN_C void hal_load_gdt(HCore::HAL::RegisterGDT ptr);
+EXTERN_C void hal_load_idt(NewOS::HAL::Register64 ptr);
+EXTERN_C void hal_load_gdt(NewOS::HAL::RegisterGDT ptr);
 
 /// @brief Maximum size of the IDT.
 #define kKernelIdtSize        0x100
diff --git a/Private/HALKit/AMD64/Storage/ATA.cxx b/Private/HALKit/AMD64/Storage/ATA.cxx
index 699876b7..d9744153 100644
--- a/Private/HALKit/AMD64/Storage/ATA.cxx
+++ b/Private/HALKit/AMD64/Storage/ATA.cxx
@@ -18,8 +18,8 @@
 #include <Builtins/ATA/Defines.hxx>
 #include <ArchKit/ArchKit.hpp>
 
-using namespace HCore;
-using namespace HCore::HAL;
+using namespace NewOS;
+using namespace NewOS::HAL;
 
 /// bugs: 0
 
diff --git a/Private/HALKit/AXP/CoreSyscallHandlerDEC.cpp b/Private/HALKit/AXP/CoreSyscallHandlerDEC.cpp
index 49a0062c..a0d1b13e 100644
--- a/Private/HALKit/AXP/CoreSyscallHandlerDEC.cpp
+++ b/Private/HALKit/AXP/CoreSyscallHandlerDEC.cpp
@@ -7,12 +7,12 @@
 #include <ArchKit/ArchKit.hpp>
 #include <HALKit/Alpha/Processor.hpp>
 
-HCore::Array<void (*)(HCore::Int32 id, HCore::HAL::StackFrame *),
+NewOS::Array<void (*)(NewOS::Int32 id, NewOS::HAL::StackFrame *),
              kKernelMaxSystemCalls>
     kSyscalls;
 
-extern "C" void rt_syscall_handle(HCore::HAL::StackFrame *stack) {
-  for (HCore::SizeT index = 0UL; index < kKernelMaxSystemCalls; ++index) {
+extern "C" void rt_syscall_handle(NewOS::HAL::StackFrame *stack) {
+  for (NewOS::SizeT index = 0UL; index < kKernelMaxSystemCalls; ++index) {
     (kSyscalls[index].Leak().Leak())(stack->ID, stack);
   }
 }
diff --git a/Private/HALKit/PowerPC/HalCoreSyscallHandlerPowerPC.cpp b/Private/HALKit/PowerPC/HalCoreSyscallHandlerPowerPC.cpp
index eac04e47..322cb604 100644
--- a/Private/HALKit/PowerPC/HalCoreSyscallHandlerPowerPC.cpp
+++ b/Private/HALKit/PowerPC/HalCoreSyscallHandlerPowerPC.cpp
@@ -7,12 +7,12 @@
 #include <ArchKit/ArchKit.hpp>
 #include <NewKit/Array.hpp>
 
-HCore::Array<void (*)(HCore::Int32 id, HCore::HAL::StackFrame *),
+NewOS::Array<void (*)(NewOS::Int32 id, NewOS::HAL::StackFrame *),
              kKernelMaxSystemCalls>
     kSyscalls;
 
-extern "C" void rt_syscall_handle(HCore::HAL::StackFrame *stack) {
-  for (HCore::SizeT index = 0UL; index < kKernelMaxSystemCalls; ++index) {
+extern "C" void rt_syscall_handle(NewOS::HAL::StackFrame *stack) {
+  for (NewOS::SizeT index = 0UL; index < kKernelMaxSystemCalls; ++index) {
     (kSyscalls[index].Leak().Leak())(stack->ID, stack);
   }
 }
diff --git a/Private/HALKit/PowerPC/HalHardware.cxx b/Private/HALKit/PowerPC/HalHardware.cxx
index 49e85138..9fc278a6 100644
--- a/Private/HALKit/PowerPC/HalHardware.cxx
+++ b/Private/HALKit/PowerPC/HalHardware.cxx
@@ -7,7 +7,7 @@
 #include <HALKit/PowerPC/Processor.hpp>
 #include <KernelKit/DebugOutput.hpp>
 
-namespace HCore {
+namespace NewOS {
 namespace HAL {
 UIntPtr hal_alloc_page(bool rw, bool user) { return 0; }
 }  // namespace HAL
@@ -31,4 +31,4 @@ void ke_com_print(const Char* bytes) {
     ++index;
   }
 }
-}  // namespace HCore
+}  // namespace NewOS
diff --git a/Private/HALKit/PowerPC/HalThread.cxx b/Private/HALKit/PowerPC/HalThread.cxx
index 585ae706..af8bcc6f 100644
--- a/Private/HALKit/PowerPC/HalThread.cxx
+++ b/Private/HALKit/PowerPC/HalThread.cxx
@@ -10,4 +10,4 @@
 extern "C" void hal_flush_tlb() {}
 extern "C" void rt_wait_400ns() {}
 
-extern "C" HCore::HAL::StackFramePtr rt_get_current_context() { return nullptr; }
+extern "C" NewOS::HAL::StackFramePtr rt_get_current_context() { return nullptr; }
diff --git a/Private/HALKit/PowerPC/Processor.hpp b/Private/HALKit/PowerPC/Processor.hpp
index e5f04455..be929fd7 100644
--- a/Private/HALKit/PowerPC/Processor.hpp
+++ b/Private/HALKit/PowerPC/Processor.hpp
@@ -11,7 +11,7 @@
 
 #define __aligned __attribute__((aligned(4)))
 
-namespace HCore::HAL {
+namespace NewOS::HAL {
 typedef UIntPtr Reg;
 
 struct __aligned StackFrame {
@@ -34,8 +34,8 @@ inline void rt_halt() {
 }
 
 inline void rt_cli() {}
-}  // namespace HCore::HAL
+}  // namespace NewOS::HAL
 
-extern "C" void int_handle_math(HCore::UIntPtr sp);
-extern "C" void int_handle_pf(HCore::UIntPtr sp);
+extern "C" void int_handle_math(NewOS::UIntPtr sp);
+extern "C" void int_handle_pf(NewOS::UIntPtr sp);
 extern "C" void* __ppc_alloca(size_t sz);
diff --git a/Private/HALKit/RISCV/Hart.hxx b/Private/HALKit/RISCV/Hart.hxx
index fbf7dca1..9bf8668f 100644
--- a/Private/HALKit/RISCV/Hart.hxx
+++ b/Private/HALKit/RISCV/Hart.hxx
@@ -15,4 +15,4 @@
 
 #include <NewKit/Defines.hpp>
 
-typedef HCore::Int32 Rv64HartType;
+typedef NewOS::Int32 Rv64HartType;