FS, DriveMgr, AHCI: Actively working on it.

PagingMgr: Define get_phys_address in C++ source directly.

Signed-off-by: Amlal <amlal.elmahrouss@icloud.com>

3 files changed, 86 insertions, 59 deletions

diff --git a/dev/Kernel/HALKit/AMD64/HalPagingMgrAMD64.cc b/dev/Kernel/HALKit/AMD64/HalPagingMgrAMD64.cc
index ab8c5b97..442e9b83 100644
--- a/dev/Kernel/HALKit/AMD64/HalPagingMgrAMD64.cc
+++ b/dev/Kernel/HALKit/AMD64/HalPagingMgrAMD64.cc
@@ -3,7 +3,7 @@
 	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
 
 	File: HalPagingMgr.cc
-	Purpose: Platform Paging Manager..
+	Purpose: Platform Paging Manager.
 
 ------------------------------------------- */
 
@@ -50,6 +50,50 @@ namespace Kernel::HAL
 		}
 	};
 
+	/// @brief Go over the Page structure and find the address of *virtual_address*
+
+	UInt64 hal_get_phys_address(VoidPtr virtual_address)
+	{
+		// Constants for table index bits
+		const UInt64 kPmlIndexMask = 0x1FFULL; // Mask for PML4, PDPT, PD, PT index (9 bits)
+		const UInt64 kPtIndexMask  = 0xFFFULL; // Mask for page table index (12 bits)
+
+		UInt64 cr3 = (UInt64)hal_read_cr3();
+
+		NE_PAGE_STORE& page_store = NE_PAGE_STORE::The();
+
+		// Extract the indices from the virtual address
+		UInt64 pml4_index = ((UIntPtr)virtual_address >> 39) & kPmlIndexMask;
+		UInt64 pdpt_index = ((UIntPtr)virtual_address >> 30) & kPmlIndexMask;
+		UInt64 pd_index	  = ((UIntPtr)virtual_address >> 21) & kPmlIndexMask;
+		UInt64 pt_index	  = ((UIntPtr)virtual_address >> 12) & kPmlIndexMask;
+
+		page_store.fStoreOp = Yes;
+
+		const auto kPmlEntrySize = 8;
+
+		// Read the PML4 entry from memory
+		UInt64 pml4_base  = cr3 & ~kPtIndexMask;					  // CR3 points to the PML4 table base, mask off lower bits
+		UInt64 pml4_entry = (pml4_base + pml4_index * kPmlEntrySize); // Each entry is 8 bytes
+
+		// Read the PDPT entry
+		UInt64 pdpt_base  = pml4_entry & ~kPtIndexMask; // Get the PDPT base physical address
+		UInt64 pdpt_entry = (pdpt_base + pdpt_index * kPmlEntrySize);
+
+		// Read the PD entry
+		UInt64 pd_base	= pdpt_entry & ~kPtIndexMask; // Get the Page Directory base physical address
+		UInt64 pd_entry = (pd_base + pd_index * kPmlEntrySize);
+
+		// Read the PT entry
+		UInt64 pt_base	= pd_entry & ~kPtIndexMask; // Get the Page Table base physical address
+		UInt64 pt_entry = (pt_base + pt_index * kPmlEntrySize);
+
+		// Lastly, grab the pte entry.
+		NE_PDE* pde_struct = reinterpret_cast<NE_PDE*>(pt_base);
+
+		return pde_struct->fEntries[pt_entry]->PhysicalAddress;
+	}
+
 	/***********************************************************************************/
 	/// \brief Retrieve the page status of a PTE.
 	/// \param pte Page Table Entry pointer.
@@ -62,7 +106,7 @@ namespace Kernel::HAL
 		kout << (pte->User ? "User" : "Not User") << endl;
 	}
 
-	STATIC Int32 mmi_map_page_table_entry(UInt32 virtual_address, UInt32 flags, NE_PTE* pt_entry, NE_PDE* pd_entry);
+	STATIC Int32 mmi_map_page_table_entry(UInt32 physical_address, UInt32 flags, NE_PTE* pt_entry, NE_PDE* pd_entry);
 
 	/***********************************************************************************/
 	/// @brief Maps or allocates a page from virtual_address.
@@ -73,43 +117,39 @@ namespace Kernel::HAL
 	/***********************************************************************************/
 	EXTERN_C Int32 mm_map_page(VoidPtr virtual_address, VoidPtr physical_address, UInt32 flags)
 	{
-		if (!virtual_address ||
-			!flags)
-			return 0;
-
 		// Constants for table index bits
-		const UInt64 cPmlIndexMask = 0x1FFULL; // Mask for PML4, PDPT, PD, PT index (9 bits)
-		const UInt64 cPtIndexMask  = 0xFFFULL; // Mask for page table index (12 bits)
+		const UInt64 kPmlIndexMask = 0x1FFULL; // Mask for PML4, PDPT, PD, PT index (9 bits)
+		const UInt64 kPtIndexMask  = 0xFFFULL; // Mask for page table index (12 bits)
 
 		UInt64 cr3 = (UInt64)hal_read_cr3();
 
 		NE_PAGE_STORE& page_store = NE_PAGE_STORE::The();
 
 		// Extract the indices from the virtual address
-		UInt64 pml4_index = ((UIntPtr)virtual_address >> 39) & cPmlIndexMask;
-		UInt64 pdpt_index = ((UIntPtr)virtual_address >> 30) & cPmlIndexMask;
-		UInt64 pd_index	  = ((UIntPtr)virtual_address >> 21) & cPmlIndexMask;
-		UInt64 pt_index	  = ((UIntPtr)virtual_address >> 12) & cPmlIndexMask;
+		UInt64 pml4_index = ((UIntPtr)virtual_address >> 39) & kPmlIndexMask;
+		UInt64 pdpt_index = ((UIntPtr)virtual_address >> 30) & kPmlIndexMask;
+		UInt64 pd_index	  = ((UIntPtr)virtual_address >> 21) & kPmlIndexMask;
+		UInt64 pt_index	  = ((UIntPtr)virtual_address >> 12) & kPmlIndexMask;
 
 		page_store.fStoreOp = Yes;
 
-		const auto cPmlEntrySize = 8;
+		const auto kPmlEntrySize = 8;
 
 		// Read the PML4 entry from memory
-		UInt64 pml4_base  = cr3 & ~cPtIndexMask;					  // CR3 points to the PML4 table base, mask off lower bits
-		UInt64 pml4_entry = (pml4_base + pml4_index * cPmlEntrySize); // Each entry is 8 bytes
+		UInt64 pml4_base  = cr3 & ~kPtIndexMask;					  // CR3 points to the PML4 table base, mask off lower bits
+		UInt64 pml4_entry = (pml4_base + pml4_index * kPmlEntrySize); // Each entry is 8 bytes
 
 		// Read the PDPT entry
-		UInt64 pdpt_base  = pml4_entry & ~cPtIndexMask; // Get the PDPT base physical address
-		UInt64 pdpt_entry = (pdpt_base + pdpt_index * cPmlEntrySize);
+		UInt64 pdpt_base  = pml4_entry & ~kPtIndexMask; // Get the PDPT base physical address
+		UInt64 pdpt_entry = (pdpt_base + pdpt_index * kPmlEntrySize);
 
 		// Read the PD entry
-		UInt64 pd_base	= pdpt_entry & ~cPtIndexMask; // Get the Page Directory base physical address
-		UInt64 pd_entry = (pd_base + pd_index * cPmlEntrySize);
+		UInt64 pd_base	= pdpt_entry & ~kPtIndexMask; // Get the Page Directory base physical address
+		UInt64 pd_entry = (pd_base + pd_index * kPmlEntrySize);
 
 		// Read the PT entry
-		UInt64 pt_base	= pd_entry & ~cPtIndexMask; // Get the Page Table base physical address
-		UInt64 pt_entry = (pt_base + pt_index * cPmlEntrySize);
+		UInt64 pt_base	= pd_entry & ~kPtIndexMask; // Get the Page Table base physical address
+		UInt64 pt_entry = (pt_base + pt_index * kPmlEntrySize);
 
 		// Lastly, grab the pte entry.
 		NE_PDE* pde_struct = reinterpret_cast<NE_PDE*>(pt_base);
diff --git a/dev/Kernel/HALKit/AMD64/Processor.h b/dev/Kernel/HALKit/AMD64/Processor.h
index 24e84b79..db91d138 100644
--- a/dev/Kernel/HALKit/AMD64/Processor.h
+++ b/dev/Kernel/HALKit/AMD64/Processor.h
@@ -206,26 +206,7 @@ namespace Kernel::HAL
 		return edx & (1 << 5);
 	}
 
-	inline UInt64 hal_get_phys_address(void* virtual_address)
-	{
-		UInt64 addr = (UInt64)virtual_address;
-		UInt64 cr3	= (UInt64)hal_read_cr3();
-
-		// Extract indices for PML4, PDPT, PD, and PT
-		UInt64 pml4_idx = (addr >> 39) & 0x1FF;
-		UInt64 pdpt_idx = (addr >> 30) & 0x1FF;
-		UInt64 pd_idx	= (addr >> 21) & 0x1FF;
-		UInt64 pt_idx	= (addr >> 12) & 0x1FF;
-
-		// Get PML4 Table
-		UInt64* pml4 = (UInt64*)(cr3 & ~0xFFF);
-		UInt64* pdpt = (UInt64*)(pml4[pml4_idx] & ~0xFFF);
-		UInt64* pd	 = (UInt64*)(pdpt[pdpt_idx] & ~0xFFF);
-		UInt64* pt	 = (UInt64*)(pd[pd_idx] & ~0xFFF);
-
-		// Get Physical Address
-		return (pt[pt_idx] & ~0xFFF) + (addr & 0xFFF);
-	}
+	UIntPtr hal_get_phys_address(void* virtual_address);
 
 	/***********************************************************************************/
 	/// @brief Get Model specific register inside core.
diff --git a/dev/Kernel/HALKit/AMD64/Storage/AHCI.cc b/dev/Kernel/HALKit/AMD64/Storage/AHCI.cc
index 2f731ba9..2dc17deb 100644
--- a/dev/Kernel/HALKit/AMD64/Storage/AHCI.cc
+++ b/dev/Kernel/HALKit/AMD64/Storage/AHCI.cc
@@ -118,9 +118,6 @@ Kernel::Boolean drv_std_init(Kernel::UInt16& PortsImplemented)
 						kSATAPortIdx = ahci_index;
 						kSATA		 = mem_ahci;
 
-						kSATA->Ports[kSATAPortIdx].Cmd |= kHBAPxCmdFre;
-						kSATA->Ports[kSATAPortIdx].Cmd |= kHBAPxCmdST;
-
 						drv_calculate_disk_geometry();
 
 						detected = YES;
@@ -178,6 +175,9 @@ BOOL kAHCICommandIssued = NO;
 template <BOOL Write, BOOL CommandOrCTRL, BOOL Identify>
 static Kernel::Void drv_std_input_output(Kernel::UInt64 lba, Kernel::UInt8* buffer, Kernel::SizeT sector_sz, Kernel::SizeT size_buffer) noexcept
 {
+	kSATA->Ports[kSATAPortIdx].Cmd |= kHBAPxCmdFre;
+	kSATA->Ports[kSATAPortIdx].Cmd |= kHBAPxCmdST;
+
 	auto slot = 0L;
 
 	slot = drv_find_cmd_slot(&kSATA->Ports[kSATAPortIdx]);
@@ -201,13 +201,13 @@ static Kernel::Void drv_std_input_output(Kernel::UInt64 lba, Kernel::UInt8* buff
 
 	auto buffer_phys = Kernel::HAL::hal_get_phys_address(buffer);
 
-	command_table->Prdt[0].Dba	= ((Kernel::UInt32)(Kernel::UInt64)buffer_phys & 0xFFFFFFFF);
-	command_table->Prdt[0].Dbau = (((Kernel::UInt64)(buffer_phys) >> 32) & 0xFFFFFFFF);
+	command_table->Prdt[0].Dba	= ((Kernel::UInt32)(Kernel::UInt64)buffer_phys);
+	command_table->Prdt[0].Dbau = (((Kernel::UInt64)(buffer_phys) >> 32));
 	command_table->Prdt[0].Dbc	= ((size_buffer / 2) - 1);
 	command_table->Prdt[0].Ie	= YES;
 
-	command_table->Prdt[1].Dba	= ((Kernel::UInt32)(Kernel::UInt64)(buffer_phys + ((size_buffer / 2) - 1)) & 0xFFFFFFFF);
-	command_table->Prdt[1].Dbau = (((Kernel::UInt64)(buffer_phys + ((size_buffer / 2) - 1)) >> 32) & 0xFFFFFFFF);
+	command_table->Prdt[1].Dba	= ((Kernel::UInt32)(Kernel::UInt64)(buffer_phys + ((size_buffer / 2) - 1)));
+	command_table->Prdt[1].Dbau = (((Kernel::UInt64)(buffer_phys + ((size_buffer / 2) - 1)) >> 32));
 	command_table->Prdt[1].Dbc	= ((size_buffer / 2) - 1);
 	command_table->Prdt[1].Ie	= YES;
 
@@ -220,17 +220,18 @@ static Kernel::Void drv_std_input_output(Kernel::UInt64 lba, Kernel::UInt8* buff
 	if (Identify)
 		h2d_fis->Command = kAHCICmdIdentify;
 
-	h2d_fis->Lba0 = (lba & 0xFF);
-	h2d_fis->Lba1 = (lba >> 8) & 0xFF;
-	h2d_fis->Lba2 = (lba >> 16) & 0xFF;
-	h2d_fis->Lba3 = (lba >> 24) & 0xFF;
-	h2d_fis->Lba4 = (lba >> 32) & 0xFF;
-	h2d_fis->Lba5 = (lba >> 40) & 0xFF;
+	h2d_fis->Lba0 = (lba);
+	h2d_fis->Lba1 = (lba >> 8);
+	h2d_fis->Lba2 = (lba >> 16);
 
 	h2d_fis->Device = kSataLBAMode;
 
-	h2d_fis->CountLow  = (sector_sz - 1) & 0xFF;
-	h2d_fis->CountHigh = ((sector_sz - 1) >> 8) & 0xFF;
+	h2d_fis->Lba3 = (lba >> 24);
+	h2d_fis->Lba4 = (lba >> 32);
+	h2d_fis->Lba5 = (lba >> 40);
+
+	h2d_fis->CountLow  = (size_buffer) & 0xFF;
+	h2d_fis->CountHigh = ((size_buffer) >> 8) & 0xFF;
 
 	while ((kSATA->Ports[kSATAPortIdx].Tfd & (kAhciSRBsy | kAhciSRDrq)))
 	{
@@ -242,14 +243,19 @@ static Kernel::Void drv_std_input_output(Kernel::UInt64 lba, Kernel::UInt8* buff
 
 	while (kSATA->Ports[kSATAPortIdx].Ci & (1 << slot))
 	{
-		kout << Kernel::hex_number(command_header->Prdtl) << endl;
-	
 		if (kSATA->Is & kHBAErrTaskFile) // check for task file error.
 		{
 			Kernel::ke_panic(RUNTIME_CHECK_BAD_BEHAVIOR, "AHCI Read disk failure, faulty component.");
-			return;
 		}
 	}
+
+	kSATA->Ports[kSATAPortIdx].Cmd &= ~kHBAPxCmdFre;
+	kSATA->Ports[kSATAPortIdx].Cmd &= ~kHBAPxCmdST;
+
+	if (kSATA->Is & kHBAErrTaskFile) // check for task file error.
+	{
+		Kernel::ke_panic(RUNTIME_CHECK_BAD_BEHAVIOR, "AHCI Read disk failure, faulty component.");
+	}
 }
 
 /***