feat: DmaPool, and Scheduler Interrupts for ARM.

I extended DmaKit to support `ARM` fully, taking ISA internals, such as
alignment into play.

Also implemented the scheduler's interrupts for `ARM` too.

Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>

1 files changed, 15 insertions, 4 deletions

diff --git a/dev/kernel/DmaKit/DmaPool.h b/dev/kernel/DmaKit/DmaPool.h
index 9decb3f1..d4bec398 100644
--- a/dev/kernel/DmaKit/DmaPool.h
+++ b/dev/kernel/DmaKit/DmaPool.h
@@ -2,8 +2,8 @@
 
   Copyright (C) 2025, Amlal El Mahrouss , all rights reserved.
 
-  File: FileMgr.h
-  Purpose: Kernel file manager.
+  File: DmaPool.h
+  Purpose: Dma Pool Manager.
 
 ------------------------------------------- */
 
@@ -15,6 +15,13 @@
 #ifdef __NE_AMD64__
 #define kNeDMAPoolStart (0x1000000)
 #define kNeDMAPoolSize (0x1000000)
+#elif defined(__NE_ARM64__)
+/// @todo what reference offset shall we use?
+#define kNeDMAPoolStart (0x1000000)
+#define kNeDMAPoolSize (0x1000000)
+#endif
+
+#define kNeDMABestAlign __BIGGEST_ALIGNMENT__
 
 namespace Kernel {
 /// @brief DMA pool base pointer, here we're sure that AHCI or whatever tricky standard sees it.
@@ -31,6 +38,11 @@ inline VoidPtr rtl_dma_alloc(SizeT size, SizeT align) {
     return nullptr;
   }
 
+  /// Check alignement according to architecture.
+  if ((align % kNeDMABestAlign) != 0) {
+    return nullptr;
+  }
+
   UIntPtr addr = (UIntPtr) kDmaPoolPtr;
 
   /// here we just align the address according to a `align` variable, i'd rather be a power of two
@@ -84,5 +96,4 @@ inline Void rtl_dma_flush(VoidPtr ptr, SizeT size_buffer) {
     HAL::mm_memory_fence((VoidPtr) ((UInt8*) ptr + buf_idx));
   }
 }
-}  // namespace Kernel
-#endif
\ No newline at end of file
+}  // namespace Kernel
\ No newline at end of file