meta(kernel): Reworked repository's filesystem structure.

Removing useless parts of the project too.

Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>

7 files changed, 333 insertions, 0 deletions

diff --git a/dev/kernel/HALKit/AMD64/PCI/DMA.cc b/dev/kernel/HALKit/AMD64/PCI/DMA.cc
new file mode 100644
index 00000000..c756a572
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/PCI/DMA.cc
@@ -0,0 +1,87 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <KernelKit/PCI/DMA.h>
+
+namespace NeOS
+{
+	DMAWrapper::operator bool()
+	{
+		return this->fAddress;
+	}
+
+	bool DMAWrapper::operator!()
+	{
+		return !this->fAddress;
+	}
+
+	Boolean DMAWrapper::Check(UIntPtr offset) const
+	{
+		if (!this->fAddress)
+			return false;
+
+		if (offset == 0)
+			return false;
+
+		kout << "[DMAWrapper::IsIn] Checking offset..\n";
+		return reinterpret_cast<UIntPtr>(this->fAddress) >= offset;
+	}
+
+	bool DMAWrapper::Write(const UIntPtr& bit, const UInt32& offset)
+	{
+		kout << "[DMAWrapper::Read] Checking this->fAddress..\n";
+
+		if (!this->fAddress)
+			return false;
+
+		kout << "[DMAWrapper::Write] Writing at address..\n";
+
+		auto addr =
+			(volatile UIntPtr*)(reinterpret_cast<UIntPtr>(this->fAddress) + offset);
+		*addr = bit;
+
+		return true;
+	}
+
+	UIntPtr DMAWrapper::Read(const UInt32& offset)
+	{
+		kout << "[DMAWrapper::Read] Checking this->fAddress..\n";
+
+		if (!this->fAddress)
+			return 0;
+
+		kout << "[DMAWrapper::Read] Reading this->fAddress..\n";
+
+		return *(volatile UIntPtr*)(reinterpret_cast<UIntPtr>(this->fAddress) + offset);
+		;
+	}
+
+	UIntPtr DMAWrapper::operator[](const UIntPtr& offset)
+	{
+		return this->Read(offset);
+	}
+
+	OwnPtr<IOBuf<Char*>> DMAFactory::Construct(OwnPtr<DMAWrapper>& dma)
+	{
+		if (!dma)
+			return {};
+
+		OwnPtr<IOBuf<Char*>> dmaOwnPtr =
+			make_ptr<IOBuf<Char*>, char*>(reinterpret_cast<char*>(dma->fAddress));
+
+		if (!dmaOwnPtr)
+			return {};
+
+		kout << "Returning the new OwnPtr<IOBuf<Char*>>!\r";
+		return dmaOwnPtr;
+	}
+
+	DMAWrapper& DMAWrapper::operator=(voidPtr Ptr)
+	{
+		this->fAddress = Ptr;
+		return *this;
+	}
+} // namespace NeOS
diff --git a/dev/kernel/HALKit/AMD64/PCI/Database.cc b/dev/kernel/HALKit/AMD64/PCI/Database.cc
new file mode 100644
index 00000000..c5aa1282
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/PCI/Database.cc
@@ -0,0 +1,11 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <KernelKit/PCI/Database.h>
+
+namespace NeOS
+{
+}
diff --git a/dev/kernel/HALKit/AMD64/PCI/Device.cc b/dev/kernel/HALKit/AMD64/PCI/Device.cc
new file mode 100644
index 00000000..348e058a
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/PCI/Device.cc
@@ -0,0 +1,171 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <ArchKit/ArchKit.h>
+#include <KernelKit/PCI/Device.h>
+
+#define PCI_BAR_IO		 0x01
+#define PCI_BAR_LOWMEM	 0x02
+#define PCI_BAR_64		 0x04
+#define PCI_BAR_PREFETCH 0x08
+
+NeOS::UInt NE_PCIReadRaw(NeOS::UInt bar, NeOS::UShort bus, NeOS::UShort dev, NeOS::UShort fun)
+{
+	NeOS::UInt target = 0x80000000 | ((NeOS::UInt)bus << 16) |
+						((NeOS::UInt)dev << 11) | ((NeOS::UInt)fun << 8) |
+						(bar & 0xFC);
+
+	NeOS::HAL::rt_out32((NeOS::UShort)NeOS::PCI::PciConfigKind::ConfigAddress,
+						target);
+
+	NeOS::HAL::rt_wait_400ns();
+
+	return NeOS::HAL::rt_in32((NeOS::UShort)NeOS::PCI::PciConfigKind::ConfigData);
+}
+
+void NE_PCISetCfgTarget(NeOS::UInt bar, NeOS::UShort bus, NeOS::UShort dev, NeOS::UShort fun)
+{
+	NeOS::UInt target = 0x80000000 | ((NeOS::UInt)bus << 16) |
+						((NeOS::UInt)dev << 11) | ((NeOS::UInt)fun << 8) |
+						(bar & 0xFC);
+
+	NeOS::HAL::rt_out32((NeOS::UShort)NeOS::PCI::PciConfigKind::ConfigAddress,
+						target);
+
+	NeOS::HAL::rt_wait_400ns();
+}
+
+namespace NeOS::PCI
+{
+	Device::Device(UShort bus, UShort device, UShort func, UInt32 bar)
+		: fBus(bus), fDevice(device), fFunction(func), fBar(bar)
+	{
+	}
+
+	Device::~Device() = default;
+
+	UInt Device::Read(UInt bar, Size sz)
+	{
+		// Ensure aligned access by masking to 4-byte boundary
+		NE_PCISetCfgTarget(bar & 0xFC, fBus, fDevice, fFunction);
+
+		// Read 4 bytes and shift out the correct value
+		UInt data = HAL::rt_in32((UShort)PciConfigKind::ConfigData);
+
+		if (sz == 4)
+			return data;
+		if (sz == 2)
+			return (data >> ((bar & 2) * 8)) & 0xFFFF;
+		if (sz == 1)
+			return (data >> ((bar & 3) * 8)) & 0xFF;
+
+		return (UShort)PciConfigKind::Invalid;
+	}
+
+	void Device::Write(UInt bar, UIntPtr data, Size sz)
+	{
+		NE_PCISetCfgTarget(bar & 0xFC, fBus, fDevice, fFunction);
+
+		if (sz == 4)
+			HAL::rt_out32((UShort)PciConfigKind::ConfigData, (UInt)data);
+		else if (sz == 2)
+		{
+			UInt temp = HAL::rt_in32((UShort)PciConfigKind::ConfigData);
+			temp &= ~(0xFFFF << ((bar & 2) * 8));
+			temp |= (data & 0xFFFF) << ((bar & 2) * 8);
+			HAL::rt_out32((UShort)PciConfigKind::ConfigData, temp);
+		}
+		else if (sz == 1)
+		{
+			UInt temp = HAL::rt_in32((UShort)PciConfigKind::ConfigData);
+			temp &= ~(0xFF << ((bar & 3) * 8));
+			temp |= (data & 0xFF) << ((bar & 3) * 8);
+			HAL::rt_out32((UShort)PciConfigKind::ConfigData, temp);
+		}
+	}
+
+	UShort Device::DeviceId()
+	{
+		return (UShort)(NE_PCIReadRaw(0x0, fBus, fDevice, fFunction) >> 16);
+	}
+
+	UShort Device::VendorId()
+	{
+		return (UShort)(NE_PCIReadRaw(0x0, fBus, fDevice, fFunction) & 0xFFFF);
+	}
+
+	UShort Device::InterfaceId()
+	{
+		return (UShort)(NE_PCIReadRaw(0x0, fBus, fDevice, fFunction) >> 16);
+	}
+
+	UChar Device::Class()
+	{
+		return (UChar)(NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 24);
+	}
+
+	UChar Device::Subclass()
+	{
+		return (UChar)(NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 16);
+	}
+
+	UChar Device::ProgIf()
+	{
+		return (UChar)(NE_PCIReadRaw(0x08, fBus, fDevice, fFunction) >> 8);
+	}
+
+	UChar Device::HeaderType()
+	{
+		return (UChar)(NE_PCIReadRaw(0xC, fBus, fDevice, fFunction) >> 16);
+	}
+
+	void Device::EnableMmio(UInt32 bar_in)
+	{
+		UInt32 enable = Read(bar_in, sizeof(UInt32));
+		enable |= (1 << 1);
+
+		Write(bar_in, enable, sizeof(UInt32));
+	}
+
+	void Device::BecomeBusMaster(UInt32 bar_in)
+	{
+		UInt32 enable = Read(bar_in, sizeof(UInt32));
+		enable |= (1 << 2);
+
+		Write(bar_in, enable, sizeof(UInt32));
+	}
+
+	UIntPtr Device::Bar(UInt32 bar_in)
+	{
+		UInt32 bar = NE_PCIReadRaw(bar_in & ~0x03, fBus, fDevice, fFunction);
+
+		if (bar & PCI_BAR_IO)
+			return static_cast<UIntPtr>(bar & ~0x03);
+
+		if (bar & PCI_BAR_64)
+		{
+			UInt32 high = NE_PCIReadRaw((bar_in + 4) & ~0x03, fBus, fDevice, fFunction);
+			return (static_cast<UIntPtr>(high) << 32) | (bar & ~0x0F);
+		}
+
+		return static_cast<UIntPtr>(bar & ~0x0F);
+	}
+
+	UShort Device::Vendor()
+	{
+		UShort vendor = VendorId();
+
+		if (vendor != (UShort)PciConfigKind::Invalid)
+			fDevice = (UShort)Read(0x0, sizeof(UShort));
+
+		return fDevice;
+	}
+
+	Device::operator bool()
+	{
+		return VendorId() != (UShort)PciConfigKind::Invalid;
+	}
+} // namespace NeOS::PCI
diff --git a/dev/kernel/HALKit/AMD64/PCI/Express.cc b/dev/kernel/HALKit/AMD64/PCI/Express.cc
new file mode 100644
index 00000000..487cbd39
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/PCI/Express.cc
@@ -0,0 +1,11 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <KernelKit/PCI/Express.h>
+
+namespace NeOS
+{
+}
diff --git a/dev/kernel/HALKit/AMD64/PCI/IO.cc b/dev/kernel/HALKit/AMD64/PCI/IO.cc
new file mode 100644
index 00000000..c20e1b0e
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/PCI/IO.cc
@@ -0,0 +1,7 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <KernelKit/PCI/IO.h>
diff --git a/dev/kernel/HALKit/AMD64/PCI/Iterator.cc b/dev/kernel/HALKit/AMD64/PCI/Iterator.cc
new file mode 100644
index 00000000..bf215fe2
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/PCI/Iterator.cc
@@ -0,0 +1,39 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <KernelKit/PCI/Iterator.h>
+
+namespace NeOS::PCI
+{
+	Iterator::Iterator(const Types::PciDeviceKind& type)
+	{
+		// probe devices.
+		for (int bus = 0; bus < NE_BUS_COUNT; ++bus)
+		{
+			for (int device = 0; device < NE_DEVICE_COUNT; ++device)
+			{
+				for (int function = 0; function < NE_FUNCTION_COUNT; ++function)
+				{
+					Device dev(bus, device, function, 0x00);
+
+					if (dev.Class() == type)
+					{
+						fDevices[bus] = dev;
+					}
+				}
+			}
+		}
+	}
+
+	Iterator::~Iterator()
+	{
+	}
+
+	Ref<PCI::Device> Iterator::operator[](const Size& at)
+	{
+		return fDevices[at];
+	}
+} // namespace NeOS::PCI
diff --git a/dev/kernel/HALKit/AMD64/PCI/PCI.cc b/dev/kernel/HALKit/AMD64/PCI/PCI.cc
new file mode 100644
index 00000000..01f2c23b
--- /dev/null
+++ b/dev/kernel/HALKit/AMD64/PCI/PCI.cc
@@ -0,0 +1,7 @@
+/* -------------------------------------------
+
+	Copyright (C) 2024-2025, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <KernelKit/PCI/PCI.h>