Merge pull request #28 from nekernel-org/dev

0.0.2

9 files changed, 301 insertions, 347 deletions

diff --git a/dev/kernel/KernelKit/PCI/DMA.h b/dev/kernel/KernelKit/PCI/DMA.h
index b2d3cfa8..28256389 100644
--- a/dev/kernel/KernelKit/PCI/DMA.h
+++ b/dev/kernel/KernelKit/PCI/DMA.h
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -12,70 +12,63 @@
 #include <NewKit/OwnPtr.h>
 #include <NewKit/Ref.h>
 
-namespace Kernel
-{
-	enum class DmaKind
-	{
-		PCI, // Bus mastering is required to be turned on. Basiaclly a request
-		// control system. 64-Bit access depends on the PAE bit and the device
-		// (if Double Address Cycle is available)
-		ISA, // Four DMA channels 0-3; 8 bit transfers and only a megabyte of RAM.
-		Invalid,
-	};
-
-	class DMAWrapper final
-	{
-	public:
-		explicit DMAWrapper() = delete;
-
-	public:
-		explicit DMAWrapper(nullPtr) = delete;
-		explicit DMAWrapper(voidPtr Ptr, DmaKind Kind = DmaKind::PCI)
-			: fAddress(Ptr), fKind(Kind)
-		{
-		}
-
-	public:
-		DMAWrapper& operator=(voidPtr Ptr);
-
-	public:
-		DMAWrapper& operator=(const DMAWrapper&) = default;
-		DMAWrapper(const DMAWrapper&)			 = default;
-
-	public:
-		~DMAWrapper() = default;
-
-		template <class T>
-		T* operator->();
-
-		template <class T>
-		T* Get(UIntPtr off = 0);
-
-	public:
-			 operator bool();
-		bool operator!();
-
-	public:
-		bool	Write(UIntPtr& bit, const UInt32& offset);
-		UIntPtr Read(const UInt32& offset);
-		Boolean Check(UIntPtr offset) const;
-
-	public:
-		UIntPtr operator[](UIntPtr& offset);
-
-	private:
-		voidPtr fAddress{nullptr};
-		DmaKind fKind{DmaKind::Invalid};
-
-	private:
-		friend class DMAFactory;
-	};
-
-	class DMAFactory final
-	{
-	public:
-		static OwnPtr<IOBuf<Char*>> Construct(OwnPtr<DMAWrapper>& dma);
-	};
-} // namespace Kernel
+namespace Kernel {
+enum class DmaKind {
+  PCI,  // Bus mastering is required to be turned on. Basiaclly a request
+  // control system. 64-Bit access depends on the PAE bit and the device
+  // (if Double Address Cycle is available)
+  ISA,  // Four DMA channels 0-3; 8 bit transfers and only a megabyte of RAM.
+  Invalid,
+};
+
+class DMAWrapper final {
+ public:
+  explicit DMAWrapper() = delete;
+
+ public:
+  explicit DMAWrapper(nullPtr) = delete;
+  explicit DMAWrapper(voidPtr Ptr, DmaKind Kind = DmaKind::PCI) : fAddress(Ptr), fKind(Kind) {}
+
+ public:
+  DMAWrapper& operator=(voidPtr Ptr);
+
+ public:
+  DMAWrapper& operator=(const DMAWrapper&) = default;
+  DMAWrapper(const DMAWrapper&)            = default;
+
+ public:
+  ~DMAWrapper() = default;
+
+  template <class T>
+  T* operator->();
+
+  template <class T>
+  T* Get(UIntPtr off = 0);
+
+ public:
+  operator bool();
+  bool operator!();
+
+ public:
+  bool    Write(UIntPtr& bit, const UInt32& offset);
+  UIntPtr Read(const UInt32& offset);
+  Boolean Check(UIntPtr offset) const;
+
+ public:
+  UIntPtr operator[](UIntPtr& offset);
+
+ private:
+  voidPtr fAddress{nullptr};
+  DmaKind fKind{DmaKind::Invalid};
+
+ private:
+  friend class DMAFactory;
+};
+
+class DMAFactory final {
+ public:
+  static OwnPtr<IOBuf<Char*>> Construct(OwnPtr<DMAWrapper>& dma);
+};
+}  // namespace Kernel
 
 #include <KernelKit/PCI/DMA.inl>
diff --git a/dev/kernel/KernelKit/PCI/DMA.inl b/dev/kernel/KernelKit/PCI/DMA.inl
index 89381149..4df24371 100644
--- a/dev/kernel/KernelKit/PCI/DMA.inl
+++ b/dev/kernel/KernelKit/PCI/DMA.inl
@@ -1,20 +1,17 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
-namespace Kernel
-{
-	template <class T>
-	T* DMAWrapper::operator->()
-	{
-		return this->fAddress;
-	}
+namespace Kernel {
+template <class T>
+T* DMAWrapper::operator->() {
+  return this->fAddress;
+}
 
-	template <class T>
-	T* DMAWrapper::Get(UIntPtr offset)
-	{
-		return reinterpret_cast<T*>((UIntPtr)this->fAddress + offset);
-	}
-} // namespace Kernel
+template <class T>
+T* DMAWrapper::Get(UIntPtr offset) {
+  return reinterpret_cast<T*>((UIntPtr) this->fAddress + offset);
+}
+}  // namespace Kernel
diff --git a/dev/kernel/KernelKit/PCI/Database.h b/dev/kernel/KernelKit/PCI/Database.h
index e97640f7..6da653dd 100644
--- a/dev/kernel/KernelKit/PCI/Database.h
+++ b/dev/kernel/KernelKit/PCI/Database.h
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 #pragma once
@@ -8,51 +8,44 @@
 #include <KernelKit/PCI/Device.h>
 #include <NewKit/Defines.h>
 
-namespace Kernel
-{
-	namespace Types
-	{
-		// https://wiki.osdev.org/PCI
-		enum class PciDeviceKind : UChar
-		{
-			MassStorageController			  = 0x1,
-			NetworkController				  = 0x2,
-			DisplayController				  = 0x3,
-			MultimediaController			  = 0x4,
-			MemoryController				  = 0x5,
-			Bridge							  = 0x6,
-			CommunicationController			  = 0x7,
-			GenericSystemPeripheral			  = 0x8,
-			InputDeviceController			  = 0x9,
-			DockingStation					  = 0xa,
-			Processor						  = 0xb,
-			SerialBusController				  = 0xc,
-			WirelessController				  = 0xd,
-			IntelligentController			  = 0xe,
-			SatelliteCommunicationsController = 0xf,
-			CoProcessor						  = 0x40,
-			Unassgined						  = 0xf,
-			Invalid							  = Unassgined,
-		};
-	} // namespace Types
-} // namespace Kernel
-
-inline BOOL operator!=(const Kernel::Types::PciDeviceKind& lhs, Kernel::UChar rhs)
-{
-	return rhs != (Kernel::UChar)lhs;
+namespace Kernel {
+namespace Types {
+  // https://wiki.osdev.org/PCI
+  enum class PciDeviceKind : UChar {
+    MassStorageController             = 0x1,
+    NetworkController                 = 0x2,
+    DisplayController                 = 0x3,
+    MultimediaController              = 0x4,
+    MemoryController                  = 0x5,
+    Bridge                            = 0x6,
+    CommunicationController           = 0x7,
+    GenericSystemPeripheral           = 0x8,
+    InputDeviceController             = 0x9,
+    DockingStation                    = 0xa,
+    Processor                         = 0xb,
+    SerialBusController               = 0xc,
+    WirelessController                = 0xd,
+    IntelligentController             = 0xe,
+    SatelliteCommunicationsController = 0xf,
+    CoProcessor                       = 0x40,
+    Unassgined                        = 0xf,
+    Invalid                           = Unassgined,
+  };
+}  // namespace Types
+}  // namespace Kernel
+
+inline BOOL operator!=(const Kernel::Types::PciDeviceKind& lhs, Kernel::UChar rhs) {
+  return rhs != (Kernel::UChar) lhs;
 }
 
-inline BOOL operator==(const Kernel::Types::PciDeviceKind& lhs, Kernel::UChar rhs)
-{
-	return rhs == (Kernel::UChar)lhs;
+inline BOOL operator==(const Kernel::Types::PciDeviceKind& lhs, Kernel::UChar rhs) {
+  return rhs == (Kernel::UChar) lhs;
 }
 
-inline BOOL operator!=(Kernel::UChar lhs, const Kernel::Types::PciDeviceKind& rhs)
-{
-	return lhs != (Kernel::UChar)rhs;
+inline BOOL operator!=(Kernel::UChar lhs, const Kernel::Types::PciDeviceKind& rhs) {
+  return lhs != (Kernel::UChar) rhs;
 }
 
-inline BOOL operator==(Kernel::UChar lhs, const Kernel::Types::PciDeviceKind& rhs)
-{
-	return lhs == (Kernel::UChar)rhs;
+inline BOOL operator==(Kernel::UChar lhs, const Kernel::Types::PciDeviceKind& rhs) {
+  return lhs == (Kernel::UChar) rhs;
 }
\ No newline at end of file
diff --git a/dev/kernel/KernelKit/PCI/Device.h b/dev/kernel/KernelKit/PCI/Device.h
index 0c434b0b..d9bb4e70 100644
--- a/dev/kernel/KernelKit/PCI/Device.h
+++ b/dev/kernel/KernelKit/PCI/Device.h
@@ -1,78 +1,73 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 #pragma once
 
 #include <NewKit/Defines.h>
 
-namespace Kernel::PCI
-{
-	enum class PciConfigKind : UShort
-	{
-		ConfigAddress = 0xCF8,
-		ConfigData	  = 0xCFC,
-		CommandReg	  = 0x0004,
-		Invalid		  = 0xFFFF,
-	};
-
-	/// @brief Device interface class
-	class Device final
-	{
-	public:
-		Device() = default;
-
-	public:
-		Device(UShort bus, UShort device, UShort function, UInt32 bar);
-
-		Device& operator=(const Device&) = default;
-		Device(const Device&)			 = default;
-
-		~Device();
-
-	public:
-		UInt Read(UInt bar, Size szData);
-		void Write(UInt bar, UIntPtr data, Size szData);
-
-	public:
-		operator bool();
-
-	public:
-		template <typename T>
-		UInt Read(UInt bar)
-		{
-			static_assert(sizeof(T) <= sizeof(UInt32), "64-bit PCI addressing is unsupported");
-			return Read(bar, sizeof(T));
-		}
-
-		template <typename T>
-		void Write(UInt bar, UIntPtr data)
-		{
-			static_assert(sizeof(T) <= sizeof(UInt32), "64-bit PCI addressing is unsupported");
-			Write(bar, data, sizeof(T));
-		}
-
-	public:
-		UShort	DeviceId();
-		UShort	VendorId();
-		UShort	InterfaceId();
-		UChar	Class();
-		UChar	Subclass();
-		UChar	ProgIf();
-		UChar	HeaderType();
-		UIntPtr Bar(UInt32 bar_in);
-
-	public:
-		void EnableMmio();
-		void BecomeBusMaster(); // for PCI-DMA, PC-DMA does not need that.
-
-		UShort Vendor();
-
-	private:
-		UShort fBus;
-		UShort fDevice;
-		UShort fFunction;
-		UInt32 fBar;
-	};
-} // namespace Kernel::PCI
+namespace Kernel::PCI {
+enum class PciConfigKind : UShort {
+  ConfigAddress = 0xCF8,
+  ConfigData    = 0xCFC,
+  CommandReg    = 0x0004,
+  Invalid       = 0xFFFF,
+};
+
+/// @brief Device interface class
+class Device final {
+ public:
+  Device() = default;
+
+ public:
+  Device(UShort bus, UShort device, UShort function, UInt32 bar);
+
+  Device& operator=(const Device&) = default;
+  Device(const Device&)            = default;
+
+  ~Device();
+
+ public:
+  UInt Read(UInt bar, Size szData);
+  void Write(UInt bar, UIntPtr data, Size szData);
+
+ public:
+  operator bool();
+
+ public:
+  template <typename T>
+  UInt Read(UInt bar) {
+    static_assert(sizeof(T) <= sizeof(UInt32), "64-bit PCI addressing is unsupported");
+    return Read(bar, sizeof(T));
+  }
+
+  template <typename T>
+  void Write(UInt bar, UIntPtr data) {
+    static_assert(sizeof(T) <= sizeof(UInt32), "64-bit PCI addressing is unsupported");
+    Write(bar, data, sizeof(T));
+  }
+
+ public:
+  UShort  DeviceId();
+  UShort  VendorId();
+  UShort  InterfaceId();
+  UChar   Class();
+  UChar   Subclass();
+  UChar   ProgIf();
+  UChar   HeaderType();
+  UIntPtr Bar(UInt32 bar_in);
+
+ public:
+  void EnableMmio();
+  void BecomeBusMaster();  // for PCI-DMA, PC-DMA does not need that.
+
+  UShort Vendor();
+
+ private:
+  UShort fBus;
+  UShort fDevice;
+  UShort fFunction;
+  UInt32 fBar;
+};
+}  // namespace Kernel::PCI
diff --git a/dev/kernel/KernelKit/PCI/Express.h b/dev/kernel/KernelKit/PCI/Express.h
index b8b4df4d..4d94830c 100644
--- a/dev/kernel/KernelKit/PCI/Express.h
+++ b/dev/kernel/KernelKit/PCI/Express.h
@@ -1,12 +1,12 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
 #pragma once
 
-#include <NewKit/Defines.h>
 #include <KernelKit/PCI/PCI.h>
+#include <NewKit/Defines.h>
 
 #define PCI_EXPRESS_BUS_COUNT (4096)
diff --git a/dev/kernel/KernelKit/PCI/IO.h b/dev/kernel/KernelKit/PCI/IO.h
index 78fcef76..bd5751ec 100644
--- a/dev/kernel/KernelKit/PCI/IO.h
+++ b/dev/kernel/KernelKit/PCI/IO.h
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -11,65 +11,53 @@
 #include <NewKit/Defines.h>
 #include <NewKit/Ref.h>
 
-namespace Kernel
-{
-	template <SizeT Sz>
-	class IOArray final
-	{
-	public:
-		IOArray() = delete;
+namespace Kernel {
+template <SizeT Sz>
+class IOArray final {
+ public:
+  IOArray() = delete;
 
-		IOArray(nullPtr) = delete;
+  IOArray(nullPtr) = delete;
 
-		explicit IOArray(Array<UShort, Sz>& ports)
-			: fPorts(ports)
-		{
-		}
+  explicit IOArray(Array<UShort, Sz>& ports) : fPorts(ports) {}
 
-		~IOArray()
-		{
-		}
+  ~IOArray() {}
 
-		IOArray& operator=(const IOArray&) = default;
+  IOArray& operator=(const IOArray&) = default;
 
-		IOArray(const IOArray&) = default;
+  IOArray(const IOArray&) = default;
 
-		operator bool()
-		{
-			return !fPorts.Empty();
-		}
+  operator bool() { return !fPorts.Empty(); }
 
-	public:
-		template <typename T>
-		T In(SizeT index);
+ public:
+  template <typename T>
+  T In(SizeT index);
 
-		template <typename T>
-		void Out(SizeT index, T value);
+  template <typename T>
+  void Out(SizeT index, T value);
 
-	private:
-		Array<UShort, Sz> fPorts;
-	};
+ private:
+  Array<UShort, Sz> fPorts;
+};
 
-	inline constexpr UInt16 kMaxPorts = 16;
+inline constexpr UInt16 kMaxPorts = 16;
 
-	using IOArray16 = IOArray<kMaxPorts>;
+using IOArray16 = IOArray<kMaxPorts>;
 
-	template <SizeT Sz>
-	inline Array<UShort, Sz> make_ports(UShort base)
-	{
-		Array<UShort, Sz> ports;
+template <SizeT Sz>
+inline Array<UShort, Sz> make_ports(UShort base) {
+  Array<UShort, Sz> ports;
 
-		for (UShort i = 0; i < Sz; ++i)
-		{
-			ports[i] = base + i;
-		}
+  for (UShort i = 0; i < Sz; ++i) {
+    ports[i] = base + i;
+  }
 
-		return ports;
-	}
-} // namespace Kernel
+  return ports;
+}
+}  // namespace Kernel
 
 #ifdef __x86_64__
 #include <KernelKit/PCI/IOArray+AMD64.inl>
 #else
 #error Please provide platform specific code for the I/O
-#endif // ifdef __x86_64__
+#endif  // ifdef __x86_64__
diff --git a/dev/kernel/KernelKit/PCI/IOArray+AMD64.inl b/dev/kernel/KernelKit/PCI/IOArray+AMD64.inl
index 57539e7e..842062e3 100644
--- a/dev/kernel/KernelKit/PCI/IOArray+AMD64.inl
+++ b/dev/kernel/KernelKit/PCI/IOArray+AMD64.inl
@@ -1,54 +1,49 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
-	File: IO-Impl-AMD64.h
-	Purpose: I/O for AMD64.
+  File: IO-Impl-AMD64.h
+  Purpose: I/O for AMD64.
 
-	Revision History:
+  Revision History:
 
-	30/01/24: Add file. (amlel)
-	02/02/24: Update I/O routines. (amlel)
+  30/01/24: Add file. (amlel)
+  02/02/24: Update I/O routines. (amlel)
 
 ------------------------------------------- */
 
-namespace Kernel
-{
-	template <SizeT Sz>
-	template <typename T>
-	T IOArray<Sz>::In(SizeT index)
-	{
-		switch (sizeof(T))
-		{
+namespace Kernel {
+template <SizeT Sz>
+template <typename T>
+T IOArray<Sz>::In(SizeT index) {
+  switch (sizeof(T)) {
 #ifdef __NE_AMD64__
-		case 4:
-			return HAL::rt_in32(fPorts[index].Leak());
-		case 2:
-			return HAL::rt_in16(fPorts[index].Leak());
-		case 1:
-			return HAL::rt_in8(fPorts[index].Leak());
+    case 4:
+      return HAL::rt_in32(fPorts[index].Leak());
+    case 2:
+      return HAL::rt_in16(fPorts[index].Leak());
+    case 1:
+      return HAL::rt_in8(fPorts[index].Leak());
 #endif
-		default:
-			return 0xFFFF;
-		}
-	}
+    default:
+      return 0xFFFF;
+  }
+}
 
-	template <SizeT Sz>
-	template <typename T>
-	void IOArray<Sz>::Out(SizeT index, T value)
-	{
-		switch (sizeof(T))
-		{
+template <SizeT Sz>
+template <typename T>
+void IOArray<Sz>::Out(SizeT index, T value) {
+  switch (sizeof(T)) {
 #ifdef __NE_AMD64__
-		case 4:
-			HAL::rt_out32(fPorts[index].Leak(), value);
-		case 2:
-			HAL::rt_out16(fPorts[index].Leak(), value);
-		case 1:
-			HAL::rt_out8(fPorts[index].Leak(), value);
+    case 4:
+      HAL::rt_out32(fPorts[index].Leak(), value);
+    case 2:
+      HAL::rt_out16(fPorts[index].Leak(), value);
+    case 1:
+      HAL::rt_out8(fPorts[index].Leak(), value);
 #endif
-		default:
-			break;
-		}
-	}
-} // namespace Kernel
\ No newline at end of file
+    default:
+      break;
+  }
+}
+}  // namespace Kernel
\ No newline at end of file
diff --git a/dev/kernel/KernelKit/PCI/Iterator.h b/dev/kernel/KernelKit/PCI/Iterator.h
index 8b91f85f..10924bc8 100644
--- a/dev/kernel/KernelKit/PCI/Iterator.h
+++ b/dev/kernel/KernelKit/PCI/Iterator.h
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -13,31 +13,29 @@
 #include <NewKit/Defines.h>
 #include <NewKit/Ref.h>
 
-#define NE_BUS_COUNT	  (256)
-#define NE_DEVICE_COUNT	  (33)
+#define NE_BUS_COUNT (256)
+#define NE_DEVICE_COUNT (33)
 #define NE_FUNCTION_COUNT (8)
 
-namespace Kernel::PCI
-{
-	class Iterator final
-	{
-	public:
-		Iterator() = delete;
+namespace Kernel::PCI {
+class Iterator final {
+ public:
+  Iterator() = delete;
 
-	public:
-		explicit Iterator(const Types::PciDeviceKind& deviceType);
+ public:
+  explicit Iterator(const Types::PciDeviceKind& deviceType);
 
-		Iterator& operator=(const Iterator&) = default;
-		Iterator(const Iterator&)			 = default;
+  Iterator& operator=(const Iterator&) = default;
+  Iterator(const Iterator&)            = default;
 
-		~Iterator();
+  ~Iterator();
 
-	public:
-		Ref<PCI::Device> operator[](const Size& sz);
+ public:
+  Ref<PCI::Device> operator[](const Size& sz);
 
-	private:
-		Array<PCI::Device, NE_BUS_COUNT> fDevices;
-	};
-} // namespace Kernel::PCI
+ private:
+  Array<PCI::Device, NE_BUS_COUNT> fDevices;
+};
+}  // namespace Kernel::PCI
 
-#endif // __PCI_ITERATOR_H__
+#endif  // __PCI_ITERATOR_H__
diff --git a/dev/kernel/KernelKit/PCI/PCI.h b/dev/kernel/KernelKit/PCI/PCI.h
index 02b08864..7b30d455 100644
--- a/dev/kernel/KernelKit/PCI/PCI.h
+++ b/dev/kernel/KernelKit/PCI/PCI.h
@@ -1,6 +1,6 @@
 /* -------------------------------------------
 
-	Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
+  Copyright (C) 2024-2025, Amlal El Mahrouss, all rights reserved.
 
 ------------------------------------------- */
 
@@ -9,51 +9,46 @@
 #include <NewKit/Defines.h>
 
 #define kPCIConfigAddressPort (0xCF8)
-#define kPCIConfigDataPort	  (0xCFC)
+#define kPCIConfigDataPort (0xCFC)
 
 #define kPCIDeviceCount (32)
-#define kPCIFuncCount	(8)
-#define kPCIBusCount	(256U)
-
-namespace Kernel::PCI
-{
-	// model
-	struct DeviceHeader
-	{
-		UInt16 VendorId;
-		UInt16 DeviceId;
-		UInt8  Command;
-		UInt8  Status;
-		UInt8  RevisionId;
-		UInt8  ProgIf;
-		UInt8  SubClass;
-		UInt8  Class;
-		UInt8  CacheLineSz;
-		UInt8  LatencyTimer;
-		UInt8  HeaderType;
-		UInt8  Bist;
-		UInt8  Bus;
-		UInt8  Device;
-		UInt8  Function;
-	};
-
-	namespace Detail
-	{
-		class BAR
-		{
-		public:
-			UIntPtr BAR;
-			SizeT	Size;
-		};
-	} // namespace Detail
-
-	class BAR
-	{
-	public:
-		Detail::BAR BAR1;
-		Detail::BAR BAR2;
-		Detail::BAR BAR3;
-		Detail::BAR BAR4;
-		Detail::BAR BAR5;
-	};
-} // namespace Kernel::PCI
+#define kPCIFuncCount (8)
+#define kPCIBusCount (256U)
+
+namespace Kernel::PCI {
+// model
+struct DeviceHeader {
+  UInt16 VendorId;
+  UInt16 DeviceId;
+  UInt8  Command;
+  UInt8  Status;
+  UInt8  RevisionId;
+  UInt8  ProgIf;
+  UInt8  SubClass;
+  UInt8  Class;
+  UInt8  CacheLineSz;
+  UInt8  LatencyTimer;
+  UInt8  HeaderType;
+  UInt8  Bist;
+  UInt8  Bus;
+  UInt8  Device;
+  UInt8  Function;
+};
+
+namespace Detail {
+  class BAR {
+   public:
+    UIntPtr BAR;
+    SizeT   Size;
+  };
+}  // namespace Detail
+
+class BAR {
+ public:
+  Detail::BAR BAR1;
+  Detail::BAR BAR2;
+  Detail::BAR BAR3;
+  Detail::BAR BAR4;
+  Detail::BAR BAR5;
+};
+}  // namespace Kernel::PCI