Merge pull request #81 from nekernel-org/dev

feat! breaking changes on kernel sources.

9 files changed, 435 insertions, 0 deletions

diff --git a/src/kernel/KernelKit/PCI/DMA.h b/src/kernel/KernelKit/PCI/DMA.h
new file mode 100644
index 00000000..80103dab
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/DMA.h
@@ -0,0 +1,75 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <KernelKit/DeviceMgr.h>
+#include <KernelKit/PCI/Device.h>
+#include <NeKit/Array.h>
+#include <NeKit/OwnPtr.h>
+#include <NeKit/Ref.h>
+
+namespace Kernel {
+enum class DmaKind {
+  PCI = 10,  // Bus mastering is required to be turned on. Basiaclly a request
+  // control system. 64-Bit access depends on the PAE bit and the device
+  // (if Double Address Cycle is available)
+  ISA,  // Four DMA channels 0-3; 8 bit transfers and only a megabyte of RAM.
+  Count   = 2,
+  Invalid = 0,
+};
+
+class DMAWrapper final {
+ public:
+  explicit DMAWrapper() = delete;
+
+ public:
+  explicit DMAWrapper(nullPtr) = delete;
+  explicit DMAWrapper(voidPtr Ptr, DmaKind Kind = DmaKind::PCI) : fAddress(Ptr), fKind(Kind) {}
+
+ public:
+  DMAWrapper& operator=(voidPtr Ptr);
+
+ public:
+  DMAWrapper& operator=(const DMAWrapper&) = default;
+  DMAWrapper(const DMAWrapper&)            = default;
+
+ public:
+  ~DMAWrapper() = default;
+
+  template <class T>
+  T* operator->();
+
+  template <class T>
+  T* Get(UIntPtr off = 0);
+
+ public:
+       operator bool();
+  bool operator!();
+
+ public:
+  bool    Write(UIntPtr& bit, const UInt32& offset);
+  UIntPtr Read(const UInt32& offset);
+  Boolean Check(UIntPtr offset) const;
+
+ public:
+  UIntPtr operator[](UIntPtr& offset);
+
+ private:
+  voidPtr fAddress{nullptr};
+  DmaKind fKind{DmaKind::Invalid};
+
+ private:
+  friend class DMAFactory;
+};
+
+class DMAFactory final {
+ public:
+  static OwnPtr<IOBuf<Char*>> Construct(OwnPtr<DMAWrapper>& dma);
+};
+}  // namespace Kernel
+
+#include <KernelKit/PCI/DMA.inl>
diff --git a/src/kernel/KernelKit/PCI/DMA.inl b/src/kernel/KernelKit/PCI/DMA.inl
new file mode 100644
index 00000000..d81a632e
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/DMA.inl
@@ -0,0 +1,17 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+namespace Kernel {
+template <class T>
+T* DMAWrapper::operator->() {
+  return this->fAddress;
+}
+
+template <class T>
+T* DMAWrapper::Get(UIntPtr offset) {
+  return reinterpret_cast<T*>((UIntPtr) this->fAddress + offset);
+}
+}  // namespace Kernel
diff --git a/src/kernel/KernelKit/PCI/Database.h b/src/kernel/KernelKit/PCI/Database.h
new file mode 100644
index 00000000..463fde38
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/Database.h
@@ -0,0 +1,51 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+#pragma once
+
+#include <KernelKit/PCI/Device.h>
+#include <NeKit/Defines.h>
+
+namespace Kernel {
+namespace Types {
+  // https://wiki.osdev.org/PCI
+  enum class PciDeviceKind : UChar {
+    MassStorageController             = 0x1,
+    NetworkController                 = 0x2,
+    DisplayController                 = 0x3,
+    MultimediaController              = 0x4,
+    MemoryController                  = 0x5,
+    Bridge                            = 0x6,
+    CommunicationController           = 0x7,
+    GenericSystemPeripheral           = 0x8,
+    InputDeviceController             = 0x9,
+    DockingStation                    = 0xa,
+    Processor                         = 0xb,
+    SerialBusController               = 0xc,
+    WirelessController                = 0xd,
+    IntelligentController             = 0xe,
+    SatelliteCommunicationsController = 0xf,
+    CoProcessor                       = 0x40,
+    Unassgined                        = 0xf,
+    Invalid                           = Unassgined,
+  };
+}  // namespace Types
+}  // namespace Kernel
+
+inline BOOL operator!=(const Kernel::Types::PciDeviceKind& lhs, Kernel::UChar rhs) {
+  return rhs != (Kernel::UChar) lhs;
+}
+
+inline BOOL operator==(const Kernel::Types::PciDeviceKind& lhs, Kernel::UChar rhs) {
+  return rhs == (Kernel::UChar) lhs;
+}
+
+inline BOOL operator!=(Kernel::UChar lhs, const Kernel::Types::PciDeviceKind& rhs) {
+  return lhs != (Kernel::UChar) rhs;
+}
+
+inline BOOL operator==(Kernel::UChar lhs, const Kernel::Types::PciDeviceKind& rhs) {
+  return lhs == (Kernel::UChar) rhs;
+}
\ No newline at end of file
diff --git a/src/kernel/KernelKit/PCI/Device.h b/src/kernel/KernelKit/PCI/Device.h
new file mode 100644
index 00000000..f2111e40
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/Device.h
@@ -0,0 +1,73 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+#pragma once
+
+#include <NeKit/Defines.h>
+
+namespace Kernel::PCI {
+enum class PciConfigKind : UShort {
+  ConfigAddress = 0xCF8,
+  ConfigData    = 0xCFC,
+  CommandReg    = 0x0004,
+  Invalid       = 0xFFFF,
+};
+
+/// @brief Device interface class
+class Device final {
+ public:
+  Device() = default;
+
+ public:
+  Device(UShort bus, UShort device, UShort function, UInt32 bar);
+
+  Device& operator=(const Device&) = default;
+  Device(const Device&)            = default;
+
+  ~Device();
+
+ public:
+  UInt Read(UInt bar, Size szData);
+  void Write(UInt bar, UIntPtr data, Size szData);
+
+ public:
+  operator bool();
+
+ public:
+  template <typename T>
+  UInt Read(UInt bar) {
+    static_assert(sizeof(T) <= sizeof(UInt32), "64-bit PCI addressing is unsupported");
+    return Read(bar, sizeof(T));
+  }
+
+  template <typename T>
+  void Write(UInt bar, UIntPtr data) {
+    static_assert(sizeof(T) <= sizeof(UInt32), "64-bit PCI addressing is unsupported");
+    Write(bar, data, sizeof(T));
+  }
+
+ public:
+  UShort  DeviceId();
+  UShort  VendorId();
+  UShort  InterfaceId();
+  UChar   Class();
+  UChar   Subclass();
+  UChar   ProgIf();
+  UChar   HeaderType();
+  UIntPtr Bar(UInt32 bar_in);
+
+ public:
+  void EnableMmio();
+  void BecomeBusMaster();  // for PCI-DMA, PC-DMA does not need that.
+
+  UShort Vendor();
+
+ private:
+  UShort fBus;
+  UShort fDevice;
+  UShort fFunction;
+  UInt32 fBar;
+};
+}  // namespace Kernel::PCI
diff --git a/src/kernel/KernelKit/PCI/Express.h b/src/kernel/KernelKit/PCI/Express.h
new file mode 100644
index 00000000..484739ec
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/Express.h
@@ -0,0 +1,12 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <KernelKit/PCI/PCI.h>
+#include <NeKit/Defines.h>
+
+#define PCI_EXPRESS_BUS_COUNT (4096)
diff --git a/src/kernel/KernelKit/PCI/IO.h b/src/kernel/KernelKit/PCI/IO.h
new file mode 100644
index 00000000..2ab72269
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/IO.h
@@ -0,0 +1,63 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <ArchKit/ArchKit.h>
+#include <NeKit/Array.h>
+#include <NeKit/Defines.h>
+#include <NeKit/Ref.h>
+
+namespace Kernel {
+template <SizeT Sz>
+class IOArray final {
+ public:
+  IOArray() = delete;
+
+  IOArray(nullPtr) = delete;
+
+  explicit IOArray(Array<UShort, Sz>& ports) : fPorts(ports) {}
+
+  ~IOArray() {}
+
+  IOArray& operator=(const IOArray&) = default;
+
+  IOArray(const IOArray&) = default;
+
+  operator bool() { return !fPorts.Empty(); }
+
+ public:
+  template <typename T>
+  T In(SizeT index);
+
+  template <typename T>
+  void Out(SizeT index, T value);
+
+ private:
+  Array<UShort, Sz> fPorts;
+};
+
+inline constexpr UInt16 kMaxPorts = 16;
+
+using IOArray16 = IOArray<kMaxPorts>;
+
+template <SizeT Sz>
+inline Array<UShort, Sz> make_ports(UShort base) {
+  Array<UShort, Sz> ports;
+
+  for (UShort i = 0; i < Sz; ++i) {
+    ports[i] = base + i;
+  }
+
+  return ports;
+}
+}  // namespace Kernel
+
+#ifdef __NE_AMD64__
+#include <KernelKit/PCI/IOArray+AMD64.inl>
+#else
+#error Please provide platform specific code for the I/O
+#endif  // ifdef __NE_AMD64__
diff --git a/src/kernel/KernelKit/PCI/IOArray+AMD64.inl b/src/kernel/KernelKit/PCI/IOArray+AMD64.inl
new file mode 100644
index 00000000..2b9125e0
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/IOArray+AMD64.inl
@@ -0,0 +1,49 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+  File: IO-Impl-AMD64.h
+  Purpose: I/O for AMD64.
+
+  Revision History:
+
+  30/01/24: Add file. (amlel)
+  02/02/24: Update I/O routines. (amlel)
+
+======================================== */
+
+namespace Kernel {
+template <SizeT Sz>
+template <typename T>
+T IOArray<Sz>::In(SizeT index) {
+  switch (sizeof(T)) {
+#ifdef __NE_AMD64__
+    case 4:
+      return HAL::rt_in32(fPorts[index].Leak());
+    case 2:
+      return HAL::rt_in16(fPorts[index].Leak());
+    case 1:
+      return HAL::rt_in8(fPorts[index].Leak());
+#endif
+    default:
+      return 0xFFFF;
+  }
+}
+
+template <SizeT Sz>
+template <typename T>
+void IOArray<Sz>::Out(SizeT index, T value) {
+  switch (sizeof(T)) {
+#ifdef __NE_AMD64__
+    case 4:
+      HAL::rt_out32(fPorts[index].Leak(), value);
+    case 2:
+      HAL::rt_out16(fPorts[index].Leak(), value);
+    case 1:
+      HAL::rt_out8(fPorts[index].Leak(), value);
+#endif
+    default:
+      break;
+  }
+}
+}  // namespace Kernel
\ No newline at end of file
diff --git a/src/kernel/KernelKit/PCI/Iterator.h b/src/kernel/KernelKit/PCI/Iterator.h
new file mode 100644
index 00000000..5926049b
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/Iterator.h
@@ -0,0 +1,41 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#ifndef __PCI_ITERATOR_H__
+#define __PCI_ITERATOR_H__
+
+#include <KernelKit/PCI/Database.h>
+#include <KernelKit/PCI/Device.h>
+#include <NeKit/Array.h>
+#include <NeKit/Defines.h>
+#include <NeKit/Ref.h>
+
+#define NE_BUS_COUNT (256)
+#define NE_DEVICE_COUNT (33)
+#define NE_FUNCTION_COUNT (8)
+
+namespace Kernel::PCI {
+class Iterator final {
+ public:
+  Iterator() = delete;
+
+ public:
+  explicit Iterator(const Types::PciDeviceKind deviceType, UInt32 bar);
+
+  Iterator& operator=(const Iterator&) = default;
+  Iterator(const Iterator&)            = default;
+
+  ~Iterator();
+
+ public:
+  Ref<PCI::Device> operator[](const Size& sz);
+
+ private:
+  Array<PCI::Device, NE_BUS_COUNT> fDevices;
+};
+}  // namespace Kernel::PCI
+
+#endif  // __PCI_ITERATOR_H__
diff --git a/src/kernel/KernelKit/PCI/PCI.h b/src/kernel/KernelKit/PCI/PCI.h
new file mode 100644
index 00000000..f76270da
--- /dev/null
+++ b/src/kernel/KernelKit/PCI/PCI.h
@@ -0,0 +1,54 @@
+/* ========================================
+
+  Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+
+#define kPCIConfigAddressPort (0xCF8)
+#define kPCIConfigDataPort (0xCFC)
+
+#define kPCIDeviceCount (32)
+#define kPCIFuncCount (8)
+#define kPCIBusCount (256U)
+
+namespace Kernel::PCI {
+// model
+struct DeviceHeader {
+  UInt16 VendorId;
+  UInt16 DeviceId;
+  UInt8  Command;
+  UInt8  Status;
+  UInt8  RevisionId;
+  UInt8  ProgIf;
+  UInt8  SubClass;
+  UInt8  Class;
+  UInt8  CacheLineSz;
+  UInt8  LatencyTimer;
+  UInt8  HeaderType;
+  UInt8  Bist;
+  UInt8  Bus;
+  UInt8  Device;
+  UInt8  Function;
+};
+
+namespace Detail {
+  class BAR {
+   public:
+    UIntPtr BAR;
+    SizeT   Size;
+  };
+}  // namespace Detail
+
+class BAR {
+ public:
+  Detail::BAR BAR1;
+  Detail::BAR BAR2;
+  Detail::BAR BAR3;
+  Detail::BAR BAR4;
+  Detail::BAR BAR5;
+};
+}  // namespace Kernel::PCI