5 files changed, 86 insertions, 53 deletions
diff --git a/Private/HALKit/AMD64/HalHardwareInit.cpp b/Private/HALKit/AMD64/HalHardwareInit.cpp
deleted file mode 100644
index 43b15169..00000000
--- a/Private/HALKit/AMD64/HalHardwareInit.cpp
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *	========================================================
- *
- *	HCore
- * 	Copyright Mahrouss Logic, all rights reserved.
- *
- * 	========================================================
- */
-
-#include <ArchKit/ArchKit.hpp>
-
-// bugs = 0
-
-extern "C" HCore::UIntPtr* __EXEC_IVT;
-
-extern void rt_wait_for_io(void);
-
-namespace HCore {
-bool ke_init_hal() { return true; }
-}  // namespace HCore
diff --git a/Private/HALKit/AMD64/HalInterruptRouting.asm b/Private/HALKit/AMD64/HalInterruptRouting.asm
index da0a8d5a..0f8ad89b 100644
--- a/Private/HALKit/AMD64/HalInterruptRouting.asm
+++ b/Private/HALKit/AMD64/HalInterruptRouting.asm
@@ -17,6 +17,7 @@
 
 %macro IntExp 1
 HCoreInterrupt%1:
+    cli
     push %1
     jmp ke_handle_irq
     iretq
@@ -24,6 +25,7 @@ HCoreInterrupt%1:
 
 %macro IntNormal 1
 HCoreInterrupt%1:
+    cli
     push  0
     push  %1
     jmp ke_handle_irq
@@ -58,7 +60,7 @@ ke_handle_irq:
 
     mov rdi, rsp
     call rt_handle_interrupts
-    mov rsp, rax
+    add rsp, 8
 
     pop r15
     pop r14
@@ -76,8 +78,7 @@ ke_handle_irq:
     pop rbx
     pop rax
 
-
-    ret
+    retf
 
 section .data
 
@@ -126,3 +127,26 @@ __EXEC_IVT:
         IntDecl i
     %assign i i+1
     %endrep
+
+section .text
+
+[bits 64]
+
+extern rt_load_gdt
+
+global Main
+extern RuntimeMain
+extern MainLong
+
+;; Just a simple setup, we'd also need to tell some before
+Main:
+    push rcx
+    jmp MainLong
+
+MainLong:
+    jmp RuntimeMain
+    pop rcx
+L0:
+    cli
+    hlt
+    jmp $
diff --git a/Private/HALKit/AMD64/HalStartSequence.asm b/Private/HALKit/AMD64/HalNewBoot.asm
index c8e0a4e2..93456c89 100644
--- a/Private/HALKit/AMD64/HalStartSequence.asm
+++ b/Private/HALKit/AMD64/HalNewBoot.asm
@@ -10,11 +10,11 @@
 [bits 64]
 
 ;; Global symbol of this unit
-[global Main]
+[global MainLong]
 [global MainUnsupported]
 
 ;; External symbols needed by this unit.
-[extern RuntimeMain]
+[extern Main]
 
 %define kTypeKernel 100
 %define kArchAmd64 122
@@ -26,15 +26,3 @@ HandoverType: dw kTypeKernel
 HandoverArch: dw kArchAmd64
 ;; This NewBootStart points to Main.
 HandoverStart: dq Main
-
-section .text
-
-;; Just a simple setup, we'd also need to tell some before
-Main:
-    push rcx
-    jmp RuntimeMain
-    pop rcx
-L0:
-    cli
-    hlt
-    jmp $
diff --git a/Private/HALKit/AMD64/HalPlatformAMD64.cpp b/Private/HALKit/AMD64/HalPlatformAMD64.cpp
index b2e343b6..e9e7fb82 100644
--- a/Private/HALKit/AMD64/HalPlatformAMD64.cpp
+++ b/Private/HALKit/AMD64/HalPlatformAMD64.cpp
@@ -11,31 +11,73 @@
 
 namespace HCore::HAL {
 namespace Detail {
-struct RegisterAMD64 final {
+struct PACKED RegisterAMD64 final {
   UIntPtr base;
   UShort limit;
 };
 }  // namespace Detail
 
 void GDTLoader::Load(Register64 &gdt) {
-  Detail::RegisterAMD64 *reg = new Detail::RegisterAMD64();
-  MUST_PASS(reg);
+  Detail::RegisterAMD64 *gdtReg = new Detail::RegisterAMD64();
+  MUST_PASS(gdtReg);
 
-  reg->base = gdt.Base;
-  reg->limit = gdt.Limit;
+  gdtReg->base = gdt.Base;
+  gdtReg->limit = gdt.Limit;
 
-  rt_cli();
-  rt_load_gdt(reg);
-  rt_sti();
+  rt_load_gdt((VoidPtr)gdtReg);
 }
 
+namespace Detail::AMD64 {
+struct InterruptDescriptorAMD64 final {
+  UInt16 OffsetLow;  // offset bits 0..15
+  UInt16 Selector;   // a code segment selector in GDT or LDT
+  UInt8
+      Ist;  // bits 0..2 holds Interrupt Stack Table offset, rest of bits zero.
+  UInt8 TypeAttributes;  // gate type, dpl, and p fields
+  UInt16 OffsetMid;      // offset bits 16..31
+  UInt32 OffsetHigh;     // offset bits 32..63
+  UInt32 Zero;           // reserved
+};
+}  // namespace Detail::AMD64
+
+#define kInterruptGate 0xE
+#define kTrapGate 0xF
+#define kRing0 (0 << 5)
+#define kRing3 (3 << 5)
+#define kIdtPresent (1 << 7)
+#define kGdtSelector 0x08
+
+extern "C" HCore::UIntPtr rt_handle_interrupts(HCore::UIntPtr &rsp);
+
+static ALIGN(
+    0x10) Detail::AMD64::InterruptDescriptorAMD64 kIdtRegs[kMaxSyscalls];
+static HAL::Register64 kRegIdt;
+
 void IDTLoader::Load(Register64 &idt) {
-  Detail::RegisterAMD64 *reg = new Detail::RegisterAMD64();
+  for (auto i = 0; i < 32; i++) {
+    kIdtRegs[i].Selector = kGdtSelector;
+    kIdtRegs[i].Ist = 0x00;
+    kIdtRegs[i].TypeAttributes = kInterruptGate | kRing0 | kIdtPresent;
+    kIdtRegs[i].OffsetLow = (((UIntPtr *)idt.Base)[i]) & 0xFFFF;
+    kIdtRegs[i].OffsetMid = (((UIntPtr *)idt.Base)[i] >> 16) & 0xFFFF;
+    kIdtRegs[i].OffsetHigh = (((UIntPtr *)idt.Base)[i] >> 32) & 0xFFFF;
+    kIdtRegs[i].Zero = 0;
+  }
+
+  kIdtRegs[0x21].Selector = kGdtSelector;
+  kIdtRegs[0x21].Ist = 0x00;
+  kIdtRegs[0x21].TypeAttributes = kInterruptGate | kRing3 | kIdtPresent;
+  kIdtRegs[0x21].OffsetLow = (((UIntPtr *)idt.Base)[0x21]) & 0xFFFF;
+  kIdtRegs[0x21].OffsetMid = (((UIntPtr *)idt.Base)[0x21] >> 16) & 0xFFFF;
+  kIdtRegs[0x21].OffsetHigh = (((UIntPtr *)idt.Base)[0x21] >> 32) & 0xFFFF;
+  kIdtRegs[0x21].Zero = 0;
+
+  kRegIdt.Base = (UIntPtr)kIdtRegs;
+  kRegIdt.Limit = sizeof(Detail::AMD64::InterruptDescriptorAMD64) * idt.Limit;
 
-  reg->base = idt.Base;
-  reg->limit = idt.Limit;
+  rt_load_idt((VoidPtr)&kRegIdt);
 
-  rt_load_idt(reg);
+  kcout << "Krnl: IDT loaded\n";
 }
 
 void GDTLoader::Load(Ref<Register64> &gdt) { GDTLoader::Load(gdt.Leak()); }
diff --git a/Private/HALKit/AMD64/Processor.hpp b/Private/HALKit/AMD64/Processor.hpp
index 5c79e042..a624b795 100644
--- a/Private/HALKit/AMD64/Processor.hpp
+++ b/Private/HALKit/AMD64/Processor.hpp
@@ -41,12 +41,10 @@ extern "C" void rt_cli();
 extern "C" void rt_sti();
 extern "C" void rt_cld();
 
-class Register64 {
+class PACKED Register64 {
  public:
-  UIntPtr Base;
   UShort Limit;
-
-  operator bool() { return Base > Limit; }
+  UIntPtr Base;
 };
 
 using RawRegister = UInt64;
@@ -57,6 +55,7 @@ using interruptTrap = UIntPtr(UIntPtr sp);
 typedef UIntPtr Reg;
 
 struct PACKED StackFrame {
+  Reg ExceptionZ;
   Reg IntNum;
   Reg Rax;
   Reg Rbx;