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-rw-r--r--dev/Mod/ACPI/ACPI.h6
-rw-r--r--dev/Mod/ACPI/ACPIFactoryInterface.h4
-rw-r--r--dev/Mod/AHCI/AHCI.h324
-rw-r--r--dev/Mod/APM/APM.h4
-rw-r--r--dev/Mod/ATA/ATA.h16
-rw-r--r--dev/Mod/CoreGfx/AccessibilityMgr.h2
-rw-r--r--dev/Mod/CoreGfx/FBMgr.h144
-rw-r--r--dev/Mod/CoreGfx/TextMgr.h12
-rw-r--r--dev/Mod/HPET/Defines.h32
-rw-r--r--dev/Mod/LTE/LTE.h32
-rw-r--r--dev/Mod/MBCI/MBCI.h4
-rw-r--r--dev/Mod/MFlash/MFlash.h8
-rw-r--r--dev/Mod/NVME/NVME.h8
-rw-r--r--dev/Mod/SCSI/SCSI.h2
-rw-r--r--dev/Mod/XHCI/Defines.h2
15 files changed, 299 insertions, 301 deletions
diff --git a/dev/Mod/ACPI/ACPI.h b/dev/Mod/ACPI/ACPI.h
index 75c2ad9a..a4fe2b0e 100644
--- a/dev/Mod/ACPI/ACPI.h
+++ b/dev/Mod/ACPI/ACPI.h
@@ -13,9 +13,9 @@
#include <NewKit/Defines.h>
-#define SDT_OBJECT : public Kernel::SDT
+#define SDT_OBJECT : public NeOS::SDT
-namespace Kernel
+namespace NeOS
{
class PACKED SDT
{
@@ -85,6 +85,6 @@ namespace Kernel
UInt32 CreatorRevision;
UInt32 AddressArr[];
};
-} // namespace Kernel
+} // namespace NeOS
#endif // !__ACPI__
diff --git a/dev/Mod/ACPI/ACPIFactoryInterface.h b/dev/Mod/ACPI/ACPIFactoryInterface.h
index 315e37d4..01143c17 100644
--- a/dev/Mod/ACPI/ACPIFactoryInterface.h
+++ b/dev/Mod/ACPI/ACPIFactoryInterface.h
@@ -13,7 +13,7 @@
#include <NewKit/Defines.h>
#include <NewKit/Ref.h>
-namespace Kernel
+namespace NeOS
{
class ACPIFactoryInterface;
@@ -55,6 +55,6 @@ namespace Kernel
SSizeT fEntries{0UL}; // number of entries, -1 tells that no invalid entries were
// found.
};
-} // namespace Kernel
+} // namespace NeOS
#endif // !__MOD_ACPI_H__
diff --git a/dev/Mod/AHCI/AHCI.h b/dev/Mod/AHCI/AHCI.h
index d895811c..3dbed7c2 100644
--- a/dev/Mod/AHCI/AHCI.h
+++ b/dev/Mod/AHCI/AHCI.h
@@ -53,172 +53,172 @@ enum
typedef struct FisRegH2D final
{
// DWORD 0
- Kernel::UInt8 FisType; // FIS_TYPE_REG_H2D
+ NeOS::UInt8 FisType; // FIS_TYPE_REG_H2D
- Kernel::UInt8 PortMul : 4; // Port multiplier
- Kernel::UInt8 Reserved0 : 3; // Reserved
- Kernel::UInt8 CmdOrCtrl : 1; // 1: Command, 0: Control
+ NeOS::UInt8 PortMul : 4; // Port multiplier
+ NeOS::UInt8 Reserved0 : 3; // Reserved
+ NeOS::UInt8 CmdOrCtrl : 1; // 1: Command, 0: Control
- Kernel::UInt8 Command; // Command register
- Kernel::UInt8 FeatureLow; // Feature register, 7:0
+ NeOS::UInt8 Command; // Command register
+ NeOS::UInt8 FeatureLow; // Feature register, 7:0
// DWORD 1
- Kernel::UInt8 Lba0; // LBA low register, 7:0
- Kernel::UInt8 Lba1; // LBA mid register, 15:8
- Kernel::UInt8 Lba2; // LBA high register, 23:16
- Kernel::UInt8 Device; // Device register
+ NeOS::UInt8 Lba0; // LBA low register, 7:0
+ NeOS::UInt8 Lba1; // LBA mid register, 15:8
+ NeOS::UInt8 Lba2; // LBA high register, 23:16
+ NeOS::UInt8 Device; // Device register
// DWORD 2
- Kernel::UInt8 Lba3; // LBA register, 31:24
- Kernel::UInt8 Lba4; // LBA register, 39:32
- Kernel::UInt8 Lba5; // LBA register, 47:40
- Kernel::UInt8 FeatureHigh; // Feature register, 15:8
+ NeOS::UInt8 Lba3; // LBA register, 31:24
+ NeOS::UInt8 Lba4; // LBA register, 39:32
+ NeOS::UInt8 Lba5; // LBA register, 47:40
+ NeOS::UInt8 FeatureHigh; // Feature register, 15:8
// DWORD 3
- Kernel::UInt8 CountLow; // Count register, 7:0
- Kernel::UInt8 CountHigh; // Count register, 15:8
- Kernel::UInt8 Icc; // Isochronous command completion
- Kernel::UInt8 Control; // Control register
+ NeOS::UInt8 CountLow; // Count register, 7:0
+ NeOS::UInt8 CountHigh; // Count register, 15:8
+ NeOS::UInt8 Icc; // Isochronous command completion
+ NeOS::UInt8 Control; // Control register
// DWORD 4
- Kernel::UInt8 Reserved1[4]; // Reserved
+ NeOS::UInt8 Reserved1[4]; // Reserved
} FisRegH2D;
typedef struct FisRegD2H final
{
// DWORD 0
- Kernel::UInt8 FisType; // FIS_TYPE_REG_D2H
+ NeOS::UInt8 FisType; // FIS_TYPE_REG_D2H
- Kernel::UInt8 PortMul : 4; // Port multiplier
- Kernel::UInt8 Reserved0 : 2; // Reserved
- Kernel::UInt8 IE : 1; // Interrupt bit
- Kernel::UInt8 Reserved1 : 1; // Reserved
+ NeOS::UInt8 PortMul : 4; // Port multiplier
+ NeOS::UInt8 Reserved0 : 2; // Reserved
+ NeOS::UInt8 IE : 1; // Interrupt bit
+ NeOS::UInt8 Reserved1 : 1; // Reserved
- Kernel::UInt8 Status; // Status register
- Kernel::UInt8 Error; // Error register
+ NeOS::UInt8 Status; // Status register
+ NeOS::UInt8 Error; // Error register
// DWORD 1
- Kernel::UInt8 Lba0; // LBA low register, 7:0
- Kernel::UInt8 Lba1; // LBA mid register, 15:8
- Kernel::UInt8 Lba2; // LBA high register, 23:16
- Kernel::UInt8 Device; // Device register
+ NeOS::UInt8 Lba0; // LBA low register, 7:0
+ NeOS::UInt8 Lba1; // LBA mid register, 15:8
+ NeOS::UInt8 Lba2; // LBA high register, 23:16
+ NeOS::UInt8 Device; // Device register
// DWORD 2
- Kernel::UInt8 Lba3; // LBA register, 31:24
- Kernel::UInt8 Lba4; // LBA register, 39:32
- Kernel::UInt8 Lba5; // LBA register, 47:40
- Kernel::UInt8 Rsv2; // Reserved
+ NeOS::UInt8 Lba3; // LBA register, 31:24
+ NeOS::UInt8 Lba4; // LBA register, 39:32
+ NeOS::UInt8 Lba5; // LBA register, 47:40
+ NeOS::UInt8 Rsv2; // Reserved
// DWORD 3
- Kernel::UInt8 CountLow; // Count register, 7:0
- Kernel::UInt8 CountHigh; // Count register, 15:8
- Kernel::UInt8 Rsv3[2]; // Reserved
+ NeOS::UInt8 CountLow; // Count register, 7:0
+ NeOS::UInt8 CountHigh; // Count register, 15:8
+ NeOS::UInt8 Rsv3[2]; // Reserved
// DWORD 4
- Kernel::UInt8 Rsv4[4]; // Reserved
+ NeOS::UInt8 Rsv4[4]; // Reserved
} FisRegD2H;
typedef struct FisData final
{
// DWORD 0
- Kernel::UInt8 FisType; // FIS_TYPE_DATA
+ NeOS::UInt8 FisType; // FIS_TYPE_DATA
- Kernel::UInt8 PortMul : 4; // Port multiplier
- Kernel::UInt8 Reserved0 : 4; // Reserved
+ NeOS::UInt8 PortMul : 4; // Port multiplier
+ NeOS::UInt8 Reserved0 : 4; // Reserved
- Kernel::UInt8 Reserved1[2]; // Reserved
+ NeOS::UInt8 Reserved1[2]; // Reserved
// DWORD 1 ~ N
- Kernel::UInt32 Data[1]; // Payload
+ NeOS::UInt32 Data[1]; // Payload
} FisData;
typedef struct FisPioSetup final
{
// DWORD 0
- Kernel::UInt8 FisType; // FIS_TYPE_PIO_SETUP
+ NeOS::UInt8 FisType; // FIS_TYPE_PIO_SETUP
- Kernel::UInt8 PortMul : 4; // Port multiplier
- Kernel::UInt8 Reserved0 : 1; // Reserved
- Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
- Kernel::UInt8 IE : 1; // Interrupt bit
- Kernel::UInt8 Reserved1 : 1;
+ NeOS::UInt8 PortMul : 4; // Port multiplier
+ NeOS::UInt8 Reserved0 : 1; // Reserved
+ NeOS::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
+ NeOS::UInt8 IE : 1; // Interrupt bit
+ NeOS::UInt8 Reserved1 : 1;
- Kernel::UInt8 Status; // Status register
- Kernel::UInt8 Error; // Error register
+ NeOS::UInt8 Status; // Status register
+ NeOS::UInt8 Error; // Error register
// DWORD 1
- Kernel::UInt8 Lba0; // LBA low register, 7:0
- Kernel::UInt8 Lba1; // LBA mid register, 15:8
- Kernel::UInt8 Lba2; // LBA high register, 23:16
- Kernel::UInt8 Device; // Device register
+ NeOS::UInt8 Lba0; // LBA low register, 7:0
+ NeOS::UInt8 Lba1; // LBA mid register, 15:8
+ NeOS::UInt8 Lba2; // LBA high register, 23:16
+ NeOS::UInt8 Device; // Device register
// DWORD 2
- Kernel::UInt8 Lba3; // LBA register, 31:24
- Kernel::UInt8 Lba4; // LBA register, 39:32
- Kernel::UInt8 Lba5; // LBA register, 47:40
- Kernel::UInt8 Rsv2; // Reserved
+ NeOS::UInt8 Lba3; // LBA register, 31:24
+ NeOS::UInt8 Lba4; // LBA register, 39:32
+ NeOS::UInt8 Lba5; // LBA register, 47:40
+ NeOS::UInt8 Rsv2; // Reserved
// DWORD 3
- Kernel::UInt8 CountLow; // Count register, 7:0
- Kernel::UInt8 CountHigh; // Count register, 15:8
- Kernel::UInt8 Rsv3; // Reserved
- Kernel::UInt8 EStatus; // New value of status register
+ NeOS::UInt8 CountLow; // Count register, 7:0
+ NeOS::UInt8 CountHigh; // Count register, 15:8
+ NeOS::UInt8 Rsv3; // Reserved
+ NeOS::UInt8 EStatus; // New value of status register
// DWORD 4
- Kernel::UInt16 TranferCount; // Transfer count
- Kernel::UInt8 Rsv4[2]; // Reserved
+ NeOS::UInt16 TranferCount; // Transfer count
+ NeOS::UInt8 Rsv4[2]; // Reserved
} FisPioSetup;
typedef struct FisDmaSetup final
{
// DWORD 0
- Kernel::UInt8 FisType; // FIS_TYPE_DMA_SETUP
+ NeOS::UInt8 FisType; // FIS_TYPE_DMA_SETUP
- Kernel::UInt8 PortMul : 4; // Port multiplier
- Kernel::UInt8 Reserved0 : 1; // Reserved
- Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
- Kernel::UInt8 IE : 1; // Interrupt bit
- Kernel::UInt8 AutoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed
+ NeOS::UInt8 PortMul : 4; // Port multiplier
+ NeOS::UInt8 Reserved0 : 1; // Reserved
+ NeOS::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
+ NeOS::UInt8 IE : 1; // Interrupt bit
+ NeOS::UInt8 AutoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed
- Kernel::UInt8 Reserved1[2]; // Reserved
+ NeOS::UInt8 Reserved1[2]; // Reserved
// DWORD 1&2
- volatile Kernel::UInt64 DmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in
- // host memory. SATA Spec says host specific and not in
- // Spec. Trying AHCI spec might work.
+ volatile NeOS::UInt64 DmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in
+ // host memory. SATA Spec says host specific and not in
+ // Spec. Trying AHCI spec might work.
// DWORD 3
- Kernel::UInt32 Rsvd; // More reserved
+ NeOS::UInt32 Rsvd; // More reserved
// DWORD 4
- Kernel::UInt32 DmabufOffset; // Byte offset into buffer. First 2 bits must be 0
+ NeOS::UInt32 DmabufOffset; // Byte offset into buffer. First 2 bits must be 0
// DWORD 5
- Kernel::UInt32 TransferCount; // Number of bytes to transfer. Bit 0 must be 0
+ NeOS::UInt32 TransferCount; // Number of bytes to transfer. Bit 0 must be 0
// DWORD 6
- Kernel::UInt32 Reserved3; // Reserved
+ NeOS::UInt32 Reserved3; // Reserved
} FisDmaSetup;
typedef struct FisDevBits final
{
// DWORD 0
- Kernel::UInt8 FisType; // FIS_TYPE_DMA_SETUP (A1h)
+ NeOS::UInt8 FisType; // FIS_TYPE_DMA_SETUP (A1h)
- Kernel::UInt8 Reserved0 : 5; // Reserved
- Kernel::UInt8 R0 : 1;
- Kernel::UInt8 IE : 1;
- Kernel::UInt8 N : 1;
+ NeOS::UInt8 Reserved0 : 5; // Reserved
+ NeOS::UInt8 R0 : 1;
+ NeOS::UInt8 IE : 1;
+ NeOS::UInt8 N : 1;
- Kernel::UInt8 StatusLow : 3;
- Kernel::UInt8 R1 : 1;
- Kernel::UInt8 StatusHigh : 3;
+ NeOS::UInt8 StatusLow : 3;
+ NeOS::UInt8 R1 : 1;
+ NeOS::UInt8 StatusHigh : 3;
- Kernel::UInt8 R2 : 1;
- Kernel::UInt8 Error;
+ NeOS::UInt8 R2 : 1;
+ NeOS::UInt8 Error;
// DWORD 1
- Kernel::UInt32 Act;
+ NeOS::UInt32 Act;
} FisDevBits;
/// \brief Enable AHCI device bit in GHC register.
@@ -228,44 +228,44 @@ typedef struct FisDevBits final
typedef struct HbaPort final
{
- Kernel::UInt32 Clb; // 0x00, command list base address, 1K-byte aligned
- Kernel::UInt32 Clbu; // 0x04, command list base address upper 32 bits
- Kernel::UInt32 Fb; // 0x08, FIS base address, 256-byte aligned
- Kernel::UInt32 Fbu; // 0x0C, FIS base address upper 32 bits
- Kernel::UInt32 Is; // 0x10, interrupt status
- Kernel::UInt32 Ie; // 0x14, interrupt enable
- Kernel::UInt32 Cmd; // 0x18, command and status
- Kernel::UInt32 Reserved0; // 0x1C, Reserved
- Kernel::UInt32 Tfd; // 0x20, task file data
- Kernel::UInt32 Sig; // 0x24, signature
- Kernel::UInt32 Ssts; // 0x28, SATA status (SCR0:SStatus)
- Kernel::UInt32 Sctl; // 0x2C, SATA control (SCR2:SControl)
- Kernel::UInt32 Serr; // 0x30, SATA error (SCR1:SError)
- Kernel::UInt32 Sact; // 0x34, SATA active (SCR3:SActive)
- Kernel::UInt32 Ci; // 0x38, command issue
- Kernel::UInt32 Sntf; // 0x3C, SATA notification (SCR4:SNotification)
- Kernel::UInt32 Fbs; // 0x40, FIS-based switch control
- Kernel::UInt32 Reserved1[11]; // 0x44 ~ 0x6F, Reserved
- Kernel::UInt32 Vendor[4]; // 0x70 ~ 0x7F, vendor specific
+ NeOS::UInt32 Clb; // 0x00, command list base address, 1K-byte aligned
+ NeOS::UInt32 Clbu; // 0x04, command list base address upper 32 bits
+ NeOS::UInt32 Fb; // 0x08, FIS base address, 256-byte aligned
+ NeOS::UInt32 Fbu; // 0x0C, FIS base address upper 32 bits
+ NeOS::UInt32 Is; // 0x10, interrupt status
+ NeOS::UInt32 Ie; // 0x14, interrupt enable
+ NeOS::UInt32 Cmd; // 0x18, command and status
+ NeOS::UInt32 Reserved0; // 0x1C, Reserved
+ NeOS::UInt32 Tfd; // 0x20, task file data
+ NeOS::UInt32 Sig; // 0x24, signature
+ NeOS::UInt32 Ssts; // 0x28, SATA status (SCR0:SStatus)
+ NeOS::UInt32 Sctl; // 0x2C, SATA control (SCR2:SControl)
+ NeOS::UInt32 Serr; // 0x30, SATA error (SCR1:SError)
+ NeOS::UInt32 Sact; // 0x34, SATA active (SCR3:SActive)
+ NeOS::UInt32 Ci; // 0x38, command issue
+ NeOS::UInt32 Sntf; // 0x3C, SATA notification (SCR4:SNotification)
+ NeOS::UInt32 Fbs; // 0x40, FIS-based switch control
+ NeOS::UInt32 Reserved1[11]; // 0x44 ~ 0x6F, Reserved
+ NeOS::UInt32 Vendor[4]; // 0x70 ~ 0x7F, vendor specific
} HbaPort;
typedef struct HbaMem final
{
// 0x00 - 0x2B, Generic Host Control
- Kernel::UInt32 Cap; // 0x00, Host capability
- Kernel::UInt32 Ghc; // 0x04, Global host control
- Kernel::UInt32 Is; // 0x08, Interrupt status
- Kernel::UInt32 Pi; // 0x0C, Port implemented
- Kernel::UInt32 Vs; // 0x10, Version
- Kernel::UInt32 Ccc_ctl; // 0x14, Command completion coalescing control
- Kernel::UInt32 Ccc_pts; // 0x18, Command completion coalescing ports
- Kernel::UInt32 Em_loc; // 0x1C, Enclosure management location
- Kernel::UInt32 Em_ctl; // 0x20, Enclosure management control
- Kernel::UInt32 Cap2; // 0x24, Host capabilities extended
- Kernel::UInt32 Bohc; // 0x28, BIOS/OS handoff control and status
-
- Kernel::UInt8 Resv0[0xA0 - 0x2C];
- Kernel::UInt8 Vendor[0x100 - 0xA0];
+ NeOS::UInt32 Cap; // 0x00, Host capability
+ NeOS::UInt32 Ghc; // 0x04, Global host control
+ NeOS::UInt32 Is; // 0x08, Interrupt status
+ NeOS::UInt32 Pi; // 0x0C, Port implemented
+ NeOS::UInt32 Vs; // 0x10, Version
+ NeOS::UInt32 Ccc_ctl; // 0x14, Command completion coalescing control
+ NeOS::UInt32 Ccc_pts; // 0x18, Command completion coalescing ports
+ NeOS::UInt32 Em_loc; // 0x1C, Enclosure management location
+ NeOS::UInt32 Em_ctl; // 0x20, Enclosure management control
+ NeOS::UInt32 Cap2; // 0x24, Host capabilities extended
+ NeOS::UInt32 Bohc; // 0x28, BIOS/OS handoff control and status
+
+ NeOS::UInt8 Resv0[0xA0 - 0x2C];
+ NeOS::UInt8 Vendor[0x100 - 0xA0];
HbaPort Ports[32]; // 1 ~ 32, 32 is the max ahci devices per controller.
} HbaMem;
@@ -273,68 +273,68 @@ typedef struct HbaMem final
typedef struct HbaCmdHeader final
{
// DW0
- Kernel::UInt8 Cfl : 5; // Command FIS length in DWORDS, 2 ~ 16
- Kernel::UInt8 Atapi : 1; // ATAPI
- Kernel::UInt8 Write : 1; // Write, 1: H2D, 0: D2H
- Kernel::UInt8 Prefetchable : 1; // Prefetchable
-
- Kernel::UInt8 Reset : 1; // Reset
- Kernel::UInt8 BIST : 1; // BIST
- Kernel::UInt8 Clear : 1; // Clear busy upon R_OK
- Kernel::UInt8 Reserved0 : 1; // Reserved
- Kernel::UInt8 Pmp : 4; // Port multiplier port
-
- Kernel::UInt16 Prdtl; // Physical region descriptor table length in entries
- volatile Kernel::UInt32 Prdbc; // Physical region descriptor byte count transferred
-
- Kernel::UInt32 Ctba; // Command table descriptor base address
- Kernel::UInt32 Ctbau; // Command table descriptor base address upper 32 bits
+ NeOS::UInt8 Cfl : 5; // Command FIS length in DWORDS, 2 ~ 16
+ NeOS::UInt8 Atapi : 1; // ATAPI
+ NeOS::UInt8 Write : 1; // Write, 1: H2D, 0: D2H
+ NeOS::UInt8 Prefetchable : 1; // Prefetchable
+
+ NeOS::UInt8 Reset : 1; // Reset
+ NeOS::UInt8 BIST : 1; // BIST
+ NeOS::UInt8 Clear : 1; // Clear busy upon R_OK
+ NeOS::UInt8 Reserved0 : 1; // Reserved
+ NeOS::UInt8 Pmp : 4; // Port multiplier port
+
+ NeOS::UInt16 Prdtl; // Physical region descriptor table length in entries
+ volatile NeOS::UInt32 Prdbc; // Physical region descriptor byte count transferred
+
+ NeOS::UInt32 Ctba; // Command table descriptor base address
+ NeOS::UInt32 Ctbau; // Command table descriptor base address upper 32 bits
} HbaCmdHeader;
typedef struct HbaFis final
{
// 0x00
- FisDmaSetup Dsfis; // DMA Setup FIS
- Kernel::UInt8 Pad0[4];
+ FisDmaSetup Dsfis; // DMA Setup FIS
+ NeOS::UInt8 Pad0[4];
// 0x20
- FisPioSetup Psfis; // PIO Setup FIS
- Kernel::UInt8 Pad1[12];
+ FisPioSetup Psfis; // PIO Setup FIS
+ NeOS::UInt8 Pad1[12];
// 0x40
- FisRegD2H Rfis; // Register – Device to Host FIS
- Kernel::UInt8 Pad2[4];
+ FisRegD2H Rfis; // Register – Device to Host FIS
+ NeOS::UInt8 Pad2[4];
// 0x58
FisDevBits Sdbfis; // Set Device Bit FIS
// 0x60
- Kernel::UInt8 Ufis[64];
+ NeOS::UInt8 Ufis[64];
// 0xA0
- Kernel::UInt8 Rsv[0x100 - 0xA0];
+ NeOS::UInt8 Rsv[0x100 - 0xA0];
} HbaFis;
typedef struct HbaPrdtEntry final
{
- Kernel::UInt32 Dba; // Data base address
- Kernel::UInt32 Dbau; // Data base address upper 32 bits
- Kernel::UInt32 Reserved0; // Reserved
+ NeOS::UInt32 Dba; // Data base address
+ NeOS::UInt32 Dbau; // Data base address upper 32 bits
+ NeOS::UInt32 Reserved0; // Reserved
// DW3
- Kernel::UInt32 Dbc : 22; // Byte count, 4M max
- Kernel::UInt32 Reserved1 : 9; // Reserved
- Kernel::UInt32 Ie : 1; // Interrupt on completion
+ NeOS::UInt32 Dbc : 22; // Byte count, 4M max
+ NeOS::UInt32 Reserved1 : 9; // Reserved
+ NeOS::UInt32 Ie : 1; // Interrupt on completion
} HbaPrdtEntry;
typedef struct HbaCmdTbl final
{
- Kernel::UInt8 Cfis[64]; // Command FIS
- Kernel::UInt8 Acmd[16]; // ATAPI command, 12 or 16 bytes
- Kernel::UInt8 Rsv[48]; // Reserved
+ NeOS::UInt8 Cfis[64]; // Command FIS
+ NeOS::UInt8 Acmd[16]; // ATAPI command, 12 or 16 bytes
+ NeOS::UInt8 Rsv[48]; // Reserved
struct HbaPrdtEntry Prdt[]; // Physical region descriptor table entries, 0 ~ 65535
} HbaCmdTbl;
/// @brief Initializes an AHCI disk.
/// @param PortsImplemented the amount of port that have been detected.
/// @return
-Kernel::Boolean drv_std_init(Kernel::UInt16& PortsImplemented);
+NeOS::Boolean drv_std_init(NeOS::UInt16& PortsImplemented);
-Kernel::Boolean drv_std_detected(Kernel::Void);
+NeOS::Boolean drv_std_detected(NeOS::Void);
/// @brief Read from AHCI disk.
/// @param lba
@@ -342,7 +342,7 @@ Kernel::Boolean drv_std_detected(Kernel::Void);
/// @param sector_sz
/// @param buf_sz
/// @return
-Kernel::Void drv_std_read(Kernel::UInt64 lba, Kernel::Char* buf, Kernel::SizeT sector_sz, Kernel::SizeT buf_sz);
+NeOS::Void drv_std_read(NeOS::UInt64 lba, NeOS::Char* buf, NeOS::SizeT sector_sz, NeOS::SizeT buf_sz);
/// @brief Write to AHCI disk.
/// @param lba
@@ -350,13 +350,13 @@ Kernel::Void drv_std_read(Kernel::UInt64 lba, Kernel::Char* buf, Kernel::SizeT s
/// @param sector_sz
/// @param buf_sz
/// @return
-Kernel::Void drv_std_write(Kernel::UInt64 lba, Kernel::Char* buf, Kernel::SizeT sector_sz, Kernel::SizeT buf_sz);
+NeOS::Void drv_std_write(NeOS::UInt64 lba, NeOS::Char* buf, NeOS::SizeT sector_sz, NeOS::SizeT buf_sz);
/// @brief Gets the sector count from AHCI disk.
-Kernel::SizeT drv_get_sector_count();
+NeOS::SizeT drv_get_sector_count();
/// @brief Gets the AHCI disk size.
-Kernel::SizeT drv_get_size();
+NeOS::SizeT drv_get_size();
/// @brief Checks if the drive has completed the command.
BOOL drv_is_ready(void);
diff --git a/dev/Mod/APM/APM.h b/dev/Mod/APM/APM.h
index 2e6bdccd..1cb55fdc 100644
--- a/dev/Mod/APM/APM.h
+++ b/dev/Mod/APM/APM.h
@@ -8,7 +8,7 @@
#include <NewKit/Defines.h>
-namespace Kernel
+namespace NeOS
{
typedef Int32 APMPowerCmd;
@@ -34,4 +34,4 @@ namespace Kernel
/// @param cmd the command.
/// @return status code.
EXTERN_C Int32 apm_send_io_command(UInt16 cmd, APMPowerCmd value);
-} // namespace Kernel
+} // namespace NeOS
diff --git a/dev/Mod/ATA/ATA.h b/dev/Mod/ATA/ATA.h
index 8fdd3150..374b8b5d 100644
--- a/dev/Mod/ATA/ATA.h
+++ b/dev/Mod/ATA/ATA.h
@@ -134,22 +134,22 @@ enum
#if defined(__ATA_PIO__) || defined(__ATA_DMA__)
-Kernel::Boolean drv_std_init(Kernel::UInt16 in_bus, Kernel::UInt8 drive, Kernel::UInt16& out_bus, Kernel::UInt8& out_master);
+NeOS::Boolean drv_std_init(NeOS::UInt16 in_bus, NeOS::UInt8 drive, NeOS::UInt16& out_bus, NeOS::UInt8& out_master);
-Kernel::Boolean drv_std_detected(Kernel::Void);
+NeOS::Boolean drv_std_detected(NeOS::Void);
-Kernel::Void drv_std_select(Kernel::UInt16 bus);
+NeOS::Void drv_std_select(NeOS::UInt16 bus);
-Kernel::Boolean drv_std_wait_io(Kernel::UInt16 io);
+NeOS::Boolean drv_std_wait_io(NeOS::UInt16 io);
-Kernel::Void drv_std_read(Kernel::UInt64 lba, Kernel::UInt16 io, Kernel::UInt8 is_master, Kernel::Char* buf, Kernel::SizeT sec_sz, Kernel::SizeT buf_sz);
+NeOS::Void drv_std_read(NeOS::UInt64 lba, NeOS::UInt16 io, NeOS::UInt8 is_master, NeOS::Char* buf, NeOS::SizeT sec_sz, NeOS::SizeT buf_sz);
-Kernel::Void drv_std_write(Kernel::UInt64 lba, Kernel::UInt16 io, Kernel::UInt8 is_master, Kernel::Char* buf, Kernel::SizeT sec_sz, Kernel::SizeT buf_sz);
+NeOS::Void drv_std_write(NeOS::UInt64 lba, NeOS::UInt16 io, NeOS::UInt8 is_master, NeOS::Char* buf, NeOS::SizeT sec_sz, NeOS::SizeT buf_sz);
/// @brief get sector count.
-Kernel::SizeT drv_get_sector_count();
+NeOS::SizeT drv_get_sector_count();
/// @brief get device size.
-Kernel::SizeT drv_get_size();
+NeOS::SizeT drv_get_size();
#endif // ifdef __NEOSKRNL__ \ No newline at end of file
diff --git a/dev/Mod/CoreGfx/AccessibilityMgr.h b/dev/Mod/CoreGfx/AccessibilityMgr.h
index 6916984b..58054a89 100644
--- a/dev/Mod/CoreGfx/AccessibilityMgr.h
+++ b/dev/Mod/CoreGfx/AccessibilityMgr.h
@@ -15,7 +15,7 @@
namespace FB
{
- using namespace Kernel;
+ using namespace NeOS;
/// @brief common User interface class.
class UIAccessibilty final
diff --git a/dev/Mod/CoreGfx/FBMgr.h b/dev/Mod/CoreGfx/FBMgr.h
index cd4d0c30..57a781ad 100644
--- a/dev/Mod/CoreGfx/FBMgr.h
+++ b/dev/Mod/CoreGfx/FBMgr.h
@@ -8,7 +8,7 @@
#include <NewKit/Defines.h>
-#define fb_init() Kernel::SizeT kCGCursor = 0
+#define fb_init() NeOS::SizeT kCGCursor = 0
#define fb_color(R, G, B) RGB(R, G, B)
@@ -18,99 +18,99 @@
#ifdef __NE_AMD64__
/// @brief Performs Alpha drawing on the framebuffer.
-#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y) \
- for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
- { \
- for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
- { \
- *(((Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) |= (reg_ptr)[kCGCursor]; \
- \
- ++kCGCursor; \
- } \
+#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y) \
+ for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \
+ { \
+ for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \
+ { \
+ *(((NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) |= (reg_ptr)[kCGCursor]; \
+ \
+ ++kCGCursor; \
+ } \
}
/// @brief Performs drawing on the framebuffer.
-#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y) \
- for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
- { \
- for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
- { \
- *(((Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) = (reg_ptr)[kCGCursor]; \
- \
- ++kCGCursor; \
- } \
+#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y) \
+ for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \
+ { \
+ for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \
+ { \
+ *(((NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) = (reg_ptr)[kCGCursor]; \
+ \
+ ++kCGCursor; \
+ } \
}
#define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y) \
- for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
+ for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \
{ \
- for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
+ for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \
{ \
- *(((Kernel::UInt32*)(_Rgn + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) = (reg_ptr)[kCGCursor]; \
+ *(((NeOS::UInt32*)(_Rgn + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) = (reg_ptr)[kCGCursor]; \
\
++kCGCursor; \
} \
}
/// @brief Cleans a resource.
-#define CGClearRegion(height, width, base_x, base_y) \
- for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
- { \
- for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
- { \
- *(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) = fb_get_clear_clr(); \
- } \
+#define CGClearRegion(height, width, base_x, base_y) \
+ for (NeOS::SizeT i = base_x; i < (width + base_x); ++i) \
+ { \
+ for (NeOS::SizeT u = base_y; u < (height + base_y); ++u) \
+ { \
+ *(((volatile NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) = fb_get_clear_clr(); \
+ } \
}
/// @brief Draws inside a zone.
-#define FBDrawInRegion(_Clr, height, width, base_x, base_y) \
- for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
- { \
- for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
- { \
- *(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- x_base + \
- 4 * y_base))) = _Clr; \
- } \
+#define FBDrawInRegion(_Clr, height, width, base_x, base_y) \
+ for (NeOS::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
+ { \
+ for (NeOS::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
+ { \
+ *(((volatile NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ x_base + \
+ 4 * y_base))) = _Clr; \
+ } \
}
/// @brief Draws inside a zone.
-#define FBDrawInRegionToRgn(_Rgn, _Clr, height, width, base_x, base_y) \
- for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
- { \
- for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
- { \
- *(((volatile Kernel::UInt32*)(_Rgn + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- x_base + \
- 4 * y_base))) = _Clr[kCGCursor]; \
- ++kCGCursor; \
- } \
+#define FBDrawInRegionToRgn(_Rgn, _Clr, height, width, base_x, base_y) \
+ for (NeOS::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
+ { \
+ for (NeOS::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
+ { \
+ *(((volatile NeOS::UInt32*)(_Rgn + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ x_base + \
+ 4 * y_base))) = _Clr[kCGCursor]; \
+ ++kCGCursor; \
+ } \
}
-#define FBDrawInRegionA(_Clr, height, width, base_x, base_y) \
- for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
- { \
- for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
- { \
- *(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- x_base + \
- 4 * y_base))) |= _Clr; \
- } \
+#define FBDrawInRegionA(_Clr, height, width, base_x, base_y) \
+ for (NeOS::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
+ { \
+ for (NeOS::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
+ { \
+ *(((volatile NeOS::UInt32*)(kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ x_base + \
+ 4 * y_base))) |= _Clr; \
+ } \
}
#else
#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y)
diff --git a/dev/Mod/CoreGfx/TextMgr.h b/dev/Mod/CoreGfx/TextMgr.h
index 27b182ee..a3c1af24 100644
--- a/dev/Mod/CoreGfx/TextMgr.h
+++ b/dev/Mod/CoreGfx/TextMgr.h
@@ -13,7 +13,7 @@
#define kFontSizeY 8
#define kFontNOFChars 128
-inline const Kernel::UInt8 kFontBitmap[kFontNOFChars][kFontSizeX] = {
+inline const NeOS::UInt8 kFontBitmap[kFontNOFChars][kFontSizeX] = {
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0000 (nul)
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0001
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0002
@@ -145,10 +145,10 @@ inline const Kernel::UInt8 kFontBitmap[kFontNOFChars][kFontSizeX] = {
};
-inline Kernel::Void fb_render_string_for_bitmap(const Kernel::UInt8* bitmap, const Kernel::SizeT& x_sz, const Kernel::SizeT& y_sz, Kernel::Int32& x_dst, Kernel::Int32& y_dst, Kernel::Int32& color)
+inline NeOS::Void fb_render_string_for_bitmap(const NeOS::UInt8* bitmap, const NeOS::SizeT& x_sz, const NeOS::SizeT& y_sz, NeOS::Int32& x_dst, NeOS::Int32& y_dst, NeOS::Int32& color)
{
- Kernel::Int32 x, y;
- Kernel::Int32 set;
+ NeOS::Int32 x, y;
+ NeOS::Int32 set;
x = 0;
y = 0;
@@ -168,9 +168,9 @@ inline Kernel::Void fb_render_string_for_bitmap(const Kernel::UInt8* bitmap, con
}
}
-inline Kernel::Void fb_render_string(const Kernel::Char* text, Kernel::Int32 x_dst, Kernel::Int32 y_dst, Kernel::Int32 color)
+inline NeOS::Void fb_render_string(const NeOS::Char* text, NeOS::Int32 x_dst, NeOS::Int32 y_dst, NeOS::Int32 color)
{
- for (Kernel::SizeT i = 0; text[i] != 0; ++i)
+ for (NeOS::SizeT i = 0; text[i] != 0; ++i)
{
fb_render_string_for_bitmap(&kFontBitmap[text[i]][0], kFontSizeX, kFontSizeY, x_dst, y_dst, color);
y_dst += kFontSizeY;
diff --git a/dev/Mod/HPET/Defines.h b/dev/Mod/HPET/Defines.h
index fb672410..c916703a 100644
--- a/dev/Mod/HPET/Defines.h
+++ b/dev/Mod/HPET/Defines.h
@@ -14,29 +14,29 @@
#include <NewKit/Defines.h>
#include <Mod/ACPI/ACPI.h>
-namespace Kernel
+namespace NeOS
{
struct PACKED HPETAddressStructure final
{
- Kernel::UInt8 AddressSpaceId; // 0 - system memory, 1 - system I/O
- Kernel::UInt8 RegisterBitWidth;
- Kernel::UInt8 RegisterBitOffset;
- Kernel::UInt8 Reserved;
- Kernel::UInt64 Address;
+ NeOS::UInt8 AddressSpaceId; // 0 - system memory, 1 - system I/O
+ NeOS::UInt8 RegisterBitWidth;
+ NeOS::UInt8 RegisterBitOffset;
+ NeOS::UInt8 Reserved;
+ NeOS::UInt64 Address;
};
struct PACKED HPETHeader final : public SDT
{
- Kernel::UInt8 HardwareRevId;
- Kernel::UInt8 ComparatorCount : 5;
- Kernel::UInt8 CounterSize : 1;
- Kernel::UInt8 Reserved : 1;
- Kernel::UInt8 LegacyReplacement : 1;
- Kernel::UInt16 PciVendorId;
+ NeOS::UInt8 HardwareRevId;
+ NeOS::UInt8 ComparatorCount : 5;
+ NeOS::UInt8 CounterSize : 1;
+ NeOS::UInt8 Reserved : 1;
+ NeOS::UInt8 LegacyReplacement : 1;
+ NeOS::UInt16 PciVendorId;
HPETAddressStructure Address;
- Kernel::UInt8 HpetNumber;
- Kernel::UInt16 MinimumTick;
- Kernel::UInt8 PageProtection;
+ NeOS::UInt8 HpetNumber;
+ NeOS::UInt16 MinimumTick;
+ NeOS::UInt8 PageProtection;
};
-} // namespace Kernel
+} // namespace NeOS
diff --git a/dev/Mod/LTE/LTE.h b/dev/Mod/LTE/LTE.h
index 32a7748d..ef7d49f3 100644
--- a/dev/Mod/LTE/LTE.h
+++ b/dev/Mod/LTE/LTE.h
@@ -16,25 +16,25 @@ Purpose: LTE Standard Library.
/// @brief Long Term Evolution I/O routines.
/// @brief Turn on SIM slot.
-Kernel::Boolean lte_turn_on_sim(Kernel::Int32 simSlot);
+NeOS::Boolean lte_turn_on_sim(NeOS::Int32 simSlot);
/// @brief Turn off SIM slot.
-Kernel::Boolean lte_turn_off_sim(Kernel::Int32 simSlot);
+NeOS::Boolean lte_turn_off_sim(NeOS::Int32 simSlot);
/// @brief Send AT command.
-Kernel::Boolean lte_send_at_command(Kernel::Char* buf,
- Kernel::Size bufReadSz,
- Kernel::Int32 simSlot);
-
-Kernel::Boolean lte_write_sim_file(Kernel::Char* file,
- Kernel::VoidPtr buf,
- Kernel::Size bufSz,
- Kernel::Size offset,
- Kernel::Int32 simSlot);
-
-Kernel::VoidPtr lte_read_sim_file(Kernel::Char* file,
- Kernel::Size bufSz,
- Kernel::Size offset,
- Kernel::Int32 simSlot);
+NeOS::Boolean lte_send_at_command(NeOS::Char* buf,
+ NeOS::Size bufReadSz,
+ NeOS::Int32 simSlot);
+
+NeOS::Boolean lte_write_sim_file(NeOS::Char* file,
+ NeOS::VoidPtr buf,
+ NeOS::Size bufSz,
+ NeOS::Size offset,
+ NeOS::Int32 simSlot);
+
+NeOS::VoidPtr lte_read_sim_file(NeOS::Char* file,
+ NeOS::Size bufSz,
+ NeOS::Size offset,
+ NeOS::Int32 simSlot);
#endif // ifndef _INC_NETWORK_LTE_H_
diff --git a/dev/Mod/MBCI/MBCI.h b/dev/Mod/MBCI/MBCI.h
index c9ce73fb..d20f7934 100644
--- a/dev/Mod/MBCI/MBCI.h
+++ b/dev/Mod/MBCI/MBCI.h
@@ -23,7 +23,7 @@
#define kMBCIZeroSz (8)
-namespace Kernel
+namespace NeOS
{
struct IMBCIHost;
@@ -95,6 +95,6 @@ namespace Kernel
/// @brief An AuthKey is a context used to decrpy data from an MBCI packet.
typedef UInt64 MBCIAuthKeyType;
-} // namespace Kernel
+} // namespace NeOS
#endif // ifndef _INC_MODULE_MBCI_H_
diff --git a/dev/Mod/MFlash/MFlash.h b/dev/Mod/MFlash/MFlash.h
index 992c945b..02a74666 100644
--- a/dev/Mod/MFlash/MFlash.h
+++ b/dev/Mod/MFlash/MFlash.h
@@ -10,12 +10,12 @@
#include <NewKit/Defines.h>
-Kernel::SizeT drv_get_sector_count(Kernel::Int32 slot);
+NeOS::SizeT drv_get_sector_count(NeOS::Int32 slot);
-Kernel::SizeT drv_get_size(Kernel::Int32 slot);
+NeOS::SizeT drv_get_size(NeOS::Int32 slot);
-Kernel::Void drv_enable_at(Kernel::Int32 slot);
+NeOS::Void drv_enable_at(NeOS::Int32 slot);
-Kernel::Void drv_disable_at(Kernel::Int32 slot);
+NeOS::Void drv_disable_at(NeOS::Int32 slot);
#endif // ifdef NE_USE_MBCI_FLASH
diff --git a/dev/Mod/NVME/NVME.h b/dev/Mod/NVME/NVME.h
index 236925d1..c73b8af5 100644
--- a/dev/Mod/NVME/NVME.h
+++ b/dev/Mod/NVME/NVME.h
@@ -17,9 +17,9 @@
/// @file NVME.h
/// @brief NVME driver.
-#define NE_ALIGN_NVME ATTRIBUTE(aligned(sizeof(Kernel::UInt32)))
+#define NE_ALIGN_NVME ATTRIBUTE(aligned(sizeof(NeOS::UInt32)))
-namespace Kernel
+namespace NeOS
{
struct NE_ALIGN_NVME HAL_NVME_BAR_0 final
{
@@ -104,10 +104,8 @@ namespace Kernel
}
}
- // Use (1 << 0) as contigunous is better supported.
-
return true;
}
-} // namespace Kernel
+} // namespace NeOS
#endif // ifndef __MODULE_NVME_H__
diff --git a/dev/Mod/SCSI/SCSI.h b/dev/Mod/SCSI/SCSI.h
index 1bcabc1e..156bec90 100644
--- a/dev/Mod/SCSI/SCSI.h
+++ b/dev/Mod/SCSI/SCSI.h
@@ -12,4 +12,4 @@
/// @brief Serial SCSI driver.
template <int PacketBitLen>
-using scsi_packet_type = Kernel::UInt16[PacketBitLen];
+using scsi_packet_type = NeOS::UInt16[PacketBitLen];
diff --git a/dev/Mod/XHCI/Defines.h b/dev/Mod/XHCI/Defines.h
index 345b5157..e3fcce11 100644
--- a/dev/Mod/XHCI/Defines.h
+++ b/dev/Mod/XHCI/Defines.h
@@ -16,7 +16,7 @@
#include <NewKit/Defines.h>
-using namespace Kernel;
+using namespace NeOS;
#define kUSBCommand (UInt16)0x0
#define kUSBStatus (UInt16)0x2
generated by cgit v1.2.3 (git 2.39.1) at 2026-03-13 10:11:19 +0000