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-rw-r--r--dev/kernel/HALKit/AMD64/HalPagingMgrAMD64.cc20
-rw-r--r--dev/kernel/HALKit/AMD64/PCI/Device.cc6
2 files changed, 21 insertions, 5 deletions
diff --git a/dev/kernel/HALKit/AMD64/HalPagingMgrAMD64.cc b/dev/kernel/HALKit/AMD64/HalPagingMgrAMD64.cc
index c4898dfc..040b6fd9 100644
--- a/dev/kernel/HALKit/AMD64/HalPagingMgrAMD64.cc
+++ b/dev/kernel/HALKit/AMD64/HalPagingMgrAMD64.cc
@@ -12,8 +12,11 @@
namespace Kernel::HAL
{
- /// @brief Go over the Page structure and find the address of *virtual_address*
-
+ /***********************************************************************************/
+ /// @brief Gets a physical address from a virtual address.
+ /// @param virt a valid virtual address.
+ /// @return Physical address.
+ /***********************************************************************************/
UIntPtr hal_get_phys_address(VoidPtr virt)
{
const UInt64 vaddr = (UInt64)virt;
@@ -25,18 +28,21 @@ namespace Kernel::HAL
// Level 4
auto pml4 = reinterpret_cast<UInt64*>(cr3);
UInt64 pml4e = pml4[(vaddr >> 39) & kMask9Bits];
+
if (!(pml4e & 1))
return 0;
// Level 3
auto pdpt = reinterpret_cast<UInt64*>(pml4e & ~kPageOffsetMask);
UInt64 pdpte = pdpt[(vaddr >> 30) & kMask9Bits];
+
if (!(pdpte & 1))
return 0;
// Level 2
auto pd = reinterpret_cast<UInt64*>(pdpte & ~kPageOffsetMask);
UInt64 pde = pd[(vaddr >> 21) & kMask9Bits];
+
if (!(pde & 1))
return 0;
@@ -49,6 +55,7 @@ namespace Kernel::HAL
// Level 1
auto pt = reinterpret_cast<UInt64*>(pde & ~kPageOffsetMask);
UInt64 pte = pt[(vaddr >> 12) & kMask9Bits];
+
if (!(pte & 1))
return 0;
@@ -86,16 +93,19 @@ namespace Kernel::HAL
auto pml4 = reinterpret_cast<UInt64*>(cr3);
UInt64 pml4e = pml4[(vaddr >> 39) & kMask9];
+
if (!(pml4e & 1))
return 1;
auto pdpt = reinterpret_cast<UInt64*>(pml4e & ~kPageMask);
UInt64 pdpte = pdpt[(vaddr >> 30) & kMask9];
+
if (!(pdpte & 1))
return 1;
auto pd = reinterpret_cast<UInt64*>(pdpte & ~kPageMask);
UInt64 pde = pd[(vaddr >> 21) & kMask9];
+
if (!(pde & 1))
return 1;
@@ -104,10 +114,16 @@ namespace Kernel::HAL
// Set the new PTE
pte = (reinterpret_cast<UInt64>(physical_address) & ~0xFFFULL) | 0x01ULL; // Present
+
+ if (flags & ~kMMFlagsPresent)
+ pte &= ~(0x01ULL); // Not Present
+
if (flags & kMMFlagsWr)
pte |= 1 << 1; // Writable
+
if (flags & kMMFlagsUser)
pte |= 1 << 2; // User
+
if (flags & kMMFlagsNX)
pte |= 1ULL << 63; // NX
diff --git a/dev/kernel/HALKit/AMD64/PCI/Device.cc b/dev/kernel/HALKit/AMD64/PCI/Device.cc
index 7ad19360..ced473ed 100644
--- a/dev/kernel/HALKit/AMD64/PCI/Device.cc
+++ b/dev/kernel/HALKit/AMD64/PCI/Device.cc
@@ -11,7 +11,7 @@
#define PCI_BAR_LOWMEM (0x02)
#define PCI_BAR_64 (0x04)
#define PCI_BAR_PREFETCH (0x08)
-#define PCI_ENABLE_BIT (0x80000000)
+#define PCI_ENABLE_BIT (0x80000000)
static Kernel::UInt NE_PCIReadRaw(Kernel::UInt bar, Kernel::UShort bus, Kernel::UShort dev, Kernel::UShort fun)
{
@@ -77,7 +77,7 @@ namespace Kernel::PCI
else if (sz == 2)
{
UInt temp = HAL::rt_in32((UShort)PciConfigKind::ConfigData);
-
+
temp &= ~(0xFFFF << ((bar & 2) * 8));
temp |= (data & 0xFFFF) << ((bar & 2) * 8);
@@ -89,7 +89,7 @@ namespace Kernel::PCI
temp &= ~(0xFF << ((bar & 3) * 8));
temp |= (data & 0xFF) << ((bar & 3) * 8);
-
+
HAL::rt_out32((UShort)PciConfigKind::ConfigAddress, temp);
}
}