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-rw-r--r--dev/modules/AHCI/AHCI.h164
-rw-r--r--dev/modules/CoreGfx/AccessibilityMgr.h8
-rw-r--r--dev/modules/CoreGfx/FBMgr.h124
-rw-r--r--dev/modules/HPET/Defines.h22
-rw-r--r--dev/modules/LTE/LTE.h18
5 files changed, 168 insertions, 168 deletions
diff --git a/dev/modules/AHCI/AHCI.h b/dev/modules/AHCI/AHCI.h
index 35065561..c1d63002 100644
--- a/dev/modules/AHCI/AHCI.h
+++ b/dev/modules/AHCI/AHCI.h
@@ -53,30 +53,30 @@ typedef struct FisRegH2D final
// DWORD 0
Kernel::UInt8 FisType; // FIS_TYPE_REG_H2D
- Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 PortMul : 4; // Port multiplier
Kernel::UInt8 Reserved0 : 3; // Reserved
Kernel::UInt8 CmdOrCtrl : 1; // 1: Command, 0: Control
- Kernel::UInt8 Command; // Command register
+ Kernel::UInt8 Command; // Command register
Kernel::UInt8 FeatureLow; // Feature register, 7:0
// DWORD 1
- Kernel::UInt8 Lba0; // LBA low register, 7:0
- Kernel::UInt8 Lba1; // LBA mid register, 15:8
- Kernel::UInt8 Lba2; // LBA high register, 23:16
+ Kernel::UInt8 Lba0; // LBA low register, 7:0
+ Kernel::UInt8 Lba1; // LBA mid register, 15:8
+ Kernel::UInt8 Lba2; // LBA high register, 23:16
Kernel::UInt8 Device; // Device register
// DWORD 2
- Kernel::UInt8 Lba3; // LBA register, 31:24
- Kernel::UInt8 Lba4; // LBA register, 39:32
- Kernel::UInt8 Lba5; // LBA register, 47:40
+ Kernel::UInt8 Lba3; // LBA register, 31:24
+ Kernel::UInt8 Lba4; // LBA register, 39:32
+ Kernel::UInt8 Lba5; // LBA register, 47:40
Kernel::UInt8 FeatureHigh; // Feature register, 15:8
// DWORD 3
- Kernel::UInt8 CountLow; // Count register, 7:0
+ Kernel::UInt8 CountLow; // Count register, 7:0
Kernel::UInt8 CountHigh; // Count register, 15:8
- Kernel::UInt8 Icc; // Isochronous command completion
- Kernel::UInt8 Control; // Control register
+ Kernel::UInt8 Icc; // Isochronous command completion
+ Kernel::UInt8 Control; // Control register
// DWORD 4
Kernel::UInt8 Reserved1[4]; // Reserved
@@ -87,18 +87,18 @@ typedef struct FisRegD2H final
// DWORD 0
Kernel::UInt8 FisType; // FIS_TYPE_REG_D2H
- Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 PortMul : 4; // Port multiplier
Kernel::UInt8 Reserved0 : 2; // Reserved
- Kernel::UInt8 IE : 1; // Interrupt bit
+ Kernel::UInt8 IE : 1; // Interrupt bit
Kernel::UInt8 Reserved1 : 1; // Reserved
Kernel::UInt8 Status; // Status register
- Kernel::UInt8 Error; // Error register
+ Kernel::UInt8 Error; // Error register
// DWORD 1
- Kernel::UInt8 Lba0; // LBA low register, 7:0
- Kernel::UInt8 Lba1; // LBA mid register, 15:8
- Kernel::UInt8 Lba2; // LBA high register, 23:16
+ Kernel::UInt8 Lba0; // LBA low register, 7:0
+ Kernel::UInt8 Lba1; // LBA mid register, 15:8
+ Kernel::UInt8 Lba2; // LBA high register, 23:16
Kernel::UInt8 Device; // Device register
// DWORD 2
@@ -108,9 +108,9 @@ typedef struct FisRegD2H final
Kernel::UInt8 Rsv2; // Reserved
// DWORD 3
- Kernel::UInt8 CountLow; // Count register, 7:0
+ Kernel::UInt8 CountLow; // Count register, 7:0
Kernel::UInt8 CountHigh; // Count register, 15:8
- Kernel::UInt8 Rsv3[2]; // Reserved
+ Kernel::UInt8 Rsv3[2]; // Reserved
// DWORD 4
Kernel::UInt8 Rsv4[4]; // Reserved
@@ -121,7 +121,7 @@ typedef struct FisData final
// DWORD 0
Kernel::UInt8 FisType; // FIS_TYPE_DATA
- Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 PortMul : 4; // Port multiplier
Kernel::UInt8 Reserved0 : 4; // Reserved
Kernel::UInt8 Reserved1[2]; // Reserved
@@ -135,19 +135,19 @@ typedef struct FisPioSetup final
// DWORD 0
Kernel::UInt8 FisType; // FIS_TYPE_PIO_SETUP
- Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 PortMul : 4; // Port multiplier
Kernel::UInt8 Reserved0 : 1; // Reserved
- Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
- Kernel::UInt8 IE : 1; // Interrupt bit
+ Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
+ Kernel::UInt8 IE : 1; // Interrupt bit
Kernel::UInt8 Reserved1 : 1;
Kernel::UInt8 Status; // Status register
- Kernel::UInt8 Error; // Error register
+ Kernel::UInt8 Error; // Error register
// DWORD 1
- Kernel::UInt8 Lba0; // LBA low register, 7:0
- Kernel::UInt8 Lba1; // LBA mid register, 15:8
- Kernel::UInt8 Lba2; // LBA high register, 23:16
+ Kernel::UInt8 Lba0; // LBA low register, 7:0
+ Kernel::UInt8 Lba1; // LBA mid register, 15:8
+ Kernel::UInt8 Lba2; // LBA high register, 23:16
Kernel::UInt8 Device; // Device register
// DWORD 2
@@ -157,14 +157,14 @@ typedef struct FisPioSetup final
Kernel::UInt8 Rsv2; // Reserved
// DWORD 3
- Kernel::UInt8 CountLow; // Count register, 7:0
+ Kernel::UInt8 CountLow; // Count register, 7:0
Kernel::UInt8 CountHigh; // Count register, 15:8
- Kernel::UInt8 Rsv3; // Reserved
- Kernel::UInt8 EStatus; // New value of status register
+ Kernel::UInt8 Rsv3; // Reserved
+ Kernel::UInt8 EStatus; // New value of status register
// DWORD 4
Kernel::UInt16 TranferCount; // Transfer count
- Kernel::UInt8 Rsv4[2]; // Reserved
+ Kernel::UInt8 Rsv4[2]; // Reserved
} FisPioSetup;
typedef struct FisDmaSetup final
@@ -172,18 +172,18 @@ typedef struct FisDmaSetup final
// DWORD 0
Kernel::UInt8 FisType; // FIS_TYPE_DMA_SETUP
- Kernel::UInt8 PortMul : 4; // Port multiplier
- Kernel::UInt8 Reserved0 : 1; // Reserved
- Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
- Kernel::UInt8 IE : 1; // Interrupt bit
+ Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 Reserved0 : 1; // Reserved
+ Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
+ Kernel::UInt8 IE : 1; // Interrupt bit
Kernel::UInt8 AutoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed
Kernel::UInt8 Reserved1[2]; // Reserved
// DWORD 1&2
volatile Kernel::UInt64 DmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in
- // host memory. SATA Spec says host specific and not in
- // Spec. Trying AHCI spec might work.
+ // host memory. SATA Spec says host specific and not in
+ // Spec. Trying AHCI spec might work.
// DWORD 3
Kernel::UInt32 Rsvd; // More reserved
@@ -226,41 +226,41 @@ typedef struct FisDevBits final
typedef struct HbaPort final
{
- Kernel::UInt32 Clb; // 0x00, command list base address, 1K-byte aligned
- Kernel::UInt32 Clbu; // 0x04, command list base address upper 32 bits
- Kernel::UInt32 Fb; // 0x08, FIS base address, 256-byte aligned
- Kernel::UInt32 Fbu; // 0x0C, FIS base address upper 32 bits
- Kernel::UInt32 Is; // 0x10, interrupt status
- Kernel::UInt32 Ie; // 0x14, interrupt enable
- Kernel::UInt32 Cmd; // 0x18, command and status
- Kernel::UInt32 Reserved0; // 0x1C, Reserved
- Kernel::UInt32 Tfd; // 0x20, task file data
- Kernel::UInt32 Sig; // 0x24, signature
- Kernel::UInt32 Ssts; // 0x28, SATA status (SCR0:SStatus)
- Kernel::UInt32 Sctl; // 0x2C, SATA control (SCR2:SControl)
- Kernel::UInt32 Serr; // 0x30, SATA error (SCR1:SError)
- Kernel::UInt32 Sact; // 0x34, SATA active (SCR3:SActive)
- Kernel::UInt32 Ci; // 0x38, command issue
- Kernel::UInt32 Sntf; // 0x3C, SATA notification (SCR4:SNotification)
- Kernel::UInt32 Fbs; // 0x40, FIS-based switch control
+ Kernel::UInt32 Clb; // 0x00, command list base address, 1K-byte aligned
+ Kernel::UInt32 Clbu; // 0x04, command list base address upper 32 bits
+ Kernel::UInt32 Fb; // 0x08, FIS base address, 256-byte aligned
+ Kernel::UInt32 Fbu; // 0x0C, FIS base address upper 32 bits
+ Kernel::UInt32 Is; // 0x10, interrupt status
+ Kernel::UInt32 Ie; // 0x14, interrupt enable
+ Kernel::UInt32 Cmd; // 0x18, command and status
+ Kernel::UInt32 Reserved0; // 0x1C, Reserved
+ Kernel::UInt32 Tfd; // 0x20, task file data
+ Kernel::UInt32 Sig; // 0x24, signature
+ Kernel::UInt32 Ssts; // 0x28, SATA status (SCR0:SStatus)
+ Kernel::UInt32 Sctl; // 0x2C, SATA control (SCR2:SControl)
+ Kernel::UInt32 Serr; // 0x30, SATA error (SCR1:SError)
+ Kernel::UInt32 Sact; // 0x34, SATA active (SCR3:SActive)
+ Kernel::UInt32 Ci; // 0x38, command issue
+ Kernel::UInt32 Sntf; // 0x3C, SATA notification (SCR4:SNotification)
+ Kernel::UInt32 Fbs; // 0x40, FIS-based switch control
Kernel::UInt32 Reserved1[11]; // 0x44 ~ 0x6F, Reserved
- Kernel::UInt32 Vendor[4]; // 0x70 ~ 0x7F, vendor specific
+ Kernel::UInt32 Vendor[4]; // 0x70 ~ 0x7F, vendor specific
} HbaPort;
typedef struct HbaMem final
{
// 0x00 - 0x2B, Generic Host Control
- Kernel::UInt32 Cap; // 0x00, Host capability
- Kernel::UInt32 Ghc; // 0x04, Global host control
- Kernel::UInt32 Is; // 0x08, Interrupt status
- Kernel::UInt32 Pi; // 0x0C, Port implemented
- Kernel::UInt32 Vs; // 0x10, Version
+ Kernel::UInt32 Cap; // 0x00, Host capability
+ Kernel::UInt32 Ghc; // 0x04, Global host control
+ Kernel::UInt32 Is; // 0x08, Interrupt status
+ Kernel::UInt32 Pi; // 0x0C, Port implemented
+ Kernel::UInt32 Vs; // 0x10, Version
Kernel::UInt32 Ccc_ctl; // 0x14, Command completion coalescing control
Kernel::UInt32 Ccc_pts; // 0x18, Command completion coalescing ports
- Kernel::UInt32 Em_loc; // 0x1C, Enclosure management location
- Kernel::UInt32 Em_ctl; // 0x20, Enclosure management control
- Kernel::UInt32 Cap2; // 0x24, Host capabilities extended
- Kernel::UInt32 Bohc; // 0x28, BIOS/OS handoff control and status
+ Kernel::UInt32 Em_loc; // 0x1C, Enclosure management location
+ Kernel::UInt32 Em_ctl; // 0x20, Enclosure management control
+ Kernel::UInt32 Cap2; // 0x24, Host capabilities extended
+ Kernel::UInt32 Bohc; // 0x28, BIOS/OS handoff control and status
Kernel::UInt8 Resv0[0xA0 - 0x2C];
Kernel::UInt8 Vendor[0x100 - 0xA0];
@@ -276,16 +276,16 @@ typedef struct HbaCmdHeader final
union {
struct
{
- Kernel::UInt8 Cfl : 5; // Command FIS length in DWORDS, 2 ~ 16
- Kernel::UInt8 Atapi : 1; // ATAPI
- Kernel::UInt8 Write : 1; // Write, 1: H2D, 0: D2H
+ Kernel::UInt8 Cfl : 5; // Command FIS length in DWORDS, 2 ~ 16
+ Kernel::UInt8 Atapi : 1; // ATAPI
+ Kernel::UInt8 Write : 1; // Write, 1: H2D, 0: D2H
Kernel::UInt8 Prefetchable : 1; // Prefetchable
- Kernel::UInt8 Reset : 1; // Reset
- Kernel::UInt8 BIST : 1; // BIST
- Kernel::UInt8 Clear : 1; // Clear busy upon R_OK
+ Kernel::UInt8 Reset : 1; // Reset
+ Kernel::UInt8 BIST : 1; // BIST
+ Kernel::UInt8 Clear : 1; // Clear busy upon R_OK
Kernel::UInt8 Reserved0 : 1; // Reserved
- Kernel::UInt8 Pmp : 4; // Port multiplier port
+ Kernel::UInt8 Pmp : 4; // Port multiplier port
};
Kernel::UInt16 Flags;
};
@@ -293,7 +293,7 @@ typedef struct HbaCmdHeader final
Kernel::UInt16 Prdtl; // Physical region descriptor table length in entries
Kernel::UInt32 Prdbc; // Physical region descriptor byte count transferred
- Kernel::UInt32 Ctba; // Command table descriptor base address
+ Kernel::UInt32 Ctba; // Command table descriptor base address
Kernel::UInt32 Ctbau; // Command table descriptor base address upper 32 bits
Kernel::UInt32 Rsv[4];
@@ -302,13 +302,13 @@ typedef struct HbaCmdHeader final
typedef struct HbaFis final
{
// 0x00
- FisDmaSetup Dsfis; // DMA Setup FIS
+ FisDmaSetup Dsfis; // DMA Setup FIS
Kernel::UInt8 Pad0[4];
// 0x20
- FisPioSetup Psfis; // PIO Setup FIS
+ FisPioSetup Psfis; // PIO Setup FIS
Kernel::UInt8 Pad1[12];
// 0x40
- FisRegD2H Rfis; // Register – Device to Host FIS
+ FisRegD2H Rfis; // Register – Device to Host FIS
Kernel::UInt8 Pad2[4];
// 0x58
FisDevBits Sdbfis; // Set Device Bit FIS
@@ -320,20 +320,20 @@ typedef struct HbaFis final
typedef struct HbaPrdtEntry final
{
- Kernel::UInt32 Dba; // Data base address
- Kernel::UInt32 Dbau; // Data base address upper 32 bits
+ Kernel::UInt32 Dba; // Data base address
+ Kernel::UInt32 Dbau; // Data base address upper 32 bits
Kernel::UInt32 Reserved0; // Reserved
// DW3
- Kernel::UInt32 Dbc : 22; // Byte count, 4M max
+ Kernel::UInt32 Dbc : 22; // Byte count, 4M max
Kernel::UInt32 Reserved1 : 9; // Reserved
- Kernel::UInt32 Ie : 1; // Interrupt on completion
+ Kernel::UInt32 Ie : 1; // Interrupt on completion
} HbaPrdtEntry;
typedef struct HbaCmdTbl final
{
- Kernel::UInt8 Cfis[64]; // Command FIS
- Kernel::UInt8 Acmd[16]; // ATAPI command, 12 or 16 bytes
- Kernel::UInt8 Rsv[48]; // Reserved
+ Kernel::UInt8 Cfis[64]; // Command FIS
+ Kernel::UInt8 Acmd[16]; // ATAPI command, 12 or 16 bytes
+ Kernel::UInt8 Rsv[48]; // Reserved
struct HbaPrdtEntry Prdt[]; // Physical region descriptor table entries, 0 ~ 65535
} HbaCmdTbl;
diff --git a/dev/modules/CoreGfx/AccessibilityMgr.h b/dev/modules/CoreGfx/AccessibilityMgr.h
index d74059d0..61e0379a 100644
--- a/dev/modules/CoreGfx/AccessibilityMgr.h
+++ b/dev/modules/CoreGfx/AccessibilityMgr.h
@@ -18,13 +18,13 @@ namespace FB
using namespace Kernel;
/// @brief common User interface class.
- class UIAccessibilty final
+ class FBAccessibilty final
{
- explicit UIAccessibilty() = default;
- ~UIAccessibilty() = default;
+ explicit FBAccessibilty() = default;
+ ~FBAccessibilty() = default;
public:
- NE_COPY_DELETE(UIAccessibilty);
+ NE_COPY_DELETE(FBAccessibilty);
static Int64 Width() noexcept
{
diff --git a/dev/modules/CoreGfx/FBMgr.h b/dev/modules/CoreGfx/FBMgr.h
index 6ac4df02..73c51580 100644
--- a/dev/modules/CoreGfx/FBMgr.h
+++ b/dev/modules/CoreGfx/FBMgr.h
@@ -18,115 +18,115 @@
#ifdef __NE_AMD64__
/// @brief Performs Alpha drawing on the framebuffer.
-#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y) \
+#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y) \
for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
- { \
+ { \
for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
- { \
+ { \
*(((Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) |= (reg_ptr)[kCGCursor]; \
- \
- ++kCGCursor; \
- } \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) |= (reg_ptr)[kCGCursor]; \
+ \
+ ++kCGCursor; \
+ } \
}
/// @brief Performs drawing on the framebuffer.
-#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y) \
+#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y) \
for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
- { \
+ { \
for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
- { \
+ { \
*(((Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) = (reg_ptr)[kCGCursor]; \
- \
- ++kCGCursor; \
- } \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) = (reg_ptr)[kCGCursor]; \
+ \
+ ++kCGCursor; \
+ } \
}
#define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y) \
- for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
+ for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
{ \
- for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
+ for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
{ \
- *(((Kernel::UInt32*)(_Rgn + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) = (reg_ptr)[kCGCursor]; \
+ *(((Kernel::UInt32*)(_Rgn + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) = (reg_ptr)[kCGCursor]; \
\
++kCGCursor; \
} \
}
/// @brief Cleans a resource.
-#define CGClearRegion(height, width, base_x, base_y) \
+#define FBClearRegion(height, width, base_x, base_y) \
for (Kernel::SizeT i = base_x; i < (width + base_x); ++i) \
- { \
+ { \
for (Kernel::SizeT u = base_y; u < (height + base_y); ++u) \
- { \
+ { \
*(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- i + \
- 4 * u))) = fb_get_clear_clr(); \
- } \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ i + \
+ 4 * u))) = fb_get_clear_clr(); \
+ } \
}
/// @brief Draws inside a zone.
-#define FBDrawInRegion(_Clr, height, width, base_x, base_y) \
+#define FBDrawInRegion(clr, height, width, base_x, base_y) \
for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
- { \
+ { \
for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
- { \
+ { \
*(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- x_base + \
- 4 * y_base))) = _Clr; \
- } \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ x_base + \
+ 4 * y_base))) = clr; \
+ } \
}
/// @brief Draws inside a zone.
-#define FBDrawInRegionToRgn(_Rgn, _Clr, height, width, base_x, base_y) \
+#define FBDrawInRegionToRgn(_Rgn, clr, height, width, base_x, base_y) \
for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
- { \
+ { \
for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
- { \
+ { \
*(((volatile Kernel::UInt32*)(_Rgn + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- x_base + \
- 4 * y_base))) = _Clr[kCGCursor]; \
- ++kCGCursor; \
- } \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ x_base + \
+ 4 * y_base))) = clr[kCGCursor]; \
+ ++kCGCursor; \
+ } \
}
-#define FBDrawInRegionA(_Clr, height, width, base_x, base_y) \
+#define FBDrawInRegionA(clr, height, width, base_x, base_y) \
for (Kernel::SizeT x_base = base_x; x_base < (width + base_x); ++x_base) \
- { \
+ { \
for (Kernel::SizeT y_base = base_y; y_base < (height + base_y); ++y_base) \
- { \
+ { \
*(((volatile Kernel::UInt32*)(kHandoverHeader->f_GOP.f_The + \
- 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
- x_base + \
- 4 * y_base))) |= _Clr; \
- } \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * \
+ x_base + \
+ 4 * y_base))) |= clr; \
+ } \
}
#else
#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y)
#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y)
#define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y)
-#define CGClearRegion(height, width, base_x, base_y)
-#define FBDrawInRegion(_Clr, height, width, base_x, base_y)
-#define FBDrawInRegionToRgn(_Rgn, _Clr, height, width, base_x, base_y)
-#define FBDrawInRegionA(_Clr, height, width, base_x, base_y)
+#define FBClearRegion(height, width, base_x, base_y)
+#define FBDrawInRegion(clr, height, width, base_x, base_y)
+#define FBDrawInRegionToRgn(_Rgn, clr, height, width, base_x, base_y)
+#define FBDrawInRegionA(clr, height, width, base_x, base_y)
#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y)
#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y)
#define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y)
-#define CGClearRegion(height, width, base_x, base_y)
-#define FBDrawInRegion(_Clr, height, width, base_x, base_y)
-#define FBDrawInRegionToRgn(_Rgn, _Clr, height, width, base_x, base_y)
-#define FBDrawInRegionA(_Clr, height, width, base_x, base_y)
+#define FBClearRegion(height, width, base_x, base_y)
+#define FBDrawInRegion(clr, height, width, base_x, base_y)
+#define FBDrawInRegionToRgn(_Rgn, clr, height, width, base_x, base_y)
+#define FBDrawInRegionA(clr, height, width, base_x, base_y)
#endif // __NE_AMD64__
#ifndef GFX_MGR_ACCESSIBILITY_H
@@ -141,7 +141,7 @@ namespace FB
{
fb_init();
- FBDrawInRegion(fb_get_clear_clr(), FB::UIAccessibilty::Height(), FB::UIAccessibilty::Width(),
+ FBDrawInRegion(fb_get_clear_clr(), FB::FBAccessibilty::Height(), FB::FBAccessibilty::Width(),
0, 0);
fb_clear();
diff --git a/dev/modules/HPET/Defines.h b/dev/modules/HPET/Defines.h
index bb825495..82254a27 100644
--- a/dev/modules/HPET/Defines.h
+++ b/dev/modules/HPET/Defines.h
@@ -18,25 +18,25 @@ namespace Kernel
{
struct PACKED HPETAddressStructure final
{
- Kernel::UInt8 AddressSpaceId; // 0 - system memory, 1 - system I/O
- Kernel::UInt8 RegisterBitWidth;
- Kernel::UInt8 RegisterBitOffset;
- Kernel::UInt8 Reserved;
+ Kernel::UInt8 AddressSpaceId; // 0 - system memory, 1 - system I/O
+ Kernel::UInt8 RegisterBitWidth;
+ Kernel::UInt8 RegisterBitOffset;
+ Kernel::UInt8 Reserved;
Kernel::UInt64 Address;
};
struct PACKED HPETHeader final : public SDT
{
- Kernel::UInt8 HardwareRevId;
- Kernel::UInt8 ComparatorCount : 5;
- Kernel::UInt8 CounterSize : 1;
- Kernel::UInt8 Reserved : 1;
- Kernel::UInt8 LegacyReplacement : 1;
+ Kernel::UInt8 HardwareRevId;
+ Kernel::UInt8 ComparatorCount : 5;
+ Kernel::UInt8 CounterSize : 1;
+ Kernel::UInt8 Reserved : 1;
+ Kernel::UInt8 LegacyReplacement : 1;
Kernel::UInt16 PciVendorId;
HPETAddressStructure Address;
- Kernel::UInt8 HpetNumber;
+ Kernel::UInt8 HpetNumber;
Kernel::UInt16 MinimumTick;
- Kernel::UInt8 PageProtection;
+ Kernel::UInt8 PageProtection;
};
} // namespace Kernel
diff --git a/dev/modules/LTE/LTE.h b/dev/modules/LTE/LTE.h
index cd3dd616..32a7748d 100644
--- a/dev/modules/LTE/LTE.h
+++ b/dev/modules/LTE/LTE.h
@@ -23,18 +23,18 @@ Kernel::Boolean lte_turn_off_sim(Kernel::Int32 simSlot);
/// @brief Send AT command.
Kernel::Boolean lte_send_at_command(Kernel::Char* buf,
- Kernel::Size bufReadSz,
- Kernel::Int32 simSlot);
+ Kernel::Size bufReadSz,
+ Kernel::Int32 simSlot);
Kernel::Boolean lte_write_sim_file(Kernel::Char* file,
- Kernel::VoidPtr buf,
- Kernel::Size bufSz,
- Kernel::Size offset,
- Kernel::Int32 simSlot);
+ Kernel::VoidPtr buf,
+ Kernel::Size bufSz,
+ Kernel::Size offset,
+ Kernel::Int32 simSlot);
Kernel::VoidPtr lte_read_sim_file(Kernel::Char* file,
- Kernel::Size bufSz,
- Kernel::Size offset,
- Kernel::Int32 simSlot);
+ Kernel::Size bufSz,
+ Kernel::Size offset,
+ Kernel::Int32 simSlot);
#endif // ifndef _INC_NETWORK_LTE_H_
generated by cgit v1.2.3 (git 2.39.1) at 2026-03-13 10:49:35 +0000