diff options
Diffstat (limited to 'dev')
78 files changed, 475 insertions, 2792 deletions
diff --git a/dev/DDK/DispatchKernelCall.S b/dev/DDK/DispatchKernelCall.S index b6ce8004..ef1886b9 100644 --- a/dev/DDK/DispatchKernelCall.S +++ b/dev/DDK/DispatchKernelCall.S @@ -3,32 +3,32 @@ compiler: gnu */ -.globl __kernelCallDispatch +.globl __KernelCallDispatch .text /* Really simple function, takes our va-list, - and brings it to the trap handler in the kernel. */ + and brings it to the trap handler in the Kernel. */ #ifdef __DDK_AMD64__ /* args rcx, rdx, r8, r9 */ -__kernelCallDispatch: +__KernelCallDispatch: int $0x33 ret #elif defined(__DDK_POWER64__) /* args r8, r9, r10, r11 */ -__kernelCallDispatch: +__KernelCallDispatch: /* There is no specific interrupt request id for a system call in POWER. */ sc blr #elif defined(__DDK_ARM64__) -/* args x0, x8, x9, x10, x11 is kept to tell that this is a kernel call */ -__kernelCallDispatch: +/* args x0, x8, x9, x10, x11 is kept to tell that this is a Kernel call */ +__KernelCallDispatch: /* There is no specific interrupt request id for a system call in ARM64 as well. */ mov x11, #0x33 svc #0 diff --git a/dev/DDK/KernelAlloc.c b/dev/DDK/KernelAlloc.c index 56dfd6a4..cb79b538 100644 --- a/dev/DDK/KernelAlloc.c +++ b/dev/DDK/KernelAlloc.c @@ -9,15 +9,15 @@ #include <DDK/KernelStd.h> /** - \brief Allocates a new heap on the kernel's side. + \brief Allocates a new heap on the Kernel's side. \param sz the size of the heap block. \return the newly allocated pointer. */ -DK_EXTERN void* kernelAlloc(size_t sz) +DK_EXTERN void* KernelAlloc(size_t sz) { if (!sz) ++sz; - void* ptr = kernelCall("NewHeap", 1, &sz, sizeof(size_t)); + void* ptr = KernelCall("NewHeap", 1, &sz, sizeof(size_t)); return ptr; } @@ -26,9 +26,9 @@ DK_EXTERN void* kernelAlloc(size_t sz) \brief Frees a pointer from the heap. \param ptr the pointer to free. */ -DK_EXTERN void kernelFree(void* ptr) +DK_EXTERN void KernelFree(void* ptr) { if (!ptr) return; - kernelCall("DeleteHeap", 1, ptr, 0); + KernelCall("DeleteHeap", 1, ptr, 0); } diff --git a/dev/DDK/KernelCall.c b/dev/DDK/KernelCall.c index 8c890579..31e67620 100644 --- a/dev/DDK/KernelCall.c +++ b/dev/DDK/KernelCall.c @@ -2,7 +2,7 @@ Copyright ZKA Technologies. - Purpose: DDK kernel call. + Purpose: DDK Kernel call. ------------------------------------------- */ @@ -10,46 +10,46 @@ #include <stdarg.h> /// @brief this is an internal call, do not use it. -DK_EXTERN __attribute__((naked)) void* __kernelCallDispatch(const char* name, int32_t cnt, void* data, size_t sz); +DK_EXTERN __attribute__((naked)) void* __KernelCallDispatch(const char* name, int32_t cnt, void* data, size_t sz); -/// @brief Interupt kernel -/// @param kernelRpcName RPC name +/// @brief Interupt Kernel +/// @param KernelRpcName RPC name /// @param cnt number of elements in **data** pointer. /// @param data data pointer. /// @param sz The size of the whole data pointer. -/// @retval void* kernel call was successful. -/// @retval nil kernel call failed, call kernelLastError(void) -DK_EXTERN void* kernelCall(const char* kernelRpcName, int32_t cnt, void* data, size_t sz) +/// @retval void* Kernel call was successful. +/// @retval nil Kernel call failed, call KernelLastError(void) +DK_EXTERN void* KernelCall(const char* KernelRpcName, int32_t cnt, void* data, size_t sz) { - if (!kernelRpcName || cnt == 0) + if (!KernelRpcName || cnt == 0) return nil; - return __kernelCallDispatch(kernelRpcName, cnt, data, sz); + return __KernelCallDispatch(KernelRpcName, cnt, data, sz); } /// @brief Add system call. /// @param slot system call slot /// @param slotFn, syscall slot. -DK_EXTERN void kernelAddSyscall(const int slot, void (*slotFn)(void* a0)) +DK_EXTERN void KernelAddSyscall(const int slot, void (*slotFn)(void* a0)) { - kernelCall("AddSyscall", slot, slotFn, 1); + KernelCall("AddSyscall", slot, slotFn, 1); } -/// @brief Get a kernel property. +/// @brief Get a Kernel property. /// @param slot property id (always 0) /// @param name the prperty's name. /// @return property's object. -DK_EXTERN void* kernelGetProperty(const int slot, const char* name) +DK_EXTERN void* KernelGetProperty(const int slot, const char* name) { - return kernelCall("GetProperty", slot, name, 1); + return KernelCall("GetProperty", slot, name, 1); } -/// @brief Set a kernel property. +/// @brief Set a Kernel property. /// @param slot property id (always 0) /// @param name the property's name. /// @param ddk_pr pointer to a property's DDK_PROPERTY_RECORD. /// @return property's object. -DK_EXTERN void* kernelSetProperty(const int slot, const struct DDK_PROPERTY_RECORD* ddk_pr) +DK_EXTERN void* KernelSetProperty(const int slot, const struct DDK_PROPERTY_RECORD* ddk_pr) { - return kernelCall("SetProperty", slot, ddk_pr, 1); + return KernelCall("SetProperty", slot, ddk_pr, 1); } diff --git a/dev/DDK/KernelCxxRt.cxx b/dev/DDK/KernelCxxRt.cxx index 5122ba40..3029caa1 100644 --- a/dev/DDK/KernelCxxRt.cxx +++ b/dev/DDK/KernelCxxRt.cxx @@ -10,20 +10,20 @@ void* operator new(size_t sz) { - return kernelAlloc(sz); + return KernelAlloc(sz); } void operator delete(void* ptr) { - kernelFree(ptr); + KernelFree(ptr); } void* operator new[](size_t sz) { - return kernelAlloc(sz); + return KernelAlloc(sz); } void operator delete[](void* ptr) { - kernelFree(ptr); + KernelFree(ptr); } diff --git a/dev/DDK/KernelDev.c b/dev/DDK/KernelDev.c index df61e35d..78703961 100644 --- a/dev/DDK/KernelDev.c +++ b/dev/DDK/KernelDev.c @@ -10,20 +10,20 @@ #include <DDK/KernelString.h> /// @brief Open a new binary device from path. -DK_EXTERN kernelDeviceRef kernelOpenDevice(const char* devicePath) +DK_EXTERN KERNEL_DEVICE_PTR KernelOpenDevice(const char* devicePath) { if (!devicePath) return nil; - return kernelCall("OpenDevice", 1, (void*)devicePath, kernelStringLength(devicePath)); + return KernelCall("OpenDevice", 1, (void*)devicePath, KernelStringLength(devicePath)); } /// @brief Close any device. /// @param device valid device. -DK_EXTERN void kernelCloseDevice(kernelDeviceRef device) +DK_EXTERN void KernelCloseDevice(KERNEL_DEVICE_PTR device) { if (!device) return; - kernelCall("CloseDevice", 1, device, sizeof(kernelDevice)); + KernelCall("CloseDevice", 1, device, sizeof(KERNEL_DEVICE)); } diff --git a/dev/DDK/KernelDev.h b/dev/DDK/KernelDev.h index c2328d40..ce7b1a2d 100644 --- a/dev/DDK/KernelDev.h +++ b/dev/DDK/KernelDev.h @@ -10,23 +10,23 @@ #include <DDK/KernelStd.h> -struct _kernelDevice; +struct _KERNEL_DEVICE; /// @brief Kernel Device driver. -typedef struct _kernelDevice +typedef struct _KERNEL_DEVICE { char name[255]; // the device name. Could be /./DEVICE_NAME/ void* (*read)(void* arg, int len); // read from device. void (*write)(void* arg, int len); void (*wait)(void); // write to device. - struct _kernelDevice* (*open)(const char* path); // open device. - void (*close)(struct _kernelDevice* dev); // close device. -} kernelDevice, *kernelDeviceRef; + struct _KERNEL_DEVICE* (*open)(const char* path); // open device. + void (*close)(struct _KERNEL_DEVICE* dev); // close device. +} KERNEL_DEVICE, *KERNEL_DEVICE_PTR; /// @brief Open a new device from path. /// @param devicePath the device's path. -DK_EXTERN kernelDeviceRef kernelOpenDevice(const char* devicePath); +DK_EXTERN KERNEL_DEVICE_PTR KernelOpenDevice(const char* devicePath); /// @brief Close any device. /// @param device valid device. -DK_EXTERN void kernelCloseDevice(kernelDeviceRef device); +DK_EXTERN void KernelCloseDevice(KERNEL_DEVICE_PTR device); diff --git a/dev/DDK/KernelPrint.c b/dev/DDK/KernelPrint.c index a885ddd4..7eb893d0 100644 --- a/dev/DDK/KernelPrint.c +++ b/dev/DDK/KernelPrint.c @@ -8,18 +8,18 @@ #include <DDK/KernelPrint.h> -DK_EXTERN void kernelPrintChar(const char ch) +DK_EXTERN void KernelPrintChar(const char ch) { char assembled[2] = {0}; assembled[0] = ch; assembled[1] = 0; - kernelCall("WriteCharacter", 1, assembled, 1); + KernelCall("WriteCharacter", 1, assembled, 1); } /// @brief print string to UART. /// @param message UART to transmit. -DK_EXTERN void kernelPrintStr(const char* message) +DK_EXTERN void KernelPrintStr(const char* message) { if (!message) return; @@ -27,11 +27,11 @@ DK_EXTERN void kernelPrintStr(const char* message) return; size_t index = 0; - size_t len = kernelStringLength(message); + size_t len = KernelStringLength(message); while (index < len) { - kernelPrintChar(message[index]); + KernelPrintChar(message[index]); ++index; } } diff --git a/dev/DDK/KernelPrint.h b/dev/DDK/KernelPrint.h index d3c2c523..88244c94 100644 --- a/dev/DDK/KernelPrint.h +++ b/dev/DDK/KernelPrint.h @@ -11,8 +11,8 @@ #include <DDK/KernelString.h> /// @brief print character into UART. -DK_EXTERN void kernelPrintChar(const char ch); +DK_EXTERN void KernelPrintChar(const char ch); /// @brief print string to UART. /// @param message string to transmit to UART. -DK_EXTERN void kernelPrintStr(const char* message); +DK_EXTERN void KernelPrintStr(const char* message); diff --git a/dev/DDK/KernelStd.h b/dev/DDK/KernelStd.h index 0436469e..d5350c8e 100644 --- a/dev/DDK/KernelStd.h +++ b/dev/DDK/KernelStd.h @@ -44,41 +44,41 @@ struct DDK_STATUS_STRUCT DK_FINAL void* s_object; }; -/// @brief Call kernel (interrupt 0x33) -/// @param kernelRpcName +/// @brief Call Kernel (interrupt 0x33) +/// @param KernelRpcName /// @param cnt number of elements in **dat** /// @param dat data ptr /// @param sz sz of whole data ptr. /// @return result of call -DK_EXTERN void* kernelCall(const char* kernelRpcName, int32_t cnt, void* dat, size_t sz); +DK_EXTERN void* KernelCall(const char* KernelRpcName, int32_t cnt, void* dat, size_t sz); /// @brief add system call. /// @param slot system call slot /// @param slotFn, syscall slot. -DK_EXTERN void kernelAddSyscall(const int slot, void (*slotFn)(void* a0)); +DK_EXTERN void KernelAddSyscall(const int slot, void (*slotFn)(void* a0)); /// @brief allocate heap ptr. /// @param sz size of ptr. /// @return the pointer allocated or **nil**. -DK_EXTERN void* kernelAlloc(size_t sz); +DK_EXTERN void* KernelAlloc(size_t sz); /// @brief free heap ptr. /// @param pointer to free -DK_EXTERN void kernelFree(void*); +DK_EXTERN void KernelFree(void*); -/// @brief Get a kernel property. +/// @brief Get a Kernel property. /// @param slot property id (always 0) /// @param name the property's name. /// @return property's object. -DK_EXTERN void* kernelGetProperty(const int slot, const char* name); +DK_EXTERN void* KernelGetProperty(const int slot, const char* name); -/// @brief Set a kernel property. +/// @brief Set a Kernel property. /// @param slot property id (always 0) /// @param name the property's name. /// @param ddk_pr pointer to a property's DDK_PROPERTY_RECORD. /// @return property's object. -DK_EXTERN void* kernelSetProperty(const int slot, const struct DDK_PROPERTY_RECORD* ddk_pr); +DK_EXTERN void* KernelSetProperty(const int slot, const struct DDK_PROPERTY_RECORD* ddk_pr); /// @brief The highest API version of the DDK. DK_EXTERN int32_t c_api_version_highest; diff --git a/dev/DDK/KernelString.c b/dev/DDK/KernelString.c index 63157ec2..21395e9f 100644 --- a/dev/DDK/KernelString.c +++ b/dev/DDK/KernelString.c @@ -8,7 +8,7 @@ #include <DDK/KernelString.h> -DK_EXTERN size_t kernelStringLength(const char* in) +DK_EXTERN size_t KernelStringLength(const char* in) { if (in == nil) return 0; @@ -25,7 +25,7 @@ DK_EXTERN size_t kernelStringLength(const char* in) return index; } -DK_EXTERN int kernelStringCopy(char* dst, const char* src, size_t len) +DK_EXTERN int KernelStringCopy(char* dst, const char* src, size_t len) { size_t index = 0; diff --git a/dev/DDK/KernelString.h b/dev/DDK/KernelString.h index 02d2c067..8a02713a 100644 --- a/dev/DDK/KernelString.h +++ b/dev/DDK/KernelString.h @@ -11,7 +11,7 @@ #include <DDK/KernelStd.h> /// @brief DDK equivalent of POSIX's string.h -/// @file kernelString.h +/// @file KernelString.h -DK_EXTERN size_t kernelStringLength(const char* in); -DK_EXTERN int kernelStringCopy(char* dst, const char* src, size_t len); +DK_EXTERN size_t KernelStringLength(const char* in); +DK_EXTERN int KernelStringCopy(char* dst, const char* src, size_t len); diff --git a/dev/DDK/ReadMe.md b/dev/DDK/ReadMe.md index 41e39d83..48e35ef2 100644 --- a/dev/DDK/ReadMe.md +++ b/dev/DDK/ReadMe.md @@ -1,6 +1,6 @@ # ZKA's Device Driver Kit. -A kit used to write kernel HALs, using the NDK compiler suite. +A kit used to write Kernel HALs, using the NDK compiler suite. ## How to use it diff --git a/dev/SCI/ReadMe.md b/dev/SCI/ReadMe.md index 00d90c14..9978e56e 100644 --- a/dev/SCI/ReadMe.md +++ b/dev/SCI/ReadMe.md @@ -1,5 +1,5 @@ # ZKA's SCI.
-System Call and Component Interface, used maninly to communicate with kernel and registered objects.
+System Call and Component Interface, used maninly to communicate with Kernel and registered objects.
###### (c) ZKA Technologies, all rights reserved.
diff --git a/dev/ZBA/BootKit/Vendor/stb_image.hxx b/dev/ZBA/BootKit/Vendor/stb_image.hxx index 705abeb6..ca4576d7 100644 --- a/dev/ZBA/BootKit/Vendor/stb_image.hxx +++ b/dev/ZBA/BootKit/Vendor/stb_image.hxx @@ -257,7 +257,7 @@ RECENT REVISION HISTORY: // // SIMD support // -// The JPEG decoder will try to automatically use SIMD kernels on x86 when +// The JPEG decoder will try to automatically use SIMD Kernels on x86 when // supported by the compiler. For ARM Neon support, you must explicitly // request it. // @@ -2143,7 +2143,7 @@ static stbi_uc* stbi__hdr_to_ldr(float* data, int x, int y, int comp) // - quality integer IDCT derived from IJG's 'slow' // performance // - fast huffman; reasonable integer IDCT -// - some SIMD kernels for common paths on targets with SSE2/NEON +// - some SIMD Kernels for common paths on targets with SSE2/NEON // - uses a lot of intermediate memory, could cache poorly #ifndef STBI_NO_JPEG @@ -2210,10 +2210,10 @@ typedef struct int scan_n, order[4]; int restart_interval, todo; - // kernels - void (*idct_block_kernel)(stbi_uc* out, int out_stride, short data[64]); - void (*YCbCr_to_RGB_kernel)(stbi_uc* out, const stbi_uc* y, const stbi_uc* pcb, const stbi_uc* pcr, int count, int step); - stbi_uc* (*resample_row_hv_2_kernel)(stbi_uc* out, stbi_uc* in_near, stbi_uc* in_far, int w, int hs); + // Kernels + void (*idct_block_Kernel)(stbi_uc* out, int out_stride, short data[64]); + void (*YCbCr_to_RGB_Kernel)(stbi_uc* out, const stbi_uc* y, const stbi_uc* pcb, const stbi_uc* pcr, int count, int step); + stbi_uc* (*resample_row_hv_2_Kernel)(stbi_uc* out, stbi_uc* in_near, stbi_uc* in_far, int w, int hs); } stbi__jpeg; static int stbi__build_huffman(stbi__huffman* h, int* count) @@ -3330,7 +3330,7 @@ static int stbi__parse_entropy_coded_data(stbi__jpeg* z) int ha = z->img_comp[n].ha; if (!stbi__jpeg_decode_block(z, data, z->huff_dc + z->img_comp[n].hd, z->huff_ac + ha, z->fast_ac[ha], n, z->dequant[z->img_comp[n].tq])) return 0; - z->idct_block_kernel(z->img_comp[n].data + z->img_comp[n].w2 * j * 8 + i * 8, z->img_comp[n].w2, data); + z->idct_block_Kernel(z->img_comp[n].data + z->img_comp[n].w2 * j * 8 + i * 8, z->img_comp[n].w2, data); // every data block is an MCU, so countdown the restart interval if (--z->todo <= 0) { @@ -3369,7 +3369,7 @@ static int stbi__parse_entropy_coded_data(stbi__jpeg* z) int ha = z->img_comp[n].ha; if (!stbi__jpeg_decode_block(z, data, z->huff_dc + z->img_comp[n].hd, z->huff_ac + ha, z->fast_ac[ha], n, z->dequant[z->img_comp[n].tq])) return 0; - z->idct_block_kernel(z->img_comp[n].data + z->img_comp[n].w2 * y2 + x2, z->img_comp[n].w2, data); + z->idct_block_Kernel(z->img_comp[n].data + z->img_comp[n].w2 * y2 + x2, z->img_comp[n].w2, data); } } } @@ -3494,7 +3494,7 @@ static void stbi__jpeg_finish(stbi__jpeg* z) { short* data = z->img_comp[n].coeff + 64 * (i + j * z->img_comp[n].coeff_w); stbi__jpeg_dequantize(data, z->dequant[z->img_comp[n].tq]); - z->idct_block_kernel(z->img_comp[n].data + z->img_comp[n].w2 * j * 8 + i * 8, z->img_comp[n].w2, data); + z->idct_block_Kernel(z->img_comp[n].data + z->img_comp[n].w2 * j * 8 + i * 8, z->img_comp[n].w2, data); } } } @@ -4362,26 +4362,26 @@ static void stbi__YCbCr_to_RGB_simd(stbi_uc* out, stbi_uc const* y, stbi_uc cons } #endif -// set up the kernels +// set up the Kernels static void stbi__setup_jpeg(stbi__jpeg* j) { - j->idct_block_kernel = stbi__idct_block; - j->YCbCr_to_RGB_kernel = stbi__YCbCr_to_RGB_row; - j->resample_row_hv_2_kernel = stbi__resample_row_hv_2; + j->idct_block_Kernel = stbi__idct_block; + j->YCbCr_to_RGB_Kernel = stbi__YCbCr_to_RGB_row; + j->resample_row_hv_2_Kernel = stbi__resample_row_hv_2; #ifdef STBI_SSE2 if (stbi__sse2_available()) { - j->idct_block_kernel = stbi__idct_simd; - j->YCbCr_to_RGB_kernel = stbi__YCbCr_to_RGB_simd; - j->resample_row_hv_2_kernel = stbi__resample_row_hv_2_simd; + j->idct_block_Kernel = stbi__idct_simd; + j->YCbCr_to_RGB_Kernel = stbi__YCbCr_to_RGB_simd; + j->resample_row_hv_2_Kernel = stbi__resample_row_hv_2_simd; } #endif #ifdef STBI_NEON - j->idct_block_kernel = stbi__idct_simd; - j->YCbCr_to_RGB_kernel = stbi__YCbCr_to_RGB_simd; - j->resample_row_hv_2_kernel = stbi__resample_row_hv_2_simd; + j->idct_block_Kernel = stbi__idct_simd; + j->YCbCr_to_RGB_Kernel = stbi__YCbCr_to_RGB_simd; + j->resample_row_hv_2_Kernel = stbi__resample_row_hv_2_simd; #endif } @@ -4479,7 +4479,7 @@ static stbi_uc* load_jpeg_image(stbi__jpeg* z, int* out_x, int* out_y, int* comp else if (r->hs == 2 && r->vs == 1) r->resample = stbi__resample_row_h_2; else if (r->hs == 2 && r->vs == 2) - r->resample = z->resample_row_hv_2_kernel; + r->resample = z->resample_row_hv_2_Kernel; else r->resample = stbi__resample_row_generic; } @@ -4530,7 +4530,7 @@ static stbi_uc* load_jpeg_image(stbi__jpeg* z, int* out_x, int* out_y, int* comp } else { - z->YCbCr_to_RGB_kernel(out, y, coutput[1], coutput[2], z->s->img_x, n); + z->YCbCr_to_RGB_Kernel(out, y, coutput[1], coutput[2], z->s->img_x, n); } } else if (z->s->img_n == 4) @@ -4549,7 +4549,7 @@ static stbi_uc* load_jpeg_image(stbi__jpeg* z, int* out_x, int* out_y, int* comp } else if (z->app14_color_transform == 2) { // YCCK - z->YCbCr_to_RGB_kernel(out, y, coutput[1], coutput[2], z->s->img_x, n); + z->YCbCr_to_RGB_Kernel(out, y, coutput[1], coutput[2], z->s->img_x, n); for (i = 0; i < z->s->img_x; ++i) { stbi_uc m = coutput[3][i]; @@ -4561,7 +4561,7 @@ static stbi_uc* load_jpeg_image(stbi__jpeg* z, int* out_x, int* out_y, int* comp } else { // YCbCr + alpha? Ignore the fourth channel for now - z->YCbCr_to_RGB_kernel(out, y, coutput[1], coutput[2], z->s->img_x, n); + z->YCbCr_to_RGB_Kernel(out, y, coutput[1], coutput[2], z->s->img_x, n); } } else diff --git a/dev/ZBA/ReadMe.md b/dev/ZBA/ReadMe.md index 0fa9cf62..626f1154 100644 --- a/dev/ZBA/ReadMe.md +++ b/dev/ZBA/ReadMe.md @@ -2,13 +2,13 @@ You need: -- MinGW for the kernel and bootloader. +- MinGW for the Kernel and bootloader. - Netwide Assembler to output COFF object code. Start by cloning the repo: ``` -git clone git@bitbucket.org:mahrouss/microkernel.git +git clone git@bitbucket.org:mahrouss/microKernel.git ``` And then execute: diff --git a/dev/ZBA/Sources/HEL/64X000/Boot64x0.S b/dev/ZBA/Sources/HEL/64X000/Boot64x0.S index 271a3f28..cd9662f2 100644 --- a/dev/ZBA/Sources/HEL/64X000/Boot64x0.S +++ b/dev/ZBA/Sources/HEL/64X000/Boot64x0.S @@ -7,7 +7,7 @@ .section .boot_hdr .align 4 -/* NewBoot boot header begin for a 64x000 kernel. */ +/* NewBoot boot header begin for a 64x000 Kernel. */ boot_hdr_mag: .ascii "CB" diff --git a/dev/ZBA/Sources/HEL/AMD64/BootFileReader.cxx b/dev/ZBA/Sources/HEL/AMD64/BootFileReader.cxx index 5686318b..c8e0bb4e 100644 --- a/dev/ZBA/Sources/HEL/AMD64/BootFileReader.cxx +++ b/dev/ZBA/Sources/HEL/AMD64/BootFileReader.cxx @@ -75,9 +75,9 @@ BFileReader::BFileReader(const CharacterTypeUTF16* path, return; } - EfiFileProtocol* kernelFile = nullptr; + EfiFileProtocol* KernelFile = nullptr; - if (mRootFs->Open(mRootFs, &kernelFile, mPath, kEFIFileRead, kEFIReadOnly) != + if (mRootFs->Open(mRootFs, &KernelFile, mPath, kEFIFileRead, kEFIReadOnly) != kEfiOk) { mWriter.Write(L"newosldr: Fetch-Protocol: No-Such-Path: ") @@ -91,7 +91,7 @@ BFileReader::BFileReader(const CharacterTypeUTF16* path, } mSizeFile = 0; - mFile = kernelFile; + mFile = KernelFile; mErrorCode = kOperationOkay; } diff --git a/dev/ZBA/Sources/HEL/AMD64/BootMain.cxx b/dev/ZBA/Sources/HEL/AMD64/BootMain.cxx index 824cee06..330dc96a 100644 --- a/dev/ZBA/Sources/HEL/AMD64/BootMain.cxx +++ b/dev/ZBA/Sources/HEL/AMD64/BootMain.cxx @@ -189,9 +189,9 @@ EFI_EXTERN_C EFI_API Int Main(EfiHandlePtr ImageHandle, handoverHdrPtr->f_VirtualStart = (VoidPtr)Descriptor[cDefaultMemoryMap].VirtualStart; - handoverHdrPtr->f_HeapStart = nullptr; + handoverHdrPtr->f_HeapStart = 0; - while (BS->AllocatePool(EfiLoaderCode, kHandoverHeapSz, &handoverHdrPtr->f_HeapStart) != kEfiOk) + while (BS->AllocatePool(EfiRuntimeServicesCode, kHandoverHeapSz, &handoverHdrPtr->f_HeapStart) != kEfiOk) ; handoverHdrPtr->f_VirtualSize = @@ -268,7 +268,7 @@ EFI_EXTERN_C EFI_API Int Main(EfiHandlePtr ImageHandle, EFI::ExitBootServices(MapKey, ImageHandle); // ---------------------------------------------------- // - // finally load kernel. + // finally load Kernel. // ---------------------------------------------------- // loader->Start(handoverHdrPtr); diff --git a/dev/ZBA/amd64-efi.make b/dev/ZBA/amd64-efi.make index 3cf9e0f2..733c8474 100644 --- a/dev/ZBA/amd64-efi.make +++ b/dev/ZBA/amd64-efi.make @@ -29,14 +29,14 @@ IMG=epm-master-1.img IMG_2=epm-slave.img IMG_3=epm-master-2.img -EMU_FLAGS=-net none -smp 4 -m 8G -M q35 \ +EMU_FLAGS=-net none -m 12G -M q35 \ -bios $(BIOS) -device piix3-ide,id=ide \ -drive id=disk,file=$(IMG),format=raw,if=none \ -device ide-hd,drive=disk,bus=ide.0 -drive \ file=fat:rw:Sources/Root/,index=2,format=raw \ -drive id=disk_2,file=$(IMG_2),if=none \ -device ahci,id=ahci \ - -device ide-hd,drive=disk_2,bus=ahci.0 + -device ide-hd,drive=disk_2,bus=ahci.0 -d int LD_FLAGS=-e Main --subsystem=10 diff --git a/dev/ZKA/ArchKit/ArchKit.hxx b/dev/ZKA/ArchKit/ArchKit.hxx index 9659182c..2c9a951e 100644 --- a/dev/ZKA/ArchKit/ArchKit.hxx +++ b/dev/ZKA/ArchKit/ArchKit.hxx @@ -106,5 +106,5 @@ inline Kernel::Array<HAL_SYSCALL_RECORD, kKernelMaxSystemCalls> kKerncalls; -EXTERN_C Kernel::HAL::StackFramePtr rt_get_current_context(); +EXTERN_C Kernel::HAL::StackFramePtr mp_get_current_context(); EXTERN_C Kernel::Void mp_do_context_switch(Kernel::HAL::StackFramePtr stack_frame); diff --git a/dev/ZKA/Docs/SPECIFICATION.md b/dev/ZKA/Docs/SPECIFICATION.md index ded0aa12..d39a95d3 100644 --- a/dev/ZKA/Docs/SPECIFICATION.md +++ b/dev/ZKA/Docs/SPECIFICATION.md @@ -5,7 +5,7 @@ =================================== - ABI and Format: PEF/PE32+. -- Kernel architecture: Portable hybrid kernel. +- Kernel architecture: Portable hybrid Kernel. - Language: C++/(Assembly (AMD64, X64000, X86S, ARM64, POWER, RISCV)) =================================== @@ -56,7 +56,7 @@ =================================== - Capable of booting from a network drive. -- Loads a PE file which is the kernel. +- Loads a PE file which is the Kernel. - Sanity checks, based on the number of sections. - Handover compliant. - Does check for a valid partition (useful in the case of recovering) diff --git a/dev/ZKA/Docs/TODO-LIST.md b/dev/ZKA/Docs/TODO-LIST.md index 62cc886c..d0be1adc 100644 --- a/dev/ZKA/Docs/TODO-LIST.md +++ b/dev/ZKA/Docs/TODO-LIST.md @@ -6,8 +6,8 @@ - We need a bootloader for AMD64 [ X ] - Implement Boot Services [ X ] - Design Handover [ X ] - - Load kernel into memory [ X ] - - Fix bug in kernel loader, which causes a 06 #UD. [ X ] + - Load Kernel into memory [ X ] + - Fix bug in Kernel loader, which causes a 06 #UD. [ X ] - Load Kernel [ X ] - Add IDT [ X ] - AHCI driver [ WiP ] @@ -22,4 +22,4 @@ newosldr: Need to boot from EPM partition. [ X ] <br> NewKernel: New Filesystem is done. [ X ] -**Refer to Jira!** +**Refer to Jira please!** diff --git a/dev/ZKA/FirmwareKit/EPM.hxx b/dev/ZKA/FirmwareKit/EPM.hxx index d9f7adf5..e7b14b01 100644 --- a/dev/ZKA/FirmwareKit/EPM.hxx +++ b/dev/ZKA/FirmwareKit/EPM.hxx @@ -114,7 +114,7 @@ enum kEPMMpUx = 0xcf, // Bridge or other embedded OS kEPMLinux = 0x8f, kEPMBSD = 0x9f, - kEPMNewOS = 0x1f, // This kernel. + kEPMNewOS = 0x1f, // This Kernel. }; typedef struct _BOOT_BLOCK_STRUCT BOOT_BLOCK_STRUCT; diff --git a/dev/ZKA/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cxx b/dev/ZKA/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cxx index df2df3b0..99b784be 100644 --- a/dev/ZKA/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cxx +++ b/dev/ZKA/HALKit/AMD64/HalCoreInterruptHandlerAMD64.cxx @@ -5,42 +5,42 @@ ------------------------------------------- */ #include <ArchKit/ArchKit.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <NewKit/String.hxx> /// @brief Handle GPF fault. /// @param rsp EXTERN_C void idt_handle_gpf(Kernel::UIntPtr rsp) { - Kernel::ke_stop(RUNTIME_CHECK_BAD_BEHAVIOR); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Crash(); } /// @brief Handle page fault. /// @param rsp EXTERN_C void idt_handle_pf(Kernel::UIntPtr rsp) { - Kernel::ke_stop(RUNTIME_CHECK_BAD_BEHAVIOR); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Crash(); } /// @brief Handle math fault. /// @param rsp EXTERN_C void idt_handle_math(Kernel::UIntPtr rsp) { - Kernel::ke_stop(RUNTIME_CHECK_BAD_BEHAVIOR); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Crash(); } /// @brief Handle any generic fault. /// @param rsp EXTERN_C void idt_handle_generic(Kernel::UIntPtr rsp) { - Kernel::ke_stop(RUNTIME_CHECK_BAD_BEHAVIOR); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Crash(); } /// @brief Handle #UD fault. /// @param rsp EXTERN_C void idt_handle_ud(Kernel::UIntPtr rsp) { - Kernel::ke_stop(RUNTIME_CHECK_BAD_BEHAVIOR); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Crash(); } /// @brief Enter syscall from assembly. @@ -59,10 +59,10 @@ EXTERN_C Kernel::Void hal_system_call_enter(Kernel::UIntPtr rcx, Kernel::UIntPtr } } -/// @brief Enter kernel call from assembly (DDK only). +/// @brief Enter Kernel call from assembly (DDK only). /// @param stack the stack pushed from assembly routine. /// @return nothing. -EXTERN_C Kernel::Void hal_kernel_call_enter(Kernel::UIntPtr rcx, Kernel::UIntPtr rdx, Kernel::UIntPtr r8, Kernel::UIntPtr r9) +EXTERN_C Kernel::Void hal_Kernel_call_enter(Kernel::UIntPtr rcx, Kernel::UIntPtr rdx, Kernel::UIntPtr r8, Kernel::UIntPtr r9) { if (rcx <= (kSyscalls.Count() - 1)) { diff --git a/dev/ZKA/HALKit/AMD64/HalCoreMultiProcessingAMD64.cxx b/dev/ZKA/HALKit/AMD64/HalCoreMPScheduler.cxx index 88f77ba9..1f233e08 100644 --- a/dev/ZKA/HALKit/AMD64/HalCoreMultiProcessingAMD64.cxx +++ b/dev/ZKA/HALKit/AMD64/HalCoreMPScheduler.cxx @@ -9,7 +9,7 @@ #include <NewKit/KernelCheck.hxx> #include <ArchKit/ArchKit.hxx> #include <KernelKit/Semaphore.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/Timer.hxx> #include <Modules/CoreCG/TextRenderer.hxx> @@ -45,11 +45,11 @@ namespace Kernel::HAL EXTERN_C Void _hal_spin_core(Void); STATIC struct MADT_TABLE* kMADTBlock = nullptr; - STATIC Bool kSMPAware = false; - STATIC Int64 kSMPCount = 0; + STATIC Bool kSMPAware = false; + STATIC Int64 kSMPCount = 0; STATIC Int32 cSMPInterrupt = 0; - STATIC UInt64 cSMPCores[cSMPMax] = {0}; + STATIC UInt64 cSMPCores[cSMPMax] = {0}; STATIC VoidPtr kRawMADT = nullptr; /// @brief Multiple APIC Descriptor Table. @@ -143,51 +143,43 @@ namespace Kernel::HAL ke_stop(RUNTIME_CHECK_FAILED); } - constexpr auto cMaxPCBBlocks = cMaxHWThreads; - struct PROCESS_CONTROL_BLOCK final { - PROCESS_HEADER_BLOCK* f_PHB; - HAL::StackFramePtr f_Frame; - } fBlocks[cMaxPCBBlocks] = {0}; + UserProcessPtr f_Process; + HAL::StackFramePtr f_Frame; + } fBlocks[cMaxHWThreads] = {0}; EXTERN_C HAL::StackFramePtr _hal_leak_current_context(Void) { - return fBlocks[ProcessScheduler::The().CurrentProcess().Leak().ProcessId % cMaxPCBBlocks].f_Frame; + return fBlocks[UserProcessScheduler::The().CurrentProcess().Leak().ProcessId % cMaxHWThreads].f_Frame; } EXTERN_C Void hal_switch_context(HAL::StackFramePtr stack_frame) { - Semaphore semaphore_process; - - const auto cDurationSeconds = Seconds(5); - - HardwareTimer timer(cDurationSeconds); - semaphore_process.LockOrWait(&ProcessScheduler::The().CurrentProcess().Leak(), &timer); - - fBlocks[ProcessScheduler::The().CurrentProcess().Leak().ProcessId % cMaxPCBBlocks].f_PHB = &ProcessScheduler::The().CurrentProcess().Leak(); - fBlocks[ProcessScheduler::The().CurrentProcess().Leak().ProcessId % cMaxPCBBlocks].f_Frame = stack_frame; - - semaphore_process.Unlock(); - ke_stop(RUNTIME_CHECK_FAILED); + if (kSMPAware) + { + fBlocks[UserProcessScheduler::The().CurrentProcess().Leak().ProcessId % cMaxHWThreads].f_Process = &UserProcessScheduler::The().CurrentProcess().Leak(); + fBlocks[UserProcessScheduler::The().CurrentProcess().Leak().ProcessId % cMaxHWThreads].f_Frame = stack_frame; + } } /***********************************************************************************/ /// @brief Fetch and enable cores inside main CPU. /// @param vendor_ptr RSD PTR structure. /***********************************************************************************/ - Void hal_system_get_cores(voidPtr vendor_ptr) + Void mp_get_cores(VoidPtr vendor_ptr) noexcept { + kSMPAware = false; + + if (!vendor_ptr) + return; + auto hw_and_pow_int = PowerFactoryInterface(vendor_ptr); kRawMADT = hw_and_pow_int.Find(kApicSignature).Leak().Leak(); kMADTBlock = reinterpret_cast<MADT_TABLE*>(kRawMADT); - if (!kMADTBlock) - { - kSMPAware = false; - } - else + if (kMADTBlock) { SizeT index = 0; @@ -227,7 +219,7 @@ namespace Kernel::HAL kcout << "newoskrnl: # of cores: " << number(kSMPCount) << endl; // Kernel is now SMP aware. - // That means that the scheduler is now available (on MP kernels) + // That means that the scheduler is now available (on MP Kernels) kSMPAware = true; diff --git a/dev/ZKA/HALKit/AMD64/HalInterruptAPI.asm b/dev/ZKA/HALKit/AMD64/HalInterruptAPI.asm index 5ce9cabc..fb5e9b19 100644 --- a/dev/ZKA/HALKit/AMD64/HalInterruptAPI.asm +++ b/dev/ZKA/HALKit/AMD64/HalInterruptAPI.asm @@ -142,7 +142,7 @@ IntNormal 48 IntNormal 49 [extern hal_system_call_enter] -[extern hal_kernel_call_enter] +[extern hal_Kernel_call_enter] __NEW_INT_50: cli @@ -169,7 +169,7 @@ __NEW_INT_51: push r9 push rax - call hal_kernel_call_enter + call hal_Kernel_call_enter pop rax pop r9 diff --git a/dev/ZKA/HALKit/AMD64/HalKernelMain.cxx b/dev/ZKA/HALKit/AMD64/HalKernelMain.cxx index 4d0cfdb6..e2331ba6 100644 --- a/dev/ZKA/HALKit/AMD64/HalKernelMain.cxx +++ b/dev/ZKA/HALKit/AMD64/HalKernelMain.cxx @@ -11,7 +11,7 @@ #include <KernelKit/Framebuffer.hxx> #include <KernelKit/Heap.hxx> #include <KernelKit/PEFCodeManager.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <NewKit/Json.hxx> #include <Modules/CoreCG/Accessibility.hxx> #include <KernelKit/CodeManager.hxx> @@ -52,14 +52,14 @@ namespace Kernel::HAL { /// @brief Gets the system cores using the MADT. /// @param rsdPtr The 'RSD PTR' data structure. - EXTERN void hal_system_get_cores(Kernel::voidPtr rsdPtr); + EXTERN void mp_get_cores(Kernel::voidPtr rsdPtr); } // namespace Kernel::HAL /* GDT. */ STATIC Kernel::HAL::Detail::NewOSGDT cGdt = { {0, 0, 0, 0x00, 0x00, 0}, // null entry - {0, 0, 0, 0x9a, 0xaf, 0}, // kernel code - {0, 0, 0, 0x92, 0xaf, 0}, // kernel data + {0, 0, 0, 0x9a, 0xaf, 0}, // Kernel code + {0, 0, 0, 0x92, 0xaf, 0}, // Kernel data {0, 0, 0, 0x00, 0x00, 0}, // null entry {0, 0, 0, 0x9a, 0xaf, 0}, // user code {0, 0, 0, 0x92, 0xaf, 0}, // user data @@ -143,7 +143,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept kSyscalls[cTlsInterrupt].fProc = [](Kernel::VoidPtr rdx) -> void { if (tls_check_syscall_impl(rdx) == false) { - Kernel::ProcessScheduler::The().CurrentProcess().Leak().Crash(); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Crash(); } }; @@ -155,7 +155,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept return; // assign the fThe field with the pointer. - rdxInf->fThe = Kernel::ProcessScheduler::The().CurrentProcess().Leak().New(rdxInf->fTheSz); + rdxInf->fThe = Kernel::UserProcessScheduler::The().CurrentProcess().Leak().New(rdxInf->fTheSz); }; kSyscalls[cDeleteInterrupt].fProc = [](Kernel::VoidPtr rdx) -> void { @@ -166,7 +166,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept return; // delete ptr with sz in mind. - Kernel::ProcessScheduler::The().CurrentProcess().Leak().Delete(rdxInf->fThe, rdxInf->fTheSz); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Delete(rdxInf->fThe, rdxInf->fTheSz); }; kSyscalls[cTlsInstallInterrupt].fProc = [](Kernel::VoidPtr rdx) -> void { @@ -186,7 +186,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept return; Kernel::kcout << "newoskrnl: " << rdxEi->fReason << "\r"; - Kernel::ProcessScheduler::The().CurrentProcess().Leak().Exit(rdxEi->fCode); + Kernel::UserProcessScheduler::The().CurrentProcess().Leak().Exit(rdxEi->fCode); }; kSyscalls[cLastExitInterrupt].fProc = [](Kernel::VoidPtr rdx) -> void { @@ -218,7 +218,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept kSyscalls[cRebootInterrupt].fHooked = true; if (kHandoverHeader->f_MultiProcessingEnabled) - Kernel::HAL::hal_system_get_cores(kHandoverHeader->f_HardwareTables.f_VendorPtr); + Kernel::HAL::mp_get_cores(kHandoverHeader->f_HardwareTables.f_VendorPtr); Kernel::kcout << "newoskrnl: Creating filesystem and such.\r"; diff --git a/dev/ZKA/HALKit/AMD64/HalMPContextSwitch.asm b/dev/ZKA/HALKit/AMD64/HalMPContextSwitch.asm index 10114289..6b3ed33a 100644 --- a/dev/ZKA/HALKit/AMD64/HalMPContextSwitch.asm +++ b/dev/ZKA/HALKit/AMD64/HalMPContextSwitch.asm @@ -9,7 +9,7 @@ [bits 64] -[global rt_get_current_context] +[global mp_get_current_context] [global mp_do_context_switch] [global _hal_spin_core] [extern _hal_switch_context] @@ -21,49 +21,13 @@ section .text ;; rcx: Stack Pointer ;; rdx: SMP core address. mp_do_context_switch: - ;; Take care of context switching within AP. - - mov r9, rcx - - mov rbp, [r9 + (8 * 5)] - mov rsp, [r9 + (8 * 6)] - - mov gs, [r9 + (8 * 19)] - mov fs, [r9 + (8 * 20)] - - mov rcx, [r9 + (8 * 3)] - mov rdx, [r9 + (8 * 4)] - mov rbx, [r9 + (8 * 7)] - mov rax, [r9 + (8 * 8)] - movq xmm0, [r9 + (8 * 9)] - movq xmm1, [r9 + (8 * 10)] - - mov r8, [r9 + (8 * 11)] - mov r10, [r9 + (8 * 13)] - mov r11, [r9 + (8 * 14)] - mov r12, [r9 + (8 * 15)] - mov r13, [r9 + (8 * 16)] - mov r14, [r9 + (8 * 17)] - mov r15, [r9 + (8 * 18)] - - fldcw word [r9 + (8 * 21)] - - mov r9, [r9 + (8 * 12)] - + jmp $ ret -;; gets the current stack frame. -rt_get_current_context: - push rax - +;; @brief Gets the current stack frame. +mp_get_current_context: call _hal_leak_current_context - - mov rax, r9 - pop rax - - mov r9, rax - - retfq + ret _hal_spin_core: jmp $ diff --git a/dev/ZKA/HALKit/AMD64/HalPageAlloc.cxx b/dev/ZKA/HALKit/AMD64/HalPageAlloc.cxx index f389dd80..cad215b2 100644 --- a/dev/ZKA/HALKit/AMD64/HalPageAlloc.cxx +++ b/dev/ZKA/HALKit/AMD64/HalPageAlloc.cxx @@ -6,8 +6,8 @@ #include <ArchKit/ArchKit.hxx> -#define cVMHMagic (0xDEEFD00D) -#define cPaddingVMH (512) +#define cVMHMagic (0xDEEFD00D) +#define cPaddingVMH (16) #ifdef __ZKA_AMD64__ #include <HALKit/AMD64/HalPageAlloc.hxx> @@ -43,7 +43,7 @@ namespace Kernel VIRTUAL_MEMORY_HEADER* Next(VIRTUAL_MEMORY_HEADER* current) { if (current->Magic != cVMHMagic) - current->Size = cPaddingVMH; + return current; return current + sizeof(VIRTUAL_MEMORY_HEADER) + current->Size; } @@ -54,7 +54,7 @@ namespace Kernel VIRTUAL_MEMORY_HEADER* Prev(VIRTUAL_MEMORY_HEADER* current) { if (current->Magic != cVMHMagic) - current->Size = cPaddingVMH; + return current; return current - sizeof(VIRTUAL_MEMORY_HEADER) - current->Size; } @@ -84,16 +84,16 @@ namespace Kernel if (vmh_header == reinterpret_cast<VoidPtr>(kBadPtr)) { - ke_stop(RUNTIME_CHECK_POINTER); - return nullptr; + ke_stop(RUNTIME_CHECK_POINTER); + return nullptr; } } - vmh_header->Magic = cVMHMagic; - vmh_header->Present = true; + vmh_header->Magic = cVMHMagic; + vmh_header->Present = true; vmh_header->ReadWrite = rw; - vmh_header->User = user; - vmh_header->Size = size; + vmh_header->User = user; + vmh_header->Size = size; kAllocationInProgress = false; @@ -106,12 +106,12 @@ namespace Kernel /// @return auto hal_alloc_page(Boolean rw, Boolean user, SizeT size) -> VoidPtr { - kcout << "Waiting now..."; + kcout << "PageAlloc: Waiting now..."; // Wait for a ongoing allocation to complete. while (kAllocationInProgress) { - (void)0; + (Void)0; } kcout << ", done waiting, allocating...\r"; @@ -119,7 +119,7 @@ namespace Kernel if (size == 0) ++size; - // allocate new page. + // Now allocate the page. return hal_try_alloc_new_page(rw, user, size); } } // namespace HAL diff --git a/dev/ZKA/HALKit/AMD64/HalSchedulerCore.cxx b/dev/ZKA/HALKit/AMD64/HalSchedulerCore.cxx index 072c09be..cb849150 100644 --- a/dev/ZKA/HALKit/AMD64/HalSchedulerCore.cxx +++ b/dev/ZKA/HALKit/AMD64/HalSchedulerCore.cxx @@ -4,11 +4,11 @@ ------------------------------------------- */ -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> using namespace Kernel; -Void PROCESS_HEADER_BLOCK::SetEntrypoint(UIntPtr& imageStart) noexcept +Void UserProcess::SetEntrypoint(UIntPtr& imageStart) noexcept { if (imageStart == 0) this->Crash(); @@ -19,11 +19,12 @@ Void PROCESS_HEADER_BLOCK::SetEntrypoint(UIntPtr& imageStart) noexcept namespace Kernel { - bool hal_check_stack(HAL::StackFramePtr stackPtr) + bool hal_check_stack(HAL::StackFramePtr stack_ptr) { - if (!stackPtr) + if (!stack_ptr) return false; - if (stackPtr->BP == 0 || stackPtr->SP == 0) + + if (stack_ptr->BP == 0 || stack_ptr->SP == 0) return false; return true; diff --git a/dev/ZKA/HALKit/AMD64/HalTimer.cxx b/dev/ZKA/HALKit/AMD64/HalTimer.cxx index 4bc19801..48e62ee9 100644 --- a/dev/ZKA/HALKit/AMD64/HalTimer.cxx +++ b/dev/ZKA/HALKit/AMD64/HalTimer.cxx @@ -75,8 +75,7 @@ Int32 HardwareTimer::Wait() noexcept }
UInt64 ticks = fWaitFor / ((*(fDigitalTimer) >> 32) & __UINT32_MAX__);
-
- auto prev = *(fDigitalTimer + cHPETCounterRegValue);
+ UInt64 prev = *(fDigitalTimer + cHPETCounterRegValue);
prev += ticks;
diff --git a/dev/ZKA/HALKit/AMD64/HalUtils.asm b/dev/ZKA/HALKit/AMD64/HalUtils.asm index 0e4caf2b..91bf216e 100644 --- a/dev/ZKA/HALKit/AMD64/HalUtils.asm +++ b/dev/ZKA/HALKit/AMD64/HalUtils.asm @@ -18,7 +18,7 @@ section .text rt_install_tib: mov rcx, gs ;; TIB -> Thread Information Block - mov rdx, fs ;; PIB -> Process Information Block + mov rdx, fs ;; PIB -> UserProcess Information Block ret ;; //////////////////////////////////////////////////// ;; diff --git a/dev/ZKA/HALKit/AMD64/Processor.hxx b/dev/ZKA/HALKit/AMD64/Processor.hxx index 2a42a105..b307e0f2 100644 --- a/dev/ZKA/HALKit/AMD64/Processor.hxx +++ b/dev/ZKA/HALKit/AMD64/Processor.hxx @@ -129,8 +129,7 @@ namespace Kernel::HAL using RawRegister = UInt64; - using InterruptId = UShort; /* For each element in the IVT */ - using InterruptTrapKind = UIntPtr(UIntPtr sp); + using InterruptId = UInt16; /* For each element in the IVT */ typedef UIntPtr Reg; @@ -141,7 +140,6 @@ namespace Kernel::HAL Reg A0, A2, BP, SP, A3, A4, A5, A6; Reg R8, R9, R10, R11, R12, R13, R14, R15; Reg Gs, Fs; - Reg ControlWord; }; typedef StackFrame* StackFramePtr; @@ -211,7 +209,7 @@ namespace Kernel::HAL static Void Load(Ref<Register64>& idt); }; - Void hal_system_get_cores(VoidPtr rsdPtr); + Void mp_get_cores(VoidPtr rsdPtr) noexcept; Void hal_send_start_ipi(UInt32 apicId, UInt8 vector, UInt32 targetAddress); Void hal_send_end_ipi(UInt32 apicId, UInt8 vector, UInt32 targetAddress); diff --git a/dev/ZKA/HALKit/ARM64/HalHart.cxx b/dev/ZKA/HALKit/ARM64/HalCoreMPScheduler.cxx index 68672595..20c39684 100644 --- a/dev/ZKA/HALKit/ARM64/HalHart.cxx +++ b/dev/ZKA/HALKit/ARM64/HalCoreMPScheduler.cxx @@ -10,20 +10,20 @@ namespace Kernel { - /// @brief wakes up thread. - /// wakes up thread from hang. - void mp_wakeup_thread(HAL::StackFrame* stack) + /// @brief Wakes up thread. + /// Wakes up thread from the hang state. + Void mp_wakeup_thread(HAL::StackFrame* stack) { mp_do_context_switch(stack); } /// @brief makes the thread sleep on a loop. /// hooks and hangs thread to prevent code from executing. - void mp_hang_thread(HAL::StackFrame* stack) + Void mp_hang_thread(HAL::StackFrame* stack) { - while (true) + while (Yes) { - /* nohing, code is spinning */ + /* Nothing to do, code is spinning */ } } } // namespace Kernel diff --git a/dev/ZKA/HALKit/ARM64/HalKernelMain.cxx b/dev/ZKA/HALKit/ARM64/HalKernelMain.cxx index 31468fa2..645e509a 100644 --- a/dev/ZKA/HALKit/ARM64/HalKernelMain.cxx +++ b/dev/ZKA/HALKit/ARM64/HalKernelMain.cxx @@ -11,7 +11,7 @@ #include <KernelKit/Framebuffer.hxx> #include <KernelKit/Heap.hxx> #include <KernelKit/PEFCodeManager.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/ProcessHeap.hxx> #include <NewKit/Json.hxx> #include <Modules/CoreCG/Accessibility.hxx> @@ -50,7 +50,7 @@ namespace Kernel::HAL { /// @brief Gets the system cores using the MADT. /// @param rsdPtr The 'RSD PTR' data structure. - EXTERN void hal_system_get_cores(Kernel::voidPtr rsdPtr); + EXTERN void mp_get_cores(Kernel::voidPtr rsdPtr); } // namespace Kernel::HAL Kernel::Void hal_real_init(Kernel::Void) noexcept; @@ -113,7 +113,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept kSyscalls[cTlsInterrupt].Leak().Leak()->fProc = [](Kernel::VoidPtr rdx) -> void { if (tls_check_syscall_impl(rdx) == false) { - Kernel::ProcessScheduler::The().Leak().CurrentProcess().Leak().Crash(); + Kernel::UserProcessScheduler::The().Leak().CurrentProcess().Leak().Crash(); } }; @@ -125,7 +125,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept return; // assign the fThe field with the pointer. - rdxInf->fThe = Kernel::ProcessScheduler::The().Leak().CurrentProcess().Leak().New(rdxInf->fTheSz); + rdxInf->fThe = Kernel::UserProcessScheduler::The().Leak().CurrentProcess().Leak().New(rdxInf->fTheSz); }; kSyscalls[cDeleteInterrupt].Leak().Leak()->fProc = [](Kernel::VoidPtr rdx) -> void { @@ -136,7 +136,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept return; // delete ptr with sz in mind. - Kernel::ProcessScheduler::The().Leak().CurrentProcess().Leak().Delete(rdxInf->fThe, rdxInf->fTheSz); + Kernel::UserProcessScheduler::The().Leak().CurrentProcess().Leak().Delete(rdxInf->fThe, rdxInf->fTheSz); }; kSyscalls[cTlsInstallInterrupt].Leak().Leak()->fProc = [](Kernel::VoidPtr rdx) -> void { @@ -156,7 +156,7 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept return; Kernel::kcout << "newoskrnl: " << rdxEi->fReason << "\r"; - Kernel::ProcessScheduler::The().Leak().CurrentProcess().Leak().Exit(rdxEi->fCode); + Kernel::UserProcessScheduler::The().Leak().CurrentProcess().Leak().Exit(rdxEi->fCode); }; kSyscalls[cLastExitInterrupt].Leak().Leak()->fProc = [](Kernel::VoidPtr rdx) -> void { @@ -188,7 +188,9 @@ Kernel::Void hal_real_init(Kernel::Void) noexcept kSyscalls[cRebootInterrupt].Leak().Leak()->fHooked = true; if (kHandoverHeader->f_MultiProcessingEnabled) - Kernel::HAL::hal_system_get_cores(kHandoverHeader->f_HardwareTables.f_VendorPtr); + Kernel::HAL::mp_get_cores(kHandoverHeader->f_HardwareTables.f_VendorPtr); + else + Kernel::HAL::mp_get_cores(nullptr); Kernel::kcout << "newoskrnl: Creating filesystem and such.\r"; diff --git a/dev/ZKA/HALKit/ARM64/HalScheduler.cxx b/dev/ZKA/HALKit/ARM64/HalSchedulerCore.cxx index 072c09be..00eaed27 100644 --- a/dev/ZKA/HALKit/ARM64/HalScheduler.cxx +++ b/dev/ZKA/HALKit/ARM64/HalSchedulerCore.cxx @@ -4,11 +4,11 @@ ------------------------------------------- */ -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> using namespace Kernel; -Void PROCESS_HEADER_BLOCK::SetEntrypoint(UIntPtr& imageStart) noexcept +Void UserProcess::SetEntrypoint(UIntPtr& imageStart) noexcept { if (imageStart == 0) this->Crash(); diff --git a/dev/ZKA/HALKit/AXP/README.TXT b/dev/ZKA/HALKit/AXP/README.TXT index d4ef257d..11e138f9 100644 --- a/dev/ZKA/HALKit/AXP/README.TXT +++ b/dev/ZKA/HALKit/AXP/README.TXT @@ -1 +1 @@ -An toy HAL to test the kernel portability. +An toy HAL to test the Kernel portability. diff --git a/dev/ZKA/HALKit/POWER/ppc-cpu.h b/dev/ZKA/HALKit/POWER/ppc-cpu.h deleted file mode 100644 index 46979e5f..00000000 --- a/dev/ZKA/HALKit/POWER/ppc-cpu.h +++ /dev/null @@ -1,1424 +0,0 @@ -#ifndef __ASM_PPC_PROCESSOR_H -#define __ASM_PPC_PROCESSOR_H - -/// ! @note The Zeta cpu is based on the e500 with 64-bit extensions, much like the 970. - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ __label__ _l; _l: &&_l; }) - -#define AAA_HACK_DISABLE -#ifdef AAA_HACK_DISABLE -/* warning this is just to make the compiler shut up.. It does not - match the definition in ptrace.h. So dont use this code. */ -struct pt_regs -{ - unsigned long nip; -}; - -#else -#include <asm/ptrace.h> -#include <asm/types.h> -#endif - -/* Machine State Register (MSR) Fields */ - -#ifdef CONFIG_PPC64BRIDGE -#define MSR_SF (1 << 63) -#define MSR_ISF (1 << 61) -#endif /* CONFIG_PPC64BRIDGE */ -#define MSR_UCLE (1 << 26) /* User-mode cache lock enable (e500) */ -#define MSR_VEC (1 << 25) /* Enable AltiVec(74xx) */ -#define MSR_SPE (1 << 25) /* Enable SPE(e500) */ -#define MSR_POW (1 << 18) /* Enable Power Management */ -#define MSR_WE (1 << 18) /* Wait State Enable */ -#define MSR_TGPR (1 << 17) /* TLB Update registers in use */ -#define MSR_CE (1 << 17) /* Critical Interrupt Enable */ -#define MSR_ILE (1 << 16) /* Interrupt Little Endian */ -#define MSR_EE (1 << 15) /* External Interrupt Enable */ -#define MSR_PR (1 << 14) /* Problem State / Privilege Level */ -#define MSR_FP (1 << 13) /* Floating Point enable */ -#define MSR_ME (1 << 12) /* Machine Check Enable */ -#define MSR_FE0 (1 << 11) /* Floating Exception mode 0 */ -#define MSR_SE (1 << 10) /* Single Step */ -#define MSR_DWE (1 << 10) /* Debug Wait Enable (4xx) */ -#define MSR_UBLE (1 << 10) /* BTB lock enable (e500) */ -#define MSR_BE (1 << 9) /* Branch Trace */ -#define MSR_DE (1 << 9) /* Debug Exception Enable */ -#define MSR_FE1 (1 << 8) /* Floating Exception mode 1 */ -#define MSR_IP (1 << 6) /* Exception prefix 0x000/0xFFF */ -#define MSR_IR (1 << 5) /* Instruction Relocate */ -#define MSR_IS (1 << 5) /* Book E Instruction space */ -#define MSR_DR (1 << 4) /* Data Relocate */ -#define MSR_DS (1 << 4) /* Book E Data space */ -#define MSR_PE (1 << 3) /* Protection Enable */ -#define MSR_PX (1 << 2) /* Protection Exclusive Mode */ -#define MSR_PMM (1 << 2) /* Performance monitor mark bit (e500) */ -#define MSR_RI (1 << 1) /* Recoverable Exception */ -#define MSR_LE (1 << 0) /* Little Endian */ - -#ifdef CONFIG_APUS_FAST_EXCEPT -#define MSR_ MSR_ME | MSR_IP | MSR_RI -#else -#define MSR_ MSR_ME | MSR_RI -#endif -#ifndef CONFIG_E500 -#define MSR_KERNEL MSR_ | MSR_IR | MSR_DR -#else -#define MSR_KERNEL MSR_ME -#endif - -/* Floating Point Status and Control Register (FPSCR) Fields */ - -#define FPSCR_FX 0x80000000 /* FPU exception summary */ -#define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ -#define FPSCR_VX 0x20000000 /* Invalid operation summary */ -#define FPSCR_OX 0x10000000 /* Overflow exception summary */ -#define FPSCR_UX 0x08000000 /* Underflow exception summary */ -#define FPSCR_ZX 0x04000000 /* Zero-devide exception summary */ -#define FPSCR_XX 0x02000000 /* Inexact exception summary */ -#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */ -#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */ -#define FPSCR_VXIDI 0x00400000 /* Invalid op for Inv / Inv */ -#define FPSCR_VXZDZ 0x00200000 /* Invalid op for Zero / Zero */ -#define FPSCR_VXIMZ 0x00100000 /* Invalid op for Inv * Zero */ -#define FPSCR_VXVC 0x00080000 /* Invalid op for Compare */ -#define FPSCR_FR 0x00040000 /* Fraction rounded */ -#define FPSCR_FI 0x00020000 /* Fraction inexact */ -#define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */ -#define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */ -#define FPSCR_VXSOFT 0x00000400 /* Invalid op for software request */ -#define FPSCR_VXSQRT 0x00000200 /* Invalid op for square root */ -#define FPSCR_VXCVI 0x00000100 /* Invalid op for integer convert */ -#define FPSCR_VE 0x00000080 /* Invalid op exception enable */ -#define FPSCR_OE 0x00000040 /* IEEE overflow exception enable */ -#define FPSCR_UE 0x00000020 /* IEEE underflow exception enable */ -#define FPSCR_ZE 0x00000010 /* IEEE zero divide exception enable */ -#define FPSCR_XE 0x00000008 /* FP inexact exception enable */ -#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */ -#define FPSCR_RN 0x00000003 /* FPU rounding control */ - -/* Special Purpose Registers (SPRNs)*/ - -/* PPC440 Architecture is BOOK-E */ -#ifdef CONFIG_440 -#define CONFIG_BOOKE -#endif - -#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */ -#ifdef CONFIG_BOOKE -#define SPRN_CCR1 0x378 /* Core Configuration Register for 440 only */ -#endif -#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */ -#define SPRN_CTR 0x009 /* Count Register */ -#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ -#ifndef CONFIG_BOOKE -#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */ -#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */ -#else -#define SPRN_DAC1 0x13C /* Book E Data Address Compare 1 */ -#define SPRN_DAC2 0x13D /* Book E Data Address Compare 2 */ -#endif /* CONFIG_BOOKE */ -#define SPRN_DAR 0x013 /* Data Address Register */ -#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */ -#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */ -#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */ -#define SPRN_DBAT1U 0x21A /* Data BAT 1 Upper Register */ -#define SPRN_DBAT2L 0x21D /* Data BAT 2 Lower Register */ -#define SPRN_DBAT2U 0x21C /* Data BAT 2 Upper Register */ -#define SPRN_DBAT3L 0x21F /* Data BAT 3 Lower Register */ -#define SPRN_DBAT3U 0x21E /* Data BAT 3 Upper Register */ -#define SPRN_DBAT4L 0x239 /* Data BAT 4 Lower Register */ -#define SPRN_DBAT4U 0x238 /* Data BAT 4 Upper Register */ -#define SPRN_DBAT5L 0x23B /* Data BAT 5 Lower Register */ -#define SPRN_DBAT5U 0x23A /* Data BAT 5 Upper Register */ -#define SPRN_DBAT6L 0x23D /* Data BAT 6 Lower Register */ -#define SPRN_DBAT6U 0x23C /* Data BAT 6 Upper Register */ -#define SPRN_DBAT7L 0x23F /* Data BAT 7 Lower Register */ -#define SPRN_DBAT7U 0x23E /* Data BAT 7 Lower Register */ -#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */ -#define DBCR_EDM 0x80000000 -#define DBCR_IDM 0x40000000 -#define DBCR_RST(x) (((x) & 0x3) << 28) -#define DBCR_RST_NONE 0 -#define DBCR_RST_CORE 1 -#define DBCR_RST_CHIP 2 -#define DBCR_RST_SYSTEM 3 -#define DBCR_IC 0x08000000 /* Instruction Completion Debug Evnt */ -#define DBCR_BT 0x04000000 /* Branch Taken Debug Event */ -#define DBCR_EDE 0x02000000 /* Exception Debug Event */ -#define DBCR_TDE 0x01000000 /* TRAP Debug Event */ -#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */ -#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */ -#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */ -#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */ -#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */ -#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */ -#define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */ -#define DAC_BYTE 0 -#define DAC_HALF 1 -#define DAC_WORD 2 -#define DAC_QUAD 3 -#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */ -#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */ -#define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */ -#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */ -#define DBCR_SED 0x00000020 /* Second Exception Debug Event */ -#define DBCR_STD 0x00000010 /* Second Trap Debug Event */ -#define DBCR_SIA 0x00000008 /* Second IAC Enable */ -#define DBCR_SDA 0x00000004 /* Second DAC Enable */ -#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */ -#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */ -#ifndef CONFIG_BOOKE -#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */ -#else -#define SPRN_DBCR0 0x134 /* Book E Debug Control Register 0 */ -#endif /* CONFIG_BOOKE */ -#ifndef CONFIG_BOOKE -#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */ -#define SPRN_DBSR 0x3F0 /* Debug Status Register */ -#else -#define SPRN_DBCR1 0x135 /* Book E Debug Control Register 1 */ -#ifdef CONFIG_BOOKE -#define SPRN_DBDR 0x3f3 /* Debug Data Register */ -#endif -#define SPRN_DBSR 0x130 /* Book E Debug Status Register */ -#define DBSR_IC 0x08000000 /* Book E Instruction Completion */ -#define DBSR_TIE 0x01000000 /* Book E Trap Instruction Event */ -#endif /* CONFIG_BOOKE */ -#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */ -#define DCCR_NOCACHE 0 /* Noncacheable */ -#define DCCR_CACHE 1 /* Cacheable */ -#ifndef CONFIG_BOOKE -#define SPRN_DCDBTRL 0x39c /* Data Cache Debug Tag Register Low */ -#define SPRN_DCDBTRH 0x39d /* Data Cache Debug Tag Register High */ -#endif -#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */ -#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */ -#define DCWR_COPY 0 /* Copy-back */ -#define DCWR_WRITE 1 /* Write-through */ -#ifndef CONFIG_BOOKE -#define SPRN_DEAR 0x3D5 /* Data Error Address Register */ -#else -#define SPRN_DEAR 0x03D /* Book E Data Error Address Register */ -#endif /* CONFIG_BOOKE */ -#define SPRN_DEC 0x016 /* Decrement Register */ -#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */ -#ifdef CONFIG_BOOKE -#define SPRN_DNV0 0x390 /* Data Cache Normal Victim 0 */ -#define SPRN_DNV1 0x391 /* Data Cache Normal Victim 1 */ -#define SPRN_DNV2 0x392 /* Data Cache Normal Victim 2 */ -#define SPRN_DNV3 0x393 /* Data Cache Normal Victim 3 */ -#endif -#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ -#ifdef CONFIG_BOOKE -#define SPRN_DTV0 0x394 /* Data Cache Transient Victim 0 */ -#define SPRN_DTV1 0x395 /* Data Cache Transient Victim 1 */ -#define SPRN_DTV2 0x396 /* Data Cache Transient Victim 2 */ -#define SPRN_DTV3 0x397 /* Data Cache Transient Victim 3 */ -#define SPRN_DVLIM 0x398 /* Data Cache Victim Limit */ -#endif -#define SPRN_EAR 0x11A /* External Address Register */ -#ifndef CONFIG_BOOKE -#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */ -#else -#define SPRN_ESR 0x03E /* Book E Exception Syndrome Register */ -#endif /* CONFIG_BOOKE */ -#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */ -#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */ -#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */ -#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */ -#define ESR_PIL 0x08000000 /* Program Exception - Illegal */ -#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */ -#define ESR_PTR 0x02000000 /* Program Exception - Trap */ -#define ESR_DST 0x00800000 /* Storage Exception - Data miss */ -#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */ -#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */ -#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */ -#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */ -#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */ - -#define HID0_ICE_SHIFT 15 -#define HID0_DCE_SHIFT 14 -#define HID0_DLOCK_SHIFT 12 - -#define HID0_EMCP (1 << 31) /* Enable Machine Check pin */ -#define HID0_EBA (1 << 29) /* Enable Bus Address Parity */ -#define HID0_EBD (1 << 28) /* Enable Bus Data Parity */ -#define HID0_SBCLK (1 << 27) -#define HID0_EICE (1 << 26) -#define HID0_ECLK (1 << 25) -#define HID0_PAR (1 << 24) -#define HID0_DOZE (1 << 23) -#define HID0_NAP (1 << 22) -#define HID0_SLEEP (1 << 21) -#define HID0_DPM (1 << 20) -#define HID0_ICE (1 << HID0_ICE_SHIFT) /* Instruction Cache Enable */ -#define HID0_DCE (1 << HID0_DCE_SHIFT) /* Data Cache Enable */ -#define HID0_TBEN (1 << 14) /* Time Base Enable */ -#define HID0_ILOCK (1 << 13) /* Instruction Cache Lock */ -#define HID0_DLOCK (1 << HID0_DLOCK_SHIFT) /* Data Cache Lock */ -#define HID0_ICFI (1 << 11) /* Instr. Cache Flash Invalidate */ -#define HID0_DCFI (1 << 10) /* Data Cache Flash Invalidate */ -#define HID0_DCI HID0_DCFI -#define HID0_SPD (1 << 9) /* Speculative disable */ -#define HID0_ENMAS7 (1 << 7) /* Enable MAS7 Update for 36-bit phys */ -#define HID0_SGE (1 << 7) /* Store Gathering Enable */ -#define HID0_SIED HID_SGE /* Serial Instr. Execution [Disable] */ -#define HID0_DCFA (1 << 6) /* Data Cache Flush Assist */ -#define HID0_BTIC (1 << 5) /* Branch Target Instruction Cache Enable */ -#define HID0_ABE (1 << 3) /* Address Broadcast Enable */ -#define HID0_BHTE (1 << 2) /* Branch History Table Enable */ -#define HID0_BTCD (1 << 1) /* Branch target cache disable */ -#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ -#define HID1_RFXE (1 << 17) /* Read Fault Exception Enable */ -#define HID1_ASTME (1 << 13) /* Address bus streaming mode */ -#define HID1_ABE (1 << 12) /* Address broadcast enable */ -#define HID1_MBDD (1 << 6) /* optimized sync instruction */ -#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ -#ifndef CONFIG_BOOKE -#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */ -#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */ -#else -#define SPRN_IAC1 0x138 /* Book E Instruction Address Compare 1 */ -#define SPRN_IAC2 0x139 /* Book E Instruction Address Compare 2 */ -#endif /* CONFIG_BOOKE */ -#define SPRN_IBAT0L 0x211 /* Instruction BAT 0 Lower Register */ -#define SPRN_IBAT0U 0x210 /* Instruction BAT 0 Upper Register */ -#define SPRN_IBAT1L 0x213 /* Instruction BAT 1 Lower Register */ -#define SPRN_IBAT1U 0x212 /* Instruction BAT 1 Upper Register */ -#define SPRN_IBAT2L 0x215 /* Instruction BAT 2 Lower Register */ -#define SPRN_IBAT2U 0x214 /* Instruction BAT 2 Upper Register */ -#define SPRN_IBAT3L 0x217 /* Instruction BAT 3 Lower Register */ -#define SPRN_IBAT3U 0x216 /* Instruction BAT 3 Upper Register */ -#define SPRN_IBAT4L 0x231 /* Instruction BAT 4 Lower Register */ -#define SPRN_IBAT4U 0x230 /* Instruction BAT 4 Upper Register */ -#define SPRN_IBAT5L 0x233 /* Instruction BAT 5 Lower Register */ -#define SPRN_IBAT5U 0x232 /* Instruction BAT 5 Upper Register */ -#define SPRN_IBAT6L 0x235 /* Instruction BAT 6 Lower Register */ -#define SPRN_IBAT6U 0x234 /* Instruction BAT 6 Upper Register */ -#define SPRN_IBAT7L 0x237 /* Instruction BAT 7 Lower Register */ -#define SPRN_IBAT7U 0x236 /* Instruction BAT 7 Upper Register */ -#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */ -#define ICCR_NOCACHE 0 /* Noncacheable */ -#define ICCR_CACHE 1 /* Cacheable */ -#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */ -#ifdef CONFIG_BOOKE -#define SPRN_ICDBTRL 0x39e /* instruction cache debug tag register low */ -#define SPRN_ICDBTRH 0x39f /* instruction cache debug tag register high */ -#endif -#define SPRN_ICMP 0x3D5 /* Instruction TLB Compare Register */ -#define SPRN_ICTC 0x3FB /* Instruction Cache Throttling Control Reg */ -#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */ -#define SPRN_IMMR 0x27E /* Internal Memory Map Register */ -#ifdef CONFIG_BOOKE -#define SPRN_INV0 0x370 /* Instruction Cache Normal Victim 0 */ -#define SPRN_INV1 0x371 /* Instruction Cache Normal Victim 1 */ -#define SPRN_INV2 0x372 /* Instruction Cache Normal Victim 2 */ -#define SPRN_INV3 0x373 /* Instruction Cache Normal Victim 3 */ -#define SPRN_ITV0 0x374 /* Instruction Cache Transient Victim 0 */ -#define SPRN_ITV1 0x375 /* Instruction Cache Transient Victim 1 */ -#define SPRN_ITV2 0x376 /* Instruction Cache Transient Victim 2 */ -#define SPRN_ITV3 0x377 /* Instruction Cache Transient Victim 3 */ -#define SPRN_IVLIM 0x399 /* Instruction Cache Victim Limit */ -#endif -#define SPRN_LDSTCR 0x3F8 /* Load/Store Control Register */ -#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */ -#define SPRN_LR 0x008 /* Link Register */ -#define SPRN_MBAR 0x137 /* System memory base address */ -#define SPRN_MMCR0 0x3B8 /* Monitor Mode Control Register 0 */ -#define SPRN_MMCR1 0x3BC /* Monitor Mode Control Register 1 */ -#ifdef CONFIG_BOOKE -#define SPRN_MMUCR 0x3b2 /* MMU Control Register */ -#endif -#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */ -#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */ -#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */ -#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */ -#ifndef CONFIG_BOOKE -#define SPRN_PID 0x3B1 /* Process ID */ -#define SPRN_PIR 0x3FF /* Processor Identification Register */ -#else -#define SPRN_PID 0x030 /* Book E Process ID */ -#define SPRN_PIR 0x11E /* Book E Processor Identification Register */ -#endif /* CONFIG_BOOKE */ -#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ -#define SPRN_PMC1 0x3B9 /* Performance Counter Register 1 */ -#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */ -#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */ -#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */ -#define SPRN_PVR 0x11F /* Processor Version Register */ -#define SPRN_RPA 0x3D6 /* Required Physical Address Register */ -#ifdef CONFIG_BOOKE -#define SPRN_RSTCFG 0x39b /* Reset Configuration */ -#endif -#define SPRN_SDA 0x3BF /* Sampled Data Address Register */ -#define SPRN_SDR1 0x019 /* MMU Hash Base Register */ -#define SPRN_SGR 0x3B9 /* Storage Guarded Register */ -#define SGR_NORMAL 0 -#define SGR_GUARDED 1 -#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ -#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ -#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ -#define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */ -#define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */ -#define SPRN_SPRG4 0x114 /* Special Purpose Register General 4 */ -#define SPRN_SPRG5 0x115 /* Special Purpose Register General 5 */ -#define SPRN_SPRG6 0x116 /* Special Purpose Register General 6 */ -#define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */ -#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */ -#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */ -#define SPRN_SRR2 0x3DE /* Save/Restore Register 2 */ -#define SPRN_SRR3 0x3DF /* Save/Restore Register 3 */ - -#ifdef CONFIG_BOOKE -#define SPRN_SVR 0x3FF /* System Version Register */ -#else -#define SPRN_SVR 0x11E /* System Version Register */ -#endif -#define SPRN_TBHI 0x3DC /* Time Base High */ -#define SPRN_TBHU 0x3CC /* Time Base High User-mode */ -#define SPRN_TBLO 0x3DD /* Time Base Low */ -#define SPRN_TBLU 0x3CD /* Time Base Low User-mode */ -#define SPRN_TBRL 0x10C /* Time Base Read Lower Register */ -#define SPRN_TBRU 0x10D /* Time Base Read Upper Register */ -#define SPRN_TBWL 0x11C /* Time Base Write Lower Register */ -#define SPRN_TBWU 0x11D /* Time Base Write Upper Register */ -#ifndef CONFIG_BOOKE -#define SPRN_TCR 0x3DA /* Timer Control Register */ -#else -#define SPRN_TCR 0x154 /* Book E Timer Control Register */ -#endif /* CONFIG_BOOKE */ -#ifdef CONFIG_E500MC -#define TCR_WP(x) (((64 - x) & 0x3) << 30) | \ - (((64 - x) & 0x3c) << 15) /* WDT Period 2^x clocks*/ -#else -#define TCR_WP(x) (((x) & 0x3) << 30) /* WDT Period */ -#define WP_2_17 0 /* 2^17 clocks */ -#define WP_2_21 1 /* 2^21 clocks */ -#define WP_2_25 2 /* 2^25 clocks */ -#define WP_2_29 3 /* 2^29 clocks */ -#endif /* CONFIG_E500 */ -#define TCR_WRC(x) (((x) & 0x3) << 28) /* WDT Reset Control */ -#define WRC_NONE 0 /* No reset will occur */ -#define WRC_CORE 1 /* Core reset will occur */ -#define WRC_CHIP 2 /* Chip reset will occur */ -#define WRC_SYSTEM 3 /* System reset will occur */ -#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */ -#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */ -#define TCR_FP(x) (((x) & 0x3) << 24) /* FIT Period */ -#define FP_2_9 0 /* 2^9 clocks */ -#define FP_2_13 1 /* 2^13 clocks */ -#define FP_2_17 2 /* 2^17 clocks */ -#define FP_2_21 3 /* 2^21 clocks */ -#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */ -#define TCR_ARE 0x00400000 /* Auto Reload Enable */ -#define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */ -#define THRM1_TIN (1 << 0) -#define THRM1_TIV (1 << 1) -#define THRM1_THRES (0x7f << 2) -#define THRM1_TID (1 << 29) -#define THRM1_TIE (1 << 30) -#define THRM1_V (1 << 31) -#define SPRN_THRM2 0x3FD /* Thermal Management Register 2 */ -#define SPRN_THRM3 0x3FE /* Thermal Management Register 3 */ -#define THRM3_E (1 << 31) -#define SPRN_TLBMISS 0x3D4 /* 980 7450 TLB Miss Register */ -#ifndef CONFIG_BOOKE -#define SPRN_TSR 0x3D8 /* Timer Status Register */ -#else -#define SPRN_TSR 0x150 /* Book E Timer Status Register */ -#endif /* CONFIG_BOOKE */ -#define TSR_ENW 0x80000000 /* Enable Next Watchdog */ -#define TSR_WIS 0x40000000 /* WDT Interrupt Status */ -#define TSR_WRS(x) (((x) & 0x3) << 28) /* WDT Reset Status */ -#define WRS_NONE 0 /* No WDT reset occurred */ -#define WRS_CORE 1 /* WDT forced core reset */ -#define WRS_CHIP 2 /* WDT forced chip reset */ -#define WRS_SYSTEM 3 /* WDT forced system reset */ -#define TSR_PIS 0x08000000 /* PIT Interrupt Status */ -#define TSR_FIS 0x04000000 /* FIT Interrupt Status */ -#define SPRN_UMMCR0 0x3A8 /* User Monitor Mode Control Register 0 */ -#define SPRN_UMMCR1 0x3AC /* User Monitor Mode Control Register 0 */ -#define SPRN_UPMC1 0x3A9 /* User Performance Counter Register 1 */ -#define SPRN_UPMC2 0x3AA /* User Performance Counter Register 2 */ -#define SPRN_UPMC3 0x3AD /* User Performance Counter Register 3 */ -#define SPRN_UPMC4 0x3AE /* User Performance Counter Register 4 */ -#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */ -#define SPRN_XER 0x001 /* Fixed Point Exception Register */ -#define SPRN_ZPR 0x3B0 /* Zone Protection Register */ - -/* Book E definitions */ -#define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */ -#define SPRN_CSRR0 0x03A /* Critical SRR0 */ -#define SPRN_CSRR1 0x03B /* Critical SRR0 */ -#define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */ -#define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */ -#define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */ -#define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */ -#define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */ -#define SPRN_SPRG7R 0x107 /* Special Purpose Register General 7 Read */ -#define SPRN_SPRG4W 0x114 /* Special Purpose Register General 4 Write */ -#define SPRN_SPRG5W 0x115 /* Special Purpose Register General 5 Write */ -#define SPRN_SPRG6W 0x116 /* Special Purpose Register General 6 Write */ -#define SPRN_SPRG7W 0x117 /* Special Purpose Register General 7 Write */ -#define SPRN_DBCR2 0x136 /* Debug Control Register 2 */ -#define SPRN_IAC3 0x13A /* Instruction Address Compare 3 */ -#define SPRN_IAC4 0x13B /* Instruction Address Compare 4 */ -#define SPRN_DVC1 0x13E /* Data Value Compare Register 1 */ -#define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */ -#define SPRN_IVOR0 0x190 /* Interrupt Vector Offset Register 0 */ -#define SPRN_IVOR1 0x191 /* Interrupt Vector Offset Register 1 */ -#define SPRN_IVOR2 0x192 /* Interrupt Vector Offset Register 2 */ -#define SPRN_IVOR3 0x193 /* Interrupt Vector Offset Register 3 */ -#define SPRN_IVOR4 0x194 /* Interrupt Vector Offset Register 4 */ -#define SPRN_IVOR5 0x195 /* Interrupt Vector Offset Register 5 */ -#define SPRN_IVOR6 0x196 /* Interrupt Vector Offset Register 6 */ -#define SPRN_IVOR7 0x197 /* Interrupt Vector Offset Register 7 */ -#define SPRN_IVOR8 0x198 /* Interrupt Vector Offset Register 8 */ -#define SPRN_IVOR9 0x199 /* Interrupt Vector Offset Register 9 */ -#define SPRN_IVOR10 0x19a /* Interrupt Vector Offset Register 10 */ -#define SPRN_IVOR11 0x19b /* Interrupt Vector Offset Register 11 */ -#define SPRN_IVOR12 0x19c /* Interrupt Vector Offset Register 12 */ -#define SPRN_IVOR13 0x19d /* Interrupt Vector Offset Register 13 */ -#define SPRN_IVOR14 0x19e /* Interrupt Vector Offset Register 14 */ -#define SPRN_IVOR15 0x19f /* Interrupt Vector Offset Register 15 */ -#define SPRN_IVOR38 0x1b0 /* Interrupt Vector Offset Register 38 */ -#define SPRN_IVOR39 0x1b1 /* Interrupt Vector Offset Register 39 */ -#define SPRN_IVOR40 0x1b2 /* Interrupt Vector Offset Register 40 */ -#define SPRN_IVOR41 0x1b3 /* Interrupt Vector Offset Register 41 */ -#define SPRN_GIVOR2 0x1b8 /* Guest Interrupt Vector Offset Register 2 */ -#define SPRN_GIVOR3 0x1b9 /* Guest Interrupt Vector Offset Register 3 */ -#define SPRN_GIVOR4 0x1ba /* Guest Interrupt Vector Offset Register 4 */ -#define SPRN_GIVOR8 0x1bb /* Guest Interrupt Vector Offset Register 8 */ -#define SPRN_GIVOR13 0x1bc /* Guest Interrupt Vector Offset Register 13 */ -#define SPRN_GIVOR14 0x1bd /* Guest Interrupt Vector Offset Register 14 */ - -/* e500 definitions */ -#define SPRN_L1CFG0 0x203 /* L1 Cache Configuration Register 0 */ -#define SPRN_L1CFG1 0x204 /* L1 Cache Configuration Register 1 */ -#define SPRN_L2CFG0 0x207 /* L2 Cache Configuration Register 0 */ -#define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */ -#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ -#define L1CSR0_CUL 0x00000400 /* (D-)Cache Unable to Lock */ -#define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */ -#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ -#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ -#define SPRN_L1CSR1 0x3f3 /* L1 Instruction Cache Control and Status Register 1 */ -#define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ -#define L1CSR1_ICUL 0x00000400 /* I-Cache Unable to Lock */ -#define L1CSR1_ICLFR 0x00000100 /* I-Cache Lock Flash Reset */ -#define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */ -#define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ -#define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */ -#define L1CSR2_DCWS 0x40000000 /* Data Cache Write Shadow */ -#define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */ -#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ -#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ -#define L2CSR0_L2WP 0x1c000000 /* L2 I/D Way Partioning */ -#define L2CSR0_L2CM 0x03000000 /* L2 Cache Coherency Mode */ -#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */ -#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */ -#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */ -#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */ - -/* e6500 */ -#define L2CSR0_L2REP_SPLRUAGE 0x00000000 /* L2REP Streaming PLRU with Aging */ -#define L2CSR0_L2REP_FIFO 0x00001000 /* L2REP FIFO */ -#define L2CSR0_L2REP_SPLRU 0x00002000 /* L2REP Streaming PLRU */ -#define L2CSR0_L2REP_PLRU 0x00003000 /* L2REP PLRU */ - -#define L2CSR0_L2REP_MODE L2CSR0_L2REP_SPLRUAGE - -#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ -#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */ -#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ -#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ -#define SPRN_L2CSR1 0x3fa /* L2 Data Cache Control and Status Register 1 */ - -#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */ -#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */ -#define TLBnCFG_NENTRY_MASK 0x00000fff -#define SPRN_TLB0PS 0x158 /* TLB 0 Page Size Register */ -#define SPRN_TLB1PS 0x159 /* TLB 1 Page Size Register */ -#define SPRN_MMUCSR0 0x3f4 /* MMU control and status register 0 */ -#define SPRN_MMUCFG 0x3F7 /* MMU Configuration Register */ -#define MMUCFG_MAVN 0x00000003 /* MMU Architecture Version Number */ -#define MMUCFG_MAVN_V1 0x00000000 /* v1.0 */ -#define MMUCFG_MAVN_V2 0x00000001 /* v2.0 */ -#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */ -#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */ -#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */ -#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */ -#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */ -#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */ -#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */ -#define SPRN_MAS7 0x3B0 /* MMU Assist Register 7 */ -#define SPRN_MAS8 0x155 /* MMU Assist Register 8 */ - -#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */ -#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */ -#define SPRN_IVOR34 0x212 /* Interrupt Vector Offset Register 34 */ -#define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */ -#define SPRN_IVOR36 0x214 /* Interrupt Vector Offset Register 36 */ -#define SPRN_IVOR37 0x215 /* Interrupt Vector Offset Register 37 */ -#define SPRN_SPEFSCR 0x200 /* SPE & Embedded FP Status & Control */ - -#define SPRN_MCSRR0 0x23a /* Machine Check Save and Restore Register 0 */ -#define SPRN_MCSRR1 0x23b /* Machine Check Save and Restore Register 1 */ -#define SPRN_BUCSR 0x3f5 /* Branch Control and Status Register */ -#define BUCSR_STAC_EN 0x01000000 /* Segment target addr cache enable */ -#define BUCSR_LS_EN 0x00400000 /* Link stack enable */ -#define BUCSR_BBFI 0x00000200 /* Branch buffer flash invalidate */ -#define BUCSR_BPEN 0x00000001 /* Branch prediction enable */ -#define BUCSR_ENABLE (BUCSR_STAC_EN | BUCSR_LS_EN | BUCSR_BBFI | BUCSR_BPEN) -#define SPRN_BBEAR 0x201 /* Branch Buffer Entry Address Register */ -#define SPRN_BBTAR 0x202 /* Branch Buffer Target Address Register */ -#define SPRN_PID1 0x279 /* Process ID Register 1 */ -#define SPRN_PID2 0x27a /* Process ID Register 2 */ -#define SPRN_MCSR 0x23c /* Machine Check Syndrome register */ -#define SPRN_MCAR 0x23d /* Machine Check Address register */ -#define MCSR_MCS 0x80000000 /* Machine Check Summary */ -#define MCSR_IB 0x40000000 /* Instruction PLB Error */ -#if defined(CONFIG_440) -#define MCSR_DRB 0x20000000 /* Data Read PLB Error */ -#define MCSR_DWB 0x10000000 /* Data Write PLB Error */ -#else -#define MCSR_DB 0x20000000 /* Data PLB Error */ -#endif /* defined(CONFIG_440) */ -#define MCSR_TLBP 0x08000000 /* TLB Parity Error */ -#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */ -#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */ -#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */ -#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */ -#define ESR_ST 0x00800000 /* Store Operation */ - -#if defined(CONFIG_MPC86xx) -#define SPRN_MSSCR0 0x3f6 -#define SPRN_MSSSR0 0x3f7 -#endif - -#define SPRN_HDBCR0 0x3d0 -#define SPRN_HDBCR1 0x3d1 -#define SPRN_HDBCR2 0x3d2 -#define SPRN_HDBCR3 0x3d3 -#define SPRN_HDBCR4 0x3d4 -#define SPRN_HDBCR5 0x3d5 -#define SPRN_HDBCR6 0x3d6 -#define SPRN_HDBCR7 0x277 -#define SPRN_HDBCR8 0x278 - -/* Short-hand versions for a number of the above SPRNs */ - -#define CTR SPRN_CTR /* Counter Register */ -#define DAR SPRN_DAR /* Data Address Register */ -#define DABR SPRN_DABR /* Data Address Breakpoint Register */ -#define DAC1 SPRN_DAC1 /* Data Address Register 1 */ -#define DAC2 SPRN_DAC2 /* Data Address Register 2 */ -#define DBAT0L SPRN_DBAT0L /* Data BAT 0 Lower Register */ -#define DBAT0U SPRN_DBAT0U /* Data BAT 0 Upper Register */ -#define DBAT1L SPRN_DBAT1L /* Data BAT 1 Lower Register */ -#define DBAT1U SPRN_DBAT1U /* Data BAT 1 Upper Register */ -#define DBAT2L SPRN_DBAT2L /* Data BAT 2 Lower Register */ -#define DBAT2U SPRN_DBAT2U /* Data BAT 2 Upper Register */ -#define DBAT3L SPRN_DBAT3L /* Data BAT 3 Lower Register */ -#define DBAT3U SPRN_DBAT3U /* Data BAT 3 Upper Register */ -#define DBAT4L SPRN_DBAT4L /* Data BAT 4 Lower Register */ -#define DBAT4U SPRN_DBAT4U /* Data BAT 4 Upper Register */ -#define DBAT5L SPRN_DBAT5L /* Data BAT 5 Lower Register */ -#define DBAT5U SPRN_DBAT5U /* Data BAT 5 Upper Register */ -#define DBAT6L SPRN_DBAT6L /* Data BAT 6 Lower Register */ -#define DBAT6U SPRN_DBAT6U /* Data BAT 6 Upper Register */ -#define DBAT7L SPRN_DBAT7L /* Data BAT 7 Lower Register */ -#define DBAT7U SPRN_DBAT7U /* Data BAT 7 Upper Register */ -#define DBCR0 SPRN_DBCR0 /* Debug Control Register 0 */ -#define DBCR1 SPRN_DBCR1 /* Debug Control Register 1 */ -#define DBSR SPRN_DBSR /* Debug Status Register */ -#define DCMP SPRN_DCMP /* Data TLB Compare Register */ -#define DEC SPRN_DEC /* Decrement Register */ -#define DMISS SPRN_DMISS /* Data TLB Miss Register */ -#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */ -#define EAR SPRN_EAR /* External Address Register */ -#define ESR SPRN_ESR /* Exception Syndrome Register */ -#define HASH1 SPRN_HASH1 /* Primary Hash Address Register */ -#define HASH2 SPRN_HASH2 /* Secondary Hash Address Register */ -#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */ -#define HID1 SPRN_HID1 /* Hardware Implementation Register 1 */ -#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */ -#define IAC1 SPRN_IAC1 /* Instruction Address Register 1 */ -#define IAC2 SPRN_IAC2 /* Instruction Address Register 2 */ -#define IBAT0L SPRN_IBAT0L /* Instruction BAT 0 Lower Register */ -#define IBAT0U SPRN_IBAT0U /* Instruction BAT 0 Upper Register */ -#define IBAT1L SPRN_IBAT1L /* Instruction BAT 1 Lower Register */ -#define IBAT1U SPRN_IBAT1U /* Instruction BAT 1 Upper Register */ -#define IBAT2L SPRN_IBAT2L /* Instruction BAT 2 Lower Register */ -#define IBAT2U SPRN_IBAT2U /* Instruction BAT 2 Upper Register */ -#define IBAT3L SPRN_IBAT3L /* Instruction BAT 3 Lower Register */ -#define IBAT3U SPRN_IBAT3U /* Instruction BAT 3 Upper Register */ -#define IBAT4L SPRN_IBAT4L /* Instruction BAT 4 Lower Register */ -#define IBAT4U SPRN_IBAT4U /* Instruction BAT 4 Upper Register */ -#define IBAT5L SPRN_IBAT5L /* Instruction BAT 5 Lower Register */ -#define IBAT5U SPRN_IBAT5U /* Instruction BAT 5 Upper Register */ -#define IBAT6L SPRN_IBAT6L /* Instruction BAT 6 Lower Register */ -#define IBAT6U SPRN_IBAT6U /* Instruction BAT 6 Upper Register */ -#define IBAT7L SPRN_IBAT7L /* Instruction BAT 7 Lower Register */ -#define IBAT7U SPRN_IBAT7U /* Instruction BAT 7 Lower Register */ -#define ICMP SPRN_ICMP /* Instruction TLB Compare Register */ -#define IMISS SPRN_IMISS /* Instruction TLB Miss Register */ -#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */ -#define LDSTCR SPRN_LDSTCR /* Load/Store Control Register */ -#define L2CR SPRN_L2CR /* PPC 750 L2 control register */ -#define LR SPRN_LR -#define MBAR SPRN_MBAR /* System memory base address */ -#if defined(CONFIG_MPC86xx) -#define MSSCR0 SPRN_MSSCR0 -#endif -#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) -#define PIR SPRN_PIR -#endif -#define SVR SPRN_SVR /* System-On-Chip Version Register */ -#define PVR SPRN_PVR /* Processor Version */ -#define RPA SPRN_RPA /* Required Physical Address Register */ -#define SDR1 SPRN_SDR1 /* MMU hash base register */ -#define SPR0 SPRN_SPRG0 /* Supervisor Kernel Registers */ -#define SPR1 SPRN_SPRG1 -#define SPR2 SPRN_SPRG2 -#define SPR3 SPRN_SPRG3 -#define SPRG0 SPRN_SPRG0 -#define SPRG1 SPRN_SPRG1 -#define SPRG2 SPRN_SPRG2 -#define SPRG3 SPRN_SPRG3 -#define SPRG4 SPRN_SPRG4 -#define SPRG5 SPRN_SPRG5 -#define SPRG6 SPRN_SPRG6 -#define SPRG7 SPRN_SPRG7 -#define SRR0 SPRN_SRR0 /* Save and Restore Register 0 */ -#define SRR1 SPRN_SRR1 /* Save and Restore Register 1 */ -#define SRR2 SPRN_SRR2 /* Save and Restore Register 2 */ -#define SRR3 SPRN_SRR3 /* Save and Restore Register 3 */ -#define SVR SPRN_SVR /* System Version Register */ -#define TBRL SPRN_TBRL /* Time Base Read Lower Register */ -#define TBRU SPRN_TBRU /* Time Base Read Upper Register */ -#define TBWL SPRN_TBWL /* Time Base Write Lower Register */ -#define TBWU SPRN_TBWU /* Time Base Write Upper Register */ -#define TCR SPRN_TCR /* Timer Control Register */ -#define TSR SPRN_TSR /* Timer Status Register */ -#define ICTC 1019 -#define THRM1 SPRN_THRM1 /* Thermal Management Register 1 */ -#define THRM2 SPRN_THRM2 /* Thermal Management Register 2 */ -#define THRM3 SPRN_THRM3 /* Thermal Management Register 3 */ -#define XER SPRN_XER - -#define DECAR SPRN_DECAR -#define CSRR0 SPRN_CSRR0 -#define CSRR1 SPRN_CSRR1 -#define IVPR SPRN_IVPR -#define USPRG0 SPRN_USPRG -#define SPRG4R SPRN_SPRG4R -#define SPRG5R SPRN_SPRG5R -#define SPRG6R SPRN_SPRG6R -#define SPRG7R SPRN_SPRG7R -#define SPRG4W SPRN_SPRG4W -#define SPRG5W SPRN_SPRG5W -#define SPRG6W SPRN_SPRG6W -#define SPRG7W SPRN_SPRG7W -#define DEAR SPRN_DEAR -#define DBCR2 SPRN_DBCR2 -#define IAC3 SPRN_IAC3 -#define IAC4 SPRN_IAC4 -#define DVC1 SPRN_DVC1 -#define DVC2 SPRN_DVC2 -#define IVOR0 SPRN_IVOR0 -#define IVOR1 SPRN_IVOR1 -#define IVOR2 SPRN_IVOR2 -#define IVOR3 SPRN_IVOR3 -#define IVOR4 SPRN_IVOR4 -#define IVOR5 SPRN_IVOR5 -#define IVOR6 SPRN_IVOR6 -#define IVOR7 SPRN_IVOR7 -#define IVOR8 SPRN_IVOR8 -#define IVOR9 SPRN_IVOR9 -#define IVOR10 SPRN_IVOR10 -#define IVOR11 SPRN_IVOR11 -#define IVOR12 SPRN_IVOR12 -#define IVOR13 SPRN_IVOR13 -#define IVOR14 SPRN_IVOR14 -#define IVOR15 SPRN_IVOR15 -#define IVOR32 SPRN_IVOR32 -#define IVOR33 SPRN_IVOR33 -#define IVOR34 SPRN_IVOR34 -#define IVOR35 SPRN_IVOR35 -#define MCSRR0 SPRN_MCSRR0 -#define MCSRR1 SPRN_MCSRR1 -#define L1CSR0 SPRN_L1CSR0 -#define L1CSR1 SPRN_L1CSR1 -#define L1CSR2 SPRN_L1CSR2 -#define L1CFG0 SPRN_L1CFG0 -#define L1CFG1 SPRN_L1CFG1 -#define L2CFG0 SPRN_L2CFG0 -#define L2CSR0 SPRN_L2CSR0 -#define L2CSR1 SPRN_L2CSR1 -#define MCSR SPRN_MCSR -#define MMUCSR0 SPRN_MMUCSR0 -#define BUCSR SPRN_BUCSR -#define PID0 SPRN_PID -#define PID1 SPRN_PID1 -#define PID2 SPRN_PID2 -#define MAS0 SPRN_MAS0 -#define MAS1 SPRN_MAS1 -#define MAS2 SPRN_MAS2 -#define MAS3 SPRN_MAS3 -#define MAS4 SPRN_MAS4 -#define MAS5 SPRN_MAS5 -#define MAS6 SPRN_MAS6 -#define MAS7 SPRN_MAS7 -#define MAS8 SPRN_MAS8 - -#if defined(CONFIG_4xx) || defined(CONFIG_44x) || defined(CONFIG_MPC85xx) -#define DAR_DEAR DEAR -#else -#define DAR_DEAR DAR -#endif - -/* Device Control Registers */ - -#define DCRN_BEAR 0x090 /* Bus Error Address Register */ -#define DCRN_BESR 0x091 /* Bus Error Syndrome Register */ -#define BESR_DSES 0x80000000 /* Data-Side Error Status */ -#define BESR_DMES 0x40000000 /* DMA Error Status */ -#define BESR_RWS 0x20000000 /* Read/Write Status */ -#define BESR_ETMASK 0x1C000000 /* Error Type */ -#define ET_PROT 0 -#define ET_PARITY 1 -#define ET_NCFG 2 -#define ET_BUSERR 4 -#define ET_BUSTO 6 -#define DCRN_DMACC0 0x0C4 /* DMA Chained Count Register 0 */ -#define DCRN_DMACC1 0x0CC /* DMA Chained Count Register 1 */ -#define DCRN_DMACC2 0x0D4 /* DMA Chained Count Register 2 */ -#define DCRN_DMACC3 0x0DC /* DMA Chained Count Register 3 */ -#define DCRN_DMACR0 0x0C0 /* DMA Channel Control Register 0 */ -#define DCRN_DMACR1 0x0C8 /* DMA Channel Control Register 1 */ -#define DCRN_DMACR2 0x0D0 /* DMA Channel Control Register 2 */ -#define DCRN_DMACR3 0x0D8 /* DMA Channel Control Register 3 */ -#define DCRN_DMACT0 0x0C1 /* DMA Count Register 0 */ -#define DCRN_DMACT1 0x0C9 /* DMA Count Register 1 */ -#define DCRN_DMACT2 0x0D1 /* DMA Count Register 2 */ -#define DCRN_DMACT3 0x0D9 /* DMA Count Register 3 */ -#define DCRN_DMADA0 0x0C2 /* DMA Destination Address Register 0 */ -#define DCRN_DMADA1 0x0CA /* DMA Destination Address Register 1 */ -#define DCRN_DMADA2 0x0D2 /* DMA Destination Address Register 2 */ -#define DCRN_DMADA3 0x0DA /* DMA Destination Address Register 3 */ -#define DCRN_DMASA0 0x0C3 /* DMA Source Address Register 0 */ -#define DCRN_DMASA1 0x0CB /* DMA Source Address Register 1 */ -#define DCRN_DMASA2 0x0D3 /* DMA Source Address Register 2 */ -#define DCRN_DMASA3 0x0DB /* DMA Source Address Register 3 */ -#define DCRN_DMASR 0x0E0 /* DMA Status Register */ -#define DCRN_EXIER 0x042 /* External Interrupt Enable Register */ -#define EXIER_CIE 0x80000000 /* Critical Interrupt Enable */ -#define EXIER_SRIE 0x08000000 /* Serial Port Rx Int. Enable */ -#define EXIER_STIE 0x04000000 /* Serial Port Tx Int. Enable */ -#define EXIER_JRIE 0x02000000 /* JTAG Serial Port Rx Int. Enable */ -#define EXIER_JTIE 0x01000000 /* JTAG Serial Port Tx Int. Enable */ -#define EXIER_D0IE 0x00800000 /* DMA Channel 0 Interrupt Enable */ -#define EXIER_D1IE 0x00400000 /* DMA Channel 1 Interrupt Enable */ -#define EXIER_D2IE 0x00200000 /* DMA Channel 2 Interrupt Enable */ -#define EXIER_D3IE 0x00100000 /* DMA Channel 3 Interrupt Enable */ -#define EXIER_E0IE 0x00000010 /* External Interrupt 0 Enable */ -#define EXIER_E1IE 0x00000008 /* External Interrupt 1 Enable */ -#define EXIER_E2IE 0x00000004 /* External Interrupt 2 Enable */ -#define EXIER_E3IE 0x00000002 /* External Interrupt 3 Enable */ -#define EXIER_E4IE 0x00000001 /* External Interrupt 4 Enable */ -#define DCRN_EXISR 0x040 /* External Interrupt Status Register */ -#define DCRN_IOCR 0x0A0 /* Input/Output Configuration Register */ -#define IOCR_E0TE 0x80000000 -#define IOCR_E0LP 0x40000000 -#define IOCR_E1TE 0x20000000 -#define IOCR_E1LP 0x10000000 -#define IOCR_E2TE 0x08000000 -#define IOCR_E2LP 0x04000000 -#define IOCR_E3TE 0x02000000 -#define IOCR_E3LP 0x01000000 -#define IOCR_E4TE 0x00800000 -#define IOCR_E4LP 0x00400000 -#define IOCR_EDT 0x00080000 -#define IOCR_SOR 0x00040000 -#define IOCR_EDO 0x00008000 -#define IOCR_2XC 0x00004000 -#define IOCR_ATC 0x00002000 -#define IOCR_SPD 0x00001000 -#define IOCR_BEM 0x00000800 -#define IOCR_PTD 0x00000400 -#define IOCR_ARE 0x00000080 -#define IOCR_DRC 0x00000020 -#define IOCR_RDM(x) (((x) & 0x3) << 3) -#define IOCR_TCS 0x00000004 -#define IOCR_SCS 0x00000002 -#define IOCR_SPC 0x00000001 - -/* System-On-Chip Version Register */ - -/* System-On-Chip Version Register (SVR) field extraction */ - -#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */ -#define SVR_REV(svr) (((svr) >> 0) & 0xFF) /* Revision field */ - -#define SVR_CID(svr) (((svr) >> 28) & 0x0F) /* Company or manufacturer ID */ -#define SVR_SOCOP(svr) (((svr) >> 22) & 0x3F) /* SOC integration options */ -#define SVR_SID(svr) (((svr) >> 16) & 0x3F) /* SOC ID */ -#define SVR_PROC(svr) (((svr) >> 12) & 0x0F) /* Process revision field */ -#define SVR_MFG(svr) (((svr) >> 8) & 0x0F) /* Manufacturing revision */ -#define SVR_MJREV(svr) (((svr) >> 4) & 0x0F) /* Major SOC design revision indicator */ -#define SVR_MNREV(svr) (((svr) >> 0) & 0x0F) /* Minor SOC design revision indicator */ - -/* Processor Version Register */ - -/* Processor Version Register (PVR) field extraction */ - -#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ -#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ - -/* - * AMCC has further subdivided the standard ppc 16-bit version and - * revision subfields of the PVR for the ppc 403s into the following: - */ - -#define PVR_FAM(pvr) (((pvr) >> 20) & 0xFFF) /* Family field */ -#define PVR_MEM(pvr) (((pvr) >> 16) & 0xF) /* Member field */ -#define PVR_CORE(pvr) (((pvr) >> 12) & 0xF) /* Core field */ -#define PVR_CFG(pvr) (((pvr) >> 8) & 0xF) /* Configuration field */ -#define PVR_MAJ(pvr) (((pvr) >> 4) & 0xF) /* Major revision field */ -#define PVR_MIN(pvr) (((pvr) >> 0) & 0xF) /* Minor revision field */ - -/* e600 core PVR fields */ - -#define PVR_E600_VER(pvr) (((pvr) >> 15) & 0xFFFF) /* Version/type */ -#define PVR_E600_TECH(pvr) (((pvr) >> 12) & 0xF) /* Technology */ -#define PVR_E600_MAJ(pvr) (((pvr) >> 8) & 0xF) /* Major revision */ -#define PVR_E600_MIN(pvr) (((pvr) >> 0) & 0xFF) /* Minor revision */ - -/* Processor Version Numbers */ - -#define PVR_403GA 0x00200000 -#define PVR_403GB 0x00200100 -#define PVR_403GC 0x00200200 -#define PVR_403GCX 0x00201400 -#define PVR_405GP 0x40110000 -#define PVR_405GP_RB 0x40110040 -#define PVR_405GP_RC 0x40110082 -#define PVR_405GP_RD 0x401100C4 -#define PVR_405GP_RE 0x40110145 /* same as pc405cr rev c */ -#define PVR_405EP_RA 0x51210950 -#define PVR_405GPR_RB 0x50910951 -#define PVR_405EZ_RA 0x41511460 -#define PVR_405EXR2_RA 0x12911471 /* 405EXr rev A/B without Security */ -#define PVR_405EX1_RA 0x12911477 /* 405EX rev A/B with Security */ -#define PVR_405EXR1_RC 0x1291147B /* 405EXr rev C with Security */ -#define PVR_405EXR2_RC 0x12911479 /* 405EXr rev C without Security */ -#define PVR_405EX1_RC 0x1291147F /* 405EX rev C with Security */ -#define PVR_405EX2_RC 0x1291147D /* 405EX rev C without Security */ -#define PVR_405EXR1_RD 0x12911472 /* 405EXr rev D with Security */ -#define PVR_405EXR2_RD 0x12911470 /* 405EXr rev D without Security */ -#define PVR_405EX1_RD 0x12911475 /* 405EX rev D with Security */ -#define PVR_405EX2_RD 0x12911473 /* 405EX rev D without Security */ -#define PVR_440GP_RB 0x40120440 -#define PVR_440GP_RC 0x40120481 -#define PVR_440EP_RA 0x42221850 -#define PVR_440EP_RB 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */ -#define PVR_440EP_RC 0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */ -#define PVR_440GR_RA 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */ -#define PVR_440GR_RB 0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */ -#define PVR_440EPX1_RA 0x216218D0 /* 440EPX rev A with Security / Kasumi */ -#define PVR_440EPX2_RA 0x216218D4 /* 440EPX rev A without Security / Kasumi */ -#define PVR_440GRX1_RA 0x216218D0 /* 440GRX rev A with Security / Kasumi */ -#define PVR_440GRX2_RA 0x216218D4 /* 440GRX rev A without Security / Kasumi */ -#define PVR_440GX_RA 0x51B21850 -#define PVR_440GX_RB 0x51B21851 -#define PVR_440GX_RC 0x51B21892 -#define PVR_440GX_RF 0x51B21894 -#define PVR_405EP_RB 0x51210950 -#define PVR_440SP_6_RAB 0x53221850 /* 440SP rev A&B with RAID 6 support enabled */ -#define PVR_440SP_RAB 0x53321850 /* 440SP rev A&B without RAID 6 support */ -#define PVR_440SP_6_RC 0x53221891 /* 440SP rev C with RAID 6 support enabled */ -#define PVR_440SP_RC 0x53321891 /* 440SP rev C without RAID 6 support */ -#define PVR_440SPe_6_RA 0x53421890 /* 440SPe rev A with RAID 6 support enabled */ -#define PVR_440SPe_RA 0x53521890 /* 440SPe rev A without RAID 6 support */ -#define PVR_440SPe_6_RB 0x53421891 /* 440SPe rev B with RAID 6 support enabled */ -#define PVR_440SPe_RB 0x53521891 /* 440SPe rev B without RAID 6 support */ -#define PVR_460EX_SE_RA 0x130218A2 /* 460EX rev A with Security Engine */ -#define PVR_460EX_RA 0x130218A3 /* 460EX rev A without Security Engine */ -#define PVR_460EX_RB 0x130218A4 /* 460EX rev B with and without Sec Eng*/ -#define PVR_460GT_SE_RA 0x130218A0 /* 460GT rev A with Security Engine */ -#define PVR_460GT_RA 0x130218A1 /* 460GT rev A without Security Engine */ -#define PVR_460GT_RB 0x130218A5 /* 460GT rev B with and without Sec Eng*/ -#define PVR_460SX_RA 0x13541800 /* 460SX rev A */ -#define PVR_460SX_RA_V1 0x13541801 /* 460SX rev A Variant 1 Security disabled */ -#define PVR_460GX_RA 0x13541802 /* 460GX rev A */ -#define PVR_460GX_RA_V1 0x13541803 /* 460GX rev A Variant 1 Security disabled */ -#define PVR_APM821XX_RA 0x12C41C80 /* APM821XX rev A */ -#define PVR_601 0x00010000 -#define PVR_602 0x00050000 -#define PVR_603 0x00030000 -#define PVR_603e 0x00060000 -#define PVR_603ev 0x00070000 -#define PVR_603r 0x00071000 -#define PVR_604 0x00040000 -#define PVR_604e 0x00090000 -#define PVR_604r 0x000A0000 -#define PVR_620 0x00140000 -#define PVR_740 0x00080000 -#define PVR_750 PVR_740 -#define PVR_740P 0x10080000 -#define PVR_750P PVR_740P -#define PVR_7400 0x000C0000 -#define PVR_7410 0x800C0000 -#define PVR_7450 0x80000000 - -#define PVR_85xx 0x80200000 -#define PVR_85xx_REV1 (PVR_85xx | 0x0010) -#define PVR_85xx_REV2 (PVR_85xx | 0x0020) -#define PVR_VER_E500_V1 0x8020 -#define PVR_VER_E500_V2 0x8021 -#define PVR_VER_E500MC 0x8023 -#define PVR_VER_E5500 0x8024 -#define PVR_VER_E6500 0x8040 - -#define PVR_86xx 0x80040000 - -#define PVR_VIRTEX5 0x7ff21912 - -/* - * For the 8xx processors, all of them report the same PVR family for - * the ppc core. The various versions of these processors must be - * differentiated by the version number in the Communication Processor - * Module (CPM). - */ -#define PVR_821 0x00500000 -#define PVR_823 PVR_821 -#define PVR_850 PVR_821 -#define PVR_860 PVR_821 -#define PVR_7400 0x000C0000 -#define PVR_8240 0x00810100 - -/* - * PowerQUICC II family processors report different PVR values depending - * on silicon process (HiP3, HiP4, HiP7, etc.) - */ -#define PVR_8260 PVR_8240 -#define PVR_8260_HIP3 0x00810101 -#define PVR_8260_HIP4 0x80811014 -#define PVR_8260_HIP7 0x80822011 -#define PVR_8260_HIP7R1 0x80822013 -#define PVR_8260_HIP7RA 0x80822014 - -/* - * MPC 52xx - */ -#define PVR_5200 0x80822011 -#define PVR_5200B 0x80822014 - -/* - * 405EX/EXr CHIP_21 Errata - */ -#ifdef CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY -#define CONFIG_SYS_4xx_CHIP_21_ERRATA -#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EX1_RC -#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EX1_RD -#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x0 -#endif - -#ifdef CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY -#define CONFIG_SYS_4xx_CHIP_21_ERRATA -#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EX2_RC -#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EX2_RD -#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x1 -#endif - -#ifdef CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY -#define CONFIG_SYS_4xx_CHIP_21_ERRATA -#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EXR1_RC -#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EXR1_RD -#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x2 -#endif - -#ifdef CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY -#define CONFIG_SYS_4xx_CHIP_21_ERRATA -#define CONFIG_405EX_CHIP21_PVR_REV_C PVR_405EXR2_RC -#define CONFIG_405EX_CHIP21_PVR_REV_D PVR_405EXR2_RD -#define CONFIG_405EX_CHIP21_ECID3_REV_D 0x3 -#endif - -/* - * System Version Register - */ - -/* System Version Register (SVR) field extraction */ - -#define SVR_SUBVER(svr) (((svr) >> 8) & 0xFF) /* Process/MFG sub-version */ - -#define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */ -#define SVR_MEM(svr) (((svr) >> 16) & 0xF) /* Member field */ - -#ifdef CONFIG_MPC8536 -#define SVR_MAJ(svr) (((svr) >> 4) & 0x7) /* Major revision field*/ -#else -#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/ -#endif -#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/ - -/* Some parts define SVR[0:23] as the SOC version */ -#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC w/o E bit*/ - -/* whether MPC8xxxE (i.e. has SEC) */ -#if defined(CONFIG_MPC85xx) -#define IS_E_PROCESSOR(svr) (svr & 0x80000) -#else -#if defined(CONFIG_MPC83xx) -#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) -#endif -#endif - -#define IS_SVR_REV(svr, maj, min) \ - ((SVR_MAJ(svr) == maj) && (SVR_MIN(svr) == min)) - -/* - * SVR_SOC_VER() Version Values - */ - -#define SVR_8533 0x803400 -#define SVR_8535 0x803701 -#define SVR_8536 0x803700 -#define SVR_8540 0x803000 -#define SVR_8541 0x807200 -#define SVR_8543 0x803200 -#define SVR_8544 0x803401 -#define SVR_8545 0x803102 -#define SVR_8547 0x803101 -#define SVR_8548 0x803100 -#define SVR_8555 0x807100 -#define SVR_8560 0x807000 -#define SVR_8567 0x807501 -#define SVR_8568 0x807500 -#define SVR_8569 0x808000 -#define SVR_8572 0x80E000 -#define SVR_P1010 0x80F100 -#define SVR_P1011 0x80E500 -#define SVR_P1012 0x80E501 -#define SVR_P1013 0x80E700 -#define SVR_P1014 0x80F101 -#define SVR_P1017 0x80F700 -#define SVR_P1020 0x80E400 -#define SVR_P1021 0x80E401 -#define SVR_P1022 0x80E600 -#define SVR_P1023 0x80F600 -#define SVR_P1024 0x80E402 -#define SVR_P1025 0x80E403 -#define SVR_P2010 0x80E300 -#define SVR_P2020 0x80E200 -#define SVR_P2040 0x821000 -#define SVR_P2041 0x821001 -#define SVR_P3041 0x821103 -#define SVR_P4040 0x820100 -#define SVR_P4080 0x820000 -#define SVR_P5010 0x822100 -#define SVR_P5020 0x822000 -#define SVR_P5021 0X820500 -#define SVR_P5040 0x820400 -#define SVR_T4240 0x824000 -#define SVR_T4120 0x824001 -#define SVR_T4160 0x824100 -#define SVR_T4080 0x824102 -#define SVR_C291 0x850000 -#define SVR_C292 0x850020 -#define SVR_C293 0x850030 -#define SVR_B4860 0X868000 -#define SVR_G4860 0x868001 -#define SVR_B4460 0x868003 -#define SVR_B4440 0x868100 -#define SVR_G4440 0x868101 -#define SVR_B4420 0x868102 -#define SVR_B4220 0x868103 -#define SVR_T1040 0x852000 -#define SVR_T1041 0x852001 -#define SVR_T1042 0x852002 -#define SVR_T1020 0x852100 -#define SVR_T1021 0x852101 -#define SVR_T1022 0x852102 -#define SVR_T1024 0x854000 -#define SVR_T1023 0x854100 -#define SVR_T1014 0x854400 -#define SVR_T1013 0x854500 -#define SVR_T2080 0x853000 -#define SVR_T2081 0x853100 - -#define SVR_8610 0x80A000 -#define SVR_8641 0x809000 -#define SVR_8641D 0x809001 - -#define SVR_9130 0x860001 -#define SVR_9131 0x860000 -#define SVR_9132 0x861000 -#define SVR_9232 0x861400 - -#define SVR_Unknown 0xFFFFFF - -#define _GLOBAL(n) \ - .globl n; \ - n: - -/* Macros for setting and retrieving special purpose registers */ - -#define stringify(s) tostring(s) -#define tostring(s) #s - -#define mfdcr(rn) ({unsigned int rval; \ - asm volatile("mfdcr %0," stringify(rn) \ - : "=r" (rval)); rval; }) -#define mtdcr(rn, v) asm volatile("mtdcr " stringify(rn) ",%0" \ - : \ - : "r"(v)) - -#define mfmsr() ({unsigned int rval; \ - asm volatile("mfmsr %0" : "=r" (rval)); rval; }) -#define mtmsr(v) asm volatile("mtmsr %0" \ - : \ - : "r"(v)) - -#define mfspr(rn) ({unsigned int rval; \ - asm volatile("mfspr %0," stringify(rn) \ - : "=r" (rval)); rval; }) -#define mtspr(rn, v) asm volatile("mtspr " stringify(rn) ",%0" \ - : \ - : "r"(v)) - -#define tlbie(v) asm volatile("tlbie %0 \n sync" \ - : \ - : "r"(v)) - -/* Segment Registers */ - -#define SR0 0 -#define SR1 1 -#define SR2 2 -#define SR3 3 -#define SR4 4 -#define SR5 5 -#define SR6 6 -#define SR7 7 -#define SR8 8 -#define SR9 9 -#define SR10 10 -#define SR11 11 -#define SR12 12 -#define SR13 13 -#define SR14 14 -#define SR15 15 - -#ifndef __ASSEMBLY__ - -#include <stdint.h> - -struct cpu_type -{ - char name[15]; - uint32_t soc_ver; - uint32_t num_cores; - uint32_t mask; /* which cpu(s) actually exist */ -#ifdef CONFIG_HETROGENOUS_CLUSTERS - uint32_t dsp_num_cores; - uint32_t dsp_mask; /* which DSP cpu(s) actually exist */ -#endif -}; - -struct cpu_type* identify_cpu(uint32_t ver); -int fixup_cpu(void); - -int fsl_qoriq_core_to_cluster(unsigned int core); -int fsl_qoriq_dsp_core_to_cluster(unsigned int core); - -#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) -#define CPU_TYPE_ENTRY(n, v, nc) \ - { \ - .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), \ - .mask = (1 << (nc)) - 1 \ - } -#define CPU_TYPE_ENTRY_MASK(n, v, nc, m) \ - { \ - .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), .mask = (m) \ - } -#else -#if defined(CONFIG_MPC83xx) -#define CPU_TYPE_ENTRY(x) \ - { \ - #x, SPR_##x \ - } -#endif -#endif - -#ifndef CONFIG_MACH_SPECIFIC -extern int _machine; -extern int have_of; -#endif /* CONFIG_MACH_SPECIFIC */ - -/* what kind of prep workstation we are */ -extern int _prep_type; -/* - * This is used to identify the board type from a given PReP board - * vendor. Board revision is also made available. - */ -extern unsigned char ucSystemType; -extern unsigned char ucBoardRev; -extern unsigned char ucBoardRevMaj, ucBoardRevMin; - -struct task_struct; -void start_thread(struct pt_regs* regs, unsigned long nip, unsigned long sp); -void release_thread(struct task_struct*); - -/* - * Create a new Kernel thread. - */ -extern long kernel_thread(int (*fn)(void*), void* arg, unsigned long flags); - -/* - * Bus types - */ -#define EISA_bus 0 -#define EISA_bus__is_a_macro /* for versions in ksyms.c */ -#define MCA_bus 0 -#define MCA_bus__is_a_macro /* for versions in ksyms.c */ - -/* Lazy FPU handling on uni-processor */ -extern struct task_struct* last_task_used_math; -extern struct task_struct* last_task_used_altivec; - -/* - * this is the minimum allowable io space due to the location - * of the io areas on prep (first one at 0x80000000) but - * as soon as I get around to remapping the io areas with the BATs - * to match the mac we can raise this. -- Cort - */ -#define TASK_SIZE (0x80000000UL) - -/* This decides where the Kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3) - -typedef struct -{ - unsigned long seg; -} mm_segment_t; - -struct thread_struct -{ - unsigned long ksp; /* Kernel stack pointer */ - unsigned long wchan; /* Event task is sleeping on */ - struct pt_regs* regs; /* Pointer to saved register state */ - mm_segment_t fs; /* for get_fs() validation */ - void* pgdir; /* root of page-table tree */ - signed long last_syscall; - double fpr[32]; /* Complete floating point set */ - unsigned long fpscr_pad; /* fpr ... fpscr must be contiguous */ - unsigned long fpscr; /* Floating point status */ -#ifdef CONFIG_ALTIVEC - vector128 vr[32]; /* Complete AltiVec set */ - vector128 vscr; /* AltiVec status */ - unsigned long vrsave; -#endif /* CONFIG_ALTIVEC */ -}; - -#define INIT_SP (sizeof(init_stack) + (unsigned long)&init_stack) - -#define INIT_THREAD \ - { \ - INIT_SP, /* ksp */ \ - 0, /* wchan */ \ - (struct pt_regs*)INIT_SP - 1, /* regs */ \ - KERNEL_DS, /*fs*/ \ - swapper_pg_dir, /* pgdir */ \ - 0, /* last_syscall */ \ - {0}, 0, 0 \ - } - -/* - * Note: the vm_start and vm_end fields here should *not* - * be in Kernel space. (Could vm_end == vm_start perhaps?) - */ -#define INIT_MMAP \ - { \ - &init_mm, 0, 0x1000, NULL, \ - PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \ - 1, NULL, NULL \ - } - -/* - * Return saved PC of a blocked thread. For now, this is the "user" PC - */ -static inline unsigned long thread_saved_pc(struct thread_struct* t) -{ - return (t->regs) ? t->regs->nip : 0; -} - -#define copy_segments(tsk, mm) \ - do \ - { \ - } while (0) -#define release_segments(mm) \ - do \ - { \ - } while (0) -#define forget_segments() \ - do \ - { \ - } while (0) - -unsigned long get_wchan(struct task_struct* p); - -#define KSTK_EIP(tsk) ((tsk)->thread.regs->nip) -#define KSTK_ESP(tsk) ((tsk)->thread.regs->gpr[1]) - -/* - * NOTE! The task struct and the stack go together - */ -#define THREAD_SIZE (2 * PAGE_SIZE) -#define alloc_task_struct() \ - ((struct task_struct*)__get_free_pages(GFP_KERNEL, 1)) -#define free_task_struct(p) free_pages((unsigned long)(p), 1) -#define get_task_struct(tsk) atomic_inc(&mem_map[MAP_NR(tsk)].count) - -/* in process.c - for early bootup debug -- Cort */ -int ll_printk(const char*, ...); -void ll_puts(const char*); - -#define init_task (init_task_union.task) -#define init_stack (init_task_union.stack) - -/* In misc.c */ -void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); - -#endif /* ndef ASSEMBLY*/ - -#ifdef CONFIG_MACH_SPECIFIC -#if defined(CONFIG_8xx) -#define _machine _MACH_8xx -#define have_of 0 -#elif defined(CONFIG_WALNUT) -#define _machine _MACH_walnut -#define have_of 0 -#elif defined(CONFIG_MPC8260) -#define _machine _MACH_8260 -#define have_of 0 -#else -#error "Machine not defined correctly" -#endif -#endif /* CONFIG_MACH_SPECIFIC */ - -#if defined(CONFIG_MPC85xx) || defined(CONFIG_440) -#define EPAPR_MAGIC (0x45504150) -#else -#define EPAPR_MAGIC (0x65504150) -#endif - -#endif /* __ASM_PPC_PROCESSOR_H */ diff --git a/dev/ZKA/HALKit/POWER/ppc-mmu.h b/dev/ZKA/HALKit/POWER/ppc-mmu.h deleted file mode 100644 index 8e4b3595..00000000 --- a/dev/ZKA/HALKit/POWER/ppc-mmu.h +++ /dev/null @@ -1,811 +0,0 @@ - -#ifndef _PPC_MMU_H_ -#define _PPC_MMU_H_ - -#ifndef __ASSEMBLY__ - -#include <stdint.h> - -/* Hardware Page Table Entry */ -typedef struct _PTE -{ -#ifdef CONFIG_PPC64BRIDGE - unsigned long long vsid : 52; - unsigned long api : 5; - unsigned long : 5; - unsigned long h : 1; - unsigned long v : 1; - unsigned long long rpn : 52; -#else /* CONFIG_PPC64BRIDGE */ - unsigned long v : 1; /* Entry is valid */ - unsigned long vsid : 24; /* Virtual segment identifier */ - unsigned long h : 1; /* Hash algorithm indicator */ - unsigned long api : 6; /* Abbreviated page index */ - unsigned long rpn : 20; /* Real (physical) page number */ -#endif /* CONFIG_PPC64BRIDGE */ - unsigned long : 3; /* Unused */ - unsigned long r : 1; /* Referenced */ - unsigned long c : 1; /* Changed */ - unsigned long w : 1; /* Write-thru cache mode */ - unsigned long i : 1; /* Cache inhibited */ - unsigned long m : 1; /* Memory coherence */ - unsigned long g : 1; /* Guarded */ - unsigned long : 1; /* Unused */ - unsigned long pp : 2; /* Page protection */ -} PTE; - -/* Values for PP (assumes Ks=0, Kp=1) */ -#define PP_RWXX 0 /* Supervisor read/write, User none */ -#define PP_RWRX 1 /* Supervisor read/write, User read */ -#define PP_RWRW 2 /* Supervisor read/write, User read/write */ -#define PP_RXRX 3 /* Supervisor read, User read */ - -/* Segment Register */ -typedef struct _SEGREG -{ - unsigned long t : 1; /* Normal or I/O type */ - unsigned long ks : 1; /* Supervisor 'key' (normally 0) */ - unsigned long kp : 1; /* User 'key' (normally 1) */ - unsigned long n : 1; /* No-execute */ - unsigned long : 4; /* Unused */ - unsigned long vsid : 24; /* Virtual Segment Identifier */ -} SEGREG; - -/* Block Address Translation (BAT) Registers */ -typedef struct _P601_BATU -{ /* Upper part of BAT for 601 processor */ - unsigned long bepi : 15; /* Effective page index (virtual address) */ - unsigned long : 8; /* unused */ - unsigned long w : 1; - unsigned long i : 1; /* Cache inhibit */ - unsigned long m : 1; /* Memory coherence */ - unsigned long ks : 1; /* Supervisor key (normally 0) */ - unsigned long kp : 1; /* User key (normally 1) */ - unsigned long pp : 2; /* Page access protections */ -} P601_BATU; - -typedef struct _BATU -{ /* Upper part of BAT (all except 601) */ -#ifdef CONFIG_PPC64BRIDGE - unsigned long long bepi : 47; -#else /* CONFIG_PPC64BRIDGE */ - unsigned long bepi : 15; /* Effective page index (virtual address) */ -#endif /* CONFIG_PPC64BRIDGE */ - unsigned long : 4; /* Unused */ - unsigned long bl : 11; /* Block size mask */ - unsigned long vs : 1; /* Supervisor valid */ - unsigned long vp : 1; /* User valid */ -} BATU; - -typedef struct _P601_BATL -{ /* Lower part of BAT for 601 processor */ - unsigned long brpn : 15; /* Real page index (physical address) */ - unsigned long : 10; /* Unused */ - unsigned long v : 1; /* Valid bit */ - unsigned long bl : 6; /* Block size mask */ -} P601_BATL; - -typedef struct _BATL -{ /* Lower part of BAT (all except 601) */ -#ifdef CONFIG_PPC64BRIDGE - unsigned long long brpn : 47; -#else /* CONFIG_PPC64BRIDGE */ - unsigned long brpn : 15; /* Real page index (physical address) */ -#endif /* CONFIG_PPC64BRIDGE */ - unsigned long : 10; /* Unused */ - unsigned long w : 1; /* Write-thru cache */ - unsigned long i : 1; /* Cache inhibit */ - unsigned long m : 1; /* Memory coherence */ - unsigned long g : 1; /* Guarded (MBZ in IBAT) */ - unsigned long : 1; /* Unused */ - unsigned long pp : 2; /* Page access protections */ -} BATL; - -typedef struct _BAT -{ - BATU batu; /* Upper register */ - BATL batl; /* Lower register */ -} BAT; - -typedef struct _P601_BAT -{ - P601_BATU batu; /* Upper register */ - P601_BATL batl; /* Lower register */ -} P601_BAT; - -/* - * Simulated two-level MMU. This structure is used by the Kernel - * to keep track of MMU mappings and is used to update/maintain - * the hardware HASH table which is really a cache of mappings. - * - * The simulated structures mimic the hardware available on other - * platforms, notably the 80x86 and 680x0. - */ - -typedef struct _pte -{ - unsigned long page_num : 20; - unsigned long flags : 12; /* Page flags (some unused bits) */ -} pte; - -#define PD_SHIFT (10 + 12) /* Page directory */ -#define PD_MASK 0x02FF -#define PT_SHIFT (12) /* Page Table */ -#define PT_MASK 0x02FF -#define PG_SHIFT (12) /* Page Entry */ - -/* MMU context */ - -typedef struct _MMU_context -{ - SEGREG segs[16]; /* Segment registers */ - pte** pmap; /* Two-level page-map structure */ -} MMU_context; - -extern void _tlbie(unsigned long va); /* invalidate a TLB entry */ -extern void _tlbia(void); /* invalidate all TLB entries */ - -#ifdef CONFIG_ADDR_MAP -extern void init_addr_map(void); -#endif - -typedef enum -{ - IBAT0 = 0, - IBAT1, - IBAT2, - IBAT3, - DBAT0, - DBAT1, - DBAT2, - DBAT3, -#ifdef CONFIG_HIGH_BATS - IBAT4, - IBAT5, - IBAT6, - IBAT7, - DBAT4, - DBAT5, - DBAT6, - DBAT7 -#endif -} ppc_bat_t; - -extern int read_bat(ppc_bat_t bat, unsigned long* upper, unsigned long* lower); -extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower); -extern void print_bats(void); - -#endif /* __ASSEMBLY__ */ - -#define BATU_VS 0x00000002 -#define BATU_VP 0x00000001 -#define BATU_INVALID 0x00000000 - -#define BATL_WRITETHROUGH 0x00000040 -#define BATL_CACHEINHIBIT 0x00000020 -#define BATL_MEMCOHERENCE 0x00000010 -#define BATL_GUARDEDSTORAGE 0x00000008 -#define BATL_NO_ACCESS 0x00000000 - -#define BATL_PP_MSK 0x00000003 -#define BATL_PP_00 0x00000000 /* No access */ -#define BATL_PP_01 0x00000001 /* Read-only */ -#define BATL_PP_10 0x00000002 /* Read-write */ -#define BATL_PP_11 0x00000003 - -#define BATL_PP_NO_ACCESS BATL_PP_00 -#define BATL_PP_RO BATL_PP_01 -#define BATL_PP_RW BATL_PP_10 - -/* BAT Block size values */ -#define BATU_BL_128K 0x00000000 -#define BATU_BL_256K 0x00000004 -#define BATU_BL_512K 0x0000000c -#define BATU_BL_1M 0x0000001c -#define BATU_BL_2M 0x0000003c -#define BATU_BL_4M 0x0000007c -#define BATU_BL_8M 0x000000fc -#define BATU_BL_16M 0x000001fc -#define BATU_BL_32M 0x000003fc -#define BATU_BL_64M 0x000007fc -#define BATU_BL_128M 0x00000ffc -#define BATU_BL_256M 0x00001ffc - -/* Block lengths for processors that support extended block length */ -#ifdef HID0_XBSEN -#define BATU_BL_512M 0x00003ffc -#define BATU_BL_1G 0x00007ffc -#define BATU_BL_2G 0x0000fffc -#define BATU_BL_4G 0x0001fffc -#define BATU_BL_MAX BATU_BL_4G -#else -#define BATU_BL_MAX BATU_BL_256M -#endif - -/* BAT Access Protection */ -#define BPP_XX 0x00 /* No access */ -#define BPP_RX 0x01 /* Read only */ -#define BPP_RW 0x02 /* Read/write */ - -/* Macros to get values from BATs, once data is in the BAT register format */ -#define BATU_VALID(x) (x & 0x3) -#define BATU_VADDR(x) (x & 0xfffe0000) -#define BATL_PADDR(x) ((phys_addr_t)((x & 0xfffe0000) | ((x & 0x0e00ULL) << 24) | ((x & 0x04ULL) << 30))) -#define BATU_SIZE(x) (1ULL << (fls((x & BATU_BL_MAX) >> 2) + 17)) - -/* bytes into BATU_BL */ -#define TO_BATU_BL(x) \ - (uint32_t)((((1ull << __ilog2_u64((uint64_t)x)) / (128 * 1024)) - 1) * 4) - -/* Used to set up SDR1 register */ -#define HASH_TABLE_SIZE_64K 0x00010000 -#define HASH_TABLE_SIZE_128K 0x00020000 -#define HASH_TABLE_SIZE_256K 0x00040000 -#define HASH_TABLE_SIZE_512K 0x00080000 -#define HASH_TABLE_SIZE_1M 0x00100000 -#define HASH_TABLE_SIZE_2M 0x00200000 -#define HASH_TABLE_SIZE_4M 0x00400000 -#define HASH_TABLE_MASK_64K 0x000 -#define HASH_TABLE_MASK_128K 0x001 -#define HASH_TABLE_MASK_256K 0x003 -#define HASH_TABLE_MASK_512K 0x007 -#define HASH_TABLE_MASK_1M 0x00F -#define HASH_TABLE_MASK_2M 0x01F -#define HASH_TABLE_MASK_4M 0x03F - -/* Control/status registers for the MPC8xx. - * A write operation to these registers causes serialized access. - * During software tablewalk, the registers used perform mask/shift-add - * operations when written/read. A TLB entry is created when the Mx_RPN - * is written, and the contents of several registers are used to - * create the entry. - */ -#define MI_CTR 784 /* Instruction TLB control register */ -#define MI_GPM 0x80000000 /* Set domain manager mode */ -#define MI_PPM 0x40000000 /* Set subpage protection */ -#define MI_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */ -#define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */ -#define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ -#define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */ -#define MI_RESETVAL 0x00000000 /* Value of register at reset */ - -/* These are the Ks and Kp from the ppc books. For proper operation, - * Ks = 0, Kp = 1. - */ -#define MI_AP 786 -#define MI_Ks 0x80000000 /* Should not be set */ -#define MI_Kp 0x40000000 /* Should always be set */ - -/* The effective page number register. When read, contains the information - * about the last instruction TLB miss. When MI_RPN is written, bits in - * this register are used to create the TLB entry. - */ -#define MI_EPN 787 -#define MI_EPNMASK 0xfffff000 /* Effective page number for entry */ -#define MI_EVALID 0x00000200 /* Entry is valid */ -#define MI_ASIDMASK 0x0000000f /* ASID match value */ - /* Reset value is undefined */ - -/* A "level 1" or "segment" or whatever you want to call it register. - * For the instruction TLB, it contains bits that get loaded into the - * TLB entry when the MI_RPN is written. - */ -#define MI_TWC 789 -#define MI_APG 0x000001e0 /* Access protection group (0) */ -#define MI_GUARDED 0x00000010 /* Guarded storage */ -#define MI_PSMASK 0x0000000c /* Mask of page size bits */ -#define MI_PS8MEG 0x0000000c /* 8M page size */ -#define MI_PS512K 0x00000004 /* 512K page size */ -#define MI_PS4K_16K 0x00000000 /* 4K or 16K page size */ -#define MI_SVALID 0x00000001 /* Segment entry is valid */ - /* Reset value is undefined */ - -/* Real page number. Defined by the pte. Writing this register - * causes a TLB entry to be created for the instruction TLB, using - * additional information from the MI_EPN, and MI_TWC registers. - */ -#define MI_RPN 790 - -/* Define an RPN value for mapping Kernel memory to large virtual - * pages for boot initialization. This has real page number of 0, - * large page size, shared page, cache enabled, and valid. - * Also mark all subpages valid and write access. - */ -#define MI_BOOTINIT 0x000001fd - -#define MD_CTR 792 /* Data TLB control register */ -#define MD_GPM 0x80000000 /* Set domain manager mode */ -#define MD_PPM 0x40000000 /* Set subpage protection */ -#define MD_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */ -#define MD_WTDEF 0x10000000 /* Set writethrough when MMU dis */ -#define MD_RSV4I 0x08000000 /* Reserve 4 TLB entries */ -#define MD_TWAM 0x04000000 /* Use 4K page hardware assist */ -#define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ -#define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */ -#define MD_RESETVAL 0x04000000 /* Value of register at reset */ - -#define M_CASID 793 /* Address space ID (context) to match */ -#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */ - -/* These are the Ks and Kp from the ppc books. For proper operation, - * Ks = 0, Kp = 1. - */ -#define MD_AP 794 -#define MD_Ks 0x80000000 /* Should not be set */ -#define MD_Kp 0x40000000 /* Should always be set */ - -/* The effective page number register. When read, contains the information - * about the last instruction TLB miss. When MD_RPN is written, bits in - * this register are used to create the TLB entry. - */ -#define MD_EPN 795 -#define MD_EPNMASK 0xfffff000 /* Effective page number for entry */ -#define MD_EVALID 0x00000200 /* Entry is valid */ -#define MD_ASIDMASK 0x0000000f /* ASID match value */ - /* Reset value is undefined */ - -/* The pointer to the base address of the first level page table. - * During a software tablewalk, reading this register provides the address - * of the entry associated with MD_EPN. - */ -#define M_TWB 796 -#define M_L1TB 0xfffff000 /* Level 1 table base address */ -#define M_L1INDX 0x00000ffc /* Level 1 index, when read */ - /* Reset value is undefined */ - -/* A "level 1" or "segment" or whatever you want to call it register. - * For the data TLB, it contains bits that get loaded into the TLB entry - * when the MD_RPN is written. It is also provides the hardware assist - * for finding the PTE address during software tablewalk. - */ -#define MD_TWC 797 -#define MD_L2TB 0xfffff000 /* Level 2 table base address */ -#define MD_L2INDX 0xfffffe00 /* Level 2 index (*pte), when read */ -#define MD_APG 0x000001e0 /* Access protection group (0) */ -#define MD_GUARDED 0x00000010 /* Guarded storage */ -#define MD_PSMASK 0x0000000c /* Mask of page size bits */ -#define MD_PS8MEG 0x0000000c /* 8M page size */ -#define MD_PS512K 0x00000004 /* 512K page size */ -#define MD_PS4K_16K 0x00000000 /* 4K or 16K page size */ -#define MD_WT 0x00000002 /* Use writethrough page attribute */ -#define MD_SVALID 0x00000001 /* Segment entry is valid */ - /* Reset value is undefined */ - -/* Real page number. Defined by the pte. Writing this register - * causes a TLB entry to be created for the data TLB, using - * additional information from the MD_EPN, and MD_TWC registers. - */ -#define MD_RPN 798 - -/* This is a temporary storage register that could be used to save - * a processor working register during a tablewalk. - */ -#define M_TW 799 - -/* - * At present, all ppc 400-class processors share a similar TLB - * architecture. The instruction and data sides share a unified, - * 64-entry, fully-associative TLB which is maintained totally under - * software control. In addition, the instruction side has a - * hardware-managed, 4-entry, fully- associative TLB which serves as a - * first level to the shared TLB. These two TLBs are known as the UTLB - * and ITLB, respectively. - */ - -#define PPC4XX_TLB_SIZE 64 - -/* - * TLB entries are defined by a "high" tag portion and a "low" data - * portion. On all architectures, the data portion is 32-bits. - * - * TLB entries are managed entirely under software control by reading, - * writing, and searchoing using the 4xx-specific tlbre, tlbwr, and tlbsx - * instructions. - */ - -/* - * FSL Book-E support - */ - -#define MAS0_TLBSEL_MSK 0x30000000 -#define MAS0_TLBSEL(x) (((x) << 28) & MAS0_TLBSEL_MSK) -#define MAS0_ESEL_MSK 0x0FFF0000 -#define MAS0_ESEL(x) (((x) << 16) & MAS0_ESEL_MSK) -#define MAS0_NV(x) ((x) & 0x00000FFF) - -#define MAS1_VALID 0x80000000 -#define MAS1_IPROT 0x40000000 -#define MAS1_TID(x) (((x) << 16) & 0x3FFF0000) -#define MAS1_TS 0x00001000 -#define MAS1_TSIZE(x) (((x) << 7) & 0x00000F80) -#define TSIZE_TO_BYTES(x) (1ULL << ((x) + 10)) - -#define MAS2_EPN 0xFFFFF000 -#define MAS2_X0 0x00000040 -#define MAS2_X1 0x00000020 -#define MAS2_W 0x00000010 -#define MAS2_I 0x00000008 -#define MAS2_M 0x00000004 -#define MAS2_G 0x00000002 -#define MAS2_E 0x00000001 - -#define MAS3_RPN 0xFFFFF000 -#define MAS3_U0 0x00000200 -#define MAS3_U1 0x00000100 -#define MAS3_U2 0x00000080 -#define MAS3_U3 0x00000040 -#define MAS3_UX 0x00000020 -#define MAS3_SX 0x00000010 -#define MAS3_UW 0x00000008 -#define MAS3_SW 0x00000004 -#define MAS3_UR 0x00000002 -#define MAS3_SR 0x00000001 - -#define MAS4_TLBSELD(x) MAS0_TLBSEL(x) -#define MAS4_TIDDSEL 0x000F0000 -#define MAS4_TSIZED(x) MAS1_TSIZE(x) -#define MAS4_X0D 0x00000040 -#define MAS4_X1D 0x00000020 -#define MAS4_WD 0x00000010 -#define MAS4_ID 0x00000008 -#define MAS4_MD 0x00000004 -#define MAS4_GD 0x00000002 -#define MAS4_ED 0x00000001 - -#define MAS6_SPID0 0x3FFF0000 -#define MAS6_SPID1 0x00007FFE -#define MAS6_SAS 0x00000001 -#define MAS6_SPID MAS6_SPID0 - -#define MAS7_RPN 0xFFFFFFFF - -#define FSL_BOOKE_MAS0(tlbsel, esel, nv) \ - (MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel) | MAS0_NV(nv)) -#define FSL_BOOKE_MAS1(v, iprot, tid, ts, tsize) \ - ((((v) << 31) & MAS1_VALID) | \ - (((iprot) << 30) & MAS1_IPROT) | \ - (MAS1_TID(tid)) | \ - (((ts) << 12) & MAS1_TS) | \ - (MAS1_TSIZE(tsize))) -#define FSL_BOOKE_MAS2(epn, wimge) \ - (((epn) & MAS3_RPN) | (wimge)) -#define FSL_BOOKE_MAS3(rpn, user, perms) \ - (((rpn) & MAS3_RPN) | (user) | (perms)) -#define FSL_BOOKE_MAS7(rpn) \ - (((uint64_t)(rpn)) >> 32) - -#define BOOKE_PAGESZ_1K 0 -#define BOOKE_PAGESZ_2K 1 -#define BOOKE_PAGESZ_4K 2 -#define BOOKE_PAGESZ_8K 3 -#define BOOKE_PAGESZ_16K 4 -#define BOOKE_PAGESZ_32K 5 -#define BOOKE_PAGESZ_64K 6 -#define BOOKE_PAGESZ_128K 7 -#define BOOKE_PAGESZ_256K 8 -#define BOOKE_PAGESZ_512K 9 -#define BOOKE_PAGESZ_1M 10 -#define BOOKE_PAGESZ_2M 11 -#define BOOKE_PAGESZ_4M 12 -#define BOOKE_PAGESZ_8M 13 -#define BOOKE_PAGESZ_16M 14 -#define BOOKE_PAGESZ_32M 15 -#define BOOKE_PAGESZ_64M 16 -#define BOOKE_PAGESZ_128M 17 -#define BOOKE_PAGESZ_256M 18 -#define BOOKE_PAGESZ_512M 19 -#define BOOKE_PAGESZ_1G 20 -#define BOOKE_PAGESZ_2G 21 -#define BOOKE_PAGESZ_4G 22 -#define BOOKE_PAGESZ_8G 23 -#define BOOKE_PAGESZ_16GB 24 -#define BOOKE_PAGESZ_32GB 25 -#define BOOKE_PAGESZ_64GB 26 -#define BOOKE_PAGESZ_128GB 27 -#define BOOKE_PAGESZ_256GB 28 -#define BOOKE_PAGESZ_512GB 29 -#define BOOKE_PAGESZ_1TB 30 -#define BOOKE_PAGESZ_2TB 31 - -#define TLBIVAX_ALL 4 -#define TLBIVAX_TLB0 0 -#define TLBIVAX_TLB1 8 - -#ifdef CONFIG_E500 -#ifndef __ASSEMBLY__ -extern void set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts, uint8_t esel, uint8_t tsize, uint8_t iprot); -extern void disable_tlb(uint8_t esel); -extern void invalidate_tlb(uint8_t tlb); -extern void init_tlbs(void); -extern int find_tlb_idx(void* addr, uint8_t tlbsel); -extern void init_used_tlb_cams(void); -extern int find_free_tlbcam(void); -extern void print_tlbcam(void); - -extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg); -extern void clear_ddr_tlbs(unsigned int memsize_in_meg); - -enum tlb_map_type -{ - TLB_MAP_RAM, - TLB_MAP_IO, -}; - -extern uint64_t tlb_map_range(ulong_t v_addr, phys_addr_t p_addr, uint64_t size, enum tlb_map_type map_type); - -extern void write_tlb(uint32_t _mas0, uint32_t _mas1, uint32_t _mas2, uint32_t _mas3, uint32_t _mas7); - -#define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, _iprot) \ - { \ - .mas0 = FSL_BOOKE_MAS0(_tlb, _esel, 0), \ - .mas1 = FSL_BOOKE_MAS1(1, _iprot, 0, _ts, _sz), \ - .mas2 = FSL_BOOKE_MAS2(_epn, _wimge), \ - .mas3 = FSL_BOOKE_MAS3(_rpn, 0, _perms), \ - .mas7 = FSL_BOOKE_MAS7(_rpn), \ - } - -struct fsl_e_tlb_entry -{ - uint32_t mas0; - uint32_t mas1; - uint32_t mas2; - uint32_t mas3; - uint32_t mas7; -}; - -extern struct fsl_e_tlb_entry tlb_table[]; -extern int num_tlb_entries; -#endif -#endif - -#ifdef CONFIG_E300 -#define LAWAR_EN 0x80000000 -#define LAWAR_SIZE 0x0000003F - -#define LAWAR_TRGT_IF_PCI 0x00000000 -#define LAWAR_TRGT_IF_PCI1 0x00000000 -#define LAWAR_TRGT_IF_PCIX 0x00000000 -#define LAWAR_TRGT_IF_PCI2 0x00100000 -#define LAWAR_TRGT_IF_PCIE1 0x00200000 -#define LAWAR_TRGT_IF_PCIE2 0x00100000 -#define LAWAR_TRGT_IF_PCIE3 0x00300000 -#define LAWAR_TRGT_IF_LBC 0x00400000 -#define LAWAR_TRGT_IF_CCSR 0x00800000 -#define LAWAR_TRGT_IF_DDR_INTERLEAVED 0x00B00000 -#define LAWAR_TRGT_IF_RIO 0x00c00000 -#define LAWAR_TRGT_IF_DDR 0x00f00000 -#define LAWAR_TRGT_IF_DDR1 0x00f00000 -#define LAWAR_TRGT_IF_DDR2 0x01600000 - -#define LAWAR_SIZE_BASE 0xa -#define LAWAR_SIZE_4K (LAWAR_SIZE_BASE + 1) -#define LAWAR_SIZE_8K (LAWAR_SIZE_BASE + 2) -#define LAWAR_SIZE_16K (LAWAR_SIZE_BASE + 3) -#define LAWAR_SIZE_32K (LAWAR_SIZE_BASE + 4) -#define LAWAR_SIZE_64K (LAWAR_SIZE_BASE + 5) -#define LAWAR_SIZE_128K (LAWAR_SIZE_BASE + 6) -#define LAWAR_SIZE_256K (LAWAR_SIZE_BASE + 7) -#define LAWAR_SIZE_512K (LAWAR_SIZE_BASE + 8) -#define LAWAR_SIZE_1M (LAWAR_SIZE_BASE + 9) -#define LAWAR_SIZE_2M (LAWAR_SIZE_BASE + 10) -#define LAWAR_SIZE_4M (LAWAR_SIZE_BASE + 11) -#define LAWAR_SIZE_8M (LAWAR_SIZE_BASE + 12) -#define LAWAR_SIZE_16M (LAWAR_SIZE_BASE + 13) -#define LAWAR_SIZE_32M (LAWAR_SIZE_BASE + 14) -#define LAWAR_SIZE_64M (LAWAR_SIZE_BASE + 15) -#define LAWAR_SIZE_128M (LAWAR_SIZE_BASE + 16) -#define LAWAR_SIZE_256M (LAWAR_SIZE_BASE + 17) -#define LAWAR_SIZE_512M (LAWAR_SIZE_BASE + 18) -#define LAWAR_SIZE_1G (LAWAR_SIZE_BASE + 19) -#define LAWAR_SIZE_2G (LAWAR_SIZE_BASE + 20) -#define LAWAR_SIZE_4G (LAWAR_SIZE_BASE + 21) -#define LAWAR_SIZE_8G (LAWAR_SIZE_BASE + 22) -#define LAWAR_SIZE_16G (LAWAR_SIZE_BASE + 23) -#define LAWAR_SIZE_32G (LAWAR_SIZE_BASE + 24) -#endif - -#ifdef CONFIG_440 -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ - -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ -/* Some additional macros for combinations often used */ -#define SA_IG (SA_I | SA_G) - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ -/* Some additional macros for combinations often used */ -#define AC_RW (AC_R | AC_W) -#define AC_RWX (AC_R | AC_W | AC_X) - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn, sz) ((EPN((epn)) | (sz) | TLB_VALID)) -#define TLB1(rpn, erpn) (((rpn) & 0xfffffc00) | (erpn)) -#define TLB2(a) ((a) & 0x00000fbf) - -#define tlbtab_start \ - mflr r1; \ - bl 0f; - -#define tlbtab_end \ - .long 0, 0, 0; \ - 0 : mflr r0; \ - mtlr r1; \ - blr; - -#define tlbentry(epn, sz, rpn, erpn, attr) \ - .long TLB0(epn, sz), TLB1(rpn, erpn), TLB2(attr) - -/*----------------------------------------------------------------------------+ -| TLB specific defines. -+----------------------------------------------------------------------------*/ -#define TLB_256MB_ALIGN_MASK 0xFF0000000ULL -#define TLB_16MB_ALIGN_MASK 0xFFF000000ULL -#define TLB_1MB_ALIGN_MASK 0xFFFF00000ULL -#define TLB_256KB_ALIGN_MASK 0xFFFFC0000ULL -#define TLB_64KB_ALIGN_MASK 0xFFFFF0000ULL -#define TLB_16KB_ALIGN_MASK 0xFFFFFC000ULL -#define TLB_4KB_ALIGN_MASK 0xFFFFFF000ULL -#define TLB_1KB_ALIGN_MASK 0xFFFFFFC00ULL -#define TLB_256MB_SIZE 0x10000000 -#define TLB_16MB_SIZE 0x01000000 -#define TLB_1MB_SIZE 0x00100000 -#define TLB_256KB_SIZE 0x00040000 -#define TLB_64KB_SIZE 0x00010000 -#define TLB_16KB_SIZE 0x00004000 -#define TLB_4KB_SIZE 0x00001000 -#define TLB_1KB_SIZE 0x00000400 - -#define TLB_WORD0_EPN_MASK 0xFFFFFC00 -#define TLB_WORD0_EPN_ENCODE(n) (((unsigned long)(n)) & 0xFFFFFC00) -#define TLB_WORD0_EPN_DECODE(n) (((unsigned long)(n)) & 0xFFFFFC00) -#define TLB_WORD0_V_MASK 0x00000200 -#define TLB_WORD0_V_ENABLE 0x00000200 -#define TLB_WORD0_V_DISABLE 0x00000000 -#define TLB_WORD0_TS_MASK 0x00000100 -#define TLB_WORD0_TS_1 0x00000100 -#define TLB_WORD0_TS_0 0x00000000 -#define TLB_WORD0_SIZE_MASK 0x000000F0 -#define TLB_WORD0_SIZE_1KB 0x00000000 -#define TLB_WORD0_SIZE_4KB 0x00000010 -#define TLB_WORD0_SIZE_16KB 0x00000020 -#define TLB_WORD0_SIZE_64KB 0x00000030 -#define TLB_WORD0_SIZE_256KB 0x00000040 -#define TLB_WORD0_SIZE_1MB 0x00000050 -#define TLB_WORD0_SIZE_16MB 0x00000070 -#define TLB_WORD0_SIZE_256MB 0x00000090 -#define TLB_WORD0_TPAR_MASK 0x0000000F -#define TLB_WORD0_TPAR_ENCODE(n) ((((unsigned long)(n)) & 0x0F) << 0) -#define TLB_WORD0_TPAR_DECODE(n) ((((unsigned long)(n)) >> 0) & 0x0F) - -#define TLB_WORD1_RPN_MASK 0xFFFFFC00 -#define TLB_WORD1_RPN_ENCODE(n) (((unsigned long)(n)) & 0xFFFFFC00) -#define TLB_WORD1_RPN_DECODE(n) (((unsigned long)(n)) & 0xFFFFFC00) -#define TLB_WORD1_PAR1_MASK 0x00000300 -#define TLB_WORD1_PAR1_ENCODE(n) ((((unsigned long)(n)) & 0x03) << 8) -#define TLB_WORD1_PAR1_DECODE(n) ((((unsigned long)(n)) >> 8) & 0x03) -#define TLB_WORD1_PAR1_0 0x00000000 -#define TLB_WORD1_PAR1_1 0x00000100 -#define TLB_WORD1_PAR1_2 0x00000200 -#define TLB_WORD1_PAR1_3 0x00000300 -#define TLB_WORD1_ERPN_MASK 0x0000000F -#define TLB_WORD1_ERPN_ENCODE(n) ((((unsigned long)(n)) & 0x0F) << 0) -#define TLB_WORD1_ERPN_DECODE(n) ((((unsigned long)(n)) >> 0) & 0x0F) - -#define TLB_WORD2_PAR2_MASK 0xC0000000 -#define TLB_WORD2_PAR2_ENCODE(n) ((((unsigned long)(n)) & 0x03) << 30) -#define TLB_WORD2_PAR2_DECODE(n) ((((unsigned long)(n)) >> 30) & 0x03) -#define TLB_WORD2_PAR2_0 0x00000000 -#define TLB_WORD2_PAR2_1 0x40000000 -#define TLB_WORD2_PAR2_2 0x80000000 -#define TLB_WORD2_PAR2_3 0xC0000000 -#define TLB_WORD2_U0_MASK 0x00008000 -#define TLB_WORD2_U0_ENABLE 0x00008000 -#define TLB_WORD2_U0_DISABLE 0x00000000 -#define TLB_WORD2_U1_MASK 0x00004000 -#define TLB_WORD2_U1_ENABLE 0x00004000 -#define TLB_WORD2_U1_DISABLE 0x00000000 -#define TLB_WORD2_U2_MASK 0x00002000 -#define TLB_WORD2_U2_ENABLE 0x00002000 -#define TLB_WORD2_U2_DISABLE 0x00000000 -#define TLB_WORD2_U3_MASK 0x00001000 -#define TLB_WORD2_U3_ENABLE 0x00001000 -#define TLB_WORD2_U3_DISABLE 0x00000000 -#define TLB_WORD2_W_MASK 0x00000800 -#define TLB_WORD2_W_ENABLE 0x00000800 -#define TLB_WORD2_W_DISABLE 0x00000000 -#define TLB_WORD2_I_MASK 0x00000400 -#define TLB_WORD2_I_ENABLE 0x00000400 -#define TLB_WORD2_I_DISABLE 0x00000000 -#define TLB_WORD2_M_MASK 0x00000200 -#define TLB_WORD2_M_ENABLE 0x00000200 -#define TLB_WORD2_M_DISABLE 0x00000000 -#define TLB_WORD2_G_MASK 0x00000100 -#define TLB_WORD2_G_ENABLE 0x00000100 -#define TLB_WORD2_G_DISABLE 0x00000000 -#define TLB_WORD2_E_MASK 0x00000080 -#define TLB_WORD2_E_ENABLE 0x00000080 -#define TLB_WORD2_E_DISABLE 0x00000000 -#define TLB_WORD2_UX_MASK 0x00000020 -#define TLB_WORD2_UX_ENABLE 0x00000020 -#define TLB_WORD2_UX_DISABLE 0x00000000 -#define TLB_WORD2_UW_MASK 0x00000010 -#define TLB_WORD2_UW_ENABLE 0x00000010 -#define TLB_WORD2_UW_DISABLE 0x00000000 -#define TLB_WORD2_UR_MASK 0x00000008 -#define TLB_WORD2_UR_ENABLE 0x00000008 -#define TLB_WORD2_UR_DISABLE 0x00000000 -#define TLB_WORD2_SX_MASK 0x00000004 -#define TLB_WORD2_SX_ENABLE 0x00000004 -#define TLB_WORD2_SX_DISABLE 0x00000000 -#define TLB_WORD2_SW_MASK 0x00000002 -#define TLB_WORD2_SW_ENABLE 0x00000002 -#define TLB_WORD2_SW_DISABLE 0x00000000 -#define TLB_WORD2_SR_MASK 0x00000001 -#define TLB_WORD2_SR_ENABLE 0x00000001 -#define TLB_WORD2_SR_DISABLE 0x00000000 - -/*----------------------------------------------------------------------------+ -| Following instructions are not available in Book E mode of the GNU assembler. -+----------------------------------------------------------------------------*/ -#define DCCCI(ra, rb) .long 0x7c000000 | \ - (ra << 16) | (rb << 11) | (454 << 1) - -#define ICCCI(ra, rb) .long 0x7c000000 | \ - (ra << 16) | (rb << 11) | (966 << 1) - -#define DCREAD(rt, ra, rb) .long 0x7c000000 | (rt << 21) | (ra << 16) | (rb << 11) | (486 << 1) - -#define ICREAD(ra, rb) .long 0x7c000000 | \ - (ra << 16) | (rb << 11) | (998 << 1) - -#define TLBSX(rt, ra, rb) .long 0x7c000000 | (rt << 21) | (ra << 16) | (rb << 11) | (914 << 1) - -#define TLBWE(rs, ra, ws) .long 0x7c000000 | (rs << 21) | (ra << 16) | (ws << 11) | (978 << 1) - -#define TLBRE(rt, ra, ws) .long 0x7c000000 | (rt << 21) | (ra << 16) | (ws << 11) | (946 << 1) - -#define TLBSXDOT(rt, ra, rb) .long 0x7c000001 | (rt << 21) | (ra << 16) | (rb << 11) | (914 << 1) - -#define MSYNC .long 0x7c000000 | \ - (598 << 1) - -#define MBAR_INST .long 0x7c000000 | \ - (854 << 1) - -#ifndef __ASSEMBLY__ -/* Prototypes */ -void mttlb1(unsigned long index, unsigned long value); -void mttlb2(unsigned long index, unsigned long value); -void mttlb3(unsigned long index, unsigned long value); -unsigned long mftlb1(unsigned long index); -unsigned long mftlb2(unsigned long index); -unsigned long mftlb3(unsigned long index); - -void program_tlb(uint64_t phys_addr, uint32_t virt_addr, uint32_t size, uint32_t tlb_word2_i_value); -void remove_tlb(uint32_t vaddr, uint32_t size); -void change_tlb(uint32_t vaddr, uint32_t size, uint32_t tlb_word2_i_value); -#endif /* __ASSEMBLY__ */ - -#endif /* CONFIG_440 */ -#endif /* _PPC_MMU_H_ */ diff --git a/dev/ZKA/KernelKit/CodeManager.hxx b/dev/ZKA/KernelKit/CodeManager.hxx index 513e65b7..aa384123 100644 --- a/dev/ZKA/KernelKit/CodeManager.hxx +++ b/dev/ZKA/KernelKit/CodeManager.hxx @@ -23,8 +23,8 @@ namespace Kernel /// @brief Main process entrypoint. typedef void (*MainKind)(void); - /// @brief Executes a new process from a function. kernel code only. - /// @note This sets up a new stack, anything on the main function that calls the kernel will not be accessible. + /// @brief Executes a new process from a function. Kernel code only. + /// @note This sets up a new stack, anything on the main function that calls the Kernel will not be accessible. /// @param main the start of the process. /// @return if the process was started or not. bool execute_from_image(MainKind main, const Char* process_name) noexcept; diff --git a/dev/ZKA/KernelKit/DriveManager.hxx b/dev/ZKA/KernelKit/DriveManager.hxx index 04a0ded5..9d90a42c 100644 --- a/dev/ZKA/KernelKit/DriveManager.hxx +++ b/dev/ZKA/KernelKit/DriveManager.hxx @@ -7,7 +7,7 @@ #ifndef __INC_DRIVE_MANAGER_HXX__ #define __INC_DRIVE_MANAGER_HXX__ -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <CompilerKit/CompilerKit.hxx> #include <KernelKit/DebugOutput.hxx> #include <KernelKit/DeviceManager.hxx> diff --git a/dev/ZKA/KernelKit/Heap.hxx b/dev/ZKA/KernelKit/Heap.hxx index 0046fc58..5ce5a293 100644 --- a/dev/ZKA/KernelKit/Heap.hxx +++ b/dev/ZKA/KernelKit/Heap.hxx @@ -9,7 +9,7 @@ // last-rev 30/01/24 // file: KernelHeap.hxx -// description: heap allocation for the kernel. +// description: heap allocation for the Kernel. #include <NewKit/Defines.hxx> @@ -25,7 +25,7 @@ namespace Kernel /// @return voidPtr mm_realloc_ke_heap(voidPtr allocatedPtr, SizeT newSz); - /// @brief Check if pointer is a valid kernel pointer. + /// @brief Check if pointer is a valid Kernel pointer. /// @param allocatedPtr the pointer /// @return if it exists. Boolean mm_is_valid_heap(VoidPtr allocatedPtr); @@ -35,14 +35,14 @@ namespace Kernel /// @param rw read write (true to enable it) /// @param user is it accesible by user processes? /// @return The newly allocated pointer. - voidPtr mm_new_ke_heap(const SizeT sz, const Bool rw, const Bool user); + VoidPtr mm_new_ke_heap(const SizeT sz, const Bool rw, const Bool user); /// @brief Protect the heap with a CRC value. /// @param allocatedPtr pointer. /// @return if it valid: point has crc now., otherwise fail. Boolean mm_protect_ke_heap(VoidPtr allocatedPtr); - /// @brief Makes a kernel heap page. + /// @brief Makes a Kernel page. /// @param allocatedPtr the page pointer. /// @return Int32 mm_make_ke_page(VoidPtr allocatedPtr); diff --git a/dev/ZKA/KernelKit/LPC.hxx b/dev/ZKA/KernelKit/LPC.hxx index 152e7295..746f0d2a 100644 --- a/dev/ZKA/KernelKit/LPC.hxx +++ b/dev/ZKA/KernelKit/LPC.hxx @@ -9,11 +9,11 @@ #include <NewKit/Defines.hxx> /// @file LPC.hxx -/// @brief Local Process Codes. +/// @brief Local UserProcess Codes. -#define ErrLocalIsOk() (Kernel::ProcessScheduler::The().CurrentProcess().Leak().GetLocalCode() == Kernel::kErrorSuccess) -#define ErrLocalFailed() (Kernel::ProcessScheduler::The().CurrentProcess().Leak().GetLocalCode() != Kernel::kErrorSuccess) -#define ErrLocal() Kernel::ProcessScheduler::The().CurrentProcess().Leak().GetLocalCode() +#define ErrLocalIsOk() (Kernel::UserProcessScheduler::The().CurrentProcess().Leak().GetLocalCode() == Kernel::kErrorSuccess) +#define ErrLocalFailed() (Kernel::UserProcessScheduler::The().CurrentProcess().Leak().GetLocalCode() != Kernel::kErrorSuccess) +#define ErrLocal() Kernel::UserProcessScheduler::The().CurrentProcess().Leak().GetLocalCode() namespace Kernel { diff --git a/dev/ZKA/KernelKit/MP.hxx b/dev/ZKA/KernelKit/MP.hxx index d2704b23..03b8b6fa 100644 --- a/dev/ZKA/KernelKit/MP.hxx +++ b/dev/ZKA/KernelKit/MP.hxx @@ -26,9 +26,9 @@ namespace Kernel enum ThreadKind { kHartSystemReserved, // System reserved thread, well user can't use it - kHartStandard, // user thread, cannot be used by kernel + kHartStandard, // user thread, cannot be used by Kernel kHartFallback, // fallback thread, cannot be used by user if not clear or - // used by kernel. + // used by Kernel. kHartBoot, // The core we booted from, the mama. kInvalidHart, kHartCount, @@ -70,7 +70,7 @@ namespace Kernel private: HAL::StackFrame* fStack{nullptr}; - ThreadKind fKind{ThreadKind::kInvalidHart}; + ThreadKind fKind{ThreadKind::kHartStandard}; ThreadID fID{0}; ProcessID fSourcePID{-1}; bool fWakeup{false}; @@ -106,7 +106,7 @@ namespace Kernel public: /// @brief Shared instance of the MP Manager. /// @return the reference to the mp manager class. - static Ref<HardwareThreadScheduler> The(); + STATIC HardwareThreadScheduler& The(); public: /// @brief Returns the amount of threads present in the system. diff --git a/dev/ZKA/KernelKit/PEFDLLInterface.hxx b/dev/ZKA/KernelKit/PEFDLLInterface.hxx index 3c0187f1..cfedd07c 100644 --- a/dev/ZKA/KernelKit/PEFDLLInterface.hxx +++ b/dev/ZKA/KernelKit/PEFDLLInterface.hxx @@ -98,8 +98,8 @@ namespace Kernel typedef PEFDLLInterface* DLLInterfacePtr; - EXTERN_C DLLInterfacePtr rtl_init_shared_object(PROCESS_HEADER_BLOCK* header); - EXTERN_C Void rtl_fini_shared_object(PROCESS_HEADER_BLOCK* header, DLLInterfacePtr lib, Bool* successful); + EXTERN_C DLLInterfacePtr rtl_init_shared_object(UserProcess* header); + EXTERN_C Void rtl_fini_shared_object(UserProcess* header, DLLInterfacePtr lib, Bool* successful); } // namespace Kernel #endif /* ifndef __KERNELKIT_SHARED_OBJECT_HXX__ */ diff --git a/dev/ZKA/KernelKit/Semaphore.hxx b/dev/ZKA/KernelKit/Semaphore.hxx index 685b00a3..74c5f8da 100644 --- a/dev/ZKA/KernelKit/Semaphore.hxx +++ b/dev/ZKA/KernelKit/Semaphore.hxx @@ -12,9 +12,9 @@ namespace Kernel { - class PROCESS_HEADER_BLOCK; + class UserProcess; - typedef PROCESS_HEADER_BLOCK* PROCESS_HEADER_BLOCK_PTR; + typedef UserProcess* UserProcessPtr; /// @brief Access control class, which locks a task until one is done. class Semaphore final @@ -31,13 +31,13 @@ namespace Kernel void WaitForProcess() noexcept; public: - bool Lock(PROCESS_HEADER_BLOCK* process); - bool LockOrWait(PROCESS_HEADER_BLOCK* process, TimerInterface* timer); + bool Lock(UserProcess* process); + bool LockOrWait(UserProcess* process, TimerInterface* timer); public: ZKA_COPY_DEFAULT(Semaphore); private: - PROCESS_HEADER_BLOCK_PTR fLockingProcess{nullptr}; + UserProcessPtr fLockingProcess{nullptr}; }; } // namespace Kernel diff --git a/dev/ZKA/KernelKit/ThreadLocalStorage.hxx b/dev/ZKA/KernelKit/ThreadLocalStorage.hxx index 115a4ca1..c7803d69 100644 --- a/dev/ZKA/KernelKit/ThreadLocalStorage.hxx +++ b/dev/ZKA/KernelKit/ThreadLocalStorage.hxx @@ -9,11 +9,11 @@ #include <NewKit/Defines.hxx> -//! @brief TLS implementation in C++ +///! @brief Thread Local Storage for newoskrnl. -#define kCookieMag0 'H' -#define kCookieMag1 'C' -#define kCookieMag2 'R' +#define kCookieMag0 'Z' +#define kCookieMag1 'K' +#define kCookieMag2 'A' #define kTLSCookieLen (3U) @@ -23,8 +23,8 @@ struct THREAD_INFORMATION_BLOCK; /// Located in GS on AMD64, other architectures have their own stuff. (64x0, 32x0, ARM64) struct PACKED THREAD_INFORMATION_BLOCK final { - Kernel::Char f_Cookie[kTLSCookieLen]{0}; // Thread magic number. - Kernel::VoidPtr f_ThreadRecord{nullptr}; + Kernel::Char f_Cookie[kTLSCookieLen]{0}; //! Thread magic number. + Kernel::VoidPtr f_ThreadRecord{nullptr}; //! Thread information record. }; ///! @brief Cookie Sanity check. @@ -42,7 +42,7 @@ template <typename T, typename... Args> T* tls_new_class(Args&&... args); /// @brief TLS install TIB and PIB. (syscall) -EXTERN_C void rt_install_tib(THREAD_INFORMATION_BLOCK* TIB, THREAD_INFORMATION_BLOCK* PIB); +EXTERN_C Kernel::Void rt_install_tib(THREAD_INFORMATION_BLOCK* TIB, THREAD_INFORMATION_BLOCK* PIB); /// @brief TLS check (syscall) EXTERN_C Kernel::Bool tls_check_syscall_impl(Kernel::VoidPtr TIB) noexcept; diff --git a/dev/ZKA/KernelKit/ThreadLocalStorage.inl b/dev/ZKA/KernelKit/ThreadLocalStorage.inl index 97480bdd..7a1ef247 100644 --- a/dev/ZKA/KernelKit/ThreadLocalStorage.inl +++ b/dev/ZKA/KernelKit/ThreadLocalStorage.inl @@ -8,7 +8,7 @@ //! @brief Allocate resources from the process's heap storage. #ifndef _INC_PROCESS_SCHEDULER_HXX_ -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #endif template <typename T> @@ -16,7 +16,7 @@ inline T* tls_new_ptr(void) noexcept { using namespace Kernel; - auto ref_process = ProcessScheduler::The().CurrentProcess(); + auto ref_process = UserProcessScheduler::The().CurrentProcess(); MUST_PASS(ref_process); T* pointer = (T*)ref_process.Leak().New(sizeof(T)); @@ -32,7 +32,7 @@ inline Kernel::Bool tls_delete_ptr(T* ptr) noexcept using namespace Kernel; - auto ref_process = ProcessScheduler::The().CurrentProcess(); + auto ref_process = UserProcessScheduler::The().CurrentProcess(); MUST_PASS(ref_process); return ref_process.Leak().Delete(ptr, sizeof(T)); diff --git a/dev/ZKA/KernelKit/User.hxx b/dev/ZKA/KernelKit/User.hxx index 39d9f5ba..36353ed0 100644 --- a/dev/ZKA/KernelKit/User.hxx +++ b/dev/ZKA/KernelKit/User.hxx @@ -22,9 +22,6 @@ #define kMaxUserNameLen (255) #define kMaxUserTokenLen (255) -// hash password. -// use this data to then fetch specific data of the user.. - namespace Kernel { class User; @@ -34,7 +31,7 @@ namespace Kernel kRingStdUser = 1, kRingSuperUser = 2, kRingGuestUser = 5, - kRingCount = 5, + kRingCount = 3, }; class User final diff --git a/dev/ZKA/KernelKit/ProcessScheduler.hxx b/dev/ZKA/KernelKit/UserProcessScheduler.hxx index 5534c591..f0c19423 100644 --- a/dev/ZKA/KernelKit/ProcessScheduler.hxx +++ b/dev/ZKA/KernelKit/UserProcessScheduler.hxx @@ -14,7 +14,7 @@ #define kSchedMinMicroTime (AffinityKind::kStandard) #define kSchedInvalidPID (-1) - +#define cMaxStackSz (4096) /* Max stack sz */ #define kSchedProcessLimitPerTeam (16U) //////////////////////////////////////////////////// @@ -26,20 +26,20 @@ namespace Kernel { //! @brief Forward declarations. - struct PROCESS_HEADER_BLOCK; + struct UserProcess; class PEFDLLInterface; class ProcessTeam; - class ProcessScheduler; + class UserProcessScheduler; class ProcessHelper; - //! @brief Process identifier. + //! @brief UserProcess identifier. typedef Int64 ProcessID; - //! @brief Process name length. + //! @brief UserProcess name length. inline constexpr SizeT kProcessLen = 256U; - //! @brief Process status enum. + //! @brief UserProcess status enum. enum class ProcessStatus : Int32 { kStarting, @@ -53,12 +53,12 @@ namespace Kernel //! to run. enum class AffinityKind : Int32 { - kInvalid = 300, - kVeryHigh = 250, - kHigh = 200, - kStandard = 150, - kLowUsage = 100, - kVeryLowUsage = 50, + kRealTime = 0000, + kVeryHigh = 2500, + kHigh = 2000, + kStandard = 1500, + kLowUsage = 1000, + kVeryLowUsage = 5000, }; // operator overloading. @@ -122,20 +122,20 @@ namespace Kernel using ImagePtr = VoidPtr; using HeapPtrKind = VoidPtr; - /// @name PROCESS_HEADER_BLOCK - /// @brief Process Header Block (PHB). + /// @name UserProcess + /// @brief User process block. /// Holds information about the running process/thread. - struct PROCESS_HEADER_BLOCK final + struct UserProcess final { public: - explicit PROCESS_HEADER_BLOCK(VoidPtr startImage = nullptr) + explicit UserProcess(VoidPtr startImage = nullptr) : Image(startImage) { } - ~PROCESS_HEADER_BLOCK() = default; + ~UserProcess() = default; - ZKA_COPY_DEFAULT(PROCESS_HEADER_BLOCK) + ZKA_COPY_DEFAULT(UserProcess) public: void SetEntrypoint(UIntPtr& imageStart) noexcept; @@ -144,19 +144,22 @@ namespace Kernel public: Char Name[kProcessLen] = {"PROCESS #0 (TEAM 0)"}; ProcessSubsystem SubSystem{ProcessSubsystem::eProcessSubsystemInvalid}; - User* AssignedOwner{nullptr}; + User* Owner{nullptr}; HAL::StackFramePtr StackFrame{nullptr}; AffinityKind Affinity{AffinityKind::kStandard}; ProcessStatus Status{ProcessStatus::kDead}; + UInt8* StackReserve{ nullptr }; // Memory, images pointers. HeapPtrKind HeapCursor{nullptr}; ImagePtr Image{nullptr}; HeapPtrKind HeapPtr{nullptr}; - // shared library handle, reserved for kSharedObjectKind types of executables only. + SizeT StackSize{mib_cast(8)}; + + // shared library handle, reserved for kDLLKind types of executables only. PEFDLLInterface* DLLPtr{nullptr}; - PROCESS_HEADER_BLOCK* Parent{nullptr}; + UserProcess* Parent{nullptr}; // Memory usage. SizeT UsedMemory{0}; @@ -166,7 +169,7 @@ namespace Kernel enum { kExeKind = 1, - kSharedObjectKind = 2, + kDLLKind = 2, kKindCount, }; @@ -199,7 +202,7 @@ namespace Kernel ///! @brief Wakes up threads. Void Wake(const bool wakeup = false); - // PROCESS_HEADER_BLOCK getters. + // UserProcess getters. public: ///! @brief Get the process's name ///! @example 'C Runtime Library' @@ -217,7 +220,7 @@ namespace Kernel UInt32 fLastExitCode{0}; Int32 fLocalCode{0}; - friend ProcessScheduler; + friend UserProcessScheduler; friend ProcessHelper; }; @@ -231,29 +234,29 @@ namespace Kernel ZKA_COPY_DEFAULT(ProcessTeam); - Array<PROCESS_HEADER_BLOCK, kSchedProcessLimitPerTeam>& AsArray(); - Ref<PROCESS_HEADER_BLOCK>& AsRef(); + Array<UserProcess, kSchedProcessLimitPerTeam>& AsArray(); + Ref<UserProcess>& AsRef(); ProcessID& Id() noexcept; public: - Array<PROCESS_HEADER_BLOCK, kSchedProcessLimitPerTeam> mProcessList; - Ref<PROCESS_HEADER_BLOCK> mCurrentProcess; + Array<UserProcess, kSchedProcessLimitPerTeam> mProcessList; + Ref<UserProcess> mCurrentProcess; SizeT mProcessAmount{0}; ProcessID mTeamId{0}; }; - using PROCESS_HEADER_BLOCK_PTR = PROCESS_HEADER_BLOCK*; + using UserProcessPtr = UserProcess*; - /// @brief PROCESS_HEADER_BLOCK manager class. - /// The main class which you call to schedule an app. - class ProcessScheduler final + /// @brief UserProcess scheduler class. + /// The main class which you call to schedule processes. + class UserProcessScheduler final { public: - explicit ProcessScheduler() = default; + explicit UserProcessScheduler() = default; - ~ProcessScheduler() = default; + ~UserProcessScheduler() = default; - ZKA_COPY_DEFAULT(ProcessScheduler) + ZKA_COPY_DEFAULT(UserProcessScheduler) operator bool(); bool operator!(); @@ -262,29 +265,29 @@ namespace Kernel ProcessTeam& CurrentTeam(); public: - SizeT Add(PROCESS_HEADER_BLOCK& processRef); + SizeT Add(UserProcess& processRef); Bool Remove(ProcessID processSlot); public: - Ref<PROCESS_HEADER_BLOCK>& CurrentProcess(); + Ref<UserProcess>& CurrentProcess(); SizeT Run() noexcept; public: - STATIC ProcessScheduler& The(); + STATIC UserProcessScheduler& The(); private: ProcessTeam mTeam; }; /* - * \brief Process helper class, which contains needed utilities for the scheduler. + * \brief UserProcess helper class, which contains needed utilities for the scheduler. */ class ProcessHelper final { public: STATIC bool Switch(HAL::StackFramePtr new_stack, const PID& new_pid); - STATIC bool CanBeScheduled(PROCESS_HEADER_BLOCK& process); + STATIC bool CanBeScheduled(UserProcess& process); STATIC PID& TheCurrentPID(); STATIC SizeT StartScheduling(); }; diff --git a/dev/ZKA/Linker/16x0.json b/dev/ZKA/Linker/16x0.json deleted file mode 100644 index 9c284b53..00000000 --- a/dev/ZKA/Linker/16x0.json +++ /dev/null @@ -1,8 +0,0 @@ -{ - "linker": "link.exe", - "executable_type": "kernel", - "output_name": "newoskrnl.dll", - "start_proc": "__ImageStart", - "arch": "16x0", - "format": "PEF" -} diff --git a/dev/ZKA/Linker/32x0.json b/dev/ZKA/Linker/32x0.json deleted file mode 100644 index 05a3db9b..00000000 --- a/dev/ZKA/Linker/32x0.json +++ /dev/null @@ -1,8 +0,0 @@ -{ - "linker": "link.exe", - "executable_type": "kernel", - "output_name": "newoskrnl.dll", - "start_proc": "__ImageStart", - "arch": "32x0", - "format": "PEF" -} diff --git a/dev/ZKA/Linker/64x0.json b/dev/ZKA/Linker/64x0.json deleted file mode 100644 index c1d0e388..00000000 --- a/dev/ZKA/Linker/64x0.json +++ /dev/null @@ -1,8 +0,0 @@ -{ - "linker": "link.exe", - "executable_type": "kernel", - "output_name": "newoskrnl.dll", - "start_proc": "__ImageStart", - "arch": "64x0", - "format": "PEF" -} diff --git a/dev/ZKA/Linker/arm64.json b/dev/ZKA/Linker/arm64.json deleted file mode 100644 index 99c190bf..00000000 --- a/dev/ZKA/Linker/arm64.json +++ /dev/null @@ -1,8 +0,0 @@ -{ - "linker": "link.exe", - "executable_type": "kernel", - "output_name": "newoskrnl.dll", - "start_proc": "__ImageStart", - "arch": "arm64", - "format": "PEF" -} diff --git a/dev/ZKA/Modules/CoreCG/WindowRenderer.hxx b/dev/ZKA/Modules/CoreCG/WindowRenderer.hxx index 580e2197..ebd47ac9 100644 --- a/dev/ZKA/Modules/CoreCG/WindowRenderer.hxx +++ b/dev/ZKA/Modules/CoreCG/WindowRenderer.hxx @@ -8,7 +8,7 @@ #include <Modules/CoreCG/Accessibility.hxx> #include <KernelKit/Heap.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/LPC.hxx> #include <NewKit/Defines.hxx> #include <NewKit/Utils.hxx> diff --git a/dev/ZKA/Modules/ReadMe.md b/dev/ZKA/Modules/ReadMe.md index dde14fe4..de72cb1a 100644 --- a/dev/ZKA/Modules/ReadMe.md +++ b/dev/ZKA/Modules/ReadMe.md @@ -1,6 +1,6 @@ # Kernel modules -Pluggable modules for builtin hardware support within the kernel. +Pluggable modules for builtin hardware support within the Kernel. ## Maintainers diff --git a/dev/ZKA/NewKit/Array.hxx b/dev/ZKA/NewKit/Array.hxx index 22ee9f6a..9fa545ef 100644 --- a/dev/ZKA/NewKit/Array.hxx +++ b/dev/ZKA/NewKit/Array.hxx @@ -37,6 +37,11 @@ namespace Kernel return true; } + const SizeT Capacity() + { + return N; + } + const SizeT Count() { SizeT count = 0; diff --git a/dev/ZKA/ReadMe.md b/dev/ZKA/ReadMe.md index 76d6aab4..a63661c9 100644 --- a/dev/ZKA/ReadMe.md +++ b/dev/ZKA/ReadMe.md @@ -1,3 +1,3 @@ # ZKA Minimal Kernel DLL.
-A dll which takes the role of the microkernel image.
\ No newline at end of file +A dll which takes the role of the microKernel image.
diff --git a/dev/ZKA/Sources/CodeManager.cxx b/dev/ZKA/Sources/CodeManager.cxx index 3dc08ca6..243e3441 100644 --- a/dev/ZKA/Sources/CodeManager.cxx +++ b/dev/ZKA/Sources/CodeManager.cxx @@ -6,12 +6,12 @@ #include <NewKit/Utils.hxx> #include <KernelKit/CodeManager.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> namespace Kernel { - /// @brief Executes a new process from a function. kernel code only. - /// @note This sets up a new stack, anything on the main function that calls the kernel will not be accessible. + /// @brief Executes a new process from a function. Kernel code only. + /// @note This sets up a new stack, anything on the main function that calls the Kernel will not be accessible. /// @param main the start of the process. /// @return if the process was started or not. bool execute_from_image(MainKind main, const Char* processName) noexcept @@ -19,10 +19,12 @@ namespace Kernel if (!main) return false; - PROCESS_HEADER_BLOCK proc((VoidPtr)main); - proc.Kind = PROCESS_HEADER_BLOCK::kExeKind; + UserProcess proc((VoidPtr)main); + proc.Kind = UserProcess::kExeKind; + proc.StackSize = mib_cast(1); + rt_copy_memory((VoidPtr)processName, proc.Name, rt_string_len(processName)); - return ProcessScheduler::The().Add(proc) == kErrorSuccess; + return UserProcessScheduler::The().Add(proc) == kErrorSuccess; } } // namespace Kernel diff --git a/dev/ZKA/Sources/DLLMain.cxx b/dev/ZKA/Sources/DLLMain.cxx index 89ca0d3c..15a9079f 100644 --- a/dev/ZKA/Sources/DLLMain.cxx +++ b/dev/ZKA/Sources/DLLMain.cxx @@ -3,7 +3,7 @@ Copyright ZKA Technologies File: Main.cxx - Purpose: Main entrypoint of kernel. + Purpose: Main entrypoint of Kernel. ------------------------------------------- */ @@ -16,7 +16,7 @@ #include <KernelKit/Heap.hxx> #include <KernelKit/PEF.hxx> #include <KernelKit/PEFCodeManager.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <NewKit/Json.hxx> #include <NewKit/KernelCheck.hxx> #include <NewKit/String.hxx> @@ -28,7 +28,7 @@ #include <KernelKit/Timer.hxx> /***********************************************************************************/ -/* Returns kernel's version. */ +/* Returns Kernel's version. */ /***********************************************************************************/ EXTERN Kernel::Property cKernelVersion; @@ -152,7 +152,7 @@ namespace Kernel::Detail namespace Kernel { - EXTERN ProcessScheduler* cProcessScheduler; + EXTERN UserProcessScheduler* cProcessScheduler; } // namespace Kernel /// @brief Application entrypoint. @@ -173,7 +173,7 @@ EXTERN_C Kernel::Void ke_dll_entrypoint(Kernel::Void) CG::CGDrawWindowList(&cKernelWnd, 1); - /// Now run kernel loop, until no process are running. + /// Now run Kernel loop, until no process are running. Kernel::Detail::FilesystemInstaller(); // automatic filesystem creation. cKernelWnd->w_sub_type = CG::cWndFlagCloseControlSelect; @@ -213,9 +213,13 @@ EXTERN_C Kernel::Void ke_dll_entrypoint(Kernel::Void) CG::CGDrawStringToWnd(cKernelWnd, kSysDrv, 20, 10 + (FONT_SIZE_X * Kernel::rt_string_len("newoskrnl.dll: Missing catalog: ")), RGB(0, 0, 0)); } - Kernel::execute_from_image([]() -> void { - }, - "ZKA Logger"); + auto hey = []() -> void { + auto number_own = 8; + Kernel::kcout << "I have my own stack: " << Kernel::number(number_own); + while (Yes); + }; + + Kernel::execute_from_image(hey, "ZKA Logger"); while (Yes) { diff --git a/dev/ZKA/Sources/FS/NewFS.cxx b/dev/ZKA/Sources/FS/NewFS.cxx index 5406f91c..56707738 100644 --- a/dev/ZKA/Sources/FS/NewFS.cxx +++ b/dev/ZKA/Sources/FS/NewFS.cxx @@ -16,7 +16,7 @@ #include <NewKit/String.hxx> #include <NewKit/Utils.hxx> #include <FirmwareKit/EPM.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/User.hxx> using namespace Kernel; diff --git a/dev/ZKA/Sources/Heap.cxx b/dev/ZKA/Sources/Heap.cxx index de9eaa86..a89ed584 100644 --- a/dev/ZKA/Sources/Heap.cxx +++ b/dev/ZKA/Sources/Heap.cxx @@ -22,6 +22,7 @@ namespace Kernel PageManager kHeapPageManager; Bool kOperationInProgress = No; + /// @brief Contains data structures and algorithms for the heap. namespace Detail { /// @brief Kernel heap information block. @@ -58,6 +59,8 @@ namespace Kernel } } // namespace Detail + Detail::HEAP_INFORMATION_BLOCK_PTR kLatestAllocation = nullptr; + /// @brief Declare a new size for allocatedPtr. /// @param allocatedPtr the pointer. /// @return @@ -102,15 +105,17 @@ namespace Kernel heap_info_ptr->fTargetPtrSize = szFix; heap_info_ptr->fMagic = kKernelHeapMagic; - heap_info_ptr->fCRC32 = 0; // dont fill it for now. - heap_info_ptr->fTargetPtr = wrapper.VirtualAddress(); - heap_info_ptr->fPagePtr = 0; + heap_info_ptr->fCRC32 = 0U; // dont fill it for now. + heap_info_ptr->fTargetPtr = wrapper.VirtualAddress() + sizeof(Detail::HEAP_INFORMATION_BLOCK); + heap_info_ptr->fPagePtr = 0UL; ++kHeapCount; + kLatestAllocation = heap_info_ptr; + Detail::mm_alloc_fini_timeout(); - return reinterpret_cast<VoidPtr>(wrapper.VirtualAddress() + + return reinterpret_cast<VoidPtr>(heap_info_ptr + sizeof(Detail::HEAP_INFORMATION_BLOCK)); } @@ -196,7 +201,7 @@ namespace Kernel return -kErrorInternal; } - /// @brief Check if pointer is a valid kernel pointer. + /// @brief Check if pointer is a valid Kernel pointer. /// @param heap_ptr the pointer /// @return if it exists. Boolean mm_is_valid_heap(VoidPtr heap_ptr) diff --git a/dev/ZKA/Sources/KernelCheck.cxx b/dev/ZKA/Sources/KernelCheck.cxx index 85cfe215..8e5f0827 100644 --- a/dev/ZKA/Sources/KernelCheck.cxx +++ b/dev/ZKA/Sources/KernelCheck.cxx @@ -55,7 +55,7 @@ namespace Kernel switch (id) { case RUNTIME_CHECK_PROCESS: { - CGDrawString("0x00000008 Process execution fault, this is a catasrophic failure.", start_y, x, panicTxt); + CGDrawString("0x00000008 UserProcess execution fault, this is a catasrophic failure.", start_y, x, panicTxt); break; } case RUNTIME_CHECK_ACPI: { @@ -89,7 +89,7 @@ namespace Kernel break; } case RUNTIME_CHECK_IPC: { - CGDrawString("0x00000003 Bad kernel IPC error.", start_y, x, panicTxt); + CGDrawString("0x00000003 Bad Kernel IPC error.", start_y, x, panicTxt); RecoveryFactory::Recover(); break; } @@ -98,7 +98,7 @@ namespace Kernel RecoveryFactory::Recover(); break; case RUNTIME_CHECK_UNEXCPECTED: { - CGDrawString("0x0000000B Catasrophic kernel failure.", start_y, x, panicTxt); + CGDrawString("0x0000000B Catasrophic Kernel failure.", start_y, x, panicTxt); break; } case RUNTIME_CHECK_FAILED: { @@ -108,7 +108,7 @@ namespace Kernel } default: { RecoveryFactory::Recover(); - CGDrawString("0xFFFFFFFC Unknown kernel error.", start_y, x, panicTxt); + CGDrawString("0xFFFFFFFC Unknown Kernel error.", start_y, x, panicTxt); break; } } @@ -125,7 +125,7 @@ namespace Kernel HardwareTimer timer(cMaxSeconds); timer.Wait(); - kcout << "newoskrnl: Shutting down...\r"; + kcout << "newoskrnl: Shutting down computer...\r"; PowerFactoryInterface power(nullptr); power.Shutdown(); diff --git a/dev/ZKA/Sources/MP.cxx b/dev/ZKA/Sources/MP.cxx index 89b5f01d..381f266d 100644 --- a/dev/ZKA/Sources/MP.cxx +++ b/dev/ZKA/Sources/MP.cxx @@ -5,19 +5,23 @@ ------------------------------------------- */ #include <ArchKit/ArchKit.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/MP.hxx> #include <CFKit/Property.hxx> ///! BUGS: 0 ///! @file MP.cxx -///! @brief This file handles multi processing in the kernel. +///! @brief This file handles multi processing in the Kernel. ///! @brief Multi processing is needed for multi-tasking operations. namespace Kernel { - STATIC Property cSMPCoreName; + /***********************************************************************************/ + /// @brief MP object container property. + /***********************************************************************************/ + + Property cSMPCoreName; ///! A HardwareThread class takes care of it's owned hardware thread. ///! It has a stack for it's core. @@ -87,29 +91,10 @@ namespace Kernel /// @retval false stack is invalid, previous code is running. Bool HardwareThread::Switch(HAL::StackFramePtr stack) { - /// provide 'nullptr' to free the stack frame. - if (stack == nullptr) - { - delete fStack; - fStack = nullptr; - - return true; - } - - if (!hal_check_stack(stack)) - { - return false; - } - - if (fStack) - { - delete fStack; - fStack = nullptr; - } - fStack = stack; hal_switch_context(fStack); + mp_do_context_switch(fStack); return true; } @@ -120,28 +105,30 @@ namespace Kernel return fWakeup; } - //! @brief Constructor and destructor + ///! @brief Internal Hardware Thread list. + STATIC HardwareThread cThreadList[cMaxHWThreads]; + + ///! @brief Constructor and destructors. ///! @brief Default constructor. HardwareThreadScheduler::HardwareThreadScheduler() { - StringView strCoreName(512); - strCoreName += "\\Class\\Smp\\MPClass"; + kcout << "newoskrnl: initializing HardwareThreadScheduler." << endl; - cSMPCoreName.GetKey() = strCoreName; - cSMPCoreName.GetValue() = (UIntPtr)this; + cSMPCoreName.GetKey() += "Property\\MPClass"; + cSMPCoreName.GetValue() = (PropertyId)this; - kcout << "newoskrnl: initializing " << strCoreName.CData() << endl; + kcout << "newoskrnl: initialized HardwareThreadScheduler." << endl; } ///! @brief Default destructor. HardwareThreadScheduler::~HardwareThreadScheduler() = default; /// @brief Shared singleton function - Ref<HardwareThreadScheduler> HardwareThreadScheduler::The() + HardwareThreadScheduler& HardwareThreadScheduler::The() { - static HardwareThreadScheduler manager; - return {manager}; + STATIC HardwareThreadScheduler sched; + return sched; } /// @brief Get Stack Frame of Core diff --git a/dev/ZKA/Sources/Network/IPC.cxx b/dev/ZKA/Sources/Network/IPC.cxx index 92476d9c..e5926c7f 100644 --- a/dev/ZKA/Sources/Network/IPC.cxx +++ b/dev/ZKA/Sources/Network/IPC.cxx @@ -6,7 +6,7 @@ #include <NetworkKit/IPC.hxx> #include <KernelKit/LPC.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> using namespace Kernel; @@ -63,7 +63,7 @@ namespace Kernel if (!pckt || !ipc_int_sanitize_packet(pckt)) { - ProcessScheduler::The().CurrentProcess().Leak().Crash(); + UserProcessScheduler::The().CurrentProcess().Leak().Crash(); return false; } @@ -82,7 +82,7 @@ namespace Kernel // crash process if the packet pointer of pointer is NULL. if (!pckt_in) { - ProcessScheduler::The().CurrentProcess().Leak().Crash(); + UserProcessScheduler::The().CurrentProcess().Leak().Crash(); return false; } @@ -98,12 +98,12 @@ namespace Kernel (*pckt_in)->IpcEndianess = static_cast<UInt8>(endian); (*pckt_in)->IpcPacketSize = sizeof(IPC_MESSAGE_STRUCT); - (*pckt_in)->IpcFrom.ProcessID = Kernel::ProcessScheduler::The().CurrentProcess().Leak().ProcessId; - (*pckt_in)->IpcFrom.ProcessTeam = Kernel::ProcessScheduler::The().CurrentTeam().mTeamId; + (*pckt_in)->IpcFrom.ProcessID = Kernel::UserProcessScheduler::The().CurrentProcess().Leak().ProcessId; + (*pckt_in)->IpcFrom.ProcessTeam = Kernel::UserProcessScheduler::The().CurrentTeam().mTeamId; return true; } - ProcessScheduler::The().CurrentProcess().Leak().Crash(); + UserProcessScheduler::The().CurrentProcess().Leak().Crash(); return false; } } // namespace Kernel diff --git a/dev/ZKA/Sources/PEFCodeManager.cxx b/dev/ZKA/Sources/PEFCodeManager.cxx index cecc4820..60b55efc 100644 --- a/dev/ZKA/Sources/PEFCodeManager.cxx +++ b/dev/ZKA/Sources/PEFCodeManager.cxx @@ -7,7 +7,7 @@ #include <KernelKit/DebugOutput.hxx> #include <KernelKit/Heap.hxx> #include <KernelKit/PEFCodeManager.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <NewKit/Defines.hxx> #include <NewKit/KernelCheck.hxx> #include <NewKit/OwnPtr.hxx> @@ -192,17 +192,24 @@ namespace Kernel namespace Utils { - bool execute_from_image(PEFLoader& exec, const Int32& procKind) noexcept + Bool execute_from_image(PEFLoader& exec, const Int32& procKind) noexcept { auto errOrStart = exec.FindStart(); - if (errOrStart.Error() != 0) + if (errOrStart.Error() != kErrorSuccess) return false; - PROCESS_HEADER_BLOCK proc(errOrStart.Leak().Leak()); + UserProcess proc(errOrStart.Leak().Leak()); + proc.Kind = procKind; + proc.StackSize = *(UIntPtr*)exec.FindSymbol("__STACK_SIZE", kPefData); + + if (!proc.StackSize) + { + proc.StackSize = mib_cast(8); + } - return ProcessScheduler::The().Add(proc); + return UserProcessScheduler::The().Add(proc); } } // namespace Utils diff --git a/dev/ZKA/Sources/PEFDLLInterface.cxx b/dev/ZKA/Sources/PEFDLLInterface.cxx index 0ca6b85e..70c68783 100644 --- a/dev/ZKA/Sources/PEFDLLInterface.cxx +++ b/dev/ZKA/Sources/PEFDLLInterface.cxx @@ -10,7 +10,7 @@ #include <KernelKit/DebugOutput.hxx> #include <KernelKit/PEF.hxx> #include <KernelKit/PEFDLLInterface.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/ThreadLocalStorage.hxx> #include <NewKit/Defines.hxx> @@ -37,7 +37,7 @@ using namespace Kernel; /** @brief Library initializer. */ /***********************************************************************************/ -EXTERN_C DLLInterfacePtr rtl_init_shared_object(PROCESS_HEADER_BLOCK* header) +EXTERN_C DLLInterfacePtr rtl_init_shared_object(UserProcess* header) { DLLInterfacePtr sharedObj = tls_new_class<PEFDLLInterface>(); @@ -80,7 +80,7 @@ EXTERN_C DLLInterfacePtr rtl_init_shared_object(PROCESS_HEADER_BLOCK* header) /** @param successful Reports if successful or not. */ /***********************************************************************************/ -EXTERN_C Void rtl_fini_shared_object(PROCESS_HEADER_BLOCK* header, DLLInterfacePtr lib, Bool* successful) +EXTERN_C Void rtl_fini_shared_object(UserProcess* header, DLLInterfacePtr lib, Bool* successful) { MUST_PASS(successful); diff --git a/dev/ZKA/Sources/PageAllocator.cxx b/dev/ZKA/Sources/PageAllocator.cxx index 4a07a12d..dec6c470 100644 --- a/dev/ZKA/Sources/PageAllocator.cxx +++ b/dev/ZKA/Sources/PageAllocator.cxx @@ -8,7 +8,7 @@ #include <KernelKit/DebugOutput.hxx> #include <NewKit/PageAllocator.hxx> -/// @brief Internal namespace, used internally by kernel. +/// @brief Internal namespace, used internally by Kernel. namespace Kernel::Detail { VoidPtr create_page_wrapper(Boolean rw, Boolean user, SizeT pageSz) diff --git a/dev/ZKA/Sources/ProcessTeam.cxx b/dev/ZKA/Sources/ProcessTeam.cxx index 58a639f6..f7282faf 100644 --- a/dev/ZKA/Sources/ProcessTeam.cxx +++ b/dev/ZKA/Sources/ProcessTeam.cxx @@ -6,16 +6,16 @@ /***********************************************************************************/ /// @file ProcessTeam.cxx -/// @brief Process teams implementation. +/// @brief UserProcess teams implementation. /***********************************************************************************/ -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> namespace Kernel { - /// @brief Process list array getter. + /// @brief UserProcess list array getter. /// @return The list of process to schedule. - Array<PROCESS_HEADER_BLOCK, kSchedProcessLimitPerTeam>& ProcessTeam::AsArray() + Array<UserProcess, kSchedProcessLimitPerTeam>& ProcessTeam::AsArray() { return mProcessList; } @@ -29,7 +29,7 @@ namespace Kernel /// @brief Current process getter. /// @return The current process header. - Ref<PROCESS_HEADER_BLOCK>& ProcessTeam::AsRef() + Ref<UserProcess>& ProcessTeam::AsRef() { return mCurrentProcess; } diff --git a/dev/ZKA/Sources/Semaphore.cxx b/dev/ZKA/Sources/Semaphore.cxx index f9da0703..9181443e 100644 --- a/dev/ZKA/Sources/Semaphore.cxx +++ b/dev/ZKA/Sources/Semaphore.cxx @@ -4,7 +4,7 @@ ------------------------------------------- */ -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/Semaphore.hxx> namespace Kernel @@ -17,7 +17,7 @@ namespace Kernel return fLockingProcess == nullptr; } - bool Semaphore::Lock(PROCESS_HEADER_BLOCK* process) + bool Semaphore::Lock(UserProcess* process) { if (!process || fLockingProcess) return false; @@ -32,7 +32,7 @@ namespace Kernel return fLockingProcess; } - bool Semaphore::LockOrWait(PROCESS_HEADER_BLOCK* process, TimerInterface* timer) + bool Semaphore::LockOrWait(UserProcess* process, TimerInterface* timer) { if (process == nullptr) return false; diff --git a/dev/ZKA/Sources/ThreadLocalStorage.cxx b/dev/ZKA/Sources/ThreadLocalStorage.cxx index ed12c890..4ee2494e 100644 --- a/dev/ZKA/Sources/ThreadLocalStorage.cxx +++ b/dev/ZKA/Sources/ThreadLocalStorage.cxx @@ -9,21 +9,21 @@ #include <NewKit/String.hxx> #include <CFKit/Property.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/ThreadLocalStorage.hxx> ///! BUGS: 0 /***********************************************************************************/ /// @file ThreadLocalStorage.cxx -/// @brief TLS inside the kernel. +/// @brief TLS inside the Kernel. /***********************************************************************************/ using namespace Kernel; namespace Detail { - /// \brief Process thread information header. + /// \brief UserProcess thread information header. struct THREAD_HEADER_BLOCK final { STATIC constexpr SizeT cMaxLen = 256; diff --git a/dev/ZKA/Sources/URL.cxx b/dev/ZKA/Sources/URL.cxx index 189aba8e..9c76d435 100644 --- a/dev/ZKA/Sources/URL.cxx +++ b/dev/ZKA/Sources/URL.cxx @@ -19,13 +19,13 @@ namespace Kernel URL::~URL() = default; - /// @brief internal and reserved protocols by kernel. + /// @brief internal and reserved protocols by Kernel. constexpr const Char* kURLProtocols[] = { "file", // Filesystem protocol "zup", // ZKA update protocol "oscc", // Open System Configuration Connectivity. "odbc", // ODBC connectivity. - "https", // HTTPS layer driver (HTTPS.sys). + "https", // HTTPS layer driver (HTTPS.sys). }; constexpr const int kUrlOutSz = 1; //! such as: :// diff --git a/dev/ZKA/Sources/User.cxx b/dev/ZKA/Sources/User.cxx index 53cb5e07..b3b62d8b 100644 --- a/dev/ZKA/Sources/User.cxx +++ b/dev/ZKA/Sources/User.cxx @@ -5,7 +5,7 @@ * Copyright ZKA Technologies., all rights reserved. * * File: User.cxx - * Purpose: User concept and management. + * Purpose: User concept class. * * ======================================================== */ @@ -14,7 +14,7 @@ #include <KernelKit/User.hxx> #include <NewKit/KernelCheck.hxx> #include <KernelKit/FileManager.hxx> -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/Heap.hxx> @@ -120,6 +120,8 @@ namespace Kernel return this->fUserName; } + /// @brief Returns the user's ring. + /// @return The king of ring the user is attached to. const RingKind& User::Ring() noexcept { return this->fRing; diff --git a/dev/ZKA/Sources/ProcessScheduler.cxx b/dev/ZKA/Sources/UserProcessScheduler.cxx index 82c1cf57..94512913 100644 --- a/dev/ZKA/Sources/ProcessScheduler.cxx +++ b/dev/ZKA/Sources/UserProcessScheduler.cxx @@ -5,11 +5,11 @@ ------------------------------------------- */ /***********************************************************************************/ -/// @file ProcessScheduler.cxx -/// @brief User Process scheduler. +/// @file UserProcessScheduler.cxx +/// @brief User UserProcess scheduler. /***********************************************************************************/ -#include <KernelKit/ProcessScheduler.hxx> +#include <KernelKit/UserProcessScheduler.hxx> #include <KernelKit/PEFDLLInterface.hxx> #include <KernelKit/MP.hxx> #include <KernelKit/Heap.hxx> @@ -19,7 +19,7 @@ ///! BUGS: 0 /***********************************************************************************/ -/* TODO: Document more the kernel, sdk and kits. */ +/* TODO: Document more the Kernel, sdk and kits. */ /***********************************************************************************/ namespace Kernel @@ -30,8 +30,11 @@ namespace Kernel UInt32 cLastExitCode = 0U; - /// @brief The main process object. - ProcessScheduler* cProcessScheduler = nullptr; + /***********************************************************************************/ + /// @brief UserProcess scheduler instance. + /***********************************************************************************/ + + UserProcessScheduler* cProcessScheduler = nullptr; /// @brief Gets the last exit code. /// @note Not thread-safe. @@ -45,7 +48,7 @@ namespace Kernel /// @brief crash current process. /***********************************************************************************/ - void PROCESS_HEADER_BLOCK::Crash() + void UserProcess::Crash() { constexpr auto cUnknownProcess = "?"; @@ -60,7 +63,7 @@ namespace Kernel /// @brief Gets the local last exit code. /// @note Not thread-safe. /// @return Int32 the last exit code. - const UInt32& PROCESS_HEADER_BLOCK::GetExitCode() noexcept + const UInt32& UserProcess::GetExitCode() noexcept { return this->fLastExitCode; } @@ -69,12 +72,12 @@ namespace Kernel /// @brief Error code variable getter. /***********************************************************************************/ - Int32& PROCESS_HEADER_BLOCK::GetLocalCode() noexcept + Int32& UserProcess::GetLocalCode() noexcept { return fLocalCode; } - void PROCESS_HEADER_BLOCK::Wake(const bool should_wakeup) + void UserProcess::Wake(const bool should_wakeup) { this->Status = should_wakeup ? ProcessStatus::kRunning : ProcessStatus::kFrozen; @@ -82,7 +85,7 @@ namespace Kernel /***********************************************************************************/ - VoidPtr PROCESS_HEADER_BLOCK::New(const SizeT& sz) + VoidPtr UserProcess::New(const SizeT& sz) { if (this->HeapCursor) { @@ -125,7 +128,7 @@ namespace Kernel } /* @brief free pointer from usage. */ - Boolean PROCESS_HEADER_BLOCK::Delete(VoidPtr ptr, const SizeT& sz) + Boolean UserProcess::Delete(VoidPtr ptr, const SizeT& sz) { if (sz < 1 || this->HeapCursor == this->HeapPtr) return false; @@ -148,20 +151,20 @@ namespace Kernel return false; } - /// @brief process name getter. - const Char* PROCESS_HEADER_BLOCK::GetProcessName() noexcept + /// @brief UserProcess name getter. + const Char* UserProcess::GetProcessName() noexcept { return this->Name; } - /// @brief process selector getter. - const User* PROCESS_HEADER_BLOCK::GetOwner() noexcept + /// @brief UserProcess user getter. + const User* UserProcess::GetOwner() noexcept { - return this->AssignedOwner; + return this->Owner; } - /// @brief process status getter. - const ProcessStatus& PROCESS_HEADER_BLOCK::GetStatus() noexcept + /// @brief UserProcess status getter. + const ProcessStatus& UserProcess::GetStatus() noexcept { return this->Status; } @@ -171,7 +174,7 @@ namespace Kernel /** @brief Affinity is the time slot allowed for the process. */ - const AffinityKind& PROCESS_HEADER_BLOCK::GetAffinity() noexcept + const AffinityKind& UserProcess::GetAffinity() noexcept { return this->Affinity; } @@ -179,7 +182,7 @@ namespace Kernel /** @brief Standard exit proc. */ - void PROCESS_HEADER_BLOCK::Exit(const Int32& exit_code) + void UserProcess::Exit(const Int32& exit_code) { fLastExitCode = exit_code; cLastExitCode = exit_code; @@ -194,9 +197,9 @@ namespace Kernel this->Image = nullptr; this->StackFrame = nullptr; - if (this->Kind == kSharedObjectKind) + if (this->Kind == kDLLKind) { - bool success = false; + Bool success = false; rtl_fini_shared_object(this, this->DLLPtr, &success); if (success) @@ -205,27 +208,30 @@ namespace Kernel } } + if (this->StackReserve) + delete[] this->StackReserve; + cProcessScheduler->Remove(this->ProcessId); } /// @brief Add process to list. /// @param process the process *Ref* class. /// @return the process index inside the team. - SizeT ProcessScheduler::Add(PROCESS_HEADER_BLOCK& process) + SizeT UserProcessScheduler::Add(UserProcess& process) { if (!process.Image) { return -kErrorInvalidData; } - kcout << "ProcessScheduler: Adding process to team...\r"; + kcout << "UserProcessScheduler: Adding process to team...\r"; // Create heap according to type of process. - if (process.Kind == PROCESS_HEADER_BLOCK::kExeKind) + if (process.Kind == UserProcess::kExeKind) { process.HeapPtr = mm_new_ke_heap(process.SizeMemory, true, true); } - else if (process.Kind == PROCESS_HEADER_BLOCK::kSharedObjectKind) + else if (process.Kind == UserProcess::kDLLKind) { process.DLLPtr = rtl_init_shared_object(&process); process.HeapPtr = mm_new_ke_heap(process.SizeMemory, true, true); @@ -244,23 +250,32 @@ namespace Kernel if (process.Image) { + // get preferred stack size by app. + const auto cMaxStackSize = process.StackSize; + process.StackFrame->BP = reinterpret_cast<HAL::Reg>(process.Image); + process.StackFrame->SP = reinterpret_cast<HAL::Reg>(mm_new_ke_heap(cMaxStackSize, Yes, Yes)); + + if (!process.StackFrame->SP) + { + process.StackReserve = new UInt8[cMaxStackSz]; + process.StackFrame->SP = reinterpret_cast<HAL::Reg>(process.StackReserve); + + kcout << "newoskrnl: use fallback reserve.\r"; + } } else { - if (process.Kind != PROCESS_HEADER_BLOCK::kSharedObjectKind) + if (process.Kind != UserProcess::kDLLKind) { process.Crash(); return -kErrorProcessFault; } } - if (!process.StackFrame->SP) - process.StackFrame->SP = reinterpret_cast<HAL::Reg>(mm_new_ke_heap(sizeof(UInt8) * 8196, Yes, Yes)); - process.Status = ProcessStatus::kStarting; - process.ProcessId = (mTeam.mCurrentProcess); + process.ProcessId = mTeam.mProcessAmount; ++mTeam.mProcessAmount; @@ -268,14 +283,14 @@ namespace Kernel mTeam.AsArray()[process.ProcessId] = process; - kcout << "ProcessScheduler: Adding process to team [ OK ]...\r"; + kcout << "UserProcessScheduler: Adding process to team [ OK ]...\r"; return process.ProcessId; } /***********************************************************************************/ - ProcessScheduler& ProcessScheduler::The() + UserProcessScheduler& UserProcessScheduler::The() { MUST_PASS(cProcessScheduler); return *cProcessScheduler; @@ -287,7 +302,7 @@ namespace Kernel /// @param processSlot process slot inside team. /// @retval true process was removed. /// @retval false process doesn't exist in team. - Bool ProcessScheduler::Remove(ProcessID processSlot) + Bool UserProcessScheduler::Remove(ProcessID processSlot) { // check if process is within range. if (processSlot > mTeam.AsArray().Count()) @@ -297,23 +312,24 @@ namespace Kernel if (mTeam.AsArray()[processSlot].Image == nullptr) return false; - kcout << "ProcessScheduler: Removing process...\r"; + kcout << "UserProcessScheduler: Removing process...\r"; - --mTeam.mProcessAmount; mTeam.AsArray()[processSlot].Status = ProcessStatus::kDead; + --mTeam.mProcessAmount; + return true; } /// @brief Run scheduler. /// @return - SizeT ProcessScheduler::Run() noexcept + SizeT UserProcessScheduler::Run() noexcept { SizeT process_index = 0; //! we store this guy to tell the scheduler how many //! things we have scheduled. - for (; process_index < mTeam.AsArray().Count(); ++process_index) + for (; process_index < mTeam.AsArray().Capacity(); ++process_index) { - auto process = mTeam.AsArray()[process_index]; + auto& process = mTeam.AsArray()[process_index]; //! check if process needs to be scheduled. if (ProcessHelper::CanBeScheduled(process)) @@ -326,13 +342,16 @@ namespace Kernel kcout << process.Name << ": will be runned.\r"; // tell helper to find a core to schedule on. - ProcessHelper::Switch(process.StackFrame, - process.ProcessId); + if (!ProcessHelper::Switch(process.StackFrame, + process.ProcessId)) + process.Crash(); + + continue; } else { // otherwise increment the P-time. - --mTeam.AsRef().Leak().PTime; + --process.PTime; } } @@ -341,7 +360,7 @@ namespace Kernel /// @brief Gets the current scheduled team. /// @return - ProcessTeam& ProcessScheduler::CurrentTeam() + ProcessTeam& UserProcessScheduler::CurrentTeam() { return mTeam; } @@ -350,13 +369,13 @@ namespace Kernel /// @brief Gets current running process. /// @return - Ref<PROCESS_HEADER_BLOCK>& ProcessScheduler::CurrentProcess() + Ref<UserProcess>& UserProcessScheduler::CurrentProcess() { return mTeam.AsRef(); } /// @brief Current proccess id getter. - /// @return Process ID integer. + /// @return UserProcess ID integer. PID& ProcessHelper::TheCurrentPID() { kcout << "ProcessHelper::TheCurrentPID: Leaking ProcessId...\r"; @@ -367,13 +386,13 @@ namespace Kernel /// @param process the process reference. /// @retval true can be schedulded. /// @retval false cannot be schedulded. - bool ProcessHelper::CanBeScheduled(PROCESS_HEADER_BLOCK& process) + bool ProcessHelper::CanBeScheduled(UserProcess& process) { if (process.Status == ProcessStatus::kFrozen || process.Status == ProcessStatus::kDead) return false; - if (process.Kind == PROCESS_HEADER_BLOCK::kSharedObjectKind) + if (process.Kind == UserProcess::kDLLKind) { if (auto start = process.DLLPtr->Load<VoidPtr>(kPefStart, rt_string_len(kPefStart), kPefCode); start) @@ -383,7 +402,7 @@ namespace Kernel } } - return process.PTime < 0; + return process.PTime < 1; } /** @@ -393,7 +412,12 @@ namespace Kernel SizeT ProcessHelper::StartScheduling() { if (!cProcessScheduler) - cProcessScheduler = new ProcessScheduler(); + { + cProcessScheduler = new UserProcessScheduler(); + MUST_PASS(cProcessScheduler); + + kcout << "newoskrnl: Team capacity: " << number(cProcessScheduler->CurrentTeam().AsArray().Capacity()) << endl; + } SizeT ret = cProcessScheduler->Run(); return ret; @@ -410,29 +434,32 @@ namespace Kernel if (!the_stack || new_pid < 0) return false; - for (SizeT index = 0UL; index < HardwareThreadScheduler::The().Leak().Count(); ++index) - { - if (HardwareThreadScheduler::The().Leak()[index].Leak()->Kind() == kInvalidHart) - continue; + kcout << "newoskrnl: Finding hardware thread...\r"; - if (HardwareThreadScheduler::The().Leak()[index].Leak()->StackFrame() == the_stack) - { - HardwareThreadScheduler::The().Leak()[index].Leak()->Busy(false); + for (SizeT index = 0UL; index < HardwareThreadScheduler::The().Count(); ++index) + { + if (HardwareThreadScheduler::The()[index].Leak()->Kind() == kInvalidHart) continue; - } - if (HardwareThreadScheduler::The().Leak()[index].Leak()->IsBusy()) + if (HardwareThreadScheduler::The()[index].Leak()->IsBusy()) continue; - if (HardwareThreadScheduler::The().Leak()[index].Leak()->Kind() != + if (HardwareThreadScheduler::The()[index].Leak()->Kind() != ThreadKind::kHartBoot && - HardwareThreadScheduler::The().Leak()[index].Leak()->Kind() != + HardwareThreadScheduler::The()[index].Leak()->Kind() != ThreadKind::kHartSystemReserved) { - HardwareThreadScheduler::The().Leak()[index].Leak()->Busy(true); + HardwareThreadScheduler::The()[index].Leak()->Busy(true); + ProcessHelper::TheCurrentPID() = new_pid; - return HardwareThreadScheduler::The().Leak()[index].Leak()->Switch(the_stack); + kcout << "newoskrnl: Found hardware thread...\r"; + + bool ret = HardwareThreadScheduler::The()[index].Leak()->Switch(the_stack); + + HardwareThreadScheduler::The()[index].Leak()->Busy(false); + + return ret; } } @@ -440,13 +467,13 @@ namespace Kernel } /// @brief this checks if any process is on the team. - ProcessScheduler::operator bool() + UserProcessScheduler::operator bool() { return mTeam.AsArray().Count() > 0; } /// @brief this checks if no process is on the team. - bool ProcessScheduler::operator!() + bool UserProcessScheduler::operator!() { return mTeam.AsArray().Count() == 0; } diff --git a/dev/ZKA/Sources/Utils.cxx b/dev/ZKA/Sources/Utils.cxx index 4a56df3b..8ecfd805 100644 --- a/dev/ZKA/Sources/Utils.cxx +++ b/dev/ZKA/Sources/Utils.cxx @@ -210,48 +210,3 @@ namespace Kernel return str; } } // namespace Kernel - -#ifdef __FREESTANDING__ - -//////////////////////////////////////////////////////////////////////////////////////// -/// Exported C functions -//////////////////////////////////////////////////////////////////////////////////////// - -/// @brief memset in C++ -EXTERN_C void memset(void* dst, char src, Kernel::SizeT len) -{ - Kernel::rt_set_memory(dst, src, len); -} - -/// @brief memcpy in C++ -EXTERN_C void memcpy(void* dst, void* src, Kernel::SizeT len) -{ - Kernel::rt_copy_memory(src, dst, len); -} - -/// @brief memmove in C++ -EXTERN_C void* memmove(void* dst, void* src, Kernel::SizeT len) -{ - Kernel::rt_copy_memory(src, dst, len); - return dst; -} - -/// @brief strlen definition in C++. -EXTERN_C Kernel::SizeT strlen(const Char* whatToCheck) -{ - return Kernel::rt_string_len(whatToCheck); -} - -/// @brief memcmp in C++ -EXTERN_C Kernel::SizeT memcmp(void* dst, void* src, Kernel::SizeT len) -{ - return Kernel::rt_string_cmp((char*)src, (char*)dst, len); -} - -/// @brief strcmp in C++ -EXTERN_C Kernel::SizeT strcmp(char* dst, char* src, Kernel::SizeT len) -{ - return Kernel::rt_string_cmp(src, dst, len); -} - -#endif // __FREESTANDING__ diff --git a/dev/ZKA/amd64-efi.make b/dev/ZKA/amd64-efi.make index 75f01b38..5bce68d3 100644 --- a/dev/ZKA/amd64-efi.make +++ b/dev/ZKA/amd64-efi.make @@ -7,7 +7,7 @@ CC = x86_64-w64-mingw32-g++ LD = x86_64-w64-mingw32-ld CCFLAGS = -fshort-wchar -c -shared -D__ZKA_AMD64__ -mno-red-zone -fno-rtti -fno-exceptions \ -std=c++20 -D__ZKA_SUPPORT_NX__ -I../Vendor -D__FSKIT_USE_NEWFS__ \ - -D__NEWOSKRNL__ -D__HAVE_ZKA_APIS__ -D__ZKA__ -I./ -I../ -I../ZBA + -D__NEWOSKRNL__ -D__HAVE_ZKA_APIS__ -D__FREESTANDING__ -D__ZKA__ -I./ -I../ -I../ZBA ASM = nasm @@ -38,7 +38,7 @@ ASMFLAGS = -f win64 LDFLAGS = -e hal_init_platform --subsystem=17 --image-base 0x10000000 LDOBJ = Objects/*.obj -# This file is the kernel, responsible of task management and memory. +# This file is the Kernel, responsible of task management and memory. KERNEL = newoskrnl.dll .PHONY: error @@ -76,9 +76,9 @@ all: newos-amd64-epm link-amd64-epm .PHONY: help help: @echo "=== HELP ===" - @echo "all: Build kernel and link it." - @echo "link-amd64-epm: Link kernel for EPM based disks." - @echo "newos-amd64-epm: Build kernel for EPM based disks." + @echo "all: Build Kernel and link it." + @echo "link-amd64-epm: Link Kernel for EPM based disks." + @echo "newos-amd64-epm: Build Kernel for EPM based disks." .PHONY: clean clean: diff --git a/dev/ZKA/arm64-efi.make b/dev/ZKA/arm64-efi.make index 4e6a3f84..47563ec4 100644 --- a/dev/ZKA/arm64-efi.make +++ b/dev/ZKA/arm64-efi.make @@ -1,6 +1,6 @@ ################################################## # (C) ZKA Technologies, all rights reserved. -# This is the microkernel makefile. +# This is the microKernel makefile. ################################################## CC = clang++ @@ -22,7 +22,7 @@ COPY = cp LDFLAGS = -subsystem:efi_application -entry:hal_init_platform /nodefaultlib LDOBJ = Objects/*.obj -# This file is the kernel, responsible of task management and memory. +# This file is the Kernel, responsible of task management and memory. KERNEL = newoskrnl.so .PHONY: error @@ -55,9 +55,9 @@ all: newos-arm64-epm link-arm64-epm .PHONY: help help: @echo "=== HELP ===" - @echo "all: Build kernel and link it." - @echo "link-arm64-epm: Link kernel for EPM based disks." - @echo "newos-arm64-epm: Build kernel for EPM based disks." + @echo "all: Build Kernel and link it." + @echo "link-arm64-epm: Link Kernel for EPM based disks." + @echo "newos-arm64-epm: Build Kernel for EPM based disks." .PHONY: clean clean: diff --git a/dev/ZKA/power64-cb.make b/dev/ZKA/power64-cb.make index f35df9ba..68ec214f 100644 --- a/dev/ZKA/power64-cb.make +++ b/dev/ZKA/power64-cb.make @@ -1,4 +1,4 @@ ################################################## # (C) ZKA Technologies, all rights reserved. -# This is the microkernel makefile. +# This is the microKernel makefile. ################################################## |