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-rw-r--r--src/modules/ACPI/ACPI.h83
-rw-r--r--src/modules/ACPI/ACPIFactoryInterface.h57
-rw-r--r--src/modules/AHCI/AHCI.h360
-rw-r--r--src/modules/APM/APM.h29
-rw-r--r--src/modules/ATA/ATA.h157
-rw-r--r--src/modules/CoreGfx/CoreAccess.h33
-rw-r--r--src/modules/CoreGfx/CoreGfx.h118
-rw-r--r--src/modules/CoreGfx/MathGfx.h27
-rw-r--r--src/modules/CoreGfx/TextGfx.h183
-rw-r--r--src/modules/GPRS/.keep0
-rw-r--r--src/modules/HPET/Defines.h39
-rw-r--r--src/modules/IEEE802/.gitkeep0
-rw-r--r--src/modules/LTE/LTE.h34
-rw-r--r--src/modules/MBCI/MBCI.h126
-rw-r--r--src/modules/NVME/NVME.h104
-rw-r--r--src/modules/OHCI/.gitkeep0
-rw-r--r--src/modules/Power/PowerFactory.h30
-rw-r--r--src/modules/SCSI/.gitkeep0
-rw-r--r--src/modules/SCSI/SCSI.h21
-rw-r--r--src/modules/WiFi/.gitkeep0
-rw-r--r--src/modules/XHCI/XHCI.h66
21 files changed, 1467 insertions, 0 deletions
diff --git a/src/modules/ACPI/ACPI.h b/src/modules/ACPI/ACPI.h
new file mode 100644
index 00000000..b5bf3b69
--- /dev/null
+++ b/src/modules/ACPI/ACPI.h
@@ -0,0 +1,83 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#ifndef __ACPI__
+#define __ACPI__
+
+/**
+ https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html
+*/
+
+#include <NeKit/Defines.h>
+
+#define SDT_OBJECT : public Kernel::SDT
+
+namespace Kernel {
+class PACKED SDT {
+ public:
+ Char Signature[4];
+ UInt32 Length;
+ UInt8 Revision;
+ Char Checksum;
+ Char OemId[6];
+ Char OemTableId[8];
+ UInt32 OemRev;
+ UInt32 CreatorID;
+ UInt32 CreatorRevision;
+};
+
+class PACKED RSDP : public SDT {
+ public:
+ UInt32 RsdtAddress;
+ UIntPtr XsdtAddress;
+ UInt8 ExtendedChecksum;
+ UInt8 Reserved0[3];
+};
+
+class PACKED ConfigHeader {
+ public:
+ UInt64 BaseAddress;
+ UInt16 PciSegGroup;
+ UInt8 StartBus;
+ UInt8 EndBus;
+ UInt32 Reserved;
+};
+
+enum ACPI_ADDRESS_SPACE_KIND : UInt8 {
+ eSystemMemory = 0,
+ eSystemIO = 1,
+ ePci = 2,
+ eController = 3,
+ eSmBus = 4,
+ eCount = 5,
+ eInvalid = 0xFF,
+};
+
+class PACKED ACPI_ADDRESS final {
+ public:
+ UInt8 AddressSpaceId;
+ UInt8 RegisterBitWidth;
+ UInt8 RegisterBitOffset;
+ UInt8 Reserved;
+ UIntPtr Address;
+};
+
+class PACKED RSDT final {
+ public:
+ Char Signature[4];
+ UInt32 Length;
+ UInt8 Revision;
+ Char Checksum;
+ Char OemId[6];
+ Char OemTableId[8];
+ UInt32 OemRev;
+ UInt32 CreatorID;
+ UInt32 CreatorRevision;
+ UInt32 AddressArr[1];
+};
+} // namespace Kernel
+
+#endif // !__ACPI__
diff --git a/src/modules/ACPI/ACPIFactoryInterface.h b/src/modules/ACPI/ACPIFactoryInterface.h
new file mode 100644
index 00000000..da91a62e
--- /dev/null
+++ b/src/modules/ACPI/ACPIFactoryInterface.h
@@ -0,0 +1,57 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#ifndef __MOD_ACPI_H__
+#define __MOD_ACPI_H__
+
+#include <KernelKit/DebugOutput.h>
+#include <NeKit/Defines.h>
+#include <NeKit/ErrorOr.h>
+#include <NeKit/Ref.h>
+#include <modules/ACPI/ACPI.h>
+#include <modules/Power/PowerFactory.h>
+
+namespace Kernel {
+class PowerFactory;
+class ACPIFactoryInterface;
+
+typedef ACPIFactoryInterface PowerFactoryInterface;
+
+class ACPIFactoryInterface final NE_POWER_FACTORY {
+ public:
+ explicit ACPIFactoryInterface(voidPtr rsp_ptr);
+ ~ACPIFactoryInterface() = default;
+
+ ACPIFactoryInterface& operator=(const ACPIFactoryInterface&) = default;
+ ACPIFactoryInterface(const ACPIFactoryInterface&) = default;
+
+ public:
+ Bool Shutdown(); // shutdown
+ Void Reboot(); // soft-reboot
+
+ public:
+ /// @brief Descriptor find factory.
+ /// @param signature The signature of the descriptor table (MADT, ACPI...)
+ /// @return the blob inside an ErrorOr object.
+ ErrorOr<voidPtr> Find(const Char* signature);
+
+ /// @brief Checksum factory.
+ /// @param checksum the data to checksum
+ /// @param len it's size
+ /// @return if it succeed
+ bool Checksum(const Char* checksum, SSizeT len); // watch for collides!
+
+ public:
+ ErrorOr<voidPtr> operator[](const Char* signature);
+
+ private:
+ VoidPtr fRsdp{nullptr}; // pointer to root descriptor.
+ SizeT fEntries{0UL}; // number of entries, -1 tells that no invalid entries were
+ // found.
+};
+} // namespace Kernel
+
+#endif // !__MOD_ACPI_H__
diff --git a/src/modules/AHCI/AHCI.h b/src/modules/AHCI/AHCI.h
new file mode 100644
index 00000000..3c6fecc5
--- /dev/null
+++ b/src/modules/AHCI/AHCI.h
@@ -0,0 +1,360 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+ File: AHCI.h
+ Purpose: AHCI protocol defines.
+
+ Revision History:
+
+ 03/02/24: Added file (amlel)
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+#include <modules/ACPI/ACPI.h>
+
+/// @file AHCI.h
+/// @brief AHCI support.
+
+#define kAHCISectorSize (512)
+
+struct HbaPort;
+struct FisData;
+struct FisRegD2H;
+struct FisRegH2D;
+
+/// @brief Frame information type.
+enum {
+ kFISTypeRegH2D = 0x27, // Register FIS - host to device
+ kFISTypeRegD2H = 0x34, // Register FIS - device to host
+ kFISTypeDMAAct = 0x39, // DMA activate FIS - device to host
+ kFISTypeDMASetup = 0x41, // DMA setup FIS - bidirectional
+ kFISTypeData = 0x46, // Data FIS - bidirectional
+ kFISTypeBIST = 0x58, // BIST activate FIS - bidirectional
+ kFISTypePIOSetup = 0x5F, // PIO setup FIS - device to host
+ kFISTypeDevBits = 0xA1, // Set device bits FIS - device to host
+};
+
+enum {
+ kAHCICmdIdentify = 0xEC,
+ kAHCICmdReadDma = 0xC8,
+ kAHCICmdReadDmaEx = 0x25,
+ kAHCICmdWriteDma = 0xCA,
+ kAHCICmdWriteDmaEx = 0x35
+};
+
+typedef struct FisRegH2D final {
+ // DWORD 0
+ Kernel::UInt8 FisType; // FIS_TYPE_REG_H2D
+
+ Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 Reserved0 : 3; // Reserved
+ Kernel::UInt8 CmdOrCtrl : 1; // 1: Command, 0: Control
+
+ Kernel::UInt8 Command; // Command register
+ Kernel::UInt8 FeatureLow; // Feature register, 7:0
+
+ // DWORD 1
+ Kernel::UInt8 Lba0; // LBA low register, 7:0
+ Kernel::UInt8 Lba1; // LBA mid register, 15:8
+ Kernel::UInt8 Lba2; // LBA high register, 23:16
+ Kernel::UInt8 Device; // Device register
+
+ // DWORD 2
+ Kernel::UInt8 Lba3; // LBA register, 31:24
+ Kernel::UInt8 Lba4; // LBA register, 39:32
+ Kernel::UInt8 Lba5; // LBA register, 47:40
+ Kernel::UInt8 FeatureHigh; // Feature register, 15:8
+
+ // DWORD 3
+ Kernel::UInt8 CountLow; // Count register, 7:0
+ Kernel::UInt8 CountHigh; // Count register, 15:8
+ Kernel::UInt8 Icc; // Isochronous command completion
+ Kernel::UInt8 Control; // Control register
+
+ // DWORD 4
+ Kernel::UInt8 Reserved1[4]; // Reserved
+} FisRegH2D;
+
+typedef struct FisRegD2H final {
+ // DWORD 0
+ Kernel::UInt8 FisType; // FIS_TYPE_REG_D2H
+
+ Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 Reserved0 : 2; // Reserved
+ Kernel::UInt8 IE : 1; // Interrupt bit
+ Kernel::UInt8 Reserved1 : 1; // Reserved
+
+ Kernel::UInt8 Status; // Status register
+ Kernel::UInt8 Error; // Error register
+
+ // DWORD 1
+ Kernel::UInt8 Lba0; // LBA low register, 7:0
+ Kernel::UInt8 Lba1; // LBA mid register, 15:8
+ Kernel::UInt8 Lba2; // LBA high register, 23:16
+ Kernel::UInt8 Device; // Device register
+
+ // DWORD 2
+ Kernel::UInt8 Lba3; // LBA register, 31:24
+ Kernel::UInt8 Lba4; // LBA register, 39:32
+ Kernel::UInt8 Lba5; // LBA register, 47:40
+ Kernel::UInt8 Rsv2; // Reserved
+
+ // DWORD 3
+ Kernel::UInt8 CountLow; // Count register, 7:0
+ Kernel::UInt8 CountHigh; // Count register, 15:8
+ Kernel::UInt8 Rsv3[2]; // Reserved
+
+ // DWORD 4
+ Kernel::UInt8 Rsv4[4]; // Reserved
+} FisRegD2H;
+
+typedef struct FisData final {
+ // DWORD 0
+ Kernel::UInt8 FisType; // FIS_TYPE_DATA
+
+ Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 Reserved0 : 4; // Reserved
+
+ Kernel::UInt8 Reserved1[2]; // Reserved
+
+ // DWORD 1 ~ N
+ Kernel::UInt32 Data[1]; // Payload
+} FisData;
+
+typedef struct FisPioSetup final {
+ // DWORD 0
+ Kernel::UInt8 FisType; // FIS_TYPE_PIO_SETUP
+
+ Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 Reserved0 : 1; // Reserved
+ Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
+ Kernel::UInt8 IE : 1; // Interrupt bit
+ Kernel::UInt8 Reserved1 : 1;
+
+ Kernel::UInt8 Status; // Status register
+ Kernel::UInt8 Error; // Error register
+
+ // DWORD 1
+ Kernel::UInt8 Lba0; // LBA low register, 7:0
+ Kernel::UInt8 Lba1; // LBA mid register, 15:8
+ Kernel::UInt8 Lba2; // LBA high register, 23:16
+ Kernel::UInt8 Device; // Device register
+
+ // DWORD 2
+ Kernel::UInt8 Lba3; // LBA register, 31:24
+ Kernel::UInt8 Lba4; // LBA register, 39:32
+ Kernel::UInt8 Lba5; // LBA register, 47:40
+ Kernel::UInt8 Rsv2; // Reserved
+
+ // DWORD 3
+ Kernel::UInt8 CountLow; // Count register, 7:0
+ Kernel::UInt8 CountHigh; // Count register, 15:8
+ Kernel::UInt8 Rsv3; // Reserved
+ Kernel::UInt8 EStatus; // New value of status register
+
+ // DWORD 4
+ Kernel::UInt16 TranferCount; // Transfer count
+ Kernel::UInt8 Rsv4[2]; // Reserved
+} FisPioSetup;
+
+typedef struct FisDmaSetup final {
+ // DWORD 0
+ Kernel::UInt8 FisType; // FIS_TYPE_DMA_SETUP
+
+ Kernel::UInt8 PortMul : 4; // Port multiplier
+ Kernel::UInt8 Reserved0 : 1; // Reserved
+ Kernel::UInt8 DTD : 1; // Data transfer direction, 1 - device to host
+ Kernel::UInt8 IE : 1; // Interrupt bit
+ Kernel::UInt8 AutoEnable : 1; // Auto-activate. Specifies if DMA Activate FIS is needed
+
+ Kernel::UInt8 Reserved1[2]; // Reserved
+
+ // DWORD 1&2
+ volatile Kernel::UInt64 DmaBufferId; // DMA Buffer Identifier. Used to Identify DMA buffer in
+ // host memory. SATA Spec says host specific and not in
+ // Spec. Trying AHCI spec might work.
+
+ // DWORD 3
+ Kernel::UInt32 Rsvd; // More reserved
+
+ // DWORD 4
+ Kernel::UInt32 DmabufOffset; // Byte offset into buffer. First 2 bits must be 0
+
+ // DWORD 5
+ Kernel::UInt32 TransferCount; // Number of bytes to transfer. Bit 0 must be 0
+
+ // DWORD 6
+ Kernel::UInt32 Reserved3; // Reserved
+} FisDmaSetup;
+
+typedef struct FisDevBits final {
+ // DWORD 0
+ Kernel::UInt8 FisType; // FIS_TYPE_DMA_SETUP (A1h)
+
+ Kernel::UInt8 Reserved0 : 5; // Reserved
+ Kernel::UInt8 R0 : 1;
+ Kernel::UInt8 IE : 1;
+ Kernel::UInt8 N : 1;
+
+ Kernel::UInt8 StatusLow : 3;
+ Kernel::UInt8 R1 : 1;
+ Kernel::UInt8 StatusHigh : 3;
+
+ Kernel::UInt8 R2 : 1;
+ Kernel::UInt8 Error;
+
+ // DWORD 1
+ Kernel::UInt32 Act;
+} FisDevBits;
+
+/// \brief Enable AHCI device bit in GHC register.
+#ifndef kSATAGHC_AE
+#define kSATAGHC_AE (31)
+#endif //! ifndef kSATAGHC_AE
+
+typedef struct HbaPort final {
+ Kernel::UInt32 Clb; // 0x00, command list base address, 1K-byte aligned
+ Kernel::UInt32 Clbu; // 0x04, command list base address upper 32 bits
+ Kernel::UInt32 Fb; // 0x08, FIS base address, 256-byte aligned
+ Kernel::UInt32 Fbu; // 0x0C, FIS base address upper 32 bits
+ Kernel::UInt32 Is; // 0x10, interrupt status
+ Kernel::UInt32 Ie; // 0x14, interrupt enable
+ Kernel::UInt32 Cmd; // 0x18, command and status
+ Kernel::UInt32 Reserved0; // 0x1C, Reserved
+ Kernel::UInt32 Tfd; // 0x20, task file data
+ Kernel::UInt32 Sig; // 0x24, signature
+ Kernel::UInt32 Ssts; // 0x28, SATA status (SCR0:SStatus)
+ Kernel::UInt32 Sctl; // 0x2C, SATA control (SCR2:SControl)
+ Kernel::UInt32 Serr; // 0x30, SATA error (SCR1:SError)
+ Kernel::UInt32 Sact; // 0x34, SATA active (SCR3:SActive)
+ Kernel::UInt32 Ci; // 0x38, command issue
+ Kernel::UInt32 Sntf; // 0x3C, SATA notification (SCR4:SNotification)
+ Kernel::UInt32 Fbs; // 0x40, FIS-based switch control
+ Kernel::UInt32 Reserved1[11]; // 0x44 ~ 0x6F, Reserved
+ Kernel::UInt32 Vendor[4]; // 0x70 ~ 0x7F, vendor specific
+} HbaPort;
+
+typedef struct HbaMem final {
+ // 0x00 - 0x2B, Generic Host Control
+ Kernel::UInt32 Cap; // 0x00, Host capability
+ Kernel::UInt32 Ghc; // 0x04, Global host control
+ Kernel::UInt32 Is; // 0x08, Interrupt status
+ Kernel::UInt32 Pi; // 0x0C, Port implemented
+ Kernel::UInt32 Vs; // 0x10, Version
+ Kernel::UInt32 Ccc_ctl; // 0x14, Command completion coalescing control
+ Kernel::UInt32 Ccc_pts; // 0x18, Command completion coalescing ports
+ Kernel::UInt32 Em_loc; // 0x1C, Enclosure management location
+ Kernel::UInt32 Em_ctl; // 0x20, Enclosure management control
+ Kernel::UInt32 Cap2; // 0x24, Host capabilities extended
+ Kernel::UInt32 Bohc; // 0x28, BIOS/OS handoff control and status
+
+ Kernel::UInt8 Resv0[0xA0 - 0x2C];
+ Kernel::UInt8 Vendor[0x100 - 0xA0];
+
+ HbaPort Ports[1]; // 1 ~ 32, 32 is the max ahci devices per controller.
+} HbaMem;
+
+typedef HbaMem* HbaMemRef;
+
+typedef struct HbaCmdHeader final {
+ // DW0
+ union HbaFlags {
+ struct HbaFlags_ {
+ Kernel::UInt8 Cfl : 5; // Command FIS length in DWORDS, 2 ~ 16
+ Kernel::UInt8 Atapi : 1; // ATAPI
+ Kernel::UInt8 Write : 1; // Write, 1: H2D, 0: D2H
+ Kernel::UInt8 Prefetchable : 1; // Prefetchable
+
+ Kernel::UInt8 Reset : 1; // Reset
+ Kernel::UInt8 BIST : 1; // BIST
+ Kernel::UInt8 Clear : 1; // Clear busy upon R_OK
+ Kernel::UInt8 Reserved0 : 1; // Reserved
+ Kernel::UInt8 Pmp : 4; // Port multiplier port
+ } Struct;
+
+ Kernel::UInt16 Flags;
+ } HbaFlags;
+
+ Kernel::UInt16 Prdtl; // Physical region descriptor table length in entries
+ Kernel::UInt32 Prdbc; // Physical region descriptor byte count transferred
+
+ Kernel::UInt32 Ctba; // Command table descriptor base address
+ Kernel::UInt32 Ctbau; // Command table descriptor base address upper 32 bits
+
+ Kernel::UInt32 Rsv[4];
+} ATTRIBUTE(packed, aligned(32)) HbaCmdHeader;
+
+typedef struct HbaFis final {
+ // 0x00
+ FisDmaSetup Dsfis; // DMA Setup FIS
+ Kernel::UInt8 Pad0[4];
+ // 0x20
+ FisPioSetup Psfis; // PIO Setup FIS
+ Kernel::UInt8 Pad1[12];
+ // 0x40
+ FisRegD2H Rfis; // Register – Device to Host FIS
+ Kernel::UInt8 Pad2[4];
+ // 0x58
+ FisDevBits Sdbfis; // Set Device Bit FIS
+ // 0x60
+ Kernel::UInt8 Ufis[64];
+ // 0xA0
+ Kernel::UInt8 Rsv[0x100 - 0xA0];
+} HbaFis;
+
+typedef struct HbaPrdtEntry final {
+ Kernel::UInt32 Dba; // Data base address
+ Kernel::UInt32 Dbau; // Data base address upper 32 bits
+ Kernel::UInt32 Reserved0; // Reserved
+ // DW3
+ Kernel::UInt32 Dbc : 22; // Byte count, 4M max
+ Kernel::UInt32 Reserved1 : 9; // Reserved
+ Kernel::UInt32 Ie : 1; // Interrupt on completion
+} HbaPrdtEntry;
+
+typedef struct HbaCmdTbl final {
+ Kernel::UInt8 Cfis[64]; // Command FIS
+ Kernel::UInt8 Acmd[16]; // ATAPI command, 12 or 16 bytes
+ Kernel::UInt8 Rsv[48]; // Reserved
+ struct HbaPrdtEntry Prdt[1]; // Physical region descriptor table entries, 0 ~ 65535
+} HbaCmdTbl;
+
+/// @brief Initializes an AHCI disk.
+/// @param PortsImplemented the amount of port that have been detected.
+/// @return
+Kernel::Boolean drv_std_init(Kernel::UInt16& PortsImplemented);
+
+Kernel::Boolean drv_std_detected(Kernel::Void);
+
+/// @brief Read from AHCI disk.
+/// @param lba
+/// @param buf
+/// @param sector_sz
+/// @param buf_sz
+/// @return
+Kernel::Void drv_std_read(Kernel::UInt64 lba, Kernel::Char* buf, Kernel::SizeT sector_sz,
+ Kernel::SizeT buf_sz);
+
+/// @brief Write to AHCI disk.
+/// @param lba
+/// @param buf
+/// @param sector_sz
+/// @param buf_sz
+/// @return
+Kernel::Void drv_std_write(Kernel::UInt64 lba, Kernel::Char* buf, Kernel::SizeT sector_sz,
+ Kernel::SizeT buf_sz);
+
+/// @brief Gets the sector count from AHCI disk.
+Kernel::SizeT drv_std_get_sector_count();
+
+/// @brief Gets the AHCI disk size.
+Kernel::SizeT drv_std_get_size();
+
+/// @brief Checks if the drive has completed the command.
+Kernel::Bool drv_is_ready(void);
+
+/* EOF */
diff --git a/src/modules/APM/APM.h b/src/modules/APM/APM.h
new file mode 100644
index 00000000..d9b0621e
--- /dev/null
+++ b/src/modules/APM/APM.h
@@ -0,0 +1,29 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+
+namespace Kernel {
+typedef Int32 APMPowerCmd;
+
+enum {
+ kAPMPowerCommandInvalid = 0x00,
+ kAPMPowerCommandStop = 0x01,
+ kAPMPowerCommandStart = 0x02,
+ kAPMPowerCommandSleep = 0x04,
+ kAPMPowerCommandWakeup = 0x06,
+ kAPMPowerCommandShutdown = 0x07,
+ kAPMPowerCommandReboot = 0x08,
+};
+
+/// @brief Send a APM command into it's controller. (Shutdown, Reboot, Sleep...)
+/// @param base_dma the IO base port.
+/// @param cmd the command.
+/// @return status code of the APM command.
+EXTERN_C Int32 apm_send_io_command(UInt16 cmd);
+} // namespace Kernel
diff --git a/src/modules/ATA/ATA.h b/src/modules/ATA/ATA.h
new file mode 100644
index 00000000..a1213b40
--- /dev/null
+++ b/src/modules/ATA/ATA.h
@@ -0,0 +1,157 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+ File: Defines.h
+ Purpose: ATA header.
+
+ Revision History:
+
+ 03/02/24: Added file (amlel)
+
+======================================== */
+
+#pragma once
+
+#include <CompilerKit/CompilerKit.h>
+#include <NeKit/Defines.h>
+
+///! Status register
+#define ATA_SR_BSY 0x80
+#define ATA_SR_DRDY 0x40
+#define ATA_SR_DF 0x20
+#define ATA_SR_DSC 0x10
+#define ATA_SR_DRQ 0x08
+#define ATA_SR_CORR 0x04
+#define ATA_SR_IDX 0x02
+#define ATA_SR_ERR 0x01
+
+///! Error register
+#define ATA_ER_BBK 0x80
+#define ATA_ER_UNC 0x40
+#define ATA_ER_MC 0x20
+#define ATA_ER_IDNF 0x10
+#define ATA_ER_MCR 0x08
+#define ATA_ER_ABRT 0x04
+#define ATA_ER_TK0NF 0x02
+#define ATA_ER_AMNF 0x01
+
+#define ATA_CMD_READ_PIO 0x20
+#define ATA_CMD_READ_PIO_EXT 0x24
+#define ATA_CMD_READ_DMA 0xC8
+#define ATA_CMD_READ_DMA_EXT 0x25
+#define ATA_CMD_WRITE_PIO 0x30
+#define ATA_CMD_WRITE_PIO_EXT 0x34
+#define ATA_CMD_WRITE_DMA 0xCA
+#define ATA_CMD_WRITE_DMA_EXT 0x35
+#define ATA_CMD_CACHE_FLUSH 0xE7
+#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
+#define ATA_CMD_PACKET 0xA0
+#define ATA_CMD_IDENTIFY_PACKET 0xA1
+#define ATA_CMD_IDENTIFY 0xEC
+
+///! ident offsets, use with data that we got from ATA_CMD_IDENTIFY.
+#define ATA_IDENT_DEVICE_TYPE 0
+#define ATA_IDENT_CYLINDERS 2
+#define ATA_IDENT_HEADS 6
+#define ATA_IDENT_SECTORS 12
+#define ATA_IDENT_SERIAL 20
+#define ATA_IDENT_MODEL 54
+#define ATA_IDENT_CAPABILITIES 98
+#define ATA_IDENT_FIELDVALID 106
+#define ATA_IDENT_MAX_LBA 120
+#define ATA_IDENT_COMMANDSETS 164
+#define ATA_IDENT_MAX_LBA_EXT 200
+
+#define ATA_REG_SET_FEATURES 0xEF
+
+#define ATA_MASTER 0x00
+#define ATA_SLAVE 0x01
+
+///! Register
+#define ATA_REG_DATA 0x00
+#define ATA_REG_ERROR 0x01
+#define ATA_REG_FEATURES 0x01
+#define ATA_REG_SEC_COUNT0 0x02
+#define ATA_REG_LBA0 0x03
+#define ATA_REG_LBA1 0x04
+#define ATA_REG_LBA2 0x05
+#define ATA_REG_HDDEVSEL 0x06
+#define ATA_REG_COMMAND 0x07
+#define ATA_REG_STATUS 0x07
+#define ATA_REG_SEC_COUNT1 0x08
+#define ATA_REG_LBA3 0x09
+#define ATA_REG_LBA4 0x0A
+#define ATA_REG_LBA5 0x0B
+#define ATA_REG_CONTROL 0x0C
+#define ATA_REG_ALT_STATUS 0x0C
+#define ATA_REG_DEV_ADDRESS 0x0D
+
+#define ATA_REG_NEIN 0x01
+
+#define ATA_PRIMARY_IO 0x1F0
+#define ATA_SECONDARY_IO 0x170
+#define ATA_PRIMARY_DCR_AS 0x3F6
+#define ATA_SECONDARY_DCR_AS 0x376
+
+///! Irq
+#define ATA_PRIMARY_IRQ 14
+#define ATA_SECONDARY_IRQ 15
+
+///! Channels
+#define ATA_PRIMARY 0x00
+#define ATA_SECONDARY 0x01
+
+#define ATA_CYL_LOW 3
+#define ATA_CYL_MID 4
+#define ATA_CYL_HIGH 5
+
+///! IO Direction
+#define ATA_READ 0x00
+#define ATA_WRITE 0x013
+
+#define ATA_PRIMARY_SEL 0xA0
+#define ATA_SECONDARY_SEL 0xB0
+
+///! ATA address register.
+#define ATA_ADDRESS1(x) (x + 3)
+#define ATA_ADDRESS2(x) (x + 4)
+#define ATA_ADDRESS3(x) (x + 5)
+
+///! ATA command register.
+#define ATA_COMMAND(x) (x + 7)
+
+#define kATASectorSize (512U)
+
+enum {
+ kATADevicePATA,
+ kATADeviceSATA,
+ kATADevicePATA_PI,
+ kATADeviceSATA_PI,
+ kATADeviceCount,
+};
+
+#if defined(__ATA_PIO__) || defined(__ATA_DMA__)
+
+Kernel::Boolean drv_std_init(Kernel::UInt16 in_bus, Kernel::UInt8 drive, Kernel::UInt16& out_bus,
+ Kernel::UInt8& out_master);
+
+Kernel::Boolean drv_std_detected(Kernel::Void);
+
+Kernel::Void drv_std_select(Kernel::UInt16 bus);
+
+Kernel::Boolean drv_std_wait_io(Kernel::UInt16 io);
+
+Kernel::Void drv_std_read(Kernel::UInt64 lba, Kernel::UInt16 io, Kernel::UInt8 is_master,
+ Kernel::Char* buf, Kernel::SizeT sec_sz, Kernel::SizeT buf_sz);
+
+Kernel::Void drv_std_write(Kernel::UInt64 lba, Kernel::UInt16 io, Kernel::UInt8 is_master,
+ Kernel::Char* buf, Kernel::SizeT sec_sz, Kernel::SizeT buf_sz);
+
+/// @brief get sector count.
+Kernel::SizeT drv_std_get_sector_count();
+
+/// @brief get device size.
+Kernel::SizeT drv_std_get_size();
+
+#endif // ifdef __NEOSKRNL__ \ No newline at end of file
diff --git a/src/modules/CoreGfx/CoreAccess.h b/src/modules/CoreGfx/CoreAccess.h
new file mode 100644
index 00000000..942a1ad5
--- /dev/null
+++ b/src/modules/CoreGfx/CoreAccess.h
@@ -0,0 +1,33 @@
+/* ========================================
+
+ Copyright Amlal El Mahrouss.
+
+======================================== */
+
+#ifndef CORE_GFX_ACCESSIBILITY_H
+#define CORE_GFX_ACCESSIBILITY_H
+
+#include <ArchKit/ArchKit.h>
+#include <KernelKit/KPC.h>
+#include <NeKit/NeKit.h>
+#include <modules/CoreGfx/CoreGfx.h>
+#include <modules/CoreGfx/MathGfx.h>
+
+namespace FB {
+using namespace Kernel;
+
+/// @brief common User interface class.
+class CGAccessibilty final {
+ explicit CGAccessibilty() = default;
+ ~CGAccessibilty() = default;
+
+ public:
+ NE_COPY_DELETE(CGAccessibilty)
+
+ static UInt64 Width() noexcept { return kHandoverHeader->f_GOP.f_Width; }
+
+ static UInt64 Height() noexcept { return kHandoverHeader->f_GOP.f_Height; }
+};
+} // namespace FB
+
+#endif // !CORE_GFX_ACCESSIBILITY_H_
diff --git a/src/modules/CoreGfx/CoreGfx.h b/src/modules/CoreGfx/CoreGfx.h
new file mode 100644
index 00000000..e1bfe462
--- /dev/null
+++ b/src/modules/CoreGfx/CoreGfx.h
@@ -0,0 +1,118 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+
+#define cg_init() Kernel::UInt32 kCGCursor = 0
+
+#define cg_color(R, G, B) RGB(R, G, B)
+
+#define cg_get_clear_clr() RGB(0, 0, 0x80)
+
+#define cg_clear() kCGCursor = 0UL
+
+#ifdef __NE_AMD64__
+/// @brief Performs Alpha drawing on the framebuffer.
+#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y) \
+ for (Kernel::UInt32 i = base_x; i < (width + base_x); ++i) { \
+ for (Kernel::UInt32 u = base_y; u < (height + base_y); ++u) { \
+ *(((Kernel::UInt32*) (kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * i + 4 * u))) |= \
+ (reg_ptr)[kCGCursor]; \
+ \
+ ++kCGCursor; \
+ } \
+ }
+
+/// @brief Performs drawing on the framebuffer.
+#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y) \
+ for (Kernel::UInt32 i = base_x; i < (width + base_x); ++i) { \
+ for (Kernel::UInt32 u = base_y; u < (height + base_y); ++u) { \
+ *(((Kernel::UInt32*) (kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * i + 4 * u))) = \
+ (reg_ptr)[kCGCursor]; \
+ \
+ ++kCGCursor; \
+ } \
+ }
+
+#define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y) \
+ for (Kernel::UInt32 i = base_x; i < (width + base_x); ++i) { \
+ for (Kernel::UInt32 u = base_y; u < (height + base_y); ++u) { \
+ *(((Kernel::UInt32*) (_Rgn + 4 * kHandoverHeader->f_GOP.f_PixelPerLine * i + 4 * u))) = \
+ (reg_ptr)[kCGCursor]; \
+ \
+ ++kCGCursor; \
+ } \
+ }
+
+/// @brief Cleans a resource.
+#define FBClearRegion(height, width, base_x, base_y) \
+ for (Kernel::UInt32 i = base_x; i < (width + base_x); ++i) { \
+ for (Kernel::UInt32 u = base_y; u < (height + base_y); ++u) { \
+ *(((volatile Kernel::UInt32*) (kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * i + 4 * u))) = \
+ cg_get_clear_clr(); \
+ } \
+ }
+
+/// @brief Draws inside a zone.
+#define FBDrawInRegion(clr, height, width, base_x, base_y) \
+ for (Kernel::UInt32 x_base = base_x; x_base < (width + base_x); ++x_base) { \
+ for (Kernel::UInt32 y_base = base_y; y_base < (height + base_y); ++y_base) { \
+ *(((volatile Kernel::UInt32*) (kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * x_base + \
+ 4 * y_base))) = clr; \
+ } \
+ }
+
+/// @brief Draws inside a zone.
+#define FBDrawInRegionToRgn(_Rgn, clr, height, width, base_x, base_y) \
+ for (Kernel::UInt32 x_base = base_x; x_base < (width + base_x); ++x_base) { \
+ for (Kernel::UInt32 y_base = base_y; y_base < (height + base_y); ++y_base) { \
+ *(((volatile Kernel::UInt32*) (_Rgn + 4 * kHandoverHeader->f_GOP.f_PixelPerLine * x_base + \
+ 4 * y_base))) = clr[kCGCursor]; \
+ ++kCGCursor; \
+ } \
+ }
+
+#define FBDrawInRegionA(clr, height, width, base_x, base_y) \
+ for (Kernel::UInt32 x_base = base_x; x_base < (width + base_x); ++x_base) { \
+ for (Kernel::UInt32 y_base = base_y; y_base < (height + base_y); ++y_base) { \
+ *(((volatile Kernel::UInt32*) (kHandoverHeader->f_GOP.f_The + \
+ 4 * kHandoverHeader->f_GOP.f_PixelPerLine * x_base + \
+ 4 * y_base))) |= clr; \
+ } \
+ }
+#else
+#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y)
+#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y)
+#define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y)
+#define FBClearRegion(height, width, base_x, base_y)
+#define FBDrawInRegion(clr, height, width, base_x, base_y)
+#define FBDrawInRegionToRgn(_Rgn, clr, height, width, base_x, base_y)
+#define FBDrawInRegionA(clr, height, width, base_x, base_y)
+#define FBDrawBitMapInRegionA(reg_ptr, height, width, base_x, base_y)
+#define FBDrawBitMapInRegion(reg_ptr, height, width, base_x, base_y)
+#define FBDrawBitMapInRegionToRgn(_Rgn, reg_ptr, height, width, base_x, base_y)
+#define FBClearRegion(height, width, base_x, base_y)
+#define FBDrawInRegion(clr, height, width, base_x, base_y)
+#define FBDrawInRegionToRgn(_Rgn, clr, height, width, base_x, base_y)
+#define FBDrawInRegionA(clr, height, width, base_x, base_y)
+#endif // __NE_AMD64__
+
+#ifndef CORE_GFX_ACCESSIBILITY_H
+#include <modules/CoreGfx/CoreAccess.h>
+#endif // ifndef CORE_GFX_ACCESSIBILITY_H
+
+namespace FB {
+inline Void cg_clear_video() noexcept {
+ FBDrawInRegion(cg_get_clear_clr(), FB::CGAccessibilty::Height(), FB::CGAccessibilty::Width(), 0,
+ 0);
+}
+} // namespace FB \ No newline at end of file
diff --git a/src/modules/CoreGfx/MathGfx.h b/src/modules/CoreGfx/MathGfx.h
new file mode 100644
index 00000000..dbd732d3
--- /dev/null
+++ b/src/modules/CoreGfx/MathGfx.h
@@ -0,0 +1,27 @@
+/* ========================================
+
+ Copyright Amlal El Mahrouss.
+
+======================================== */
+
+#pragma once
+
+/// @file MathMgr.h
+/// @brief Linear interpolation implementation.
+
+namespace UI {
+#ifdef NE_CORE_GFX_USE_DOUBLE
+typedef double cg_real_t;
+#else
+typedef float cg_real_t;
+#endif
+
+/// @brief Linear interpolation equation solver.
+/// @param from where to start
+/// @param to to which value.
+/// @param stat
+/// @return Linear interop value.
+inline cg_real_t cg_math_lerp(cg_real_t to, cg_real_t from, cg_real_t stat) {
+ return (from) + (to - from) * stat;
+}
+} // namespace UI \ No newline at end of file
diff --git a/src/modules/CoreGfx/TextGfx.h b/src/modules/CoreGfx/TextGfx.h
new file mode 100644
index 00000000..b5dcd9e5
--- /dev/null
+++ b/src/modules/CoreGfx/TextGfx.h
@@ -0,0 +1,183 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+#include <modules/CoreGfx/CoreGfx.h>
+
+#define kFontSizeX 8
+#define kFontSizeY 8
+#define kFontNOFChars 128
+
+inline const Kernel::UInt8 kFontBitmap[kFontNOFChars][kFontSizeX] = {
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0000 (nul)
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0001
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0002
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0003
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0004
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0005
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0006
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0007
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0008
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0009
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000A
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000B
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000C
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000D
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000E
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000F
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0010
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0011
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0012
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0013
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0014
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0015
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0016
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0017
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0018
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0019
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001A
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001B
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001C
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001D
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001E
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001F
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0020 (space)
+ {0x18, 0x3C, 0x3C, 0x18, 0x18, 0x00, 0x18, 0x00}, // U+0021 (!)
+ {0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0022 (")
+ {0x36, 0x36, 0x7F, 0x36, 0x7F, 0x36, 0x36, 0x00}, // U+0023 (#)
+ {0x0C, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x0C, 0x00}, // U+0024 ($)
+ {0x00, 0x63, 0x33, 0x18, 0x0C, 0x66, 0x63, 0x00}, // U+0025 (%)
+ {0x1C, 0x36, 0x1C, 0x6E, 0x3B, 0x33, 0x6E, 0x00}, // U+0026 (&)
+ {0x06, 0x06, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0027 (')
+ {0x18, 0x0C, 0x06, 0x06, 0x06, 0x0C, 0x18, 0x00}, // U+0028 (()
+ {0x06, 0x0C, 0x18, 0x18, 0x18, 0x0C, 0x06, 0x00}, // U+0029 ())
+ {0x00, 0x66, 0x3C, 0xFF, 0x3C, 0x66, 0x00, 0x00}, // U+002A (*)
+ {0x00, 0x0C, 0x0C, 0x3F, 0x0C, 0x0C, 0x00, 0x00}, // U+002B (+)
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x06}, // U+002C (,)
+ {0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x00}, // U+002D (-)
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x00}, // U+002E (.)
+ {0x60, 0x30, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x00}, // U+002F (/)
+ {0x3E, 0x63, 0x73, 0x7B, 0x6F, 0x67, 0x3E, 0x00}, // U+0030 (0)
+ {0x0C, 0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x3F, 0x00}, // U+0031 (1)
+ {0x1E, 0x33, 0x30, 0x1C, 0x06, 0x33, 0x3F, 0x00}, // U+0032 (2)
+ {0x1E, 0x33, 0x30, 0x1C, 0x30, 0x33, 0x1E, 0x00}, // U+0033 (3)
+ {0x38, 0x3C, 0x36, 0x33, 0x7F, 0x30, 0x78, 0x00}, // U+0034 (4)
+ {0x3F, 0x03, 0x1F, 0x30, 0x30, 0x33, 0x1E, 0x00}, // U+0035 (5)
+ {0x1C, 0x06, 0x03, 0x1F, 0x33, 0x33, 0x1E, 0x00}, // U+0036 (6)
+ {0x3F, 0x33, 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x00}, // U+0037 (7)
+ {0x1E, 0x33, 0x33, 0x1E, 0x33, 0x33, 0x1E, 0x00}, // U+0038 (8)
+ {0x1E, 0x33, 0x33, 0x3E, 0x30, 0x18, 0x0E, 0x00}, // U+0039 (9)
+ {0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x00}, // U+003A (:)
+ {0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x06}, // U+003B (;)
+ {0x18, 0x0C, 0x06, 0x03, 0x06, 0x0C, 0x18, 0x00}, // U+003C (<)
+ {0x00, 0x00, 0x3F, 0x00, 0x00, 0x3F, 0x00, 0x00}, // U+003D (=)
+ {0x06, 0x0C, 0x18, 0x30, 0x18, 0x0C, 0x06, 0x00}, // U+003E (>)
+ {0x1E, 0x33, 0x30, 0x18, 0x0C, 0x00, 0x0C, 0x00}, // U+003F (?)
+ {0x3E, 0x63, 0x7B, 0x7B, 0x7B, 0x03, 0x1E, 0x00}, // U+0040 (@)
+ {0x0C, 0x1E, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x00}, // U+0041 (A)
+ {0x3F, 0x66, 0x66, 0x3E, 0x66, 0x66, 0x3F, 0x00}, // U+0042 (B)
+ {0x3C, 0x66, 0x03, 0x03, 0x03, 0x66, 0x3C, 0x00}, // U+0043 (C)
+ {0x1F, 0x36, 0x66, 0x66, 0x66, 0x36, 0x1F, 0x00}, // U+0044 (D)
+ {0x7F, 0x46, 0x16, 0x1E, 0x16, 0x46, 0x7F, 0x00}, // U+0045 (E)
+ {0x7F, 0x46, 0x16, 0x1E, 0x16, 0x06, 0x0F, 0x00}, // U+0046 (F)
+ {0x3C, 0x66, 0x03, 0x03, 0x73, 0x66, 0x7C, 0x00}, // U+0047 (G)
+ {0x33, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x33, 0x00}, // U+0048 (H)
+ {0x1E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+0049 (I)
+ {0x78, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E, 0x00}, // U+004A (J)
+ {0x67, 0x66, 0x36, 0x1E, 0x36, 0x66, 0x67, 0x00}, // U+004B (K)
+ {0x0F, 0x06, 0x06, 0x06, 0x46, 0x66, 0x7F, 0x00}, // U+004C (L)
+ {0x63, 0x77, 0x7F, 0x7F, 0x6B, 0x63, 0x63, 0x00}, // U+004D (M)
+ {0x63, 0x67, 0x6F, 0x7B, 0x73, 0x63, 0x63, 0x00}, // U+004E (N)
+ {0x1C, 0x36, 0x63, 0x63, 0x63, 0x36, 0x1C, 0x00}, // U+004F (O)
+ {0x3F, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x0F, 0x00}, // U+0050 (P)
+ {0x1E, 0x33, 0x33, 0x33, 0x3B, 0x1E, 0x38, 0x00}, // U+0051 (Q)
+ {0x3F, 0x66, 0x66, 0x3E, 0x36, 0x66, 0x67, 0x00}, // U+0052 (R)
+ {0x1E, 0x33, 0x07, 0x0E, 0x38, 0x33, 0x1E, 0x00}, // U+0053 (S)
+ {0x3F, 0x2D, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+0054 (T)
+ {0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x3F, 0x00}, // U+0055 (U)
+ {0x33, 0x33, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00}, // U+0056 (V)
+ {0x63, 0x63, 0x63, 0x6B, 0x7F, 0x77, 0x63, 0x00}, // U+0057 (W)
+ {0x63, 0x63, 0x36, 0x1C, 0x1C, 0x36, 0x63, 0x00}, // U+0058 (X)
+ {0x33, 0x33, 0x33, 0x1E, 0x0C, 0x0C, 0x1E, 0x00}, // U+0059 (Y)
+ {0x7F, 0x63, 0x31, 0x18, 0x4C, 0x66, 0x7F, 0x00}, // U+005A (Z)
+ {0x1E, 0x06, 0x06, 0x06, 0x06, 0x06, 0x1E, 0x00}, // U+005B ([)
+ {0x03, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x40, 0x00}, // U+005C (\)
+ {0x1E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1E, 0x00}, // U+005D (])
+ {0x08, 0x1C, 0x36, 0x63, 0x00, 0x00, 0x00, 0x00}, // U+005E (^)
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF}, // U+005F (_)
+ {0x0C, 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0060 (`)
+ {0x00, 0x00, 0x1E, 0x30, 0x3E, 0x33, 0x6E, 0x00}, // U+0061 (a)
+ {0x07, 0x06, 0x06, 0x3E, 0x66, 0x66, 0x3B, 0x00}, // U+0062 (b)
+ {0x00, 0x00, 0x1E, 0x33, 0x03, 0x33, 0x1E, 0x00}, // U+0063 (c)
+ {0x38, 0x30, 0x30, 0x3e, 0x33, 0x33, 0x6E, 0x00}, // U+0064 (d)
+ {0x00, 0x00, 0x1E, 0x33, 0x3f, 0x03, 0x1E, 0x00}, // U+0065 (e)
+ {0x1C, 0x36, 0x06, 0x0f, 0x06, 0x06, 0x0F, 0x00}, // U+0066 (f)
+ {0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x1F}, // U+0067 (g)
+ {0x07, 0x06, 0x36, 0x6E, 0x66, 0x66, 0x67, 0x00}, // U+0068 (h)
+ {0x0C, 0x00, 0x0E, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+0069 (i)
+ {0x30, 0x00, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E}, // U+006A (j)
+ {0x07, 0x06, 0x66, 0x36, 0x1E, 0x36, 0x67, 0x00}, // U+006B (k)
+ {0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+006C (l)
+ {0x00, 0x00, 0x33, 0x7F, 0x7F, 0x6B, 0x63, 0x00}, // U+006D (m)
+ {0x00, 0x00, 0x1F, 0x33, 0x33, 0x33, 0x33, 0x00}, // U+006E (n)
+ {0x00, 0x00, 0x1E, 0x33, 0x33, 0x33, 0x1E, 0x00}, // U+006F (o)
+ {0x00, 0x00, 0x3B, 0x66, 0x66, 0x3E, 0x06, 0x0F}, // U+0070 (p)
+ {0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x78}, // U+0071 (q)
+ {0x00, 0x00, 0x3B, 0x6E, 0x66, 0x06, 0x0F, 0x00}, // U+0072 (r)
+ {0x00, 0x00, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x00}, // U+0073 (s)
+ {0x08, 0x0C, 0x3E, 0x0C, 0x0C, 0x2C, 0x18, 0x00}, // U+0074 (t)
+ {0x00, 0x00, 0x33, 0x33, 0x33, 0x33, 0x6E, 0x00}, // U+0075 (u)
+ {0x00, 0x00, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00}, // U+0076 (v)
+ {0x00, 0x00, 0x63, 0x6B, 0x7F, 0x7F, 0x36, 0x00}, // U+0077 (w)
+ {0x00, 0x00, 0x63, 0x36, 0x1C, 0x36, 0x63, 0x00}, // U+0078 (x)
+ {0x00, 0x00, 0x33, 0x33, 0x33, 0x3E, 0x30, 0x1F}, // U+0079 (y)
+ {0x00, 0x00, 0x3F, 0x19, 0x0C, 0x26, 0x3F, 0x00}, // U+007A (z)
+ {0x38, 0x0C, 0x0C, 0x07, 0x0C, 0x0C, 0x38, 0x00}, // U+007B ({)
+ {0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x00}, // U+007C (|)
+ {0x07, 0x0C, 0x0C, 0x38, 0x0C, 0x0C, 0x07, 0x00}, // U+007D (})
+ {0x6E, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+007E (~)
+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} // U+007F
+
+};
+
+inline Kernel::Void cg_render_string_for_bitmap(const Kernel::UInt8* bitmap,
+ const Kernel::SizeT x_sz, const Kernel::SizeT y_sz,
+ Kernel::Int32& x_dst, Kernel::Int32& y_dst,
+ Kernel::Int32& color) {
+ Kernel::SizeT x, y;
+ Kernel::SizeT set;
+
+ x = 0;
+ y = 0;
+ set = 0;
+
+ for (; y < y_sz; ++y) {
+ for (x = 0; x < x_sz; ++x) {
+ set = bitmap[x] & (1 << y);
+
+ if (set) {
+ FBDrawInRegion(color, 1, 1, ((x_dst) + x), ((y_dst) + y));
+ }
+ }
+ }
+}
+
+inline Kernel::Void cg_render_string(const Kernel::Char* text, Kernel::Int32 x_dst,
+ Kernel::Int32 y_dst, Kernel::Int32 color) {
+#ifndef __BOOTZ__
+ auto len = Kernel::rt_string_len(text);
+#else
+ auto len = StrLen(text);
+#endif
+
+ for (Kernel::SizeT i = 0; i < len; ++i) {
+ cg_render_string_for_bitmap(&kFontBitmap[(Kernel::UInt8) text[i]][0], kFontSizeX, kFontSizeY,
+ x_dst, y_dst, color);
+ y_dst += kFontSizeY;
+ }
+}
diff --git a/src/modules/GPRS/.keep b/src/modules/GPRS/.keep
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/src/modules/GPRS/.keep
diff --git a/src/modules/HPET/Defines.h b/src/modules/HPET/Defines.h
new file mode 100644
index 00000000..56968a24
--- /dev/null
+++ b/src/modules/HPET/Defines.h
@@ -0,0 +1,39 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+ File: HPET.h
+ Purpose: HPET builtin.
+
+ Revision History:
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+#include <modules/ACPI/ACPI.h>
+
+namespace Kernel {
+struct PACKED HPETAddressStructure final {
+ Kernel::UInt8 AddressSpaceId; // 0 - system memory, 1 - system I/O
+ Kernel::UInt8 RegisterBitWidth;
+ Kernel::UInt8 RegisterBitOffset;
+ Kernel::UInt8 Reserved;
+ Kernel::UInt64 Address;
+};
+
+struct PACKED HPETHeader final : public SDT {
+ Kernel::UInt8 HardwareRevId;
+ Kernel::UInt8 ComparatorCount : 5;
+ Kernel::UInt8 CounterSize : 1;
+ Kernel::UInt8 Reserved : 1;
+ Kernel::UInt8 LegacyReplacement : 1;
+ Kernel::UInt16 PciVendorId;
+ HPETAddressStructure Address;
+ Kernel::UInt8 HpetNumber;
+ Kernel::UInt16 MinimumTick;
+ Kernel::UInt8 PageProtection;
+};
+
+} // namespace Kernel
diff --git a/src/modules/IEEE802/.gitkeep b/src/modules/IEEE802/.gitkeep
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/src/modules/IEEE802/.gitkeep
diff --git a/src/modules/LTE/LTE.h b/src/modules/LTE/LTE.h
new file mode 100644
index 00000000..7cee2c8d
--- /dev/null
+++ b/src/modules/LTE/LTE.h
@@ -0,0 +1,34 @@
+/* ========================================
+
+Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license..
+
+File: LTE\LTE.h.
+Purpose: LTE Standard Library.
+
+======================================== */
+
+#ifndef _INC_NETWORK_LTE_H_
+#define _INC_NETWORK_LTE_H_
+
+#include <NeKit/Defines.h>
+#include <NeKit/KString.h>
+
+/// @brief Long Term Evolution I/O routines.
+
+/// @brief Turn on SIM slot.
+Kernel::Boolean lte_turn_on_sim(Kernel::Int32 simSlot);
+
+/// @brief Turn off SIM slot.
+Kernel::Boolean lte_turn_off_sim(Kernel::Int32 simSlot);
+
+/// @brief Send AT command.
+Kernel::Boolean lte_send_at_command(Kernel::Char* buf, Kernel::Size bufReadSz,
+ Kernel::Int32 simSlot);
+
+Kernel::Boolean lte_write_sim_file(Kernel::Char* file, Kernel::VoidPtr buf, Kernel::Size bufSz,
+ Kernel::Size offset, Kernel::Int32 simSlot);
+
+Kernel::VoidPtr lte_read_sim_file(Kernel::Char* file, Kernel::Size bufSz, Kernel::Size offset,
+ Kernel::Int32 simSlot);
+
+#endif // ifndef _INC_NETWORK_LTE_H_
diff --git a/src/modules/MBCI/MBCI.h b/src/modules/MBCI/MBCI.h
new file mode 100644
index 00000000..a96f8f3a
--- /dev/null
+++ b/src/modules/MBCI/MBCI.h
@@ -0,0 +1,126 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#ifndef _INC_MODULE_MBCI_H_
+#define _INC_MODULE_MBCI_H_
+
+#include <NeKit/Defines.h>
+#include <hint/CompilerHint.h>
+#include <modules/ACPI/ACPI.h>
+
+/// @file MBCI.h
+/// @brief Mini Bus Controller Interface.
+
+/**
+- VCC (IN) (OUT for MCU)
+- CLK (IN) (OUT for MCU)
+- ACK (BI) (Contains an Acknowledge Packet Frame)
+- D0- (IN) (Starts with the Host Interface Packet Frame)
+- D1- (IN) (Starts with the Host Interface Packet Frame)
+- D0+ (OUT) (Starts with the Host Interface Packet Frame)
+- D1+ (OUT) (Starts with the Host Interface Packet Frame)
+- GND (IN) (OUT for MCU)
+ */
+
+#define kMBCIZeroSz (8)
+#define kMBCIESBSz (64)
+
+namespace Kernel {
+struct IMBCIHost;
+
+enum {
+ kMBCISpeedDeviceInvalid,
+ kMBCILowSpeedDevice,
+ kMBCIHighSpeedDevice,
+ kMBCISpeedDeviceCount,
+};
+
+/// @brief MBCI Host header.
+volatile struct PACKED IMBCIHost final {
+ UInt32 Magic;
+ UInt32 HostId;
+ UInt16 VendorId;
+ UInt16 DeviceId;
+ UInt8 MemoryType;
+ UInt16 HostType;
+ UInt16 HostFlags;
+ UInt8 Error;
+ UInt32 MMIOTest;
+ UInt16 State;
+ UInt8 Status;
+ UInt8 InterruptEnable;
+ UInt64 BaseAddressRegister;
+ UInt64 BaseAddressRegisterSize;
+ UInt32 CommandIssue;
+ UInt8 Esb[kMBCIESBSz]; // Extended Signature Block
+ UInt8 Zero[kMBCIZeroSz];
+};
+
+/// @brief MBCI host flags.
+enum MBCIHostFlags {
+ kMBCIHostFlagsSupportsNothing, // Invalid MBCI device.
+ kMBCIHostFlagsSupportsAPM, // FW's Advanced Power Management.
+ kMBCIHostFlagsSupportsDaisyChain, // Is daisy chained.
+ kMBCIHostFlagsSupportsHWInterrupts, // Has HW interrupts.
+ kMBCIHostFlagsSupportsDMA, // Has DMA.
+ kMBCIHostFlagsExtended, // Extended flags table.
+};
+
+/// @brief MBCI host kind.
+enum MBCIHostKind {
+ kMBCIHostKindHardDisk,
+ kMBCIHostKindOpticalDisk,
+ kMBCIHostKindKeyboardLow,
+ kMBCIHostKindMouseLow,
+ kMBCIHostKindMouseHigh,
+ kMBCIHostKindKeyboardHigh,
+ kMBCIHostKindNetworkInterface,
+ kMBCIHostKindDaisyChain,
+ kMBCIHostKindStartExtended, // Extended vendor table limit.
+};
+
+enum MBCIHostState {
+ kMBCIHostStateInvalid,
+ kMBCIHostStateReset,
+ kMBCIHostStateSuccess,
+ kMBCIHostStateReady,
+ kMBCIHostStateDmaStart,
+ kMBCIHostStateDmaEnd,
+ kMBCIHostStateFail,
+ kMBCIHostStateCount,
+};
+
+/// @brief An AuthKey is a context used to tokenize data for an MBCI packet.
+typedef UInt32 MBCIAuthKeyType;
+
+/// @internal
+inline BOOL busi_test_mmio(_Input struct IMBCIHost* host, _Input const UInt32 test) {
+ host->MMIOTest = test;
+ UInt16 timeout = 0UL;
+
+ while (host->MMIOTest == test) {
+ ++timeout;
+
+ if (timeout > 0x1000) return NO;
+ }
+
+ return host->MMIOTest == 0;
+}
+
+/// @brief Read Auth key for MBCI host.
+/// @param host the mbci host to get the key on.
+/// @return the 24-bit key.
+inline MBCIAuthKeyType mbci_read_auth_key(_Input struct IMBCIHost* host) {
+ auto const kChallengeMBCI = 0x1; // MBCI Challenge test
+
+ if (!busi_test_mmio(host, kChallengeMBCI)) return ~0;
+
+ return (host->Esb[kMBCIESBSz - 1] << 16) | (host->Esb[kMBCIESBSz - 2] << 8) |
+ (host->Esb[kMBCIESBSz - 3] & 0xFF);
+}
+} // namespace Kernel
+
+#endif // ifndef _INC_MODULE_MBCI_H_ \ No newline at end of file
diff --git a/src/modules/NVME/NVME.h b/src/modules/NVME/NVME.h
new file mode 100644
index 00000000..9ad8a3ce
--- /dev/null
+++ b/src/modules/NVME/NVME.h
@@ -0,0 +1,104 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+ Revision History:
+
+ ??/??/24: Added file (amlel)
+ 23 Jul 24: Update filename to Defines.h and using NE_ALIGN_NVME for NVME structs. (amlel)
+
+======================================== */
+
+#ifndef __MODULE_NVME_H__
+#define __MODULE_NVME_H__
+
+#include <NeKit/Defines.h>
+
+/// @file NVME.h
+/// @brief Non Volatile Memory.
+
+#define NE_ALIGN_NVME ATTRIBUTE(aligned(sizeof(Kernel::UInt32)))
+
+namespace Kernel {
+struct NE_ALIGN_NVME HAL_NVME_BAR_0 final {
+ UInt32 fCapabilities;
+ UInt32 fVersion;
+ UInt32 fIntMaskSet;
+ UInt32 fIntMaskClr;
+ UInt32 fContrlConf;
+ UInt32 fContrlStat;
+ UInt32 fAdminQueueAttr;
+ UInt32 fAdminSubmissionQueue;
+ UInt32 fAdminCompletionQueue;
+};
+
+struct NE_ALIGN_NVME HAL_NVME_QUEUE final {
+ UInt32 fOpcode;
+ UInt32 fNSID;
+ UInt32 fReserved[3];
+ UInt32 fMetadataPtr[5];
+ UInt32 fDataPtr[9];
+ UInt32 CommandSpecific[15];
+};
+
+enum {
+ kInvalidNVME = 0xFF,
+ kCreateCompletionQueueNVME = 0x05,
+ kCreateSubmissionQueueNVME = 0x01,
+ kIdentifyNVME = 0x06,
+ kReadNVME = 0x02,
+ kWriteNVME = 0x01,
+ kCountNVME = 5,
+};
+
+/// @brief Creates an admin command for a DMA operation.
+template <Int32 Opcode>
+inline Bool nvme_create_admin_command(HAL_NVME_QUEUE* entry, UInt32 nsid, UInt32 prpTransfer[3],
+ UInt32 startingLba[2], UInt32 lowTransferBlocks) {
+ if (entry == nullptr) return false;
+
+ entry->CommandSpecific[9] = startingLba[0];
+ entry->CommandSpecific[10] = startingLba[1];
+
+ entry->CommandSpecific[11] = lowTransferBlocks;
+
+ entry->CommandSpecific[5] = prpTransfer[0];
+ entry->CommandSpecific[6] = prpTransfer[1];
+ entry->CommandSpecific[7] = prpTransfer[2];
+
+ entry->CommandSpecific[0] = nsid;
+
+ return true;
+}
+
+/// @brief Creates an I/O command for a DMA operation.
+template <Int32 Opcode>
+inline Bool nvme_create_io_command(HAL_NVME_QUEUE* entry, UInt64 baseAddress,
+ UInt32 identLoAndQueueSizeHi, UInt32 flagsLoAndQueueComplIdHi,
+ UInt32 identify, Bool provideIdentify = false,
+ Bool namespaceIdentify = false) {
+ if (entry == nullptr) return false;
+
+ if (baseAddress == 0) return false;
+
+ entry->fOpcode = Opcode;
+
+ entry->CommandSpecific[5] = (baseAddress & 0xFF);
+ entry->CommandSpecific[6] = static_cast<UInt32>(baseAddress);
+
+ if (!provideIdentify) {
+ entry->CommandSpecific[9] = identLoAndQueueSizeHi;
+ entry->CommandSpecific[10] = flagsLoAndQueueComplIdHi;
+ } else {
+ entry->CommandSpecific[9] = identify;
+
+ if (namespaceIdentify) {
+ entry->CommandSpecific[0] = YES;
+ }
+ }
+
+ return true;
+}
+} // namespace Kernel
+
+#endif // ifndef __MODULE_NVME_H__
diff --git a/src/modules/OHCI/.gitkeep b/src/modules/OHCI/.gitkeep
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/src/modules/OHCI/.gitkeep
diff --git a/src/modules/Power/PowerFactory.h b/src/modules/Power/PowerFactory.h
new file mode 100644
index 00000000..2e349011
--- /dev/null
+++ b/src/modules/Power/PowerFactory.h
@@ -0,0 +1,30 @@
+/* ========================================
+
+ Copyright (C) 2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <KernelKit/DebugOutput.h>
+#include <NeKit/Defines.h>
+#include <NeKit/ErrorOr.h>
+#include <NeKit/Ref.h>
+#include <modules/ACPI/ACPI.h>
+
+#define NE_POWER_FACTORY : public PowerFactory
+
+namespace Kernel {
+class PowerFactory {
+ public:
+ explicit PowerFactory() = default;
+ virtual ~PowerFactory() = default;
+
+ PowerFactory& operator=(const PowerFactory&) = default;
+ PowerFactory(const PowerFactory&) = default;
+
+ public:
+ virtual Bool Shutdown() { return NO; } // shutdown
+ virtual Void Reboot() {} // soft-reboot
+};
+} // namespace Kernel \ No newline at end of file
diff --git a/src/modules/SCSI/.gitkeep b/src/modules/SCSI/.gitkeep
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/src/modules/SCSI/.gitkeep
diff --git a/src/modules/SCSI/SCSI.h b/src/modules/SCSI/SCSI.h
new file mode 100644
index 00000000..e0bc2517
--- /dev/null
+++ b/src/modules/SCSI/SCSI.h
@@ -0,0 +1,21 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+
+/// @file SCSI.h
+/// @brief Small Computer System Interface device.
+
+namespace Kernel {
+template <Int32 PacketBitLen>
+using scsi_packet_type = Kernel::UInt16[PacketBitLen];
+
+using scsi_packet_type_12 = scsi_packet_type<12>;
+
+extern const scsi_packet_type_12 kCDRomPacketTemplate;
+} // namespace Kernel \ No newline at end of file
diff --git a/src/modules/WiFi/.gitkeep b/src/modules/WiFi/.gitkeep
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/src/modules/WiFi/.gitkeep
diff --git a/src/modules/XHCI/XHCI.h b/src/modules/XHCI/XHCI.h
new file mode 100644
index 00000000..40387c1e
--- /dev/null
+++ b/src/modules/XHCI/XHCI.h
@@ -0,0 +1,66 @@
+/* ========================================
+
+ Copyright (C) 2024-2025, Amlal El Mahrouss, licensed under the Apache 2.0 license.
+
+ File: Defines.h
+ Purpose: XHCI (and backwards) header.
+
+ Revision History:
+
+ 01/02/24: Added file (amlel)
+ 03/02/24: Update filename to Defines.h (amlel)
+
+======================================== */
+
+#pragma once
+
+#include <NeKit/Defines.h>
+
+#define kUSBCommand (UInt16) 0x0
+#define kUSBStatus (UInt16) 0x2
+#define kUSBInterruptEnable (UInt16) 0x4
+#define kUSBFrameNum (UInt16) 0x6
+#define kUSBFrameListBaseAddress (UInt16) 0x8
+#define kUSBFrameModifyStart (UInt16) 0xC
+#define kUSBPort1StatusCtrl (UInt16) 0x10
+#define kUSBPort2StatusCtrl (UInt16) 0x12
+
+namespace Kernel {
+typedef struct USBCommandRegister final {
+ UInt8 mReserved[8]; // Reserved
+ UInt8 mMaxPacket; // 0 = Max packet size 32 bits 1 = Max packet size 64 bits
+ UInt8 mConfigure;
+ UInt8 mSoftwareDebug;
+ UInt8 mGlobalResume;
+ UInt8 mGlobalSuspend;
+ UInt8 mHostCtrlReset;
+ UInt8 mRun; // 1 = Controller execute frame list entries
+} USBCommandRegister;
+
+typedef struct USBStatusRegister final {
+ UInt8 mReserved[8]; // Reserved
+ UInt8 mHalted; // 1 = bit 0 in CMD is zero 0 = bit 0 in CMD is 1
+ UInt8 mProcessError;
+ UInt8 mSystemError;
+ UInt8 mResumeDetected;
+ UInt8 mErrorInterrupt;
+ UInt8 mInterrupt;
+} USBStatusRegister;
+
+typedef struct USBInterruptEnableRegister final {
+ UInt8 mReserved[4]; // Reserved
+ UInt8 mShortPacket; // 1=Enable interrupt 0=Disable interrupt
+ UInt8 mComplete; // 1=Enable interrupt 0=Disable interrupt
+ UInt8 mResume; // 1=Enable interrupt 0=Disable interrupt
+ UInt8 mTimeoutCRC; // 1=Enable interrupt 0=Disable interrupt
+} USBInterruptEnableRegister;
+
+/*
+ Some terminology:
+
+ Frame Number: Number of processed entry of the Frame List.
+ Frame List Base Address:
+ 32-bit physical adress of Frame List. Remember that first 12 bytes are
+ always 0. The Frame List must contain 1024 entries.
+*/
+} // namespace Kernel \ No newline at end of file
generated by cgit v1.2.3 (git 2.39.1) at 2026-03-13 08:59:14 +0000