Some pretty important changes to the instruction set.

Since we don't have local registers, I added pha and pla.
pha and pla, stores the previous registers, and pla pulls them back.

The 64k will soon also have floating point support.
The 32k also got improved.

Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>

3 files changed, 30 insertions, 20 deletions

diff --git a/64x0-Drivers/64asm.cc b/64x0-Drivers/64asm.cc
index fee511d..7aea12b 100644
--- a/64x0-Drivers/64asm.cc
+++ b/64x0-Drivers/64asm.cc
@@ -558,15 +558,18 @@ static std::string masm_check_line(std::string& line, const std::string& file)
     std::vector<std::string> operands_inst = { "jb", "psh", "stw", "ldw", "lda", "sta" };
 
     // these don't.
-    std::vector<std::string> filter_inst = { "jlr", "jrl", "syscall" };
+    std::vector<std::string> filter_inst = { "jlr", "jrl", "int" };
 
     for (auto& opcode64x0 : kOpcodes64x0)
     {
         if (line.find(opcode64x0.fName) != std::string::npos)
         {
+            if (opcode64x0.fFunct7 == kAsmNoArgs)
+                return err_str;
+
             for (auto& op : operands_inst)
             {
-                // if only instruction found.
+                // if only the instruction was found.
                 if (line == op)
                 {
                     err_str += "\nmalformed ";
@@ -778,7 +781,7 @@ static void masm_read_instruction(std::string& line, const std::string& file)
 
                     for (size_t line_index = 0UL; line_index < line.size(); line_index++)
                     {
-                        if (line[line_index] == 'r' &&
+                        if (line[line_index] == kAsmRegisterPrefix[0] &&
                             isdigit(line[line_index + 1]))
                         {
                             std::string register_syntax = kAsmRegisterPrefix;
diff --git a/CompilerKit/AsmKit/Arch/32k.hpp b/CompilerKit/AsmKit/Arch/32k.hpp
index b9ce4bb..018b0aa 100644
--- a/CompilerKit/AsmKit/Arch/32k.hpp
+++ b/CompilerKit/AsmKit/Arch/32k.hpp
@@ -20,9 +20,10 @@
 
 
 // placeholder for funct7/funct7-rs2
-#define kAsmImmediate 0x00
+#define kAsmImmediate 0x01
 #define kAsmSyscall 0x02
 #define kAsmJump 0x03
+#define kAsmNoArgs 0x04
 
 #define kAsmByte  0
 #define kAsmHWord 1
@@ -37,12 +38,12 @@ struct CpuCode32x0
     char fFunct7;
 };
 
-#define kAsmWordStr  ".w"
-#define kAsmHWordStr ".h"
-#define kAsmByteStr  ".b"
+#define kAsmWordStr  ".word"
+#define kAsmHWordStr ".half"
+#define kAsmByteStr  ".bbyte"
 
 inline std::vector<CpuCode32x0> kOpcodes32x0 = {
-        kAsmOpcodeDecl("nop", 0b0100011, 0b0000000, kAsmImmediate) // nothing to do.
+        kAsmOpcodeDecl("nop", 0b0100011, 0b0000000, kAsmNoArgs) // nothing to do.
         kAsmOpcodeDecl("jmp", 0b1110011, 0b0000011, kAsmJump) // jump to branch
         kAsmOpcodeDecl("move", 0b0100011, 0b101, kAsmImmediate)
         kAsmOpcodeDecl("push", 0b0111011, 0b0, kAsmImmediate) // push to sp
@@ -50,13 +51,13 @@ inline std::vector<CpuCode32x0> kOpcodes32x0 = {
         kAsmOpcodeDecl("int", 0b0111111, 0b0, kAsmSyscall) // raise interrupt
 };
 
-// \brief NewCPU register prefix
+// \brief 64x0 register prefix
 // example: r32, r0
 // r32 -> sp
 // r0 -> hw zero
 
 #define kAsmRegisterPrefix "r"
-#define kAsmRegisterLimit  20
+#define kAsmRegisterLimit  16
 #define kAsmPcRegister     17
 #define kAsmCrRegister     18
 #define kAsmSpRegister     5
diff --git a/CompilerKit/AsmKit/Arch/64k.hpp b/CompilerKit/AsmKit/Arch/64k.hpp
index ceee868..2ef847d 100644
--- a/CompilerKit/AsmKit/Arch/64k.hpp
+++ b/CompilerKit/AsmKit/Arch/64k.hpp
@@ -18,12 +18,12 @@
     { .fName = __NAME, .fOpcode = __OPCODE, .fFunct3 = __FUNCT3, .fFunct7 = __FUNCT7 },
 
 
-
 // placeholder for funct7/funct7-rs2
-#define kAsmImmediate 0x00
-#define kAsmRegToReg 0x01
-#define kAsmSyscall 0x02
-#define kAsmJump 0x03
+#define kAsmImmediate 0x01
+#define kAsmRegToReg 0x02
+#define kAsmSyscall 0x03
+#define kAsmJump 0x04
+#define kAsmNoArgs 0x05
 
 struct CpuCode64x0
 {
@@ -34,10 +34,10 @@ struct CpuCode64x0
 };
 
 inline std::vector<CpuCode64x0> kOpcodes64x0 = {
-        kAsmOpcodeDecl("np", 0b0100011, 0b0000000, kAsmImmediate) // mv r0, r0
+        kAsmOpcodeDecl("np", 0b0100011, 0b0000000, kAsmNoArgs) // no-operation.
         kAsmOpcodeDecl("jb", 0b1110011, 0b0000011, kAsmJump) // jump to branch
-        kAsmOpcodeDecl("jlr", 0b1110011, 0b0000111, kAsmJump) // jump and link return register
-        kAsmOpcodeDecl("jrl", 0b1110011, 0b0001111, kAsmJump) // jump to register link
+        kAsmOpcodeDecl("jlr", 0b1110011, 0b0000111, kAsmJump) // jump to linked return register
+        kAsmOpcodeDecl("jrl", 0b1110011, 0b0001111, kAsmJump) // jump from return register.
         kAsmOpcodeDecl("mv", 0b0100011, 0b101, kAsmRegToReg)
         kAsmOpcodeDecl("bg", 0b1100111, 0b111, kAsmRegToReg)
         kAsmOpcodeDecl("bl", 0b1100111, 0b011, kAsmRegToReg)
@@ -51,14 +51,20 @@ inline std::vector<CpuCode64x0> kOpcodes64x0 = {
         kAsmOpcodeDecl("sta", 0b0001111, 0b001, kAsmImmediate)
         kAsmOpcodeDecl("add", 0b0101011, 0b100, kAsmImmediate)
         kAsmOpcodeDecl("dec", 0b0101011, 0b101, kAsmImmediate)
+        kAsmOpcodeDecl("int", 0b1110011, 0b00, kAsmSyscall)
         kAsmOpcodeDecl("syscall", 0b1110011, 0b00, kAsmSyscall)
+        kAsmOpcodeDecl("pha", 0b1110011, 0b00, kAsmNoArgs)
+        kAsmOpcodeDecl("pla", 0b1110011, 0b01, kAsmNoArgs)
 };
 
-// \brief NewCPU register prefix
+// \brief 64x0 register prefix
 // example: r32, r0
 // r32 -> sp
 // r0 -> hw zero
 
+#define kAsmFloatRegisterPrefix "f"
+#define kAsmFloatRegisterLimit  10
+
 #define kAsmRegisterPrefix "r"
 #define kAsmRegisterLimit  20
 #define kAsmPcRegister     17
@@ -88,7 +94,7 @@ inline std::vector<CpuCode64x0> kOpcodes64x0 = {
 
 // LOAD/CALL INTERRUPTS
 
-// SET A HANDLER IN ADDRESS: TODO: find one
+// SET A HANDLER IN ADDRESS:
 // DISABLE INTERRUPTS
 // PROCESS INTERRUPT
 // ENABLE INTERRUPTS