diff options
| author | Amlal El Mahrouss <amlal.elmahrouss@icloud.com> | 2024-01-02 22:11:02 +0100 |
|---|---|---|
| committer | Amlal El Mahrouss <amlal.elmahrouss@icloud.com> | 2024-01-02 22:11:02 +0100 |
| commit | 5a76ab8976b63a7f27b244d31db0ee1ffdc53fde (patch) | |
| tree | 4c46aa478452cb707b22711517d93139879fd0ba /C++Kit | |
| parent | 4798a0ca3d2d63c451afac9d15bd0834ea83094e (diff) | |
[toolchain] rework some parts of the ISA (logisim)
also renamed newcpu.hpp to 64k.hpp
Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>
Diffstat (limited to 'C++Kit')
| -rw-r--r-- | C++Kit/AsmKit/Arch/64k.hpp (renamed from C++Kit/AsmKit/Arch/NewCPU.hpp) | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/C++Kit/AsmKit/Arch/NewCPU.hpp b/C++Kit/AsmKit/Arch/64k.hpp index 36dcbcc..4cd09d8 100644 --- a/C++Kit/AsmKit/Arch/NewCPU.hpp +++ b/C++Kit/AsmKit/Arch/64k.hpp @@ -11,9 +11,8 @@ #include <C++Kit/Defines.hpp> -// @brief NewCPU backend for C++ Kit a RISC architecture. -// It aims to be as simple as the Motorola 68k -// @file Arch/NewCPU.hpp +// @brief 64x0 support. +// @file Arch/64k.hpp #define kAsmOpcodeDecl(__NAME, __OPCODE, __FUNCT3, __FUNCT7) \ { .fName = __NAME, .fOpcode = __OPCODE, .fFunct3 = __FUNCT3, .fFunct7 = __FUNCT7 }, @@ -42,23 +41,23 @@ inline std::vector<NCOpcode> kOpcodesStd = { kAsmOpcodeDecl("jr", 0b1110011, 0b0001011, kAsmJump) // jump to register kAsmOpcodeDecl("jal", 0b1110011, 0b0000001, kAsmJump) kAsmOpcodeDecl("mv", 0b0100011, 0b101, kAsmRegToReg) - kAsmOpcodeDecl("psh", 0b1101011, 0b0, kAsmImmediate) // push to sp + kAsmOpcodeDecl("psh", 0b0111011, 0b0, kAsmImmediate) // push to sp kAsmOpcodeDecl("pop", 0b0111011, 0b1, kAsmImmediate) // pop from sp. - kAsmOpcodeDecl("bg", 0b1100011, 0b111, kAsmRegToReg) - kAsmOpcodeDecl("bl", 0b1101011, 0b011, kAsmRegToReg) - kAsmOpcodeDecl("beq", 0b1101011, 0b000, kAsmRegToReg) + kAsmOpcodeDecl("bg", 0b1100111, 0b111, kAsmRegToReg) + kAsmOpcodeDecl("bl", 0b1100111, 0b011, kAsmRegToReg) + kAsmOpcodeDecl("beq", 0b1100111, 0b000, kAsmRegToReg) kAsmOpcodeDecl("bne", 0b1100111, 0b001, kAsmRegToReg) - kAsmOpcodeDecl("bge", 0b1100011, 0b101, kAsmRegToReg) - kAsmOpcodeDecl("ble", 0b1111011, 0b100, kAsmRegToReg) - kAsmOpcodeDecl("stw", 0b1100011, 0b100, kAsmImmediate) - kAsmOpcodeDecl("ldw", 0b1010011, 0b100, kAsmImmediate) + kAsmOpcodeDecl("bge", 0b1100111, 0b101, kAsmRegToReg) + kAsmOpcodeDecl("ble", 0b1100111, 0b100, kAsmRegToReg) + kAsmOpcodeDecl("stw", 0b0001111, 0b100, kAsmImmediate) + kAsmOpcodeDecl("ldw", 0b0001111, 0b100, kAsmImmediate) kAsmOpcodeDecl("lda", 0b0001111, 0b101, kAsmImmediate) - kAsmOpcodeDecl("sta", 0b0000111, 0b001, kAsmImmediate) + kAsmOpcodeDecl("sta", 0b0001111, 0b001, kAsmImmediate) kAsmOpcodeDecl("add", 0b0101011, 0b100, kAsmImmediate) kAsmOpcodeDecl("dec", 0b0101011, 0b101, kAsmImmediate) kAsmOpcodeDecl("scall", 0b1110011, 0b00, kAsmSyscall) kAsmOpcodeDecl("sbreak", 0b1110011, 0b01, kAsmSyscall) - kAsmOpcodeDecl("mh", 0b1110011, 0b011111, kAsmJump) + kAsmOpcodeDecl("mh", 0b1110011, 0b1111111, kAsmJump) }; // \brief NewCPU register prefix |