Toolchain: Work in progress AMD64 support.

- We use the Mahrouss Logic x86 Standard:
	- Register is prefixed with 'r' and hols it's id.
	- Register Dest first, Source second, example: mov rd, rs
	- #code_<isa>_<features>, which will let select what
	  instructions to use.

Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>

4 files changed, 113 insertions, 26 deletions

diff --git a/Private/CompilerKit/AsmKit/Arch/32x0.hpp b/Private/CompilerKit/AsmKit/Arch/32x0.hpp
index 28bf754..f9be82b 100644
--- a/Private/CompilerKit/AsmKit/Arch/32x0.hpp
+++ b/Private/CompilerKit/AsmKit/Arch/32x0.hpp
@@ -31,7 +31,7 @@
 
 struct CpuCode32x0
 {
-    const char fName[16];
+    const char fName[32];
     char fOpcode;
     char fSize;
     char fFunct3;
diff --git a/Private/CompilerKit/AsmKit/Arch/64x0.hpp b/Private/CompilerKit/AsmKit/Arch/64x0.hpp
index fde40fa..3052021 100644
--- a/Private/CompilerKit/AsmKit/Arch/64x0.hpp
+++ b/Private/CompilerKit/AsmKit/Arch/64x0.hpp
@@ -30,37 +30,37 @@ typedef uint8_t e64k_num_t;
 
 struct CpuCode64x0
 {
-    const e64k_character_t fName[16];
+    const e64k_character_t fName[32];
     e64k_num_t fOpcode;
     e64k_num_t fFunct3;
     e64k_num_t fFunct7;
 };
 
 inline std::vector<CpuCode64x0> kOpcodes64x0 = {
-        kAsmOpcodeDecl("nop", 0b0000000, 0b0000000, kAsmNoArgs) // no-operation.
-        kAsmOpcodeDecl("np", 0b0000000, 0b0000000, kAsmNoArgs) // no-operation.
-        kAsmOpcodeDecl("jlr", 0b1110011, 0b0000111, kAsmJump) // jump to linked return register
-        kAsmOpcodeDecl("jrl", 0b1110011, 0b0001111, kAsmJump) // jump from return register.
-        kAsmOpcodeDecl("mv", 0b0100011, 0b101, kAsmRegToReg)
-        kAsmOpcodeDecl("bg", 0b1100111, 0b111, kAsmRegToReg)
-        kAsmOpcodeDecl("bl", 0b1100111, 0b011, kAsmRegToReg)
-        kAsmOpcodeDecl("beq", 0b1100111, 0b000, kAsmRegToReg)
-        kAsmOpcodeDecl("bne", 0b1100111, 0b001, kAsmRegToReg)
-        kAsmOpcodeDecl("bge", 0b1100111, 0b101, kAsmRegToReg)
-        kAsmOpcodeDecl("ble", 0b1100111, 0b100, kAsmRegToReg)
-        kAsmOpcodeDecl("stw", 0b0001111, 0b100, kAsmImmediate)
-        kAsmOpcodeDecl("ldw", 0b0001111, 0b100, kAsmImmediate)
-        kAsmOpcodeDecl("lda", 0b0001111, 0b101, kAsmImmediate)
-        kAsmOpcodeDecl("sta", 0b0001111, 0b001, kAsmImmediate)
-        // add/sub without carry flag
-        kAsmOpcodeDecl("add", 0b0101011, 0b100, kAsmImmediate)
-        kAsmOpcodeDecl("dec", 0b0101011, 0b101, kAsmImmediate)
-        // add/sub with carry flag
-        kAsmOpcodeDecl("addc", 0b0101011, 0b110, kAsmImmediate)
-        kAsmOpcodeDecl("decc", 0b0101011, 0b111, kAsmImmediate)
-        kAsmOpcodeDecl("int", 0b1110011, 0b00, kAsmSyscall)
-        kAsmOpcodeDecl("pha", 0b1110011, 0b00, kAsmNoArgs)
-        kAsmOpcodeDecl("pla", 0b1110011, 0b01, kAsmNoArgs)
+    kAsmOpcodeDecl("nop", 0b0000000, 0b0000000, kAsmNoArgs) // no-operation.
+    kAsmOpcodeDecl("np", 0b0000000, 0b0000000, kAsmNoArgs) // no-operation.
+    kAsmOpcodeDecl("jlr", 0b1110011, 0b0000111, kAsmJump) // jump to linked return register
+    kAsmOpcodeDecl("jrl", 0b1110011, 0b0001111, kAsmJump) // jump from return register.
+    kAsmOpcodeDecl("mv", 0b0100011, 0b101, kAsmRegToReg)
+    kAsmOpcodeDecl("bg", 0b1100111, 0b111, kAsmRegToReg)
+    kAsmOpcodeDecl("bl", 0b1100111, 0b011, kAsmRegToReg)
+    kAsmOpcodeDecl("beq", 0b1100111, 0b000, kAsmRegToReg)
+    kAsmOpcodeDecl("bne", 0b1100111, 0b001, kAsmRegToReg)
+    kAsmOpcodeDecl("bge", 0b1100111, 0b101, kAsmRegToReg)
+    kAsmOpcodeDecl("ble", 0b1100111, 0b100, kAsmRegToReg)
+    kAsmOpcodeDecl("stw", 0b0001111, 0b100, kAsmImmediate)
+    kAsmOpcodeDecl("ldw", 0b0001111, 0b100, kAsmImmediate)
+    kAsmOpcodeDecl("lda", 0b0001111, 0b101, kAsmImmediate)
+    kAsmOpcodeDecl("sta", 0b0001111, 0b001, kAsmImmediate)
+    // add/sub without carry flag
+    kAsmOpcodeDecl("add", 0b0101011, 0b100, kAsmImmediate)
+    kAsmOpcodeDecl("dec", 0b0101011, 0b101, kAsmImmediate)
+    // add/sub with carry flag
+    kAsmOpcodeDecl("addc", 0b0101011, 0b110, kAsmImmediate)
+    kAsmOpcodeDecl("decc", 0b0101011, 0b111, kAsmImmediate)
+    kAsmOpcodeDecl("int", 0b1110011, 0b00, kAsmSyscall)
+    kAsmOpcodeDecl("pha", 0b1110011, 0b00, kAsmNoArgs)
+    kAsmOpcodeDecl("pla", 0b1110011, 0b01, kAsmNoArgs)
 };
 
 // \brief 64x0 register prefix
diff --git a/Private/CompilerKit/AsmKit/Arch/amd64.hpp b/Private/CompilerKit/AsmKit/Arch/amd64.hpp
new file mode 100644
index 0000000..78007b1
--- /dev/null
+++ b/Private/CompilerKit/AsmKit/Arch/amd64.hpp
@@ -0,0 +1,69 @@
+/*
+ *	========================================================
+ *
+ *	MPCC
+ * 	Copyright 2024, Mahrouss Logic, all rights reserved.
+ *
+ * 	========================================================
+ */
+
+#pragma once
+
+#include <CompilerKit/Defines.hpp>
+
+// @brief 64x0 support.
+// @file Arch/64x0.hpp
+
+#define kAsmOpcodeDecl(__NAME, __OPCODE) \
+    { .fName = __NAME, .fOpcode = __OPCODE },
+
+
+
+
+typedef char e64k_character_t;
+typedef uint8_t e64_byte_t;
+typedef uint16_t e64_hword_t;
+typedef uint32_t e64k_word_t;
+
+struct CpuCodeAMD64
+{
+    std::string fName;
+    e64_byte_t fPrefixBytes[4];
+    e64_hword_t fOpcode;
+    e64_hword_t fModReg;
+    e64k_word_t fDisplacment;
+    e64k_word_t fImmediate;
+};
+
+/// these two are edge cases
+#define kAsmIntOpcode 0xCC
+#define kasmIntOpcodeAlt 0xCD
+
+#define kAsmJumpOpcode        0x0F80
+#define kJumpLimit            30
+#define kJumpLimitStandard    0xE3
+#define kJumpLimitStandardLimit 0xEB
+
+inline std::vector<CpuCodeAMD64> kOpcodesAMD64 = {
+    kAsmOpcodeDecl("int", kAsmIntOpcode)
+    kAsmOpcodeDecl("int", kasmIntOpcodeAlt)
+    kAsmOpcodeDecl("into", 0xCE)
+    kAsmOpcodeDecl("iret", 0xCF)
+};
+
+// \brief 64x0 register prefix
+// example: r32, r0
+// r32 -> sp
+// r0 -> hw zero
+
+#define kAsmFloatZeroRegister -1
+#define kAsmZeroRegister      -1
+
+#define kAsmRegisterPrefix "r"
+#define kAsmRegisterLimit  16
+#define kAsmPcRegister     8
+#define kAsmCrRegister     -1
+#define kAsmSpRegister     9
+
+/* return address register */
+#define kAsmRetRegister    0
diff --git a/Private/CompilerKit/AsmKit/AsmKit.hpp b/Private/CompilerKit/AsmKit/AsmKit.hpp
index a159c05..e85b5d6 100644
--- a/Private/CompilerKit/AsmKit/AsmKit.hpp
+++ b/Private/CompilerKit/AsmKit/AsmKit.hpp
@@ -75,6 +75,24 @@ namespace CompilerKit
 
 	};
 
+#ifdef __ASM_NEED_AMD64__
+
+	class PlatformAssemblerAMD64 final : public PlatformAssembler
+	{
+	public:
+		explicit PlatformAssemblerAMD64() = default;
+		~PlatformAssemblerAMD64() = default;
+
+		CXXKIT_COPY_DEFAULT(PlatformAssemblerAMD64);
+
+		virtual std::string CheckLine(std::string &line, const std::string &file) override;
+		virtual bool WriteLine(std::string &line, const std::string &file) override;
+		virtual bool WriteNumber(const std::size_t& pos, std::string& from_what) override;
+
+	};
+
+#endif // __ASM_NEED_AMD64__
+
 #ifdef __ASM_NEED_64x0__
 
 	class PlatformAssembler64x0 final : public PlatformAssembler