KAN-8: Compiler tweaks and AARCH64 in progress.

	- Refactor C compilers.
	- Add Encoder for ARM64.
	- Add and working on assembler for AARCH64.

Signed-off-by: Amlal El Mahrouss <amlal.elmahrouss@icloud.com>

3 files changed, 52 insertions, 35 deletions

diff --git a/dev/LibCompiler/AAL/CPU/amd64.h b/dev/LibCompiler/AAL/CPU/amd64.h
index 02f008e..fd75a04 100644
--- a/dev/LibCompiler/AAL/CPU/amd64.h
+++ b/dev/LibCompiler/AAL/CPU/amd64.h
@@ -41,18 +41,19 @@ struct CpuOpcodeAMD64
 
 inline std::vector<CpuOpcodeAMD64> kOpcodesAMD64 = {
 	kAsmOpcodeDecl("int", 0xCD)
-		kAsmOpcodeDecl("into", 0xCE)
-			kAsmOpcodeDecl("intd", 0xF1)
-				kAsmOpcodeDecl("int3", 0xC3)
-					kAsmOpcodeDecl("iret", 0xCF)
-						kAsmOpcodeDecl("retf", 0xCB)
-							kAsmOpcodeDecl("retn", 0xC3)
-								kAsmOpcodeDecl("ret", 0xC3)
-									kAsmOpcodeDecl("sti", 0xfb)
-										kAsmOpcodeDecl("cli", 0xfa)
-											kAsmOpcodeDecl("hlt", 0xf4)
-												kAsmOpcodeDecl("nop", 0x90)
-													kAsmOpcodeDecl("mov", 0x48)
-														kAsmOpcodeDecl("call", 0xFF)};
-
-#define kAsmRegisterLimit 15
+	kAsmOpcodeDecl("into", 0xCE)
+	kAsmOpcodeDecl("intd", 0xF1)
+	kAsmOpcodeDecl("int3", 0xC3)
+	kAsmOpcodeDecl("iret", 0xCF)
+	kAsmOpcodeDecl("retf", 0xCB)
+	kAsmOpcodeDecl("retn", 0xC3)
+	kAsmOpcodeDecl("ret", 0xC3)
+	kAsmOpcodeDecl("sti", 0xfb)
+	kAsmOpcodeDecl("cli", 0xfa)
+	kAsmOpcodeDecl("hlt", 0xf4)
+	kAsmOpcodeDecl("nop", 0x90)
+	kAsmOpcodeDecl("mov", 0x48)
+	kAsmOpcodeDecl("call", 0xFF)
+};
+
+#define kAsmRegisterLimit 16
diff --git a/dev/LibCompiler/AAL/CPU/arm64.h b/dev/LibCompiler/AAL/CPU/arm64.h
index 0c32073..7c06abb 100644
--- a/dev/LibCompiler/AAL/CPU/arm64.h
+++ b/dev/LibCompiler/AAL/CPU/arm64.h
@@ -6,6 +6,7 @@ Copyright (C) 2024 Theater Quality Corp, all rights reserved
 
 #pragma once
 
+#include <stdint.h>
 #include <LibCompiler/Defines.h>
 
 /// @brief ARM64 encoding support.
@@ -14,13 +15,28 @@ Copyright (C) 2024 Theater Quality Corp, all rights reserved
 struct CpuOpcodeArm64;
 
 /// @brief ARM64 opcode header.
-struct CpuOpcodeArm64 final
+struct PACKED CpuOpcodeArm64_Data final
 {
-	uint8_t	 fOpcode;		 // opcode
-	uint8_t	 fRegisterLeft;	 // left register index
-	uint8_t	 fRegisterRight; // right register index
-	bool	 fRegisterLeftHooked;
-	bool	 fRegisterRightHooked;
-	uint32_t fImmediateValue; // immediate 32-bit value
-	bool	 fImmediateValueHooked;
+	uint32_t fOpcode : 10; // Bits 31–22: Opcode for operation
+	uint32_t fRm : 5;	   // Bits 21–16: Source register Rm
+	uint32_t fShamt : 6;   // Bits 15–10: Shift amount
+	uint32_t fRn : 5;	   // Bits 9–5: Source register Rn
+	uint32_t fRd : 5;	   // Bits 4–0: Destination register Rd
 };
+
+typedef  struct {
+    uint32_t opcode  : 6;   // Bits 31–26: Branch opcode
+    int32_t  offset  : 26;  // Bits 25–0: Signed offset (branch target)
+} PACKED CpuOpcodeArm64_Branch;
+
+typedef struct {
+    uint32_t size    : 2;   // Bits 31–30: Size of the data
+    uint32_t opcode  : 7;   // Bits 29–23: Opcode for load/store
+    uint32_t offset  : 12;  // Bits 22–10: Offset
+    uint32_t rn      : 5;   // Bits 9–5: Base address register Rn
+    uint32_t rt      : 5;   // Bits 4–0: Target/source register Rt
+} PACKED CpuOpcodeArm64_LoadStore;
+
+#define kAsmRegisterLimit  (30)
+#define kAsmRegisterPrefix "x"
+#define kOpcodeARM64Count  (1000)
diff --git a/dev/LibCompiler/AAL/CPU/power64.h b/dev/LibCompiler/AAL/CPU/power64.h
index 9112fed..36feef2 100644
--- a/dev/LibCompiler/AAL/CPU/power64.h
+++ b/dev/LibCompiler/AAL/CPU/power64.h
@@ -10,11 +10,13 @@
 
 #pragma once
 
-#include <cstdint>
+#include <stdint.h>
 
 /// @note Based of:
 /// https://opensource.apple.com/source/cctools/cctools-750/as/ppc-opcode.h.auto.html
 
+#define kOpcodePPCCount (1073U)
+
 /*
  * These defines are use in the cpus field of the instructions.  If the field
  * is zero it can execute on all cpus.  The defines are or'ed together.  This
@@ -27,7 +29,7 @@
 #define CPU970		0x10 /* added to OPTIONAL insts that the 970 has */
 #define CPUMAHROUSS 0x12 /* optional mahrouss insts. */
 
-enum optype
+enum OpcodeType
 {
 	NONE,	 /* no operand */
 	JBSR,	 /* jbsr pseudo op */
@@ -57,23 +59,21 @@ enum optype
 	ZERO	 /* the number zero */
 };
 
-struct op
-{
-	uint32_t	offset : 5;
-	uint32_t	width : 5;
-	enum optype type : 6;
-};
-
 struct CpuOpcodePPC
 {
+	struct OpcodeType final
+	{
+		uint32_t offset : 5;
+		uint32_t width : 5;
+		uint32_t type : 6;
+	};
+
 	uint32_t	opcode;
 	const char* name; // c++ wants the string to be const, it makes sense here.
-	struct op	ops[5];
+	OpcodeType	ops[5];
 	uint32_t	cpus;
 };
 
-#define kOpcodePPCCount (1073U)
-
 inline CpuOpcodePPC kOpcodesPowerPC[] = {
 	{0x38000000, "addi", {{21, 5, GREG}, {16, 5, G0REG}, {0, 16, SI}}},
 	{0x38000000, "li", {{21, 5, GREG}, {0, 16, SI}}},