coreboot: rename from NeKernel firmware, refactor symbols to `cb_`, update docs

This patch completes a major renaming and cleanup of the firmware codebase:

- Rename project from "NeKernel Firmware" to "CoreBoot" in README and comments.
- Replace all `mp_`-prefixed symbols with `cb_` to reflect the new naming scheme.
- Remove obsolete SPECIFICATION.TXT and replace with SPECIFICATION_FIRMWARE.md.
- Update memory-mapped I/O helpers, TLB init, and platform-specific code to match `cb_*` naming.
- Refactor low-level UART, panic, PCI-tree, partition map, and context setup to use unified `cb_` API.
- Adjust linker scripts and boot vectors for ARM64, PPC64, and RV64 targets accordingly.
- Add Doxygen documentation note to README.

This change is part of an ongoing effort to rebrand and unify the firmware interface, improve naming clarity, and better align with platform-specific toolchains.

Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>

2 files changed, 39 insertions, 31 deletions

diff --git a/docs/SPECIFICATION.TXT b/docs/SPECIFICATION.TXT
deleted file mode 100644
index e747e5c..0000000
--- a/docs/SPECIFICATION.TXT
+++ /dev/null
@@ -1,31 +0,0 @@
-=================================
-
-        Multi Platform IPL
-
-=================================
-
-What we want:
-
-- Optimized for each target.
-- Common Hardware Support compilant.
-- AMD64, PowerPC, RISC-V, 64x0, 32x0 support.
-- SMP support.
-
-How we're going to do that:
-
-- Abstract Memory and I/O. (pci-tree)
-- Platform Independent Device Tree. (pci-tree)
-- Common Starting point for each core (smp)
-
-Executable Layout:
-
-- 0x80000000/0x00FF/0x1000: Firmware Startup Code
-- 0x90000000/0x7c00: Executable Information Header or equivalent.
-
-Error Codes:
-
-- LX0001: Not bootable
-- LX0002: Bad arch
-- LX0003: Bad revision
-
-
diff --git a/docs/SPECIFICATION_FIRMWARE.md b/docs/SPECIFICATION_FIRMWARE.md
new file mode 100644
index 0000000..b0b40b4
--- /dev/null
+++ b/docs/SPECIFICATION_FIRMWARE.md
@@ -0,0 +1,39 @@
+==================================================================
+
+                     Multi Platform Firmware
+
+==================================================================
+
+==================================================================
+0. What we want:
+==================================================================
+
+- Optimized for each target.
+- EPM/GPT compilant.
+- AMD64, PowerPC, RISC-V, 64x0, 32x0 support.
+- SMP support.
+
+==================================================================
+1. How we're going to do that:
+==================================================================
+
+- Abstract Memory and I/O. (pci-tree)
+- Platform Independent Device Tree. (pci-tree)
+- Common Starting point for each core (smp)
+
+==================================================================
+2. Executable Layout:
+==================================================================
+
+- 0x80000000/0x00FF/0x1000: Firmware Startup Code
+- 0x90000000/0x7c00: Executable Information Header or equivalent.
+
+==================================================================
+3. Error Codes:
+==================================================================
+
+- CB0001: Not bootable to Stage2 (or bootloader).
+- CB0003: Bad arch.
+- CB0002: Context returned early.
+
+