diff options
38 files changed, 334 insertions, 326 deletions
@@ -1,4 +1,6 @@ -# NeKernel Firmware +# CoreBoot + +Build the documentation using Doxygen's `doxygen` CLI tool. ## Requirements: @@ -13,8 +15,4 @@ git clone git@github.com:amlel-el-mahrouss/fw.git ``` -## Building: - - - ###### Copyright 2024-2025, Amlal EL Mahrouss. all rights reserved. diff --git a/docs/SPECIFICATION.TXT b/docs/SPECIFICATION.TXT deleted file mode 100644 index e747e5c..0000000 --- a/docs/SPECIFICATION.TXT +++ /dev/null @@ -1,31 +0,0 @@ -================================= - - Multi Platform IPL - -================================= - -What we want: - -- Optimized for each target. -- Common Hardware Support compilant. -- AMD64, PowerPC, RISC-V, 64x0, 32x0 support. -- SMP support. - -How we're going to do that: - -- Abstract Memory and I/O. (pci-tree) -- Platform Independent Device Tree. (pci-tree) -- Common Starting point for each core (smp) - -Executable Layout: - -- 0x80000000/0x00FF/0x1000: Firmware Startup Code -- 0x90000000/0x7c00: Executable Information Header or equivalent. - -Error Codes: - -- LX0001: Not bootable -- LX0002: Bad arch -- LX0003: Bad revision - - diff --git a/docs/SPECIFICATION_FIRMWARE.md b/docs/SPECIFICATION_FIRMWARE.md new file mode 100644 index 0000000..b0b40b4 --- /dev/null +++ b/docs/SPECIFICATION_FIRMWARE.md @@ -0,0 +1,39 @@ +================================================================== + + Multi Platform Firmware + +================================================================== + +================================================================== +0. What we want: +================================================================== + +- Optimized for each target. +- EPM/GPT compilant. +- AMD64, PowerPC, RISC-V, 64x0, 32x0 support. +- SMP support. + +================================================================== +1. How we're going to do that: +================================================================== + +- Abstract Memory and I/O. (pci-tree) +- Platform Independent Device Tree. (pci-tree) +- Common Starting point for each core (smp) + +================================================================== +2. Executable Layout: +================================================================== + +- 0x80000000/0x00FF/0x1000: Firmware Startup Code +- 0x90000000/0x7c00: Executable Information Header or equivalent. + +================================================================== +3. Error Codes: +================================================================== + +- CB0001: Not bootable to Stage2 (or bootloader). +- CB0003: Bad arch. +- CB0002: Context returned early. + + diff --git a/lib/30pin.h b/lib/30pin.h index 6782cfb..f96d91d 100644 --- a/lib/30pin.h +++ b/lib/30pin.h @@ -10,8 +10,8 @@ struct TRB_PACKET { - char mag[2]; - char kind; - char buffer[498]; - char eop[11]; + char mag[2]; + char kind; + char buffer[498]; + char eop[11]; };
\ No newline at end of file @@ -78,7 +78,7 @@ typedef ptrtype_t size_t; #define SYS_UART_BASE 0x10000000 #define SYS_FLASH_BASE_ADDR 0x08000000 -#define mp_sync_synchronize() __sync_synchronize() +#define cb_sync_synchronize() __sync_synchronize() #elif defined(__COMPILE_POWERPC__) #define SYS_UART_BASE 0x10000000 #define SYS_BOOT_ADDR 0x1030000 @@ -86,7 +86,7 @@ typedef ptrtype_t size_t; #define SYS_FRAMEBUFFER_ADDR 0x40000000L #define SYS_FLASH_BASE_ADDR 0x08000000 -#define mp_sync_synchronize() __sync_synchronize() +#define cb_sync_synchronize() __sync_synchronize() #elif defined(__COMPILE_ARM64__) #define SYS_UART_BASE 0x09000000 @@ -97,9 +97,10 @@ typedef ptrtype_t size_t; static inline void __sync_synchronize(void) { + cb_put_string("CB: warning: __sync_synchronize is not implemented!\r\n"); } -#define mp_sync_synchronize() __sync_synchronize() +#define cb_sync_synchronize() __sync_synchronize() #endif // ifndef __COMPILE_POWERPC__ #define SYS_BAUDRATE_TABLE \ @@ -115,16 +116,16 @@ static inline void __sync_synchronize(void) #define SYS_BOOT_VER 0x101 #define SYS_BOOT_CALL(struct, offset) \ - mp_proc_t proc_##offset = (mp_proc_t)(struct->offset); \ + cb_proc_t proc_##offset = (cb_proc_t)(struct->offset); \ proc_##offset(); -/// @brief float type. +/// @brief floating point representation (IEE 7554) in a C structure typedef union { struct { - char sign; - int mantissa; - short exponent; + char sign; + int32_t mantissa; + int16_t exponent; }; float f; @@ -135,36 +136,36 @@ typedef uint32_t utf_char_t; /// @brief panic the entire system. /// @param reason why text. -void mp_panic(const char* reason); +void cb_panic(const char* reason); /// @brief update the power status of the machine. -void mp_update_power_status(boolean restart); +void cb_update_power_status(boolean restart); /// @brief puts a string in serial /// @param text /// @return -size_t mp_put_string(const char* text); +size_t cb_put_string(const char* text); /// @brief gets a char from serial /// @param /// @return -utf_char_t mp_get_char(void); +utf_char_t cb_get_char(void); /// @brief puts a char in serial /// @param ch -void mp_put_char(utf_char_t ch); +void cb_put_char(utf_char_t ch); /// @brief Hangs the firmware. /// @param void no args. -void mp_restart_machine(void); +void cb_restart_machine(void); /// @brief Flushs the TLB. /// @param void no args. -void mp_flush_tlb(void); +void cb_flush_tlb(void); /// @brief Print current kernel name. /// @param -void mp_print_name(void); +void cb_print_name(void); /// @brief String length getter /// @param str the string. @@ -177,14 +178,14 @@ size_t strlen(caddr_t str); /// @return size_t strcmp(caddr_t src, caddr_t cmp); -typedef void (*mp_proc_t)(); +typedef void (*cb_proc_t)(); /// \brief ASCII character. typedef char ascii_char_t; /// @brief Linear Executable Header /// @author Amlal EL Mahrouss (Amlal EL Mahrouss) -struct __attribute__((aligned(4))) mp_boot_header +struct __attribute__((aligned(4))) cb_boot_header { const ascii_char_t h_mag[2]; // magic number const ascii_char_t h_name[10]; // operating system name @@ -8,25 +8,25 @@ #include <lib/boot.h> -struct _mp_file_descriptor; +struct _cb_file_descriptor; /// @brief CoreBoot file/device descriptor. /// @version 1 -typedef struct _mp_file_descriptor +typedef struct _cb_file_descriptor { int32_t f_kind; int32_t f_filesystem; - size_t (*f_write)(void* ptr, size_t size, size_t nitems, struct _mp_file_descriptor* self); - size_t (*f_read)(void* ptr, size_t size, size_t nitems, struct _mp_file_descriptor* self); - int (*f_seek)(struct _mp_file_descriptor* self, size_t off, int whence); - int (*f_tell)(struct _mp_file_descriptor* self); - int (*f_rewind)(struct _mp_file_descriptor* self); - int (*f_eof)(struct _mp_file_descriptor* self); - int (*f_close)(struct _mp_file_descriptor* self); -} mp_file_descriptor_t; + size_t (*f_write)(void* ptr, size_t size, size_t nitems, struct _cb_file_descriptor* self); + size_t (*f_read)(void* ptr, size_t size, size_t nitems, struct _cb_file_descriptor* self); + int (*f_seek)(struct _cb_file_descriptor* self, size_t off, int whence); + int (*f_tell)(struct _cb_file_descriptor* self); + int (*f_rewind)(struct _cb_file_descriptor* self); + int (*f_eof)(struct _cb_file_descriptor* self); + int (*f_close)(struct _cb_file_descriptor* self); +} cb_file_descriptor_t; /// @brief Grabs a new device reference. /// @param path the device path. /// @return -mp_file_descriptor_t* mp_grab_fd(const char* path); +cb_file_descriptor_t* cb_grab_fd(const char* path); diff --git a/lib/mp-bit.h b/lib/mp-bit.h index 7195fc0..8d89a7c 100644 --- a/lib/mp-bit.h +++ b/lib/mp-bit.h @@ -10,10 +10,10 @@ /// Name: CoreBoot Bits API. /// Purpose: Bit manip helpers. -#define mp_set_bit(X, O) X = (1 << O) | X -#define mp_clear_bit(X, O) X = ~(1 << O) & X -#define mp_toogle(X, O) X = (1 << O) ^ X -#define mp_lsb(X) X = X & -X -#define mp_msb(X) X = -(mp_lsb(X)) & X +#define cb_set_bit(X, O) X = (1 << O) | X +#define cb_clear_bit(X, O) X = ~(1 << O) & X +#define cb_toogle(X, O) X = (1 << O) ^ X +#define cb_lsb(X) X = X & -X +#define cb_msb(X) X = -(cb_lsb(X)) & X #endif // ifndef __BITMANIP_H__ diff --git a/lib/netboot.h b/lib/netboot.h index 6976359..20530fb 100644 --- a/lib/netboot.h +++ b/lib/netboot.h @@ -22,9 +22,9 @@ typedef struct NETBOOT_INET_HEADER char m_nb4; /// magic char 4 'B' char m_patch_name[255]; /// example: ColdChoco - int32_t m_length; /// the patch length. - char m_target[255]; /// the target file. - uint8_t m_implies_rom; /// does it imply an EEPROM reprogram? - uint8_t m_preflight; /// Do we just check if this endpoint exists/is valid? + int32_t m_length; /// The patch's length. + char m_target[255]; /// The target file. + uint8_t m_implies_rom; /// does it imply an EEPROM program? + uint8_t m_preflight; /// Do we just check if this endpoint exists/is valid? uint8_t m_blob[]; } NETBOOT_INET_HEADER; diff --git a/lib/partition-map.h b/lib/partition-map.h index 74f1031..a02f88b 100644 --- a/lib/partition-map.h +++ b/lib/partition-map.h @@ -93,11 +93,11 @@ enum }; /// @brief check for supported filesystem. -boolean mp_filesystem_exists(caddr_t fs, size_t len); +boolean cb_filesystem_exists(caddr_t fs, size_t len); /// @brief Parse EPM block from blob. -bool mp_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz); +bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz); -part_block_t* mp_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index); +part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index); #endif // ifndef __PARTITION_MAP_H__ diff --git a/lib/pci-tree.h b/lib/pci-tree.h index 4ca8d57..1a31278 100644 --- a/lib/pci-tree.h +++ b/lib/pci-tree.h @@ -29,42 +29,42 @@ #define SYS_PCI_VERSION (0x0100) #define SYS_PCI_DEV_MAGIC (0xfeedd00d) -#define SYS_PCI_INT_SZ sizeof(mp_pci_num_t) +#define SYS_PCI_INT_SZ sizeof(cb_pci_num_t) #define SYS_PCI_NAME_LEN (255U) -typedef char mp_pci_char_t; -typedef uintptr_t mp_pci_num_t; +typedef char cb_pci_char_t; +typedef uintptr_t cb_pci_num_t; -typedef uint8_t mp_pci_fn_t; -typedef uint8_t mp_pci_bus_t; -typedef uint8_t mp_pci_device_t; +typedef uint8_t cb_pci_fn_t; +typedef uint8_t cb_pci_bus_t; +typedef uint8_t cb_pci_device_t; /// @brief hardware tree header /// used by guest to resolve hardware peripherals. -struct hw_mp_pci_tree +struct hw_cb_pci_tree { - mp_pci_num_t d_magic; - mp_pci_num_t d_version; - mp_pci_num_t d_off_props; - mp_pci_num_t d_off_struct; - mp_pci_num_t d_sz_props; - mp_pci_num_t d_sz_struct; + cb_pci_num_t d_magic; + cb_pci_num_t d_version; + cb_pci_num_t d_off_props; + cb_pci_num_t d_off_struct; + cb_pci_num_t d_sz_props; + cb_pci_num_t d_sz_struct; - mp_pci_num_t d_first_node; - mp_pci_num_t d_next_sibling; + cb_pci_num_t d_first_node; + cb_pci_num_t d_next_sibling; - mp_pci_char_t d_name[SYS_PCI_NAME_LEN]; + cb_pci_char_t d_name[SYS_PCI_NAME_LEN]; }; /// @brief Init PCI tree. /// @param void /// @return if it's successful or not. -boolean mp_pci_init_tree(void); +boolean cb_pci_init_tree(void); /// @brief Adds a new tree into the internal data structure. /// @param name device name /// @param struct_ptr device structure /// @param struct_sz the structure size of the device. /// @return if it was successful or not. -boolean mp_pci_append_tree(const caddr_t name, mp_pci_num_t struct_ptr, mp_pci_num_t struct_sz); +boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz); diff --git a/libfdt/libfdt.h b/libfdt/libfdt.h index 5ed9144..3a42602 100644 --- a/libfdt/libfdt.h +++ b/libfdt/libfdt.h @@ -47,7 +47,7 @@ struct fdt_header fdt32_t off_dt_strings; /* offset to strings */ fdt32_t off_mem_rsvmap; /* offset to memory reserve map */ fdt32_t version; /* format version */ - fdt32_t last_comp_version; /* last compatible version */ + fdt32_t last_cocb_version; /* last compatible version */ /* version 2 fields below */ fdt32_t boot_cpuid_phys; /* Which physical CPU id we're @@ -163,7 +163,7 @@ int fdt_next_subnode(const void* fdt, int offset); #define fdt_off_dt_strings(fdt) (fdt_get_header(fdt, off_dt_strings)) #define fdt_off_mem_rsvmap(fdt) (fdt_get_header(fdt, off_mem_rsvmap)) #define fdt_version(fdt) (fdt_get_header(fdt, version)) -#define fdt_last_comp_version(fdt) (fdt_get_header(fdt, last_comp_version)) +#define fdt_last_cocb_version(fdt) (fdt_get_header(fdt, last_cocb_version)) #define fdt_boot_cpuid_phys(fdt) (fdt_get_header(fdt, boot_cpuid_phys)) #define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings)) #define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct)) @@ -181,7 +181,7 @@ fdt_set_hdr_(off_dt_struct); fdt_set_hdr_(off_dt_strings); fdt_set_hdr_(off_mem_rsvmap); fdt_set_hdr_(version); -fdt_set_hdr_(last_comp_version); +fdt_set_hdr_(last_cocb_version); fdt_set_hdr_(boot_cpuid_phys); fdt_set_hdr_(size_dt_strings); fdt_set_hdr_(size_dt_struct); diff --git a/libfdt/libfdt_strerror.c b/libfdt/libfdt_strerror.c index 4002afc..0225f5e 100644 --- a/libfdt/libfdt_strerror.c +++ b/libfdt/libfdt_strerror.c @@ -22,7 +22,7 @@ struct fdt_err .e_str = #VAL, \ } -static struct fdt_err mp_fdtErrTbl[] = { +static struct fdt_err cb_fdtErrTbl[] = { fdt_error(FDT_ERR_NOTFOUND), fdt_error(FDT_ERR_EXISTS), fdt_error(FDT_ERR_NOSPACE), @@ -46,7 +46,7 @@ static struct fdt_err mp_fdtErrTbl[] = { fdt_error(FDT_ERR_ALIGNMENT), }; -#define fdt_error_length() mpux_array_size(mp_fdtErrTbl) +#define fdt_error_length() mpux_array_size(cb_fdtErrTbl) /// @brief Returns the error value as a string. /// @param errval @@ -63,7 +63,7 @@ const char* fdt_strerror(int32_t errval) } else if (-errval < fdt_error_length()) { - const char* serr = mp_fdtErrTbl[errval].e_str; + const char* serr = cb_fdtErrTbl[errval].e_str; if (serr != null) { diff --git a/src/arm64/arm64-30pin.c b/src/arm64/arm64-30pin.c index 7f660d9..83692f9 100644 --- a/src/arm64/arm64-30pin.c +++ b/src/arm64/arm64-30pin.c @@ -7,4 +7,4 @@ #include <lib/partition-map.h> #include <lib/30pin.h> -extern size_t mp_send_read_30pin(voidptr_t blob, size_t* size, size_t* start_lba); +extern size_t cb_send_read_30pin(voidptr_t blob, size_t* size, size_t* start_lba); diff --git a/src/arm64/arm64-boot.S b/src/arm64/arm64-boot.S index c62a227..bcbec0e 100644 --- a/src/arm64/arm64-boot.S +++ b/src/arm64/arm64-boot.S @@ -7,9 +7,9 @@ .text .balign 4 -.global mp_reset_vector +.global cb_reset_vector -mp_reset_vector: - ldr sp, =__mp_stack_end +cb_reset_vector: + ldr sp, =__cb_stack_end /* don't care about page_zero, it's gonna be a raw binary */ - b mp_start_exec + b cb_start_exec diff --git a/src/arm64/arm64-err.c b/src/arm64/arm64-err.c index 5877cca..5417bc1 100644 --- a/src/arm64/arm64-err.c +++ b/src/arm64/arm64-err.c @@ -10,11 +10,11 @@ /// @brief Goes into a panic state. /// @param reason why? -void mp_panic(const char* reason) +void cb_panic(const char* reason) { - mp_put_string("Error: "); - mp_put_string(reason); - mp_put_char('\n'); + cb_put_string("Error: "); + cb_put_string(reason); + cb_put_char('\n'); while (yes) { diff --git a/src/arm64/arm64-start-context.S b/src/arm64/arm64-start-context.S index 389f958..5db92d0 100644 --- a/src/arm64/arm64-start-context.S +++ b/src/arm64/arm64-start-context.S @@ -6,12 +6,12 @@ .text .balign 4 -.global mp_start_context -.global mp_boot_processor_ready +.global cb_start_context +.global cb_boot_processor_ready -mp_start_context: - bl mp_start_context +cb_start_context: + bl cb_start_context ldr pc, [lr] -mp_boot_processor_ready: +cb_boot_processor_ready: ldr pc, [lr] diff --git a/src/arm64/arm64-uart.c b/src/arm64/arm64-uart.c index fff3bbf..ce5edcf 100644 --- a/src/arm64/arm64-uart.c +++ b/src/arm64/arm64-uart.c @@ -9,36 +9,38 @@ /// BUGS: 0 -#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*)(mp_uart_ptr + addr)) +#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*)(cb_uart_ptr + addr)) /* this file handles the UART */ -static uint32_t* mp_uart_ptr = (uint32_t*)SYS_UART_BASE; +static uint32_t* cb_uart_ptr = (uint32_t*)SYS_UART_BASE; // we need that one, to avoid sending mutliple chars to UART. -static boolean mp_locked_put_char = no; +static boolean cb_locked_put_char = no; -utf_char_t mp_get_char(void) +/// @brief Retrieve character from cb_uart_ptr +utf_char_t cb_get_char(void) { + // check if ready. while ((ARM64_MMIO_REG(0x018) & (1 << 4))) { } - return (utf_char_t)*mp_uart_ptr; + return (utf_char_t)ARM64_MMIO_REG(0x0); } -void mp_put_char(utf_char_t ch) +void cb_put_char(utf_char_t ch) { while ((ARM64_MMIO_REG(0x018) & (1 << 5))) { } - *mp_uart_ptr = ch; + ARM64_MMIO_REG(0x0) = ch; } /// @brief UART put string /// @param text the input text. -size_t mp_put_string(const char* text) +size_t cb_put_string(const char* text) { if (text == nil) return 0; @@ -47,7 +49,7 @@ size_t mp_put_string(const char* text) for (; i < strlen(text); i++) { - mp_put_char(text[i]); + cb_put_char(text[i]); } return i; diff --git a/src/arm64/script.lds b/src/arm64/script.lds index 37bd647..b8a0d11 100644 --- a/src/arm64/script.lds +++ b/src/arm64/script.lds @@ -1,4 +1,4 @@ -ENTRY(mp_reset_vector) +ENTRY(cb_reset_vector) SECTIONS { . = 0x40100000; @@ -8,7 +8,7 @@ SECTIONS .bss : { *(.bss COMMON) } . = ALIGN(8); . = . + 0x1000; /* 4kB of stack memory */ - __mp_stack_end = .; + __cb_stack_end = .; - PROVIDE(mp_memory_end = .); + PROVIDE(cb_memory_end = .); } diff --git a/src/coreboot-ahci-driver.c b/src/coreboot-ahci-driver.c index aae3169..31d656d 100644 --- a/src/coreboot-ahci-driver.c +++ b/src/coreboot-ahci-driver.c @@ -6,25 +6,25 @@ /** * @file coreboot-ahci-driver.cc - * @author Amlal EL Mahrouss (amlal@el-mahrouss-logic.com) - * @brief PowerPC Disk support, via AHCI. + * @author Amlal EL Mahrouss (amlal@nekernel.org) + * @brief SATA Disk support, via AHCI. * @version 0.2 * @date 2024-01-16 * - * @copyright Copyright (c) 2024, Amlal EL Mahrouss. + * @copyright Copyright (c) 2024-2025, Amlal EL Mahrouss. * */ #include <lib/pci-tree.h> #include <lib/boot.h> -#define SYS_AHCI_DRIVER_NAME ("@ahci") +#define SYS_AHCI_DRIVER_NAME ("@sata") /// BUGS: 0 /// @brief AHCI support for PowerPC. /// @brief AHCI HBA port. -typedef struct hba_port +typedef struct cb_hba_port { uint32_t clb; // 0x00, command list base address, 1K-byte aligned uint32_t clbu; // 0x04, command list base address upper 32 bits @@ -45,12 +45,12 @@ typedef struct hba_port uint32_t fbs; // 0x40, FIS-based switch control uint32_t reserved1[11]; // 0x44 ~ 0x6F, Reserved uint32_t vendor[4]; // 0x70 ~ 0x7F, vendor specific -} hba_port_t; +} cb_hba_port_t; /// @brief Check if port is active. /// @param port host bus address port. /// @return -static boolean hba_port_active(volatile hba_port_t* port) +static boolean cb_hba_port_active(volatile cb_hba_port_t* port) { if (!port) return false; @@ -61,7 +61,7 @@ static boolean hba_port_active(volatile hba_port_t* port) /// @brief Start HBA command. /// @param port host bus address port. /// @return -static boolean hba_start_cmd(volatile hba_port_t* port) +static boolean cb_hba_start_cmd(volatile cb_hba_port_t* port) { if (!port) return false; @@ -85,7 +85,7 @@ static boolean hba_start_cmd(volatile hba_port_t* port) /// @brief Stop HBA command. /// @param port host bus address port. /// @return -static boolean hba_stop_cmd(volatile hba_port_t* port) +static boolean cb_hba_stop_cmd(volatile cb_hba_port_t* port) { if (!port) return false; diff --git a/src/coreboot-cpu-api.c b/src/coreboot-cpu-api.c index 2f104c4..da6dba9 100644 --- a/src/coreboot-cpu-api.c +++ b/src/coreboot-cpu-api.c @@ -8,7 +8,7 @@ /// @brief Restarts the computer. /// @param none. -void mp_restart_machine(void) +void cb_restart_machine(void) { #ifdef __COMPILE_RISCV__ volatile uint32_t* brd_pwr = (volatile uint32_t*)0x100000; diff --git a/src/coreboot-cxx-abi.cc b/src/coreboot-cxx-abi.cc index a035e78..502d648 100644 --- a/src/coreboot-cxx-abi.cc +++ b/src/coreboot-cxx-abi.cc @@ -8,26 +8,26 @@ /// BUGS: 0 -extern "C" __SIZE_TYPE__ mp_put_string(const char* text); -extern "C" void mp_panic(const char* reason); +extern "C" __SIZE_TYPE__ cb_put_string(const char* text); +extern "C" void cb_panic(const char* reason); extern "C" void __stack_chk_fail() { - mp_put_string("[stack-canary] Buffer overflow detected, halting...\n"); - mp_panic("stack_canary_fail"); + cb_put_string("[stack-canary] Buffer overflow detected, halting...\n"); + cb_panic("stack_canary_fail"); } void* __dso_handle; -extern "C" __SIZE_TYPE__ mp_put_string(const char* text); -extern "C" void mp_panic(const char* reason); +extern "C" __SIZE_TYPE__ cb_put_string(const char* text); +extern "C" void cb_panic(const char* reason); atexit_func_entry_t __atexit_funcs[DSO_MAX_OBJECTS]; uarch_t __atexit_func_count; extern "C" void __cxa_pure_virtual() { - mp_put_string("[__cxa_pure_virtual] Placeholder\n"); + cb_put_string("[__cxa_pure_virtual] Placeholder\n"); } extern "C" int __cxa_atexit(void (*f)(void*), void* arg, void* dso) diff --git a/src/coreboot-netboot.c b/src/coreboot-netboot.c index e09c281..a193964 100644 --- a/src/coreboot-netboot.c +++ b/src/coreboot-netboot.c @@ -5,4 +5,3 @@ ------------------------------------------- */ #include <lib/netboot.h> - diff --git a/src/coreboot-partition-map-parse.c b/src/coreboot-partition-map-parse.c index b4647ae..55e6a28 100644 --- a/src/coreboot-partition-map-parse.c +++ b/src/coreboot-partition-map-parse.c @@ -6,7 +6,7 @@ #include <lib/partition-map.h> -bool mp_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz) +bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz) { if (!start_lba || !end_lba || @@ -35,7 +35,7 @@ bool mp_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t ind return true; } -part_block_t* mp_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index) +part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index) { if (!blob || !blob_sz || diff --git a/src/coreboot-partition-map.c b/src/coreboot-partition-map.c index 3012b42..de7d36d 100644 --- a/src/coreboot-partition-map.c +++ b/src/coreboot-partition-map.c @@ -9,15 +9,15 @@ // include this for documentation. -#define MP_FILESYSTEM_COUNT 3 -#define MP_FILESYSTEM_LIST \ - { \ - "NeFS", "HeFS", "HFS+" \ +#define MP_FILESYSTEM_COUNT 4 +#define MP_FILESYSTEM_LIST \ + { \ + "NeFS", "HeFS", "FAT32", "ext4" \ } /// @brief check if filesystem is supported by CoreBoot. /// @param fs the filesystem magic, as provided by EPM. -boolean mp_filesystem_exists(caddr_t fs, size_t len) +boolean cb_filesystem_exists(caddr_t fs, size_t len) { if (fs == nil || *fs == 0) diff --git a/src/coreboot-pci-tree.c b/src/coreboot-pci-tree.c index 4e3469c..aadde8e 100644 --- a/src/coreboot-pci-tree.c +++ b/src/coreboot-pci-tree.c @@ -6,7 +6,7 @@ /** * @file coreboot-pci-tree.c - * @author Amlal EL Mahrouss (amlal@el-mahrouss-logic.com) + * @author Amlal EL Mahrouss (amlal@nekernel.org) * @brief PCI tree implementation. * @version 0.1 * @date 2024-01-22 @@ -21,41 +21,41 @@ /// BUGS: 0 /// Standard Root table (Mahrouss Table) -#define SYS_PCI_ROOT_NAME "/swirl/@/" +#define SYS_PCI_ROOT_NAME "/pci-tree/@/" -static struct hw_mp_pci_tree* mp_base_tree = nil; -static struct hw_mp_pci_tree* mp_latest_tree = nil; -static struct hw_mp_pci_tree* mp_last_tree = nil; +static struct hw_cb_pci_tree* cb_base_tree = nil; +static struct hw_cb_pci_tree* cb_latest_tree = nil; +static struct hw_cb_pci_tree* cb_last_tree = nil; /// \brief Init the PCI device tree structure. /// \return if it already exists -> false /// Otherwise true. -boolean mp_pci_init_tree(void) +boolean cb_pci_init_tree(void) { - mp_base_tree = (struct hw_mp_pci_tree*)(SYS_PCI_TREE_BASE); + cb_base_tree = (struct hw_cb_pci_tree*)(SYS_PCI_TREE_BASE); // huh? anyway let's ignore it then. - if (mp_base_tree->d_magic != SYS_PCI_DEV_MAGIC) + if (cb_base_tree->d_magic != SYS_PCI_DEV_MAGIC) { - mp_base_tree->d_magic = SYS_PCI_DEV_MAGIC; + cb_base_tree->d_magic = SYS_PCI_DEV_MAGIC; - memncpy(mp_base_tree->d_name, SYS_PCI_ROOT_NAME, strlen(SYS_PCI_ROOT_NAME)); + memncpy(cb_base_tree->d_name, SYS_PCI_ROOT_NAME, strlen(SYS_PCI_ROOT_NAME)); - mp_base_tree->d_next_sibling = 0; - mp_base_tree->d_off_props = 0; - mp_base_tree->d_sz_struct = 0; - mp_base_tree->d_sz_props = 0; - mp_base_tree->d_off_struct = 0; - mp_base_tree->d_version = SYS_PCI_VERSION; + cb_base_tree->d_next_sibling = 0; + cb_base_tree->d_off_props = 0; + cb_base_tree->d_sz_struct = 0; + cb_base_tree->d_sz_props = 0; + cb_base_tree->d_off_struct = 0; + cb_base_tree->d_version = SYS_PCI_VERSION; - mp_base_tree->d_next_sibling = - (mp_pci_num_t)(mp_base_tree + sizeof(struct hw_mp_pci_tree)); - mp_base_tree->d_first_node = (mp_pci_num_t)mp_base_tree; + cb_base_tree->d_next_sibling = + (cb_pci_num_t)(cb_base_tree + sizeof(struct hw_cb_pci_tree)); + cb_base_tree->d_first_node = (cb_pci_num_t)cb_base_tree; - mp_put_string(">> Append root device: " SYS_PCI_ROOT_NAME "\r\n"); + cb_put_string(">> Append root device: " SYS_PCI_ROOT_NAME "\r\n"); } - mp_latest_tree = mp_base_tree; + cb_latest_tree = cb_base_tree; return yes; } @@ -64,43 +64,43 @@ boolean mp_pci_init_tree(void) /// \param name the device name. /// \param struct_ptr the struct containing the device. /// \param struct_sz the structure size. -boolean mp_pci_append_tree(const caddr_t name, mp_pci_num_t struct_ptr, mp_pci_num_t struct_sz) +boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz) { - if (!name || *name == 0 || mp_latest_tree == nil) + if (!name || *name == 0 || cb_latest_tree == nil) return no; - struct hw_mp_pci_tree* mp_pci_tree = (struct hw_mp_pci_tree*)(mp_latest_tree); + struct hw_cb_pci_tree* cb_pci_tree = (struct hw_cb_pci_tree*)(cb_latest_tree); - while (mp_pci_tree->d_magic == SYS_PCI_DEV_MAGIC) + while (cb_pci_tree->d_magic == SYS_PCI_DEV_MAGIC) { - if (strcmp(mp_pci_tree->d_name, name) == 0) + if (strcmp(cb_pci_tree->d_name, name) == 0) return no; - mp_pci_tree = - (struct hw_mp_pci_tree*)(mp_pci_tree + - sizeof(struct hw_mp_pci_tree)); + cb_pci_tree = + (struct hw_cb_pci_tree*)(cb_pci_tree + + sizeof(struct hw_cb_pci_tree)); } - mp_pci_tree->d_magic = SYS_PCI_DEV_MAGIC; + cb_pci_tree->d_magic = SYS_PCI_DEV_MAGIC; - memncpy(mp_pci_tree->d_name, name, strlen(name)); + memncpy(cb_pci_tree->d_name, name, strlen(name)); - mp_pci_tree->d_off_struct = struct_ptr; - mp_pci_tree->d_sz_struct = struct_sz; - mp_pci_tree->d_off_props = 0; - mp_pci_tree->d_sz_props = 0; - mp_pci_tree->d_version = SYS_PCI_VERSION; + cb_pci_tree->d_off_struct = struct_ptr; + cb_pci_tree->d_sz_struct = struct_sz; + cb_pci_tree->d_off_props = 0; + cb_pci_tree->d_sz_props = 0; + cb_pci_tree->d_version = SYS_PCI_VERSION; - mp_pci_tree->d_next_sibling = - (mp_pci_num_t)(mp_pci_tree + sizeof(struct hw_mp_pci_tree)); - mp_pci_tree->d_first_node = (mp_pci_num_t)mp_latest_tree; + cb_pci_tree->d_next_sibling = + (cb_pci_num_t)(cb_pci_tree + sizeof(struct hw_cb_pci_tree)); + cb_pci_tree->d_first_node = (cb_pci_num_t)cb_latest_tree; - mp_latest_tree = mp_pci_tree; - mp_last_tree = mp_pci_tree; + cb_latest_tree = cb_pci_tree; + cb_last_tree = cb_pci_tree; - mp_put_string(">> Append device: "); - mp_put_string(name); - mp_put_string("\r\n"); + cb_put_string(">> Append device: "); + cb_put_string(name); + cb_put_string("\r\n"); return yes; } diff --git a/src/coreboot-print-name.c b/src/coreboot-print-name.c index 0ce81f8..70516b7 100644 --- a/src/coreboot-print-name.c +++ b/src/coreboot-print-name.c @@ -8,21 +8,21 @@ /// @brief Print firmware name. /// @param -void mp_print_name(void) +void cb_print_name(void) { #ifdef __COMPILE_POWERPC__ - mp_put_string(">> CoreBoot for POWER.\r\n"); + cb_put_string(">> CoreBoot for POWER.\r\n"); #endif // __COMPILE_POWERPC__ #ifdef __COMPILE_ARM64__ - mp_put_string(">> CoreBoot for ARM64.\r\n"); + cb_put_string(">> CoreBoot for ARM64.\r\n"); #endif // __COMPILE_POWERPC__ #ifdef __COMPILE_AMD64__ - mp_put_string(">> CoreBoot for AMD64.\r\n"); + cb_put_string(">> CoreBoot for AMD64.\r\n"); #endif // __COMPILE_POWERPC__ #ifdef __COMPILE_RISCV__ - mp_put_string(">> CoreBoot for RISC-V.\r\n"); + cb_put_string(">> CoreBoot for RISC-V.\r\n"); #endif // __COMPILE_POWERPC__ } diff --git a/src/coreboot-start.c b/src/coreboot-start.c index 46453ca..69335ec 100644 --- a/src/coreboot-start.c +++ b/src/coreboot-start.c @@ -22,59 +22,59 @@ ///////////////////////////////////////////////////////////////////////////////////////// -extern void mp_append_scsi_tree(void); -extern void mp_append_video_tree(void); +extern void cb_append_scsi_tree(void); +extern void cb_append_video_tree(void); -extern void mp_start_context(uintptr_t); -extern void mp_start_rom(void); +extern void cb_start_context(uintptr_t); +extern void cb_start_rom(void); -extern int mp_boot_processor_ready; +extern int cb_boot_processor_ready; /// @brief hardware thread counter. -uint64_t __mp_hart_counter = 0UL; +uint64_t __cb_hart_counter = 0UL; /// @brief Start executing the firmware. /// @param -void mp_start_exec(void) +void cb_start_exec(void) { - ++__mp_hart_counter; + ++__cb_hart_counter; - uintptr_t hart = __mp_hart_counter; + uintptr_t hart = __cb_hart_counter; - mp_sync_synchronize(); + cb_sync_synchronize(); // let the hart 0 init our stuff. if (hart == 1) { - mp_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the "); - mp_put_string(__DATE__); - mp_put_string("\r\r\n"); + cb_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the "); + cb_put_string(__DATE__); + cb_put_string("\r\r\n"); #ifdef __COMPILE_POWERPC__ - mp_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n"); + cb_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n"); #endif // __COMPILE_POWERPC__ #ifdef __COMPILE_AMD64__ - mp_put_string("CB> CPU: x64 Based SoC.\r\r\n"); + cb_put_string("CB> CPU: x64 Based SoC.\r\r\n"); #endif // __COMPILE_AMD64__ #ifdef __COMPILE_ARM64__ - mp_put_string("CB> CPU: AArch64 Based SoC.\r\r\n"); + cb_put_string("CB> CPU: AArch64 Based SoC.\r\r\n"); #endif // __COMPILE_ARM64__ #ifdef __COMPILE_ARM32__ - mp_put_string("CB> CPU: AArch32 Based SoC.\r\r\n"); + cb_put_string("CB> CPU: AArch32 Based SoC.\r\r\n"); #endif // __COMPILE_ARM64__ #ifdef __COMPILE_RISCV__ - mp_put_string("CB> CPU: RV64 Based SoC.\r\r\n"); + cb_put_string("CB> CPU: RV64 Based SoC.\r\r\n"); #endif // __COMPILE_RISCV__ } /// @brief Boots here if LX header matches what we except. - volatile struct mp_boot_header* boot_hdr = - (volatile struct mp_boot_header*)(SYS_FLASH_BASE_ADDR); + volatile struct cb_boot_header* boot_hdr = + (volatile struct cb_boot_header*)(SYS_FLASH_BASE_ADDR); /** boot if: @@ -89,35 +89,35 @@ void mp_start_exec(void) { if (hart == 1) { - mp_put_string("CB> Can't Boot the Stage2, invalid signature. (CB0003)\r\n"); + cb_put_string("CB> Can't Boot the Stage2, invalid signature. (CB0003)\r\n"); } } else { if (hart == 1) { - mp_put_string("CB> Executing Stage2: "); - mp_put_string((const char*)boot_hdr->h_name); - mp_put_char('\r'); - mp_put_char('\n'); + cb_put_string("CB> Executing Stage2: "); + cb_put_string((const char*)boot_hdr->h_name); + cb_put_char('\r'); + cb_put_char('\n'); // printf("CB> address: %x\n", boot_hdr->h_start_address); } if (boot_hdr->h_start_address != 0) { - mp_boot_processor_ready = 1; - mp_start_context(boot_hdr->h_start_address); + cb_boot_processor_ready = 1; + cb_start_context(boot_hdr->h_start_address); } - mp_put_string("CB> Stage2 has returned? (CB0002)\r\n"); + cb_put_string("CB> Stage2 has returned? (CB0002)\r\n"); } } else { if (hart == 1) { - mp_put_string("CB> Can't boot to Stage2. (CB0001)\r\n"); + cb_put_string("CB> Can't boot to Stage2. (CB0001)\r\n"); } } @@ -127,9 +127,9 @@ void mp_start_exec(void) { while (1) { - if (__mp_hart_counter == 0) + if (__cb_hart_counter == 0) { - mp_restart_machine(); + cb_restart_machine(); } } } diff --git a/src/coreboot-string.c b/src/coreboot-string.c index 88b5efa..49210fa 100644 --- a/src/coreboot-string.c +++ b/src/coreboot-string.c @@ -6,7 +6,7 @@ /** * @file coreboot-string.c - * @author Amlal EL Mahrouss (amlal@el-mahrouss-logic.com) + * @author Amlal EL Mahrouss (amlal@nekernel.org) * @brief string library. * @version 0.1 * @date 2024-01-16 diff --git a/src/ppc64/linkscript.ld b/src/ppc64/linkscript.ld index da9209c..660ed07 100644 --- a/src/ppc64/linkscript.ld +++ b/src/ppc64/linkscript.ld @@ -1,4 +1,4 @@ -ENTRY(mp_reset_vector)
+ENTRY(cb_reset_vector)
SECTIONS
{
. = 0xf00000;
@@ -11,5 +11,5 @@ SECTIONS . = . + 0x1000; /* 4kB of stack memory */
stack_top = .;
- PROVIDE(mp_memory_end = .);
+ PROVIDE(cb_memory_end = .);
}
diff --git a/src/ppc64/ppc64-boot.S b/src/ppc64/ppc64-boot.S index f28b4f3..17d6fa5 100644 --- a/src/ppc64/ppc64-boot.S +++ b/src/ppc64/ppc64-boot.S @@ -1,9 +1,9 @@ .balign 4
.section .text
-.global mp_reset_vector
+.global cb_reset_vector
-mp_reset_vector:
+cb_reset_vector:
bl .Laddr /* get current address */
.Laddr:
mflr 4 /* real address of .Laddr */
@@ -17,27 +17,27 @@ mp_reset_vector: /* Let her rip */
- bl mp_init_hw
+ bl cb_init_hw
/* finally execute the firmware */
- bl mp_start_exec
+ bl cb_start_exec
/* return value from main is argument to exit */
- bl mp_reset_vector
+ bl cb_reset_vector
trap
-.global mp_start_rom
-.global mp_start_context
-.global mp_boot_processor_ready
+.global cb_start_rom
+.global cb_start_context
+.global cb_boot_processor_ready
.equ SYS_BOOT_ADDR, 0x1030000
-mp_start_rom:
+cb_start_rom:
lis 3, SYS_BOOT_ADDR@h
addi 3, 3, SYS_BOOT_ADDR@l
blr
-mp_start_context:
+cb_start_context:
li 4, 0
cmp 0, 0, 4, 3
blt run_context
@@ -52,5 +52,5 @@ run_context: .data
-mp_boot_processor_ready:
+cb_boot_processor_ready:
.word 0
diff --git a/src/ppc64/ppc64-err.c b/src/ppc64/ppc64-err.c index ebf8452..55f9b5d 100644 --- a/src/ppc64/ppc64-err.c +++ b/src/ppc64/ppc64-err.c @@ -10,11 +10,11 @@ /// @brief Goes into a panic state.
/// @param reason why?
-void mp_panic(const char* reason)
+void cb_panic(const char* reason)
{
- mp_put_string("Error: ");
- mp_put_string(reason);
- mp_put_char('\n');
+ cb_put_string("Error: ");
+ cb_put_string(reason);
+ cb_put_char('\n');
while (yes)
{
diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c index 336c0e9..93000d8 100644 --- a/src/ppc64/ppc64-hal.c +++ b/src/ppc64/ppc64-hal.c @@ -10,7 +10,7 @@ #include <lib/pci-tree.h>
#include <lib/boot.h>
-void mp_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)
+void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)
{
mtspr(MAS0, mas0);
mtspr(MAS1, mas1);
@@ -18,10 +18,10 @@ void mp_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, ui mtspr(MAS3, mas3);
mtspr(MAS7, mas7);
- mp_flush_tlb();
+ cb_flush_tlb();
}
-void mp_set_tlb(uint8_t tlb,
+void cb_set_tlb(uint8_t tlb,
uint32_t epn,
uint64_t rpn,
uint8_t perms,
@@ -42,17 +42,17 @@ void mp_set_tlb(uint8_t tlb, uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
uint32_t mas7 = FSL_BOOKE_MAS7(rpn);
- mp_write_tlb(mas0, mas1, mas2, mas3, mas7);
+ cb_write_tlb(mas0, mas1, mas2, mas3, mas7);
}
/// @brief Init hardware before jumping to kernel.
/// @param
-void mp_init_hw(void)
+void cb_init_hw(void)
{
/// amlal:
/// map VGA framebuffer
- mp_set_tlb(0, SYS_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
+ cb_set_tlb(0, SYS_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
0x0000A000, /* p_addr. 0x0000A0000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -63,7 +63,7 @@ void mp_init_hw(void) // map ccsrbar and uart.
// at start we execute from esel = 0, so chose something else..
- mp_set_tlb(1, SYS_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
+ cb_set_tlb(1, SYS_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
0xfe0000000, /* p_addr. 0xfe0000000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -74,7 +74,7 @@ void mp_init_hw(void) /// amlal:
/// map pci base for kernel
- mp_set_tlb(0, SYS_BASE_ADDRESS, /* v_addr, 0xFE008000 */
+ cb_set_tlb(0, SYS_BASE_ADDRESS, /* v_addr, 0xFE008000 */
0xFE0008000, /* p_addr. 0xfe0000000 */
MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
@@ -83,17 +83,17 @@ void mp_init_hw(void) BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
1);
- mp_pci_init_tree();
+ cb_pci_init_tree();
- mp_pci_append_tree("@fb", SYS_FRAMEBUFFER_ADDR, 0x0);
- mp_pci_append_tree("@mbci", 0x0, 0x0);
- mp_pci_append_tree("@serial", SYS_UART_BASE, 0);
- mp_pci_append_tree("@pci", SYS_BASE_ADDRESS, 0x0);
+ cb_pci_append_tree("@fb", SYS_FRAMEBUFFER_ADDR, 0x0);
+ cb_pci_append_tree("@mbci", 0x0, 0x0);
+ cb_pci_append_tree("@serial", SYS_UART_BASE, 0);
+ cb_pci_append_tree("@pci", SYS_BASE_ADDRESS, 0x0);
- mp_flush_tlb();
+ cb_flush_tlb();
}
-void mp_flush_tlb(void)
+void cb_flush_tlb(void)
{
asm volatile("isync;tlbwe;msync;isync");
};
diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c index 23aeebd..43cd1c5 100644 --- a/src/ppc64/ppc64-uart.c +++ b/src/ppc64/ppc64-uart.c @@ -19,7 +19,7 @@ volatile ascii_char_t* const UART0DR = (ascii_char_t*)SYS_NS16550_COM1; /// @brief Get character from UART.
/// @param
/// @return
-utf_char_t mp_get_char(void)
+utf_char_t cb_get_char(void)
{
while (!(*(((volatile uint8_t*)UART0DR) + 0x05) & 0x01))
;
@@ -28,19 +28,19 @@ utf_char_t mp_get_char(void) /// @brief Put character into UART.
/// @param ch
-void mp_put_char(utf_char_t ch)
+void cb_put_char(utf_char_t ch)
{
*UART0DR = (ascii_char_t)(ch);
}
/// @brief Put string in UART.
/// @param text the input text.
-size_t mp_put_string(const char* text)
+size_t cb_put_string(const char* text)
{
while (*text != '\0')
{ /* Loop until end of string */
- mp_put_char(*text); /* Transmit char */
+ cb_put_char(*text); /* Transmit char */
text++; /* Next char */
}
diff --git a/src/rv64/linkscript.ld b/src/rv64/linkscript.ld index 0a82477..ca4e8dc 100644 --- a/src/rv64/linkscript.ld +++ b/src/rv64/linkscript.ld @@ -1,4 +1,4 @@ -ENTRY(mp_reset_vector); +ENTRY(cb_reset_vector); . = 0x80000000; @@ -12,7 +12,7 @@ SECTIONS { PROVIDE(_text_end = .); } - PROVIDE(mp_global_pointer = .); + PROVIDE(cb_global_pointer = .); .bss : ALIGN(4K) { PROVIDE(_bss_start = .); @@ -39,8 +39,8 @@ SECTIONS { PROVIDE(_data_end = .); } - PROVIDE(mp_stack_end = . + 0x1000); + PROVIDE(cb_stack_end = . + 0x1000); - PROVIDE(mp_memory_end = .); - PROVIDE(mp_boot_processor_ready = . + 0x4); + PROVIDE(cb_memory_end = .); + PROVIDE(cb_boot_processor_ready = . + 0x4); } diff --git a/src/rv64/rv64-api.s b/src/rv64/rv64-api.s index f7427de..8fe29e1 100644 --- a/src/rv64/rv64-api.s +++ b/src/rv64/rv64-api.s @@ -8,9 +8,9 @@ # ==================================== .balign 4 -.global mp_flush_tlb +.global cb_flush_tlb -mp_flush_tlb: +cb_flush_tlb: sfence.vma ret diff --git a/src/rv64/rv64-boot.s b/src/rv64/rv64-boot.s index 8fca5de..ae975da 100644 --- a/src/rv64/rv64-boot.s +++ b/src/rv64/rv64-boot.s @@ -14,27 +14,27 @@ .option norvc -.extern mp_start_exec +.extern cb_start_exec -.global mp_reset_vector -.global mp_hart_present +.global cb_reset_vector +.global cb_hart_present .section .init .align 4 -mp_reset_vector: +cb_reset_vector: .cfi_startproc csrr t0, mhartid - beqz t0, mp_start_exec_asm + beqz t0, cb_start_exec_asm - j mp_start_other + j cb_start_other .cfi_endproc -mp_start_exec_asm: - lw t0, __mp_hart_counter - lw t1, mp_boot_processor_ready +cb_start_exec_asm: + lw t0, __cb_hart_counter + lw t1, cb_boot_processor_ready not t0, t0 @@ -43,11 +43,11 @@ mp_start_exec_asm: .option push .option norelax - la gp, mp_global_pointer + la gp, cb_global_pointer .option pop - la sp, mp_stack_end + la sp, cb_stack_end la t5, _bss_start la t6, _bss_end @@ -58,39 +58,39 @@ crt0_bss_clear: bgeu t5, t6, crt0_bss_clear - j mp_start_exec - j mp_hang + j cb_start_exec + j cb_hang -mp_start_other: - lw t1, mp_boot_processor_ready +cb_start_other: + lw t1, cb_boot_processor_ready -mp_start_other_wait: - beq t1, zero, mp_start_other_wait +cb_start_other_wait: + beq t1, zero, cb_start_other_wait - la t0, mp_stack_list - ld t1, mp_stack_align + la t0, cb_stack_list + ld t1, cb_stack_align mv sp, t0 add t0, zero, t1 - j mp_hang + j cb_hang -.global mp_start_rom -.global mp_start_context +.global cb_start_rom +.global cb_start_context -mp_start_context: +cb_start_context: mv ra, zero add ra, zero, a1 mret .equ SYS_BOOT_ADDR, 0x80020000 -mp_start_rom: +cb_start_rom: li x5, SYS_BOOT_ADDR mv ra, zero add ra, zero, t0 mret -mp_hang: - j mp_start_exec +cb_hang: + j cb_start_exec L0: wfi j L0 @@ -98,17 +98,17 @@ L0: .bss .align 4 -mp_hart_present: +cb_hart_present: .long 0 .data .align 4 -mp_stack_list: - .long mp_memory_end +cb_stack_list: + .long cb_memory_end -mp_stack_align: +cb_stack_align: .word 0x8000 -__mp_max_harts: +__cb_max_harts: .word 2 diff --git a/src/rv64/rv64-err.c b/src/rv64/rv64-err.c index 19be090..914bb91 100644 --- a/src/rv64/rv64-err.c +++ b/src/rv64/rv64-err.c @@ -10,11 +10,11 @@ /// @brief Goes into a panic state. /// @param reason why? -void mp_panic(const char* reason) +void cb_panic(const char* reason) { - mp_put_string("Error: "); - mp_put_string(reason); - mp_put_char('\n'); + cb_put_string("Error: "); + cb_put_string(reason); + cb_put_char('\n'); while (yes) { diff --git a/src/rv64/rv64-uart.c b/src/rv64/rv64-uart.c index ea896bc..3e3eee7 100644 --- a/src/rv64/rv64-uart.c +++ b/src/rv64/rv64-uart.c @@ -11,34 +11,34 @@ /* this file handles the UART */ -static uint8_t* mp_uart_ptr = (uint8_t*)SYS_UART_BASE; +static uint8_t* cb_uart_ptr = (uint8_t*)SYS_UART_BASE; -utf_char_t mp_get_char(void) +utf_char_t cb_get_char(void) { uintptr_t ptr = SYS_UART_BASE; while (!(*(((volatile uint8_t*)ptr) + 0x05) & 0x01)) ; - return (utf_char_t)*mp_uart_ptr; + return (utf_char_t)*cb_uart_ptr; } // we need that one, to avoid sending mutliple chars to UART. -static boolean mp_locked_put_char = no; +static boolean cb_locked_put_char = no; -void mp_put_char(utf_char_t ch) +void cb_put_char(utf_char_t ch) { - while (mp_locked_put_char) + while (cb_locked_put_char) { } - mp_locked_put_char = yes; - *mp_uart_ptr = ch; - mp_locked_put_char = no; + cb_locked_put_char = yes; + *cb_uart_ptr = ch; + cb_locked_put_char = no; } /// @brief UART put string /// @param text the input text. -size_t mp_put_string(const char* text) +size_t cb_put_string(const char* text) { if (text == nil) return 0; @@ -47,7 +47,7 @@ size_t mp_put_string(const char* text) for (; i < strlen(text); i++) { - mp_put_char(text[i]); + cb_put_char(text[i]); } return i; |