feat: Update 30-PIN specs and implementation. Breaking API changes in

NeBoot as well.

Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>

5 files changed, 36 insertions, 36 deletions

diff --git a/src/ppc64/linkscript.ld b/src/ppc64/linkscript.ld
index 660ed07..e23df04 100644
--- a/src/ppc64/linkscript.ld
+++ b/src/ppc64/linkscript.ld
@@ -1,4 +1,4 @@
-ENTRY(cb_reset_vector)

+ENTRY(nb_reset_vector)

 SECTIONS

 {

   . = 0xf00000;

@@ -11,5 +11,5 @@ SECTIONS
  . = . + 0x1000; /* 4kB of stack memory */

  stack_top = .;

 

- PROVIDE(cb_memory_end = .);

+ PROVIDE(nb_memory_end = .);

 }

diff --git a/src/ppc64/ppc64-boot.S b/src/ppc64/ppc64-boot.S
index 6fb2a79..33cbd01 100644
--- a/src/ppc64/ppc64-boot.S
+++ b/src/ppc64/ppc64-boot.S
@@ -6,9 +6,9 @@
 .balign 4

 .section .text

 

-.global cb_reset_vector

+.global nb_reset_vector

 

-cb_reset_vector:

+nb_reset_vector:

 	bl	.Laddr			/* get current address */

 .Laddr:

 	mflr	4			/* real address of .Laddr */

@@ -22,27 +22,27 @@ cb_reset_vector:
 

 	/* Let her rip */

 

-	bl 	cb_init_hw

+	bl 	nb_init_hw

 	/* finally execute the firmware */

-	bl	cb_start_exec

+	bl	nb_start_exec

 	/* return value from main is argument to exit */

-	bl	cb_reset_vector

+	bl	nb_reset_vector

 

 	trap

 

-.global cb_start_rom

-.global cb_start_context

-.global cb_boot_processor_ready

+.global nb_start_rom

+.global nb_start_context

+.global nb_boot_processor_ready

 

 .equ NB_BOOT_ADDR, 0x1030000

 

-cb_start_rom:

+nb_start_rom:

 	lis 3, NB_BOOT_ADDR@h

 	addi 3, 3, NB_BOOT_ADDR@l

 

 	blr

 

-cb_start_context:

+nb_start_context:

 	li 4, 0

 	cmp 0, 0, 4, 3

 	blt run_context

@@ -57,5 +57,5 @@ run_context:
 

 .data

 

-cb_boot_processor_ready:

+nb_boot_processor_ready:

 	.word 0

diff --git a/src/ppc64/ppc64-err.c b/src/ppc64/ppc64-err.c
index 91588a7..6ade80a 100644
--- a/src/ppc64/ppc64-err.c
+++ b/src/ppc64/ppc64-err.c
@@ -9,10 +9,10 @@
 

 /// @brief Goes into a panic state.

 /// @param reason why?

-void cb_panic(const char* reason) {

-  cb_put_string("Error: ");

-  cb_put_string(reason);

-  cb_put_char('\n');

+void nb_panic(const char* reason) {

+  nb_put_string("Error: ");

+  nb_put_string(reason);

+  nb_put_char('\n');

 

   while (yes) {

     (void) 0;

diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
index b476ddb..07d397b 100644
--- a/src/ppc64/ppc64-hal.c
+++ b/src/ppc64/ppc64-hal.c
@@ -9,17 +9,17 @@
 #include <include/boot.h>

 #include <include/pci-tree.h>

 

-void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7) {

+void nb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7) {

   mtspr(MAS0, mas0);

   mtspr(MAS1, mas1);

   mtspr(MAS2, mas2);

   mtspr(MAS3, mas3);

   mtspr(MAS7, mas7);

 

-  cb_flush_tlb();

+  nb_flush_tlb();

 }

 

-void cb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts,

+void nb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts,

                 uint8_t esel, uint8_t tsize, uint8_t iprot) {

   if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1)) {

     // this mmu-version does not allow odd tsize values

@@ -32,15 +32,15 @@ void cb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t
   uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);

   uint32_t mas7 = FSL_BOOKE_MAS7(rpn);

 

-  cb_write_tlb(mas0, mas1, mas2, mas3, mas7);

+  nb_write_tlb(mas0, mas1, mas2, mas3, mas7);

 }

 

 /// @brief Init hardware before jumping to kernel.

 /// @param

-void cb_init_hw(void) {

+void nb_init_hw(void) {

   /// amlal:

   /// map VGA framebuffer

-  cb_set_tlb(0, NB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */

+  nb_set_tlb(0, NB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */

              0x0000A000,             /* p_addr. 0x0000A0000  */

              MAS3_SW | MAS3_SR,      /* perm  type=TLB_MAP_IO */

              MAS2_I | MAS2_G,        /* wimge type=TLB_MAP_IO */

@@ -51,7 +51,7 @@ void cb_init_hw(void) {
 

   // map ccsrbar and uart.

   // at start we execute from esel = 0, so chose something else..

-  cb_set_tlb(1, NB_UART_BASE,   /* v_addr   0xe0000000 see  qemu-ppce500.h */

+  nb_set_tlb(1, NB_UART_BASE,   /* v_addr   0xe0000000 see  qemu-ppce500.h */

              0xfe0000000,       /* p_addr. 0xfe0000000  */

              MAS3_SW | MAS3_SR, /* perm  type=TLB_MAP_IO */

              MAS2_I | MAS2_G,   /* wimge type=TLB_MAP_IO */

@@ -62,7 +62,7 @@ void cb_init_hw(void) {
 

   /// amlal:

   /// map pci base for kernel

-  cb_set_tlb(0, NB_BASE_ADDRESS, /* v_addr, 0xFE008000 */

+  nb_set_tlb(0, NB_BASE_ADDRESS, /* v_addr, 0xFE008000 */

              0xFE0008000,        /* p_addr. 0xfe0000000  */

              MAS3_SW | MAS3_SR,  /* perm  type=TLB_MAP_IO */

              MAS2_I | MAS2_G,    /* wimge type=TLB_MAP_IO */

@@ -71,16 +71,16 @@ void cb_init_hw(void) {
              BOOKE_PAGESZ_1M,    /* tsize  ie 2^10kB ie 1MB */

              1);

 

-  cb_pci_init_tree();

+  nb_pci_init_tree();

 

-  cb_pci_append_tree("@fb", NB_FRAMEBUFFER_ADDR, 0x0);

-  cb_pci_append_tree("@mbci", 0x0, 0x0);  // did not found a MBCI base for now...

-  cb_pci_append_tree("@serial", NB_UART_BASE, 0);

-  cb_pci_append_tree("@pci", NB_BASE_ADDRESS, 0x0);

+  nb_pci_append_tree("@fb", NB_FRAMEBUFFER_ADDR, 0x0);

+  nb_pci_append_tree("@mbci", 0x0, 0x0);  // did not found a MBCI base for now...

+  nb_pci_append_tree("@serial", NB_UART_BASE, 0);

+  nb_pci_append_tree("@pci", NB_BASE_ADDRESS, 0x0);

 

-  cb_flush_tlb();

+  nb_flush_tlb();

 }

 

-void cb_flush_tlb(void) {

+void nb_flush_tlb(void) {

   asm volatile("isync;tlbwe;msync;isync");

 };

diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c
index af9c5b3..c081ac7 100644
--- a/src/ppc64/ppc64-uart.c
+++ b/src/ppc64/ppc64-uart.c
@@ -18,23 +18,23 @@ volatile ascii_char_t* const UART0DR = (ascii_char_t*) NB_NS16550_COM1;
 /// @brief Get character from UART.

 /// @param

 /// @return

-utf_char_t cb_get_char(void) {

+utf_char_t nb_get_char(void) {

   while (!(*(((volatile uint8_t*) UART0DR) + 0x05) & 0x01));

   return (utf_char_t) *UART0DR;

 }

 

 /// @brief Put character into UART.

 /// @param ch

-void cb_put_char(utf_char_t ch) {

+void nb_put_char(utf_char_t ch) {

   *UART0DR = (ascii_char_t) (ch);

 }

 

 /// @brief Put string in UART.

 /// @param text the input text.

-size_t cb_put_string(const char* text) {

+size_t nb_put_string(const char* text) {

   while (*text != '\0') { /* Loop until end of string */

 

-    cb_put_char(*text); /* Transmit char */

+    nb_put_char(*text); /* Transmit char */

 

     text++; /* Next char */

   }