coreboot: rename from NeKernel firmware, refactor symbols to `cb_`, update docs

This patch completes a major renaming and cleanup of the firmware codebase:

- Rename project from "NeKernel Firmware" to "CoreBoot" in README and comments.
- Replace all `mp_`-prefixed symbols with `cb_` to reflect the new naming scheme.
- Remove obsolete SPECIFICATION.TXT and replace with SPECIFICATION_FIRMWARE.md.
- Update memory-mapped I/O helpers, TLB init, and platform-specific code to match `cb_*` naming.
- Refactor low-level UART, panic, PCI-tree, partition map, and context setup to use unified `cb_` API.
- Adjust linker scripts and boot vectors for ARM64, PPC64, and RV64 targets accordingly.
- Add Doxygen documentation note to README.

This change is part of an ongoing effort to rebrand and unify the firmware interface, improve naming clarity, and better align with platform-specific toolchains.

Signed-off-by: Amlal El Mahrouss <amlal@nekernel.org>

5 files changed, 36 insertions, 36 deletions

diff --git a/src/ppc64/linkscript.ld b/src/ppc64/linkscript.ld
index da9209c..660ed07 100644
--- a/src/ppc64/linkscript.ld
+++ b/src/ppc64/linkscript.ld
@@ -1,4 +1,4 @@
-ENTRY(mp_reset_vector)

+ENTRY(cb_reset_vector)

 SECTIONS

 {

   . = 0xf00000;

@@ -11,5 +11,5 @@ SECTIONS
  . = . + 0x1000; /* 4kB of stack memory */

  stack_top = .;

 

- PROVIDE(mp_memory_end = .);

+ PROVIDE(cb_memory_end = .);

 }

diff --git a/src/ppc64/ppc64-boot.S b/src/ppc64/ppc64-boot.S
index f28b4f3..17d6fa5 100644
--- a/src/ppc64/ppc64-boot.S
+++ b/src/ppc64/ppc64-boot.S
@@ -1,9 +1,9 @@
 .balign 4

 .section .text

 

-.global mp_reset_vector

+.global cb_reset_vector

 

-mp_reset_vector:

+cb_reset_vector:

 	bl	.Laddr			/* get current address */

 .Laddr:

 	mflr	4			/* real address of .Laddr */

@@ -17,27 +17,27 @@ mp_reset_vector:
 

 	/* Let her rip */

 

-	bl 	mp_init_hw

+	bl 	cb_init_hw

 	/* finally execute the firmware */

-	bl	mp_start_exec

+	bl	cb_start_exec

 	/* return value from main is argument to exit */

-	bl	mp_reset_vector

+	bl	cb_reset_vector

 

 	trap

 

-.global mp_start_rom

-.global mp_start_context

-.global mp_boot_processor_ready

+.global cb_start_rom

+.global cb_start_context

+.global cb_boot_processor_ready

 

 .equ SYS_BOOT_ADDR, 0x1030000

 

-mp_start_rom:

+cb_start_rom:

 	lis 3, SYS_BOOT_ADDR@h

 	addi 3, 3, SYS_BOOT_ADDR@l

 

 	blr

 

-mp_start_context:

+cb_start_context:

 	li 4, 0

 	cmp 0, 0, 4, 3

 	blt run_context

@@ -52,5 +52,5 @@ run_context:
 

 .data

 

-mp_boot_processor_ready:

+cb_boot_processor_ready:

 	.word 0

diff --git a/src/ppc64/ppc64-err.c b/src/ppc64/ppc64-err.c
index ebf8452..55f9b5d 100644
--- a/src/ppc64/ppc64-err.c
+++ b/src/ppc64/ppc64-err.c
@@ -10,11 +10,11 @@
 

 /// @brief Goes into a panic state.

 /// @param reason why?

-void mp_panic(const char* reason)

+void cb_panic(const char* reason)

 {

-	mp_put_string("Error: ");

-	mp_put_string(reason);

-	mp_put_char('\n');

+	cb_put_string("Error: ");

+	cb_put_string(reason);

+	cb_put_char('\n');

 

 	while (yes)

 	{

diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
index 336c0e9..93000d8 100644
--- a/src/ppc64/ppc64-hal.c
+++ b/src/ppc64/ppc64-hal.c
@@ -10,7 +10,7 @@
 #include <lib/pci-tree.h>

 #include <lib/boot.h>

 

-void mp_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)

+void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)

 {

 	mtspr(MAS0, mas0);

 	mtspr(MAS1, mas1);

@@ -18,10 +18,10 @@ void mp_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, ui
 	mtspr(MAS3, mas3);

 	mtspr(MAS7, mas7);

 

-	mp_flush_tlb();

+	cb_flush_tlb();

 }

 

-void mp_set_tlb(uint8_t	 tlb,

+void cb_set_tlb(uint8_t	 tlb,

 				uint32_t epn,

 				uint64_t rpn,

 				uint8_t	 perms,

@@ -42,17 +42,17 @@ void mp_set_tlb(uint8_t	 tlb,
 	uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);

 	uint32_t mas7 = FSL_BOOKE_MAS7(rpn);

 

-	mp_write_tlb(mas0, mas1, mas2, mas3, mas7);

+	cb_write_tlb(mas0, mas1, mas2, mas3, mas7);

 }

 

 /// @brief Init hardware before jumping to kernel.

 /// @param

-void mp_init_hw(void)

+void cb_init_hw(void)

 {

 

 	/// amlal:

 	/// map VGA framebuffer

-	mp_set_tlb(0, SYS_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */

+	cb_set_tlb(0, SYS_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */

 			   0x0000A000,				/* p_addr. 0x0000A0000  */

 			   MAS3_SW | MAS3_SR,		/* perm  type=TLB_MAP_IO */

 			   MAS2_I | MAS2_G,			/* wimge type=TLB_MAP_IO */

@@ -63,7 +63,7 @@ void mp_init_hw(void)
 

 	// map ccsrbar and uart.

 	// at start we execute from esel = 0, so chose something else..

-	mp_set_tlb(1, SYS_UART_BASE,  /* v_addr   0xe0000000 see  qemu-ppce500.h */

+	cb_set_tlb(1, SYS_UART_BASE,  /* v_addr   0xe0000000 see  qemu-ppce500.h */

 			   0xfe0000000,		  /* p_addr. 0xfe0000000  */

 			   MAS3_SW | MAS3_SR, /* perm  type=TLB_MAP_IO */

 			   MAS2_I | MAS2_G,	  /* wimge type=TLB_MAP_IO */

@@ -74,7 +74,7 @@ void mp_init_hw(void)
 

 	/// amlal:

 	/// map pci base for kernel

-	mp_set_tlb(0, SYS_BASE_ADDRESS, /* v_addr, 0xFE008000 */

+	cb_set_tlb(0, SYS_BASE_ADDRESS, /* v_addr, 0xFE008000 */

 			   0xFE0008000,			/* p_addr. 0xfe0000000  */

 			   MAS3_SW | MAS3_SR,	/* perm  type=TLB_MAP_IO */

 			   MAS2_I | MAS2_G,		/* wimge type=TLB_MAP_IO */

@@ -83,17 +83,17 @@ void mp_init_hw(void)
 			   BOOKE_PAGESZ_1M,		/* tsize  ie 2^10kB ie 1MB */

 			   1);

 

-	mp_pci_init_tree();

+	cb_pci_init_tree();

 

-	mp_pci_append_tree("@fb", SYS_FRAMEBUFFER_ADDR, 0x0);

-	mp_pci_append_tree("@mbci", 0x0, 0x0);

-	mp_pci_append_tree("@serial", SYS_UART_BASE, 0);

-	mp_pci_append_tree("@pci", SYS_BASE_ADDRESS, 0x0);

+	cb_pci_append_tree("@fb", SYS_FRAMEBUFFER_ADDR, 0x0);

+	cb_pci_append_tree("@mbci", 0x0, 0x0);

+	cb_pci_append_tree("@serial", SYS_UART_BASE, 0);

+	cb_pci_append_tree("@pci", SYS_BASE_ADDRESS, 0x0);

 

-	mp_flush_tlb();

+	cb_flush_tlb();

 }

 

-void mp_flush_tlb(void)

+void cb_flush_tlb(void)

 {

 	asm volatile("isync;tlbwe;msync;isync");

 };

diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c
index 23aeebd..43cd1c5 100644
--- a/src/ppc64/ppc64-uart.c
+++ b/src/ppc64/ppc64-uart.c
@@ -19,7 +19,7 @@ volatile ascii_char_t* const UART0DR = (ascii_char_t*)SYS_NS16550_COM1;
 /// @brief Get character from UART.

 /// @param

 /// @return

-utf_char_t mp_get_char(void)

+utf_char_t cb_get_char(void)

 {

 	while (!(*(((volatile uint8_t*)UART0DR) + 0x05) & 0x01))

 		;

@@ -28,19 +28,19 @@ utf_char_t mp_get_char(void)
 

 /// @brief Put character into UART.

 /// @param ch

-void mp_put_char(utf_char_t ch)

+void cb_put_char(utf_char_t ch)

 {

 	*UART0DR = (ascii_char_t)(ch);

 }

 

 /// @brief Put string in UART.

 /// @param text the input text.

-size_t mp_put_string(const char* text)

+size_t cb_put_string(const char* text)

 {

 	while (*text != '\0')

 	{ /* Loop until end of string */

 

-		mp_put_char(*text); /* Transmit char */

+		cb_put_char(*text); /* Transmit char */

 

 		text++; /* Next char */

 	}